Display device

Abstract

A display device according to one embodiment of the present specification includes: a substrate having a first sub-pixel, a second sub-pixel, and a third sub-pixel, each sub-pixel including a light emitting region and a non-light emitting region; a first insulating layer disposed on the substrate; a first conductive layer disposed on the first insulating layer and including a first reflective electrode of the first sub-pixel, a first dummy electrode of the second sub-pixel, and a second dummy electrode of the third sub-pixel; a second insulating layer disposed on the first conductive layer; a second conductive layer disposed on the second insulating layer and including a second reflective electrode of the second sub-pixel and a third dummy electrode of the third sub-pixel; a third insulating layer disposed on the second conductive layer; and a third reflective electrode of a third sub-pixel disposed on the third insulating layer.

Description

Technical Field

[0001] This manual relates to display devices. Background Technology

[0002] With the development of the information society, the demand for display devices for displaying images is constantly increasing, and various types of display devices such as liquid crystal display (LCD) devices and organic light-emitting diode (OLED) display devices are being widely used.

[0003] Among these display devices, OLED displays, as a self-emissive type, have the advantages of wider viewing angles and higher contrast ratios. Furthermore, because they do not require a separate backlight, they can be lighter, thinner, and consume less power than LCD devices. Additionally, OLED displays can be driven with low voltage, have fast response times, and, most importantly, have low manufacturing costs.

[0004] Recently, there has been an increasing demand for OLED display devices that require augmented reality (AR), virtual reality (VR), or equivalent ultra-high resolution displays.

[0005] The descriptions provided in the Background section should not be considered prior art simply because they are mentioned in or related to that section. The Background section may include information describing one or more aspects of the subject matter, and the descriptions in this section do not limit this disclosure. Summary of the Invention

[0006] This specification provides a display device that can reduce or minimize the thickness deviation of the insulating layer.

[0007] This specification also provides a display device in which the deviation of the microcavity is reduced or minimized.

[0008] This specification also provides a display device that can achieve high color reproduction by emitting clearer colors and suppress or prevent image quality degradation.

[0009] The benefits of this specification are not limited to those described above, and other technical benefits can be deduced from the following embodiments.

[0010] According to one embodiment of this specification, a display device is provided, comprising: a substrate having a first sub-pixel, a second sub-pixel, and a third sub-pixel, each of the first sub-pixel, the second sub-pixel, and the third sub-pixel including a light-emitting region and a non-light-emitting region; a first insulating layer disposed on the substrate; a first conductive layer disposed on the first insulating layer and including a first reflective electrode of the first sub-pixel, a first dummy electrode of the second sub-pixel, and a second dummy electrode of the third sub-pixel; a second insulating layer disposed on the first conductive layer; a second conductive layer disposed on the second insulating layer and including a second reflective electrode of the second sub-pixel and a third dummy electrode of the third sub-pixel; a third insulating layer disposed on the second conductive layer; and a third reflective electrode of the third sub-pixel disposed on the third insulating layer.

[0011] According to another embodiment of this specification, a display device is provided, the display device comprising: a substrate having a first sub-pixel, a second sub-pixel, and a third sub-pixel, each of the first sub-pixel, the second sub-pixel, and the third sub-pixel including a light-emitting region and a non-light-emitting region; a first insulating layer on the substrate; a first reflective electrode of the first sub-pixel on the first insulating layer; a second insulating layer on the first reflective electrode; a second reflective electrode of the second sub-pixel on the second insulating layer; a third insulating layer on the second reflective electrode; a third reflective electrode of the third sub-pixel on the third insulating layer; and an anode electrode of the sub-pixel on either the second or third insulating layer, wherein, in the light-emitting region, the surface height of the anode electrode of the sub-pixel is different.

[0012] Details of other implementation methods are included in the detailed description and accompanying drawings.

[0013] According to the embodiments described in this specification, the thickness deviation of the insulating layer can be reduced or minimized.

[0014] According to the embodiments described in this specification, the deviation of the microcavity can be reduced or minimized.

[0015] According to the embodiments described in this specification, high color reproduction can be achieved by emitting clearer colors and image quality degradation can be suppressed or prevented.

[0016] According to the embodiments described in this specification, high color reproduction and reduced power consumption can be achieved.

[0017] However, the effects available from this specification are not limited to those described above, and those skilled in the art to which this specification pertains will be able to clearly understand other effects not mentioned based on the following description.

[0018] Other systems, methods, features, and advantages will be apparent to those skilled in the art, or will become apparent, upon review of the following figures and detailed description. All such additional systems, methods, features, and advantages are intended to be included in this specification, within the scope of this disclosure, and protected by the appended claims. The contents of this section should not be construed as limiting these claims. Further aspects and advantages are discussed below in conjunction with embodiments of this disclosure.

[0019] It should be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the claimed technical concept. Attached Figure Description

[0020] The accompanying drawings are included to provide a further understanding of this disclosure and are incorporated in and constitute a part of this application. The drawings illustrate embodiments of the disclosure and, together with the description, serve to explain the principles of the disclosure. In the drawings:

[0021] Figure 1 This is a plan view of a display device according to one embodiment.

[0022] Figure 2 It is along Figure 1 A cross-sectional view of line A-A' in the diagram.

[0023] Figure 3 yes Figure 2 A magnified view of region Q1 in the image.

[0024] Figure 4 It is based on Figure 2 A cross-sectional view of an organic light-emitting diode.

[0025] Figure 5 It is based on Figure 2 A cross-sectional view of an organic light-emitting diode (OLED) as a modified example.

[0026] Figures 6 to 15 This is a cross-sectional view of each process of a method for manufacturing a display device according to one embodiment.

[0027] Figure 16 This is a cross-sectional view of a display device according to another embodiment.

[0028] Figure 17 yes Figure 16 A magnified view of region Q2 in the image.

[0029] Figure 18 This is a cross-sectional view of a display device according to yet another embodiment.

[0030] Figure 19 This is a cross-sectional view of a display device according to another embodiment.

[0031] Throughout the accompanying drawings and detailed description, unless otherwise stated, the same reference numerals should be understood to refer to the same elements, features, and structures. For clarity, illustrative purposes, the relative dimensions and depictions of these elements may be exaggerated.

[0032] Description of reference numerals in the attached figures

[0033] 1: Display device

[0034] 2: Substrate

[0035] 3: Insulation layer

[0036] 4: Anode electrode

[0037] 5: Public Light-Generating Layer

[0038] 6: Cathode electrode

[0039] 7: Covering layer

[0040] 8: Encapsulation layer

[0041] 9: Color Filter Layer

[0042] 42: Reflective electrode

[0043] DM: Dummy Electrode

[0044] TR: Trench Detailed Implementation

[0045] Reference will now be made in detail to embodiments of this disclosure, examples of which are illustrated in the accompanying drawings. In the following description, detailed descriptions of well-known functions or configurations relevant to this document will be omitted where it is determined that such detailed descriptions unnecessarily obscure the essential points of the inventive concept. The progression of the described processing steps and / or operations is illustrative; however, the order of steps and / or operations is not limited to that described herein and can be varied as is known in the art, except for steps and / or operations that need to occur in a specific order. Similar reference numerals always denote similar elements. The names of corresponding elements used in the following explanation may have been chosen merely for convenience of writing the specification and may therefore differ from the names used in actual products.

[0046] The advantages and features of this disclosure and its implementation methods will be illustrated by the following exemplary embodiments described with reference to the accompanying drawings. However, this disclosure may be implemented in different forms and should not be construed as limited to the exemplary embodiments described herein. Rather, these exemplary embodiments are provided to make this disclosure thorough and complete enough to assist those skilled in the art in fully understanding its scope. Furthermore, this disclosure is limited only by the scope of the claims.

[0047] In the following description, embodiments will be described with reference to the accompanying drawings. In the specification, when a first component (or region, layer, portion, etc.) is described as "on" a second component, "connected" or "attached" to a second component, it means that the first component can be directly connected / attached to the second component, or a third component can be inserted therein.

[0048] The same reference numerals indicate the same components. Additionally, in the drawings, the thickness, scale, and dimensions of components are exaggerated for effective description of the technical content. The term "and / or" includes all one or more combinations that can be defined by the associated configuration.

[0049] Terms such as "first" and "second" can be used to describe various components, but components are not limited by the terms. These terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the implementation, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component. Unless the context clearly specifies otherwise, the singular includes the plural.

[0050] Terms such as “below,” “on the lower side,” “above,” and “on the upper side” are used to describe the relationships between the components shown in the accompanying drawings. These terms are relative concepts and are described relative to the directions indicated by the markings in the drawings.

[0051] It is understood that terms such as “comprising” or “having” are intended to specify the presence of features, numbers, steps, operations, components, parts or combinations thereof described in the specification, and do not preclude the possibility of the presence or addition of one or more other features, numbers, steps, operations, components, parts or combinations thereof.

[0052] Any implementation described as an "example" in this article is not necessarily to be interpreted as being more preferred or advantageous than other implementations.

[0053] Furthermore, when referring to any size, relative dimensions, etc., even without a specific description, the numerical values ​​or corresponding information of the component or feature (e.g., level, range, etc.) should be taken into account, including tolerances or error ranges that may be caused by various factors (e.g., process factors, internal or external shocks, noise, etc.). In addition, the term "can" fully encompasses all the meanings of the term "able to".

[0054] When describing temporal relationships, when the temporal order is described as such as "after", "following", "next", and "before", discontinuous situations may be included unless more restrictive terms such as "exactly", "immediately", or "directly" are used.

[0055] In describing the elements of this disclosure, the terms “first,” “second,” “A,” “B,” “(a),” and “(b)” may be used. These terms may be used only to distinguish one element from another, and the nature, order, sequence, or number of the respective elements shall not be limited by these terms. For example, without departing from the scope of this disclosure, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0056] The expressions "first element," "second element," and " / or" "third element" should be understood as one of the first, second, and third elements, or any combination or all combinations of the first, second, and third elements. By way of example, A, B, and / or C can refer to only A; only B; only C; any combination or some combination of A, B, and C; or all of A, B, and C.

[0057] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which the example embodiments pertain. It will also be understood that terms such as those defined in common dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant field, and should not be interpreted in an idealized or overly formal sense unless expressly defined herein. For example, the terms “component” or “unit” may be applied, for example, to a single circuit or structure, an integrated circuit, a computational block of a circuit device, or any structure configured to perform the described functions, as would be understood by one of ordinary skill in the art.

[0058] Instead, these embodiments may be provided to make this disclosure thorough and complete enough to assist those skilled in the art in fully understanding its scope. Furthermore, this disclosure is limited only by the scope of the claims.

[0059] Figure 1 This is a plan view of a display device according to one embodiment. Figure 2 It is along Figure 1 A cross-sectional view of line A-A' in the diagram. Figure 3 yes Figure 2 A magnified view of region Q1 in the image.

[0060] Reference Figures 1 to 3 According to one embodiment, the display device 1 includes a substrate 2, reflective electrodes 42a, 42b and 42c, dummy electrodes DM (DM1, DM2 and DM3), anode electrodes 4 (4a, 4b and 4c), a common light-emitting layer 5 and a cathode electrode 6.

[0061] Multiple sub-pixels 21, 22, and 23 are formed on substrate 2. Multiple sub-pixels 21, 22, and 23 can form a single pixel. Multiple pixels can be formed on substrate 2.

[0062] Multiple subpixels 21, 22, and 23 include a first subpixel 21, a second subpixel 22, and a third subpixel 23. The first subpixel 21, the second subpixel 22, and the third subpixel 23 may be set sequentially, alternately, and repeatedly in a first direction DR1. Each of the first subpixel 21, the second subpixel 22, and the third subpixel 23 may be repeatedly set in a second direction DR2.

[0063] Since the first sub-pixel 21, the second sub-pixel 22 and the third sub-pixel 23 can be arranged sequentially, the second sub-pixel 22 can be set on one side adjacent to the first sub-pixel 21 (e.g., the right side), and the third sub-pixel 23 can be set on one side adjacent to the second sub-pixel 22 (e.g., the right side).

[0064] Throughout this specification, when two subpixels are set adjacent to each other, this can be interpreted as meaning that no other subpixels are set between these two subpixels.

[0065] A first sub-pixel 21 may be provided to emit red (R) light, a second sub-pixel 22 may be provided to emit green (G) light, and a third sub-pixel 23 may be provided to emit blue (B) light, but the embodiments described herein are not necessarily limited to these.

[0066] Figure 1 An example is illustrated where the pixel comprises only three subpixels 21, 22, and 23; however, embodiments described herein are not limited to this, and a pixel may include four subpixels. When a pixel comprises four subpixels, the pixel may also include a fourth subpixel configured to emit white (W) light.

[0067] Each of the first to third sub-pixels 21, 22, and 23 can be provided with the same or substantially the same size. For example, each of the first to third sub-pixels 21, 22, and 23 can be provided with the same or substantially the same width and the same or substantially the same height.

[0068] Here, width can refer to the width based on Figure 1 The horizontal direction (first direction DR1), and the height can refer to the direction perpendicular to the horizontal direction (first direction DR1). Figure 1 The width direction (second direction DR2) is specified, but the embodiments described herein are not necessarily limited to this. The first direction DR1 may intersect with the second direction DR2, and the third direction DR3 may intersect with both the first direction DR1 and the second direction DR2. The third direction DR3 may refer to the thickness direction of the display device 1, but is not limited thereto.

[0069] The first direction DR1, the second direction DR2, and the third direction DR3 can be understood as relative directions, and are not limited to the embodiments described in this specification.

[0070] Figure 1 An example is given where the height of each subpixel 21, 22, or 23 in the second direction DR2 is greater than its width in the first direction DR1, and the stripe type in which subpixels 21, 22, and 23 are arranged sequentially and repeatedly in the first direction DR1. However, the flat surface shape and arrangement of subpixels 21, 22, and 23 are not limited to this and can be diverse.

[0071] For example, two sub-pixels selected from sub-pixels 21, 22, and 23 can be arranged adjacent to each other in the first direction DR1, and the remaining sub-pixel can be arranged on one side or the other side of the two sub-pixels in the second direction DR2. In this case, the two sub-pixels can extend in the second direction DR2, and the remaining sub-pixel can extend in the first direction DR1, but the embodiments described herein are not limited to this.

[0072] In other words, each sub-pixel 21, 22 or 23 can be set in at least one of, for example, stripe type, planar S-stripe type, pentile type, rhombus structure type, etc.

[0073] The embankment BK can be set in each of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23. The embankment BK can define the light-emitting areas EA1, EA2, and EA3 of sub-pixels 21, 22, and 23.

[0074] The embankment BK is illustrated as being formed of a single layer, but is not limited thereto, and the embankment BK may be formed of multiple layers. The embankment BK may be formed of an inorganic insulating material, but is not limited thereto.

[0075] Sub-pixels 21, 22, and 23 may each include light-emitting regions EA1, EA2, and EA3, and non-light-emitting regions NEA1, NEA2, and NEA3. The first sub-pixel 21 may include the first light-emitting region EA1 and a first non-light-emitting region NEA1 surrounding the first light-emitting region EA1. The second sub-pixel 22 may include the second light-emitting region EA2 and a second non-light-emitting region NEA2 surrounding the second light-emitting region EA2. The third sub-pixel 23 may include the third light-emitting region EA3 and a third non-light-emitting region NEA3 surrounding the third light-emitting region EA3. Each light-emitting region EA1, EA2, or EA3 may be the same as or similar to the area of ​​the embankment BK of the anode electrodes 4a, 4b, or 4c to be exposed, as described below.

[0076] The anode electrode 4 is patterned for each sub-pixel 21, 22, or 23. That is, one anode electrode 4 is formed in the first sub-pixel 21, another anode electrode 4 is formed in the second sub-pixel 22, and yet another anode electrode 4 is formed in the third sub-pixel 23.

[0077] The anode electrode 4 may include a first anode electrode 4a, a second anode electrode 4b, and a third anode electrode 4c. The first anode electrode 4a, the second anode electrode 4b, and the third anode electrode 4c may be disposed in sub-pixels 21, 22, and 23, respectively.

[0078] The anode electrode 4 can be used as the anode of the display device 1. The embankment BK can be provided to cover the edge of the anode electrode 4 disposed in each of the first to third sub-pixels 21, 22 and 23, so as to distinguish the first sub-pixel 21, the second sub-pixel 22 and the third sub-pixel 23.

[0079] The display device 1 may have a reflective electrode 42 with different surface heights, thereby using microcavity characteristics to further increase light extraction efficiency.

[0080] The microcavity characteristic refers to the property that when the distance between the reflective electrode 42 and the cathode electrode 6 is an integer multiple of half the wavelength (λ / 2) of the light emitted from the sub-pixel, constructive interference occurs to amplify the light, and the degree of amplification of the light continuously increases when the reflection and re-reflection process is repeated between the reflective electrode 42 and the cathode electrode 6, thereby increasing the external extraction efficiency of the light.

[0081] A common light-emitting layer 5 can be provided to emit white light. For example, the common light-emitting layer 5 can be provided as a two-layer stacked structure having a blue light-emitting layer, a yellow-green light-emitting layer and a charge-generating layer, or a three-layer stacked structure having a blue light-emitting layer, a green light-emitting layer, a red light-emitting layer and a charge-generating layer to emit white light, but it is not necessarily limited to these, and can be formed by more than three stacked layers, as long as it can emit white light.

[0082] The common light-emitting layer 5 can be formed as a common layer spanning from the first sub-pixel to the third sub-pixels 21, 22 and 23.

[0083] The cathode electrode 6 is used to generate an electric field with the anode electrode 4 and can also be used as a cathode. The cathode electrode 6 can be disposed on the upper surface of the common light-emitting layer 5 opposite to the lower surface of the common light-emitting layer 5 that contacts the anode electrode 4, and the cathode electrode 6 is configured to extend through the common layer from the first sub-pixel to the third sub-pixels 21, 22 and 23.

[0084] In the top-emitting type, the cathode electrode 6 can be provided as a first electrode, and in the bottom-emitting type, the cathode electrode 6 can be provided as an opaque cathode electrode including a reflective material. In the top-emitting type, the cathode electrode 6 can be formed as a cathode electrode including a translucent material to utilize microcavity characteristics to increase light extraction efficiency. Since the display device 1 uses microcavity characteristics to increase light extraction efficiency in the top-emitting type, an example in which the cathode electrode 6 is formed as a cathode electrode including a translucent material will be described.

[0085] A color filter layer 9 is provided in each of the first to third sub-pixels 21, 22 and 23 to block a specific color of light emitted from the light-emitting layer of each sub-pixel. The color filter layer 9 may include a first color filter 91 disposed in the first sub-pixel 21, a second color filter 92 disposed in the second sub-pixel 22 and a third color filter 93 disposed in the third sub-pixel 23.

[0086] The first color filter 91 can be provided to block light of other colors that do not include red (R) light. In this case, the first color filter 91 can be provided as a red color filter. The second color filter 92 can be provided to block light of other colors that do not include green (G) light. In this case, the second color filter 92 can be provided as a green color filter. The third color filter 93 can be provided to block light of other colors that do not include blue (B) light. In this case, the third color filter 93 can be provided as a blue color filter. However, the embodiments described in this specification are not necessarily limited to these.

[0087] The first to third color filters 91, 92 and 93, respectively set in the first to third sub-pixels 21, 22 and 23, can be set at the same or substantially the same size as the corresponding sub-pixels, or can be set by reducing or expanding them at a predetermined ratio for each sub-pixel.

[0088] Transistors 31, 32, and 33 can be disposed in the non-light-emitting regions NEA1, NEA2, and NEA3 of sub-pixels 21, 22, and 23, respectively. For example, transistors 31, 32, and 33 can be located on one side of the reflective electrodes 42a, 42b, and 42c in the first direction DR1, but are not limited thereto. For example, at least a portion of transistors 31, 32, and 33 can be disposed in the light-emitting regions EA1, EA2, and EA3 and disposed below the reflective electrodes 42a, 42b, and 42c, and in this case, transistors 31, 32, and 33 are not visible from the outside.

[0089] The anode electrodes 4a, 4b, and 4c, and transistors 31, 32, and 33, respectively, located in sub-pixels 21, 22, and 23, can correspond to each other. The anode electrodes 4a, 4b, and 4c can be electrically connected to the corresponding transistors 31, 32, and 33 through the first to sixth contact holes CNT1, CNT2, CNT3, CNT4, CNT5, and CNT6 located in sub-pixels 21, 22, and 23, and the connecting electrodes CE (CE1, CE2, and CE3).

[0090] Transistors 31, 32 and 33 may include first transistors 31, 32 and 33 corresponding to first sub-pixels 21, 22 and 23 respectively.

[0091] The connecting electrodes CE may include a first connecting electrode CE1, a second connecting electrode CE2, and a third connecting electrode CE3 respectively disposed in sub-pixels 21, 22, and 23. The connecting electrodes CE may include, but are not limited to, the same material as the first reflective electrode 42a, and may be formed of different materials.

[0092] The first connecting electrode CE1 can be electrically connected to the first transistor 31 via the first contact hole CNT1. The second connecting electrode CE2 can be electrically connected to the second transistor 32 via the second contact hole CNT2. The third connecting electrode CE3 can be electrically connected to the third transistor 33 via the third contact hole CNT3.

[0093] The first anode electrode 4a can be electrically connected to the first connecting electrode CE1 via the fourth contact hole CNT4. The second anode electrode 4b can be electrically connected to the second connecting electrode CE2 via the fifth contact hole CNT5. The third anode electrode 4c can be electrically connected to the third connecting electrode CE3 via the sixth contact hole CNT6.

[0094] In the light-emitting regions EA1, EA2, and EA3, the surface heights of the anode electrodes 4a, 4b, and 4c respectively disposed in sub-pixels 21, 22, and 23 can be different. The surface height of the third anode electrode 4c disposed in the third light-emitting region EA3 of the third sub-pixel 23 can be greater than the surface height of the second anode electrode 4b disposed in the second light-emitting region EA2 of the second sub-pixel 22. The surface height of the second anode electrode 4b disposed in the second light-emitting region EA2 of the second sub-pixel 22 can be greater than the surface height of the first anode electrode 4a disposed in the first light-emitting region EA1 of the first sub-pixel 21.

[0095] The anode electrodes 4a, 4b, and 4c, respectively disposed in sub-pixels 21, 22, and 23, can be disposed on different layers in the light-emitting regions EA1, EA2, and EA3. In the first light-emitting region EA1, the first anode electrode 4a can be disposed on the second insulating layer 3b and can be in direct contact with the second insulating layer 3b. In the second light-emitting region EA2, the second anode electrode 4b can be disposed on the third insulating layer 3c and can be in direct contact with the third insulating layer 3c. In the third light-emitting region EA3, the third anode electrode 4c can be disposed on the third reflective electrode 42c and can be in direct contact with the third reflective electrode 42c.

[0096] The trench TR can be disposed between sub-pixels 21, 22 and 23 (or between the light-emitting areas EA1, EA2 and EA3 of sub-pixels 21, 22 and 23). In a planar view, the trench TR can extend between sub-pixels 21, 22 and 23 along the first direction DR1 and the second direction DR2.

[0097] The trench TR may be defined by the second insulating layer 3b and the third insulating layer 3c. The trench TR may be formed into a groove or recess shape by removing at least a portion of the second insulating layer 3b and the third insulating layer 3c.

[0098] The trench TR can be formed to penetrate the third insulating layer 3c in the thickness direction (third direction DR3) and wherein a portion of the second insulating layer 3b is removed. That is, the trench TR can be defined by the side surface of the third insulating layer 3c and the side and top surfaces of the second insulating layer 3b, but is not limited thereto. For example, the trench TR can penetrate the third insulating layer 3c and the second insulating layer 3b in the thickness direction (third direction DR3) to expose the first insulating layer 3a.

[0099] Because the trench TR is located between sub-pixels 21, 22, and 23, even when the common light-emitting layer 5 and the cathode electrode 6 are positioned across sub-pixels 21, 22, and 23, the first stack EL1 (see [reference]) Figure 4 ) and the first charge generation layer CGL1 (see Figure 4 Separate in each sub-pixel 21, 22 or 23, and the second stack EL2 (see Figure 4 It can be set in the first charge generation layer CGL1 (see...) Figure 4 Between the cathode electrode 6 and the cathode electrode 7.

[0100] Therefore, leakage current between adjacent sub-pixels 21, 22 and 23 can be reduced or prevented, short circuit between the first charge generation layer CGL1 and the cathode electrode 6 can be reduced or prevented, and light color mixing can be reduced or prevented.

[0101] The stacked structure of a display device 1 according to one embodiment will be described in detail below.

[0102] According to one embodiment, the display device 1 includes a substrate 2, an insulating layer 3, a connecting electrode CE, a dummy electrode DM, an anode electrode 4, a dam BK, a common light-emitting layer 5, a cathode electrode 6, a cover layer 7, an encapsulation layer 8, and a color filter layer 9.

[0103] The substrate 2 can be a plastic film, a glass substrate, or a semiconductor substrate such as silicon.

[0104] The substrate 2 can be formed of a transparent or opaque material. A first sub-pixel 21, a second sub-pixel 22, and a third sub-pixel 23 are disposed on the substrate 2. The first sub-pixel 21 can be provided to emit red (R) light, the second sub-pixel 22 can be provided to emit green (G) light, and the third sub-pixel 23 can be provided to emit blue (B) light.

[0105] Since the display device 1 according to one embodiment is configured as a so-called top-emitting type in which the emitted light is emitted upward, both transparent and opaque materials can be used as materials for the substrate 2. Color filters 91, 92, and 93 can be disposed above the first to third sub-pixels 21, 22, and 23, respectively, and light emitted from the first to third sub-pixels 21, 22, and 23 transmits light of the aforementioned colors.

[0106] An insulating layer 3 is formed on the substrate 2. The insulating layer 3 may include a plurality of insulating layers 3a, 3b and 3c. Hereinafter, the insulating layer 3 is described as including a first insulating layer to a third insulating layer 3a, 3b and 3c, but is not limited thereto, and additional insulating layers may be further disposed between the first insulating layer to the third insulating layer 3a, 3b and 3c.

[0107] A first insulating layer 3a is disposed on the substrate 2 and includes a plurality of thin-film transistors 31, 32 and 33. Various signal lines, capacitors and other circuit elements are disposed in the first insulating layer 3a of each sub-pixel 21, 22 or 23. Each of the plurality of transistors 31, 32 and 33 may be formed as a thin-film transistor, but is not limited thereto.

[0108] The signal lines may include gating lines, data lines, power lines, and reference lines, and transistors 31, 32, and 33 may include switching transistors, driving transistors, and sensing transistors. Each of sub-pixels 21, 22, and 23 is defined by a cross structure of gating lines and data lines.

[0109] The switching transistor is switched according to the selection signal supplied to the selection line so as to supply the data voltage supplied from the data line to the driving transistor.

[0110] The drive transistor is switched according to the data voltage supplied from the switching transistor to generate a data current from the power supply line and supply the data current to the anode electrode 4.

[0111] The sensing transistor is used to detect the threshold voltage deviation of the driving transistor that causes degradation of image quality, and supplies current to the reference line of the driving transistor in response to a sensing control signal supplied from the gate line or a separate sensing line.

[0112] A capacitor is used to hold the data voltage supplied to the driving transistor for one frame and is connected to each of the gate and source terminals of the driving transistor.

[0113] The first transistor 31, the second transistor 32, and the third transistor 33 are respectively disposed in sub-pixels 21, 22, and 23 in the first insulating layer 3a. The first transistor 31 can be connected to the first anode electrode 4a disposed on the first sub-pixel 21 to apply a driving voltage for emitting light of a color corresponding to the first sub-pixel 21.

[0114] The second transistor 32 can be connected to the second anode electrode 4b disposed on the second sub-pixel 22 to apply a driving voltage for emitting light of a color corresponding to the second sub-pixel 22.

[0115] The third transistor 33 can be connected to the third anode electrode 4c disposed on the third sub-pixel 23 to apply a driving voltage for emitting light of a color corresponding to the third sub-pixel 23.

[0116] When each of transistors 31, 32, and 33 receives a gating signal from the gating line, each of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 supplies a predetermined current to the light-emitting layer according to the data voltage of the data line. Therefore, the light-emitting layer of each of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 can emit light with a predetermined brightness according to the predetermined current.

[0117] The first insulating layer 3a protects transistors 31, 32, and 33. The first insulating layer 3a can be formed of an inorganic insulating material, but is not limited to this, and can also be formed of an organic insulating material. Transistors 31, 32, and 33 can be located within the first insulating layer 3a. For example, the first insulating layer 3a can be formed of inorganic materials such as silicon nitride (SiNx), silicon oxide (SiOx), and aluminum oxide (Al2O3), but the embodiments described in this specification are not limited to this.

[0118] The second insulating layer 3b may be disposed on the first insulating layer 3a. For example, the second insulating layer 3b may be formed of an inorganic material such as silicon nitride (SiNx), silicon oxide (SiOx), aluminum oxide (Al2O3), etc., but the embodiments described herein are not limited thereto.

[0119] The third insulating layer 3c may be disposed on the second insulating layer 3b. For example, the third insulating layer 3c may be formed of an inorganic material such as silicon nitride (SiNx), silicon oxide (SiOx), aluminum oxide (Al2O3), etc., but the embodiments described herein are not limited thereto.

[0120] However, the embodiments described herein are not limited to this, and an additional insulating layer may be further provided between insulating layers 3a, 3b and 3c.

[0121] In the first sub-pixel 21, the first insulating layer 3a, the first transistor 31 disposed in the first insulating layer 3a, the first reflective electrode 42a disposed on the first insulating layer 3a, the second insulating layer 3b disposed on the first reflective electrode 42a, the third insulating layer 3c disposed on the second insulating layer 3b, the first anode electrode 4a disposed on the second insulating layer 3b and the third insulating layer 3c, and the embankment BK disposed on the first anode electrode 4a can be sequentially disposed on the substrate 2.

[0122] The third insulating layer 3c may define an opening OP that exposes the second insulating layer 3b. The opening OP may extend through the third insulating layer 3c in the thickness direction (third direction DR3) to expose the second insulating layer 3b.

[0123] The opening OP can be defined by the sidewall SD formed by the third insulating layer 3c. The sidewall SD of the opening OP can be formed by the exposed side surface of the third insulating layer 3c.

[0124] The sidewall SD may include a first sidewall SD1 and a second sidewall SD2 with different slopes. The first sidewall SD1 and the second sidewall SD2 may have different angles relative to the thickness direction (third direction DR3). The first sidewall SD1 and the second sidewall SD2 may be formed to have a predetermined angle θ in the cross-sectional view.

[0125] The first sidewall SD1 may extend from the upper surface UD of the third insulating layer 3c to form part of the sidewall SD of the opening OP. The second sidewall SD2 extends from the first sidewall SD1 to form the remainder of the sidewall SD of the opening OP, and may be connected to the lower surface DD of the third insulating layer 3c.

[0126] In other words, the first sidewall SD1 can be disposed between the upper surface UD of the third insulating layer 3c and the second sidewall SD2. The second sidewall SD2 can be disposed between the first sidewall SD1 and the lower surface DD of the third insulating layer 3c.

[0127] The upper surface UD of the third insulating layer 3c can be the surface facing the embankment BK, and the lower surface DD of the third insulating layer 3c can refer to the surface facing the second insulating layer 3b.

[0128] The first anode electrode 4a may be disposed across the third insulating layer 3c and the second insulating layer 3b. At least a portion of the first anode electrode 4a may be disposed within the opening OP. The first anode electrode 4a may be disposed on the upper surface UD of the third insulating layer 3c and the sidewall SD of the opening OP, and also on the second insulating layer 3b exposed by the opening OP.

[0129] In the first light-emitting region EA1, at least a portion of the first anode electrode 4a can be disposed on the second insulating layer 3b and can be in direct contact with the second insulating layer 3b. In the first light-emitting region EA1, the first anode electrode 4a can also be disposed on the sidewall SD.

[0130] In the first sub-pixel 21, the first reflective electrode 42a can be patterned and disposed across the first light-emitting region EA1 and the first non-light-emitting region NEA1.

[0131] The first reflective electrode 42a can be disposed on the first insulating layer 3a. The first reflective electrode 42a can be disposed below the first anode electrode 4a, and the second insulating layer 3b is inserted therebetween.

[0132] In the second sub-pixel 22, the first insulating layer 3a, the second transistor 32 disposed in the first insulating layer 3a, the first dummy electrode DM1 disposed on the first insulating layer 3a, the second insulating layer 3b disposed on the first dummy electrode DM1, the second reflective electrode 42b disposed on the second insulating layer 3b, the third insulating layer 3c disposed on the second reflective electrode 42b, the second anode electrode 4b disposed on the third insulating layer 3c, and the embankment BK disposed on the second anode electrode 4b can be sequentially disposed on the substrate 2.

[0133] In the second sub-pixel 22, the second reflective electrode 42b can be patterned and disposed across the second light-emitting region EA2 and the second non-light-emitting region NEA2. In the second sub-pixel 22, the first dummy electrode DM1 can be patterned and disposed within the second light-emitting region EA2 and the second non-light-emitting region NEA2.

[0134] The first dummy electrode DM1 may comprise the same or substantially the same metal as the first reflective electrode 42a. The first dummy electrode DM1 may be formed using the same or substantially the same masking process as the first reflective electrode 42a.

[0135] The first dummy electrode DM1 can overlap with the second reflective electrode 42b in the thickness direction (third direction DR3).

[0136] In the second light-emitting region EA2, the second anode electrode 4b can be disposed on the third insulating layer 3c and can be in direct contact with the third insulating layer 3c.

[0137] In the third sub-pixel 23, the first insulating layer 3a, the third transistor 33 disposed in the first insulating layer 3a, the second dummy electrode DM2 disposed on the first insulating layer 3a, the second insulating layer 3b disposed on the second dummy electrode DM2, the third dummy electrode DM3 disposed on the second insulating layer 3b, the third insulating layer 3c disposed on the third dummy electrode DM3, the third reflective electrode 42c disposed on the third insulating layer 3c, the third anode electrode 4c disposed on the third reflective electrode 42c, and the embankment BK disposed on the third anode electrode 4c can be sequentially disposed on the substrate 2.

[0138] In the third sub-pixel 23, the third reflective electrode 42c can be patterned and disposed across the third light-emitting region EA3 and the third non-light-emitting region NEA3. In the third sub-pixel 23, the second dummy electrode DM2 and the third dummy electrode DM3 can be patterned and disposed within the third light-emitting region EA3 and the third non-light-emitting region NEA3.

[0139] The first reflective electrode 42a disposed in the first sub-pixel 21, the first dummy electrode DM1 disposed in the second sub-pixel 22, and the second dummy electrode DM2 disposed in the third sub-pixel 23 may be formed in the same layer, made of the same or substantially the same material, and formed by the same or substantially the same process. However, the embodiments described herein are not limited thereto.

[0140] The second dummy electrode DM2 can overlap with the third dummy electrode DM3 and the third reflective electrode 42c in the thickness direction (third direction DR3).

[0141] The first reflective electrode 42a disposed in the first sub-pixel 21, the first dummy electrode DM1 disposed in the second sub-pixel 22, the second dummy electrode DM2 disposed in the third sub-pixel 23, and the connecting electrode CE can form a first conductive layer CL1. The first conductive layer CL1 may include the first reflective electrode 42a, the first dummy electrode DM1, the second dummy electrode DM2, and the connecting electrode CE.

[0142] The first reflective electrode 42a disposed in the first sub-pixel 21, the first dummy electrode DM1 disposed in the second sub-pixel 22, and the second dummy electrode DM2 disposed in the third sub-pixel 23 can be disposed individually. However, the embodiments described herein are not limited thereto.

[0143] The first reflective electrode 42a, the first dummy electrode DM1, and the second dummy electrode DM2 can suppress or prevent the first insulating layer 3a disposed beneath them from being over-etched. Therefore, the thickness deviation of the first insulating layer 3a disposed in the sub-pixels 21, 22, and 23, as well as the thickness deviation of the first insulating layer 3a in each manufactured display device 1, can be reduced or minimized.

[0144] Therefore, the deviation of the microcavities of sub-pixels 21, 22 and 23 can be minimized, and in addition, in display device 1, high color reproduction can be achieved by emitting clearer colors, image quality degradation can be suppressed or prevented, and power consumption can be reduced.

[0145] The second reflective electrode 42b disposed in the second sub-pixel 22 and the third dummy electrode DM3 disposed in the third sub-pixel 23 can be disposed separately, but they can be formed on the same layer, made of the same or substantially the same material, and formed by the same or substantially the same process, but are not limited thereto.

[0146] The second reflective electrode 42b disposed in the second sub-pixel 22 and the third dummy electrode DM3 disposed in the third sub-pixel 23 can form a second conductive layer CL2. The second conductive layer CL2 may include the second reflective electrode 42b and the third dummy electrode DM3.

[0147] The second reflective electrode 42b and the third dummy electrode DM3 can suppress or prevent excessive etching of the second insulating layer 3b disposed beneath it. Therefore, the thickness deviation of the second insulating layer 3b can be reduced or minimized.

[0148] Therefore, the deviation of the microcavities of sub-pixels 21, 22 and 23 can be minimized, and in addition, in display device 1, high color reproduction can be achieved by emitting clearer colors, image quality degradation can be suppressed or prevented, and power consumption can be reduced.

[0149] The first contact hole CNT1 to the sixth contact hole CNT6 can be disposed in the non-light-emitting areas NEA1, NEA2 and NEA3. Each of the first contact holes CNT1 to the sixth contact hole CNT6 can be defined by passing through at least one of the first insulating layer 3a to the third insulating layer 3c in the thickness direction, and can be electrically connected to the transistors 31, 32 and 33 in the sub-pixels 21, 22 and 23, the connection electrode CE and the anode electrode 4 (4a, 4b and 4c).

[0150] The first contact hole CNT1 may be defined by a first insulating layer 3a in the first non-light-emitting region NEA1. The first contact hole CNT1 may extend through the first insulating layer 3a in the thickness direction (third direction DR3) to expose the first transistor 31. In the first non-light-emitting region NEA1, the first connection electrode CE1 may contact the first transistor 31 through the first contact hole CNT1.

[0151] The second contact hole CNT2 may be defined by the first insulating layer 3a in the second non-light-emitting region NEA2. The second contact hole CNT2 may penetrate the first insulating layer 3a in the thickness direction (third direction DR3) to expose the second transistor 32. In the second non-light-emitting region NEA2, the second connection electrode CE2 may contact the second transistor 32 through the second contact hole CNT2.

[0152] The third contact hole CNT3 may be defined by the first insulating layer 3a in the third non-light-emitting region NEA3. The third contact hole CNT3 may penetrate the first insulating layer 3a in the thickness direction (third direction DR3) to expose the third transistor 33. In the third non-light-emitting region NEA3, the third connection electrode CE3 may contact the first transistor 31 through the third contact hole CNT3.

[0153] The fourth contact hole CNT4 can be defined by the second insulating layer 3b to the third insulating layer 3c in the first non-light-emitting region NEA1. The fourth contact hole CNT4 can extend through the second insulating layer 3b to the third insulating layer 3c in the thickness direction (third direction DR3) to expose the first connecting electrode CE1. In the first non-light-emitting region NEA1, the first anode electrode 4a can contact the first connecting electrode CE1 through the fourth contact hole CNT4.

[0154] The fifth contact hole CNT5 can be defined by the second insulating layer 3b to the third insulating layer 3c in the second non-light-emitting region NEA2. The fifth contact hole CNT5 can extend through the second insulating layer 3b to the third insulating layer 3c in the thickness direction (third direction DR3) to expose the second connecting electrode CE2. In the second non-light-emitting region NEA2, the second anode electrode 4b can contact the second connecting electrode CE2 through the fifth contact hole CNT5.

[0155] The sixth contact hole CNT6 can be defined by the second insulating layer 3b to the third insulating layer 3c in the third non-light-emitting region NEA3. The sixth contact hole CNT6 can extend through the second insulating layer 3b to the third insulating layer 3c in the thickness direction (third direction DR3) to expose the third connecting electrode CE3. In the third non-light-emitting region NEA3, the third anode electrode 4c can contact the third connecting electrode CE3 through the sixth contact hole CNT6.

[0156] Transistors 31, 32 and 33 have been described above as being electrically connected to anode electrodes 4a, 4b and 4c via contact holes CNT1, CNT2, CNT3, CNT4, CNT5 and CNT6 and connecting electrode CE, but the embodiments described herein are not limited thereto.

[0157] For example, the fourth to sixth contact holes CNT4, CNT5, and CNT6 can be filled with individual contact layers (not shown), and the connecting electrodes CE1, CE2, and CE3 can be electrically connected to the anode electrodes 4a, 4b, and 4c by filling the contact layers of the fourth to sixth contact holes CNT4, CNT5, and CNT6. Here, the contact layers (not shown) can be formed of tungsten or the like.

[0158] Alternatively, the connecting electrode CE can be omitted, and transistors 31, 32, and 33 can be in direct contact with the anode electrodes 4a, 4b, and 4c through a contact hole in one of the sub-pixels 21, 22, and 23.

[0159] Reflective electrodes 42 (42a, 42b, and 42c) can reflect light emitted from the common light-emitting layer 5 of sub-pixels 21, 22, and 23 toward the cathode electrode 6 or the encapsulation layer 8. Furthermore, the reflective electrodes 42 are configured to achieve microcavity characteristics through reflection and re-reflection with the cathode electrode 6. For this purpose, the reflective electrodes 42 may include a reflective material for reflecting light. For example, the reflective material may be a metal, but is not limited to it, and may be other materials as long as it can reflect light. For example, the reflective material may include titanium (Ti) / aluminum (Al), but is not limited to it.

[0160] According to one embodiment, the display device 1 can be provided as a top-emitting type, and for this purpose, a reflective electrode 42 can be provided to reflect light emitted from the common light-emitting layer 5 upwards.

[0161] The reflective electrode 42 can reflect light emitted from the common light-emitting layer 5 of each sub-pixel 21, 22, or 23 toward the cathode electrode 6 or the encapsulation layer 8. Furthermore, the reflective electrode 42 is configured to achieve microcavity characteristics through reflection and re-reflection with the cathode electrode 6. For this purpose, the reflective electrode 42 may include a reflective material for reflecting light.

[0162] Because the reflective electrode 42 is positioned relatively lower than the common light-emitting layer 5 used for emitting light, it can reflect light emitted from the common light-emitting layer 5 upwards. Here, "upwards" can refer to the direction from which the user can perceive the light, for example, the side where the encapsulation layer 8 or color filter layer 9 is located. Therefore, compared to the case where there is no reflective electrode 42, the light efficiency of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 can be further improved, and the user can perceive an image with high brightness (i.e., a clear image) through the improved light efficiency. In other words, the user can perceive a clear image.

[0163] As described above, the display device 1 may have a reflective electrode 42, thereby further increasing the light extraction efficiency by utilizing the microcavity characteristics. The reflective electrode 42 may include a first reflective electrode 42a, a second reflective electrode 42b, and a third reflective electrode 42c.

[0164] The distance between the first reflective electrode 42a and the anode electrode 4 can be greater than the distance between the second reflective electrode 42b and the anode electrode 4. The distance between the second reflective electrode 42b and the anode electrode 4 can be greater than the distance between the third reflective electrode 42c and the anode electrode 4.

[0165] The cathode electrodes 6 in the light-emitting regions EA1, EA2, and EA3 of sub-pixels 21, 22, and 23 can be collinearly positioned. Therefore, the dimensional relationship between the distances between the reflective electrodes 42a, 42b, and 42c in sub-pixels 21, 22, and 23 and the anode electrode 4 can be the same as or similar to the dimensional relationship between the distances between the reflective electrodes 42a, 42b, and 42c and the cathode electrode 6.

[0166] The reason why the reflective electrodes 42a, 42b, and 42c are formed with various spacing distances (or resonant distances) from the cathode electrode 6 is that, depending on the spacing distance, the extraction efficiency of different colors of light can be increased through reflection and re-reflection between the reflective electrodes 42a, 42b, and 42c and the cathode electrode 6. Therefore, the light extraction efficiency of red light in the first sub-pixel 21 can be increased, the light extraction efficiency of green light in the second sub-pixel 22 can be increased, and the light extraction efficiency of blue light in the third sub-pixel 23 can be increased.

[0167] An anode electrode 4 is disposed on a reflective electrode 42. The anode electrode 4 is configured to supply holes to the common light-emitting layer 5. The anode electrode 4 may be transparent, allowing light reflected from the reflective electrode 42 to travel upwards. The anode electrode 4 may be formed of a transparent material, but is not limited to this, and may be formed as a thin film of a thin metallic material. For example, the anode electrode 4 may include titanium nitride (TiN), but is not limited to this. The anode electrode 4 may be formed of a very thin film, allowing light reflected from the reflective electrode 42 to travel upwards. For example, the thickness of the anode electrode 4 may be about 5 nm or less. For example, the thickness of the anode electrode 4 may be about 3 nm or less, but is not limited to this.

[0168] The anode electrode 4 can be electrically connected to each of the first to third transistors 31, 32 and 33 through contact holes CNT1 to CNT6, such that the driving voltage provided by each of the first to third transistors 31, 32 and 33 can be applied to the anode electrode 4. When the driving voltage is applied from the first to third transistors 31, 32 and 33, the anode electrode 4 can supply holes to the common light-emitting layer 5.

[0169] The anode electrodes 4a, 4b, and 4c, respectively, located in sub-pixels 21, 22, and 23, can be located on different layers in the light-emitting regions EA1, EA2, and EA3.

[0170] The dam section BK can be disposed on the anode electrode 4 (4a, 4b and 4c). The dam section BK can be formed of inorganic materials such as silicon nitride (SiNx), silicon oxide (SiOx), aluminum oxide (Al2O3), etc., but the embodiments described in this specification are not limited to these.

[0171] In the light-emitting regions EA1, EA2, and EA3, the embankment BK can define the light-emitting regions EA1, EA2, and EA3 by exposing the upper surfaces of the anode electrodes 4 (4a, 4b, and 4c). On the other hand, in the non-light-emitting regions NEA1, NEA2, and NEA3, the embankment BK can cover the upper surfaces of the anode electrodes 4a, 4b, and 4c.

[0172] A common light-emitting layer 5 is formed on the anode electrode 4 and the embankment BK. The common light-emitting layer 5 can also be formed on a filling member disposed between multiple sub-pixels 21, 22, and 23. The common light-emitting layer 5 can be in contact with the upper surface of the anode electrode 4. The common light-emitting layer 5 can be in direct contact with the side and upper surfaces of the embankment BK.

[0173] An organic light-emitting diode (OLED) according to one embodiment may include an anode electrode 4, a cathode electrode 6, and a common light-emitting layer 5 between the anode electrode 4 and the cathode electrode 6.

[0174] The common light-emitting layer 5 can be provided to emit white (W) light. For this purpose, the common light-emitting layer 5 may include multiple layers for emitting different colors of light. Specifically, the common light-emitting layer 5 may include a first layer, a second layer, and a charge-generating layer CGL disposed between the first layer and the second layer.

[0175] A cathode electrode 6 is formed on the common light-emitting layer 5. The cathode electrode 6 can be used as the cathode of the display device 1. Like the common light-emitting layer 5, the cathode electrode 6 is formed in each of the sub-pixels 21, 22 and 23 and between the sub-pixels 21, 22 and 23.

[0176] In a display device 1 according to one embodiment, the cathode electrode 6 can be formed as a cathode electrode comprising a translucent material to achieve white light with high light efficiency in a top-emitting type. Therefore, a microcavity effect can be obtained for each of the first to third sub-pixels 21, 22, and 23. When the cathode electrode 6 is formed as a cathode electrode comprising a translucent material, a microcavity effect can be obtained by repeatedly reflecting and re-reflecting light between the cathode electrode 6 and the reflective electrode 42, thereby increasing light extraction efficiency.

[0177] Furthermore, since the cathode electrode 6 is formed on the upper surface of the common light-emitting layer 5, the cathode electrode 6 can be formed along the contour of the common light-emitting layer 5. Since the common light-emitting layer 5 is formed along the contour of the anode electrode 4 in the light-emitting region, the cathode electrode 6 can ultimately be formed along the contour of the anode electrode 4. In addition, the capping layer 7 on the cathode electrode 6 can also be formed along the contour of the cathode electrode 6.

[0178] The capping layer 7 can be formed of an inorganic insulating material, but is not limited to this. The capping layer 7 can be formed as a single layer, but is not limited to this, and can also be formed as multiple layers. The capping layer 7 can be disposed on the cathode electrode 6 to protect the organic light-emitting diode (OLED).

[0179] An encapsulation layer 8 is formed on the cathode electrode 6 to reduce or prevent external moisture from penetrating the common light-emitting layer 5. The encapsulation layer 8 may be formed of an inorganic insulating material, or in a structure in which inorganic and organic insulating materials are alternately stacked, but is not necessarily limited to this.

[0180] A color filter layer 9 is formed on the encapsulation layer 8. The color filter layer 9 may include, but is not limited to, a first red (R) color filter 91 disposed in the first sub-pixel 21, a second green (G) color filter 92 disposed in the second sub-pixel 22, and a third blue (B) color filter 93 disposed in the third sub-pixel 23.

[0181] Figure 4 It is based on Figure 2 A cross-sectional view of an organic light-emitting diode (OLED). Figure 5 It is based on Figure 2 A cross-sectional view of an organic light-emitting diode (OLED) as a modified example.

[0182] Reference Figures 2 to 5 The common light-emitting layer 5 may include a first stack EL1, a second stack EL2 and a first charge generation layer CGL1 disposed on the anode electrode 4.

[0183] The first stack EL1 can be disposed on the anode electrode 4 and configured such that the hole injection layer HIL, the hole transport layer HTL, the blue (B) emitting layer EML1 and the electron transport layer ETL can be stacked sequentially.

[0184] The first stack EL1 can be set between the first sub-pixel 21 and the second sub-pixel 22, and between the second sub-pixel 22 and the third sub-pixel 23.

[0185] The first charge generation layer CGL1 is used to supply charge to the first stack EL1 and the second stack EL2. The first charge generation layer CGL1 may include an N-type charge generation layer for supplying electrons to the first stack EL1 and a P-type charge generation layer for supplying holes to the second stack EL2. The N-type charge generation layer may include a metallic material as a dopant.

[0186] The second stack EL2 can be disposed on the first stack EL1 and configured to have a structure in which the hole transport layer HTL, the yellow-green (YG) emitting layer EML2, the electron transport layer ETL, and the electron injection layer EIL are stacked sequentially.

[0187] The second layer EL2 can be set between the first sub-pixel 21 and the second sub-pixel 22, and between the second sub-pixel 22 and the third sub-pixel 23.

[0188] As a result, the common light-emitting layer 5 can be provided as follows: Figure 2 The common layer shown spans from the first sub-pixel to the third sub-pixels 21, 22, and 23.

[0189] like Figure 5 As shown, the common light-emitting layer 5' of an organic light-emitting diode (OLED) according to one embodiment may include a first stack EL1, a second stack EL2, a third stack EL3 disposed on the anode electrode 4, a first charge generation layer CGL1 between the first stack EL1 and the second stack EL2, and a second charge generation layer CGL2 between the second stack EL2 and the third stack EL3.

[0190] The first stack EL1 can be disposed on the anode electrode 4 and configured such that the hole injection layer HIL, the hole transport layer HTL, the blue (B) emitting layer EML1 and the electron transport layer ETL can be stacked sequentially.

[0191] The first layer EL1 can be set between the first sub-pixel 21 and the second sub-pixel 22 and between the second sub-pixel 22 and the third sub-pixel 23 (i.e., on the embankment BK).

[0192] The first charge generation layer CGL1 is used to supply charge to the first stack EL1 and the second stack EL2. The first charge generation layer CGL1 may include an N-type charge generation layer for supplying electrons to the first stack EL1 and a P-type charge generation layer for supplying holes to the second stack EL2. The N-type charge generation layer may include a metallic material as a dopant.

[0193] The second stack EL2 can be disposed on the first stack EL1 and configured such that the hole transport layer HTL, the green (G) emitting layer EML2, and the electron transport layer ETL are stacked sequentially.

[0194] The second layer EL2 can be set between the first sub-pixel 21 and the second sub-pixel 22, and between the second sub-pixel 22 and the third sub-pixel 23 (i.e., on the embankment BK).

[0195] The second charge generation layer CGL2 is used to supply charge to the second stack EL2 and the third stack EL3. The second charge generation layer CGL2 may include an N-type charge generation layer for supplying electrons to the second stack EL2 and a P-type charge generation layer for supplying holes to the third stack EL3. The N-type charge generation layer may include a metallic material as a dopant.

[0196] The third stack EL3 can be disposed on the second stack EL2 and configured as a structure in which the hole transport layer HTL, the red (R) emitting layer EML3, the electron transport layer ETL, and the electron injection layer EIL are stacked sequentially.

[0197] In the following, a method for manufacturing a display device 1 according to one embodiment will be described. When describing the method for manufacturing a display device 1 according to one embodiment, details already presented or omitted will be briefly given or omitted. Figures 1 to 5 Description of the components described in the document.

[0198] Figures 6 to 15 This is a cross-sectional view of each process of a method for manufacturing a display device according to one embodiment.

[0199] First, refer to Figure 6 A substrate 2 is provided having a first insulating layer 3a disposed thereon. The first insulating layer 3a may define first contact holes to third contact holes CNT1, CNT2, and CNT3 that expose transistors 31, 32, and 33. Circuit elements including multiple thin-film transistors 31, 32, and 33, various signal lines, capacitors, etc., may be disposed in the first insulating layer 3a of each sub-pixel 21, 22, or 23.

[0200] The first insulating layer 3a can be disposed over the entire area of ​​the substrate 2, but is not limited thereto.

[0201] The first to third contact holes CNT1, CNT2 and CNT3 can be provided in an empty state, but are not limited thereto, and the connecting electrode can be provided in each of the first to third contact holes CNT1, CNT2 and CNT3.

[0202] Subsequently, referring to Figure 7 The first conductive layer CL1 can be patterned and disposed on the first insulating layer 3a.

[0203] A first conductive layer CL1, before patterning, can be disposed on the first insulating layer 3a and span the entire area of ​​the first insulating layer 3a. A patterned first photoresist (not shown) can be disposed on the first conductive layer CL1, and a portion of the first conductive layer CL1 exposed by the first photoresist (not shown) can be removed. The first conductive layer CL1 can be patterned to form a first reflective electrode 42a, a first dummy electrode DM1, a second dummy electrode DM2, and connecting electrodes CE (CE1, CE2, and CE3). The first photoresist (not shown) can be removed by an ashing process.

[0204] The first reflective electrode 42a, the first dummy electrode DM1, the second dummy electrode DM2, and the connecting electrodes CE (CE1, CE2, and CE3) can be patterned and separated, but are not limited thereto.

[0205] The connecting electrodes CE1, CE2 and CE3 can fill the first contact holes to the third contact holes CNT1, CNT2 and CNT3, and make contact with transistors 31, 32 and 33 respectively.

[0206] The first reflective electrode 42a, the first dummy electrode DM1, the second dummy electrode DM2, and the connecting electrodes CE (CE1, CE2, and CE3) can be formed using the same or substantially the same process (or mask) and can include the same or substantially the same materials. The first reflective electrode 42a can be disposed in the first sub-pixel 21, the first dummy electrode DM1 can be disposed in the second sub-pixel 22, and the second dummy electrode DM2 can be disposed in the third sub-pixel 23.

[0207] Because of the provision of the first reflective electrode 42a, the first dummy electrode DM1, and the second dummy electrode DM2, over-etching of the first insulating layer 3a that may occur during the patterning process of the first conductive layer CL1 can be suppressed or prevented. Therefore, the thickness deviation of the first insulating layer 3a provided in the sub-pixels 21, 22, and 23, and the thickness deviation of the first insulating layer 3a in each manufactured display device 1, can be reduced or minimized. Thus, the reliability of the manufacturing process of the display device 1 can be further improved, and the manufacturing process can be executed more smoothly, thereby reducing or minimizing the increase in time and cost required for the process.

[0208] Subsequently, referring to Figure 8 The second insulating layer 3b can be disposed on the first conductive layer CL1, and the second conductive layer CL2 can be patterned and disposed on the second insulating layer 3b.

[0209] The second insulating layer 3b may cover the first reflective electrode 42a, the first dummy electrode DM1, the second dummy electrode DM2 and the connecting electrodes CE (CE1, CE2 and CE3), and may be disposed across the entire area of ​​the first insulating layer 3a.

[0210] A second conductive layer CL2, before patterning, can be disposed on the second insulating layer 3b and span the entire area of ​​the second insulating layer 3b. A patterned second photoresist (not shown) can be disposed on the second conductive layer CL2, and a portion of the second conductive layer CL2 exposed by the second photoresist (not shown) can be removed. The second conductive layer CL2 can be patterned to form a first sacrificial layer SF1, a second reflective electrode 42b, and a third dummy electrode DM3. The second photoresist (not shown) can be removed by an ashing process.

[0211] The first sacrificial layer SF1, the second reflective electrode 42b, and the third dummy electrode DM3 can be patterned and separated, but are not limited thereto.

[0212] The first sacrificial layer SF1, the second reflective electrode 42b, and the third dummy electrode DM3 can be formed using the same or substantially the same process (or mask) and can include the same or substantially the same materials. The first sacrificial layer SF1 can be disposed in the first sub-pixel 21, the second reflective electrode 42b can be disposed in the second sub-pixel 22, and the third dummy electrode DM3 can be disposed in the third sub-pixel 23.

[0213] Because of the provision of the first sacrificial layer SF1, the second reflective electrode 42b, and the third dummy electrode DM3, over-etching of the second insulating layer 3b that may occur during the patterning process of the second conductive layer CL2 can be suppressed or prevented. Therefore, the thickness deviation of the second insulating layer 3b provided in the sub-pixels 21, 22, and 23, and the thickness deviation of the second insulating layer 3b in each manufactured display device 1, can be reduced or minimized. Thus, the reliability of the manufacturing process of the display device 1 can be further improved, and the manufacturing process can be executed more smoothly, thereby reducing or minimizing the increase in time and cost required for the process.

[0214] Subsequently, referring to Figure 9 The third insulating layer 3c can be disposed on the second conductive layer CL2, and the third conductive layer CL3 can be patterned and disposed on the third insulating layer 3c.

[0215] The third insulating layer 3c can cover the first sacrificial layer SF1, the second reflective electrode 42b, and the third dummy electrode DM3, and can be disposed across the entire area of ​​the second insulating layer 3b.

[0216] The third conductive layer CL3, before patterning, can be disposed on the third insulating layer 3c and span the entire area of ​​the third insulating layer 3c. A patterned third photoresist (not shown) can be disposed on the third conductive layer CL3, and a portion of the third conductive layer CL3 exposed by the third photoresist (not shown) can be removed. The third conductive layer CL3 can be patterned to form the second sacrificial layer SF2, the third sacrificial layer SF3, and the third reflective electrode 42c. The third photoresist (not shown) can be removed by an ashing process.

[0217] The second sacrificial layer SF2, the third sacrificial layer SF3, and the third reflective electrode 42c can be patterned and separated, but are not limited thereto.

[0218] The second sacrificial layer SF2, the third sacrificial layer SF3, and the third reflective electrode 42c can be formed using the same or substantially the same process (or mask) and can include the same or substantially the same materials. The second sacrificial layer SF2 can be disposed in the first sub-pixel 21, the third sacrificial layer SF3 can be disposed in the second sub-pixel 22, and the third reflective electrode 42c can be disposed in the third sub-pixel 23.

[0219] Because of the provision of the second sacrificial layer SF2, the third sacrificial layer SF3, and the third reflective electrode 42c, over-etching of the third insulating layer 3c that may occur during the patterning process of the third conductive layer CL3 can be suppressed or prevented. Therefore, the thickness deviation of the third insulating layer 3c provided in the sub-pixels 21, 22, and 23, and the thickness deviation of the third insulating layer 3c in each manufactured display device 1, can be reduced or minimized. Thus, the reliability of the manufacturing process of the display device 1 can be further improved, and the manufacturing process can be executed more smoothly, thereby reducing or minimizing the increase in time and cost required for the process.

[0220] Subsequently, referring to Figure 10 The second sacrificial layer SF2 and the third sacrificial layer SF3 are removed. These layers can be removed by wet etching.

[0221] Therefore, by removing the second sacrificial layer SF2 that overlaps with the first reflective electrode 42a and the third sacrificial layer SF3 that overlaps with the second reflective electrode 42b, the microcavities in the first sub-pixel 21 and the second sub-pixel 22 can be satisfied and the over-etching of the third insulating layer 3c can be reduced or minimized, thereby reducing or minimizing the thickness deviation of the third insulating layer 3c.

[0222] However, the etching method for the second sacrificial layer SF2 and the third sacrificial layer SF3 is not limited to wet etching. For example, when the second sacrificial layer SF2 and the third sacrificial layer SF3 have sufficient selectivity with the third insulating layer 3c and the etching of the third insulating layer 3c is restricted during the etching of the second sacrificial layer SF2 and the third sacrificial layer SF3, the second sacrificial layer SF2 and the third sacrificial layer SF3 can also be etched by dry etching or the like.

[0223] A patterned fourth photoresist (not shown) can be formed on the third reflective electrode 42c. The second sacrificial layer SF2 and the third sacrificial layer SF3 exposed by the fourth photoresist (not shown) can be removed by wet etching, while the third reflective electrode 42c can be retained. The fourth photoresist (not shown) can be removed by an ashing process.

[0224] Subsequently, referring to Figure 11 This forms an opening OP' that exposes the first sacrificial layer SF1.

[0225] A patterned fifth photoresist (not shown) can be placed on the third insulating layer 3c, and the third insulating layer 3c exposed by the fifth photoresist (not shown) can be etched by dry etching. Thus, an opening OP' defined by the third insulating layer 3c can be formed, and the opening OP' can expose the first sacrificial layer SF1.

[0226] Subsequently, referring to Figure 12 The first sacrificial layer SF1 exposed by the opening OP is removed by wet etching to form the fourth contact hole CNT4 to the sixth contact hole CNT6.

[0227] A patterned sixth photoresist (not shown) can be disposed on the third insulating layer 3c, and the first sacrificial layer SF1 exposed by the sixth photoresist (not shown) can be etched by wet etching. Thus, an opening OP defined by the third insulating layer 3c can be formed, and the opening OP can expose the second insulating layer 3b.

[0228] However, the etching method for the first sacrificial layer SF1 is not limited to wet etching. For example, when the first sacrificial layer SF1 and the second insulating layer 3b have sufficient selectivity and the etching of the second insulating layer 3b is restricted during the etching process of the first sacrificial layer SF1, the first sacrificial layer SF1 can also be etched by dry etching or the like.

[0229] Subsequently, the fourth contact hole CNT4 to the sixth contact hole CNT6 can be formed in the non-light-emitting regions NEA1, NEA2, and NEA3, respectively. Each of the fourth contact hole CNT4 to the sixth contact hole CNT6 can penetrate the third insulating layer 3c and the second insulating layer 3b in the thickness direction (third direction DR3) to expose transistors 31, 32, and 33.

[0230] Subsequently, referring to Figure 13 Anode electrodes 4a, 4b and 4c can be disposed on the third insulating layer 3c and the second insulating layer 3b.

[0231] The anode electrode 4, before patterning, can be disposed on the third insulating layer 3c and the second insulating layer 3b, with at least a portion disposed within the opening OP and spanning the entire area of ​​the third insulating layer 3c. A patterned seventh photoresist (not shown) can be disposed on the anode electrode 4. A portion of the anode electrode 4 exposed by the seventh photoresist (not shown) can be removed, and the anode electrode 4 can be patterned to form anode electrodes 4a, 4b, and 4c. The seventh photoresist (not shown) can be removed by an ashing process.

[0232] Anode electrodes 4a, 4b and 4c can be patterned individually, but are not limited to this.

[0233] Anode electrodes 4a, 4b, and 4c can be formed using the same or substantially the same process (or mask) and can comprise the same or substantially the same material. A first anode electrode 4a can be disposed in a first sub-pixel 21, a second anode electrode 4b can be disposed in a second sub-pixel 22, and a third anode electrode 4c can be disposed in a third sub-pixel 23.

[0234] Anode electrodes 4a, 4b and 4c can fill the fourth to sixth contact holes CNT4, CNT5 and CNT6, and are in contact with connecting electrodes CE1, CE2 and CE3 respectively.

[0235] Subsequently, referring to Figure 14 and Figure 15 The embankment BK can be patterned and set on the anode electrodes 4a, 4b and 4c, and can form a trench TR.

[0236] Before patterning, the embankment BK can be disposed on the third insulating layer 3c and the anode electrodes 4a, 4b, and 4c, and at least a portion thereof can be disposed in the opening OP and span the entire area of ​​the third insulating layer 3c. A patterned eighth photoresist (not shown) can be disposed on the embankment BK, and a portion of the embankment BK exposed by the eighth photoresist (not shown) can be removed to expose the anode electrodes 4a, 4b, and 4c. Therefore, light-emitting regions EA1, EA2, and EA3 and non-light-emitting regions NEA1, NEA2, and NEA3 can be formed. The eighth photoresist (not shown) can be removed by an ashing process.

[0237] Further reference Figure 2 The common light-emitting layer 5, cathode electrode 6, cover layer 7, encapsulation layer 8 and color filter layer 9 can be further sequentially arranged on the embankment BK.

[0238] Other embodiments of this specification will be described below. For components included in other embodiments and referenced... Figures 1 to 15 The content described is essentially the same, the same figure labels are given, and repeated content can be omitted or briefly described.

[0239] Figure 16 This is a cross-sectional view of a display device according to another embodiment. Figure 17 yes Figure 16 A magnified view of region Q2 in the image.

[0240] Reference Figure 16 and Figure 17 In the display device 1_1 according to this embodiment, the upper surface of the second insulating layer 3b may have a step difference in the first light-emitting region EA1.

[0241] First sacrificial layer SF1 (see Figure 11 During the etching process, the second insulating layer 3b can be over-etched. Therefore, the second insulating layer 3b is over-etched by the first sacrificial layer SF1 (see...). Figure 11 The covered area can have a step difference from the remaining area.

[0242] The second sidewall SD2 of the opening OP_1 can be formed by the third insulating layer 3c and the second insulating layer 3b.

[0243] The third insulating layer 3c and the second insulating layer 3b forming the second sidewall SD2 may have different slopes in the cross-sectional view, but are not limited to this.

[0244] Even in this case, it is possible to use the reflective electrode 42, the dummy electrode DM, and the first to third sacrificial layers SF1, SF2, and SF3 (see...). Figure 9 This is done to suppress or prevent over-etching of the lower insulating layers 3a, 3b, and 3c. Therefore, the thickness deviations of the insulating layers 3a, 3b, and 3c, as well as the deviations of the microcavities of the sub-pixels 21, 22, and 23, can be reduced or minimized, achieving high color reproduction in the display device 1_1 and reducing power consumption.

[0245] Figure 18 This is a cross-sectional view of a display device according to yet another embodiment.

[0246] Reference Figure 18 The display device 1_2 according to this embodiment can be omitted. Figure 2 At least one of the dummy electrodes DM.

[0247] For example, the settings can be omitted. Figure 2 The second dummy electrode DM2 in the third sub-pixel 23 (see Figure 2In this case, the first sub-pixel 21 may include a first reflective electrode 42a, the second sub-pixel 22 may include a first dummy electrode DM1 and a second reflective electrode 42b, and the third sub-pixel 23 may include a third dummy electrode DM3 and a third reflective electrode 42c.

[0248] However, the implementation of this specification is not limited to this, and the first dummy electrode DM1 or the third dummy electrode DM3 may be omitted.

[0249] Because the second dummy electrode DM2 located below the third reflective electrode 42c is omitted (see...) Figure 2 Therefore, the second insulating layer 3b and the third insulating layer 3c can be further planarized, thereby improving the uniformity of the third reflective electrode 42c.

[0250] This embodiment has been described but omitted. Figure 2 The first dummy electrode DM1 and the second dummy electrode DM2 in the implementation method (see Figure 2 One of the dummy electrodes DM3 and the third dummy electrode DM3, but the embodiments described in this specification are not limited thereto. For example, the dummy electrode DM3 may be omitted. Figure 2 In the implementation of the method, two of the first to third dummy electrodes DM1, DM2 and DM3 may be selected, or all dummy electrodes DM1, DM2 and DM3 may be omitted.

[0251] Even in this case, it is possible to use the reflective electrode 42, the dummy electrode DM, and the first to third sacrificial layers SF1, SF2, and SF3 (see...). Figure 9 This is done to suppress or prevent over-etching of the lower insulating layers 3a, 3b, and 3c. Therefore, the thickness deviations of the insulating layers 3a, 3b, and 3c, as well as the deviations of the microcavities of the sub-pixels 21, 22, and 23, can be reduced or minimized, thereby achieving high color reproduction of the display device 1_2 and reducing power consumption.

[0252] Figure 19 This is a cross-sectional view of a display device according to another embodiment.

[0253] Reference Figure 19 The display device 1_3 according to this embodiment may include a first conductive layer CL1, and transistors 31, 32 and 33 and anode electrodes 4a, 4b and 4c may be electrically connected through the first conductive layer CL1.

[0254] Specifically, the first conductive layer CL1 may include a first reflective electrode 42a, a first dummy electrode DM1, and a second dummy electrode DM2.

[0255] The first reflective electrode 42a, the first dummy electrode DM1, and the second dummy electrode DM2 can fill the first contact holes to the third contact holes CNT1, CNT2, and CNT3, and respectively contact transistors 31, 32, and 33.

[0256] The fourth to sixth contact holes CNT4, CNT5 and CNT6 can expose the first reflective electrode 42a, the first dummy electrode DM1 and the second dummy electrode DM2, respectively.

[0257] Anode electrodes 4a, 4b and 4c can fill the fourth to sixth contact holes CNT4, CNT5 and CNT6, and are in contact with the first reflective electrode 42a, the first dummy electrode DM1 and the second dummy electrode DM2.

[0258] In this case, the separate connection electrode CE is omitted (see...) Figure 2 Therefore, it can further promote the manufacturing process of patterning the first conductive layer CL1.

[0259] Even in this case, it is possible to use the reflective electrode 42, the dummy electrode DM, and the first to third sacrificial layers SF1, SF2, and SF3 (see...). Figure 9 This is done to suppress or prevent over-etching of the lower insulating layers 3a, 3b, and 3c. Therefore, the thickness deviations of the insulating layers 3a, 3b, and 3c, as well as the deviations of the microcavities of the sub-pixels 21, 22, and 23, can be reduced or minimized, enabling high color reproduction of the display device 1_3 and reducing power consumption.

[0260] The various embodiments of the display device according to this specification can be described as follows.

[0261] A display device according to an embodiment of this specification includes: a substrate having a first sub-pixel, a second sub-pixel, and a third sub-pixel, each of the first sub-pixel, the second sub-pixel, and the third sub-pixel including a light-emitting region and a non-light-emitting region; a first insulating layer disposed on the substrate; a first conductive layer disposed on the first insulating layer and including a first reflective electrode of the first sub-pixel, a first dummy electrode of the second sub-pixel, and a second dummy electrode of the third sub-pixel; a second insulating layer disposed on the first conductive layer; a second conductive layer disposed on the second insulating layer and including a second reflective electrode of the second sub-pixel and a third dummy electrode of the third sub-pixel; a third insulating layer disposed on the second conductive layer; and a third reflective electrode of the third sub-pixel disposed on the third insulating layer.

[0262] According to various embodiments of this specification, the display device may further include an anode electrode of a sub-pixel disposed on at least one of a second insulating layer and a third insulating layer, wherein the surface height of the anode electrode in the light-emitting region of the sub-pixel may be different.

[0263] According to various embodiments of this specification, the anode electrode of the first sub-pixel can be disposed on the second insulating layer, the anode electrode of the second sub-pixel can be disposed on the third insulating layer, and the anode electrode of the third sub-pixel can be disposed on the third reflective electrode.

[0264] According to various embodiments of this specification, in the first sub-pixel, the third insulating layer may include an opening, and the anode electrode of the first sub-pixel may be disposed in the opening.

[0265] According to various embodiments of this specification, the anode electrode can be in direct contact with the upper surface of the second insulating layer in the opening.

[0266] According to various embodiments of this specification, in the second sub-pixel, the anode electrode can be directly disposed on the upper surface of the third insulating layer.

[0267] According to various embodiments of this specification, in the third sub-pixel, the anode electrode can be directly disposed on the upper surface of the third reflective electrode.

[0268] According to various embodiments of this specification, in the opening, the slopes of the first sidewall and the second sidewall of the third insulating layer may be different, and the second sidewall may be connected to the first sidewall and the lower surface of the third insulating layer.

[0269] According to various embodiments of this specification, the display device may further include a dam provided on the anode electrode in the non-light-emitting area of ​​each sub-pixel.

[0270] According to various embodiments of this specification, the display device may further include a common light-emitting layer disposed on the anode electrode and the embankment of each sub-pixel.

[0271] According to various embodiments of this specification, the first insulating layer and the second insulating layer may comprise the same or substantially the same material.

[0272] According to various embodiments of this specification, the display device may also include a transistor in the first insulating layer of each sub-pixel.

[0273] According to various embodiments of this specification, the display device may further include trenches formed in a second insulating layer and a third insulating layer in a non-light-emitting area.

[0274] According to various embodiments of this specification, the first reflective electrode of the first sub-pixel, the first dummy electrode of the second sub-pixel, and the second dummy electrode of the third sub-pixel may comprise the same or substantially the same material.

[0275] According to various embodiments of this specification, the second reflective electrode of the second sub-pixel and the third dummy electrode of the third sub-pixel may comprise the same or substantially the same material.

[0276] According to various embodiments of this specification, a display device is provided, comprising: a substrate having a first sub-pixel, a second sub-pixel, and a third sub-pixel, each of the first sub-pixel, the second sub-pixel, and the third sub-pixel including a light-emitting region and a non-light-emitting region; a first insulating layer on the substrate; a first reflective electrode of the first sub-pixel on the first insulating layer; a second insulating layer on the first reflective electrode; a second reflective electrode of the second sub-pixel on the second insulating layer; a third insulating layer on the second reflective electrode; a third reflective electrode of the third sub-pixel on the third insulating layer; and an anode electrode of the sub-pixel on either the second or third insulating layer, wherein, in the light-emitting region, the surface height of the anode electrode of the sub-pixel is different.

[0277] According to various embodiments of this specification, the surface height of the anode electrode disposed in the light-emitting region of the third sub-pixel can be greater than the surface height of the anode electrode disposed in the light-emitting region of the second sub-pixel.

[0278] According to various embodiments of this specification, the surface height of the anode electrode disposed in the light-emitting region of the second sub-pixel can be greater than the surface height of the anode electrode disposed in the light-emitting region of the first sub-pixel.

[0279] Although embodiments have been described above with reference to the accompanying drawings, those skilled in the art will understand that the above technical configurations can be implemented in other specific forms without altering their technical concept or essential characteristics. Therefore, it is understood that the above embodiments are illustrative in all respects and not restrictive. Furthermore, the scope of the embodiments is determined by the appended claims rather than the detailed description. Additionally, the meaning and scope of the claims, as well as all changes or modifications derived from their equivalents, can be interpreted as being included within the scope of the embodiments.

[0280] Cross-reference to related applications

[0281] This application claims priority to Korean Patent Application No. 10-2024-0137740, filed on October 10, 2024, the entire contents of which are incorporated herein by reference for all purposes, as if fully set forth herein.

Claims

1. A display device, the display device comprising: A substrate having a first sub-pixel, a second sub-pixel, and a third sub-pixel, each of the first sub-pixel, the second sub-pixel, and the third sub-pixel including a light-emitting region and a non-light-emitting region; A first insulating layer is disposed on the substrate; A first conductive layer is disposed on the first insulating layer, and the first conductive layer includes a first reflective electrode of the first sub-pixel, a first dummy electrode of the second sub-pixel, and a second dummy electrode of the third sub-pixel. A second insulating layer is disposed on the first conductive layer; The second conductive layer is disposed on the second insulating layer, and the second conductive layer includes the second reflective electrode of the second sub-pixel and the third dummy electrode of the third sub-pixel; A third insulating layer is disposed on the second conductive layer; as well as The third reflective electrode of the third sub-pixel is disposed on the third insulating layer.

2. The display device according to claim 1, further comprising an anode electrode disposed on at least one of the second insulating layer and the third insulating layer for the first sub-pixel, the second sub-pixel, and the third sub-pixel. in, The surface heights of the anode electrodes in the light-emitting regions of the first sub-pixel, the second sub-pixel, and the third sub-pixel are different.

3. The display device according to claim 2, wherein, The anode electrode of the first sub-pixel is disposed on the second insulating layer. The anode electrode of the second sub-pixel is disposed on the third insulating layer, and The anode electrode of the third sub-pixel is disposed on the third reflective electrode.

4. The display device according to claim 2, wherein, In the first sub-pixel, the third insulating layer includes an opening, and The anode electrode of the first sub-pixel is disposed in the opening.

5. The display device according to claim 4, wherein, In the first sub-pixel, the anode electrode is in direct contact with the upper surface of the second insulating layer in the opening.

6. The display device according to claim 5, wherein, In the second sub-pixel, the anode electrode is directly disposed on the upper surface of the third insulating layer.

7. The display device according to claim 6, wherein, In the third sub-pixel, the anode electrode is directly disposed on the upper surface of the third reflective electrode.

8. The display device according to claim 4, wherein, The third insulating layer includes an upper surface, a lower surface opposite to the upper surface, a first sidewall, and a second sidewall. In the opening, the first sidewall extends from the upper surface and connects to the second sidewall, and the second sidewall extends from the first sidewall and connects to the lower surface of the third insulating layer. The slope of the first sidewall is different from the slope of the second sidewall.

9. The display device according to claim 2, further comprising a dam on the anode electrode disposed in the non-light-emitting region of each of the first sub-pixel, the second sub-pixel, and the third sub-pixel.

10. The display device according to claim 9, further comprising a common light-emitting layer disposed on the anode electrode and the embankment of each of the first sub-pixel, the second sub-pixel and the third sub-pixel.

11. The display device according to claim 1, wherein, The first insulating layer and the second insulating layer comprise the same material.

12. The display device of claim 1, further comprising a transistor in the first insulating layer of each of the first sub-pixel, the second sub-pixel, and the third sub-pixel.

13. The display device according to claim 1, further comprising trenches in the second insulating layer and the third insulating layer in the non-light-emitting region.

14. The display device according to claim 1, wherein, The first reflective electrode of the first sub-pixel, the first dummy electrode of the second sub-pixel, and the second dummy electrode of the third sub-pixel all comprise the same material.

15. The display device according to claim 1, wherein, The second reflective electrode of the second sub-pixel and the third dummy electrode of the third sub-pixel are made of the same material.

16. A display device, the display device comprising: A substrate having a first sub-pixel, a second sub-pixel, and a third sub-pixel, each of the first sub-pixel, the second sub-pixel, and the third sub-pixel including a light-emitting region and a non-light-emitting region; A first insulating layer is provided on the substrate. The first reflective electrode of the first sub-pixel is located on the first insulating layer; A second insulating layer is disposed on the first reflective electrode; The second reflective electrode of the second sub-pixel is located on the second insulating layer; A third insulating layer is located on the second reflective electrode; The third reflective electrode of the third sub-pixel is located on the third insulating layer. as well as The anode electrodes of the first sub-pixel, the second sub-pixel, and the third sub-pixel are located on the second insulating layer or the third insulating layer. In the light-emitting region, the surface heights of the anode electrodes of the first sub-pixel, the second sub-pixel, and the third sub-pixel are different.

17. The display device according to claim 16, wherein, The surface height of the anode electrode disposed in the light-emitting region of the third sub-pixel is greater than the surface height of the anode electrode disposed in the light-emitting region of the second sub-pixel.

18. The display device according to claim 17, wherein, The surface height of the anode electrode disposed in the light-emitting region of the second sub-pixel is greater than the surface height of the anode electrode disposed in the light-emitting region of the first sub-pixel.

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