Display device

Abstract

A display device is disclosed. A display device according to one embodiment of the present disclosure includes: a substrate having a first sub-pixel, a second sub-pixel, and a third sub-pixel, each of the first sub-pixel, the second sub-pixel, and the third sub-pixel including a light emitting area and a non-light emitting area; a second insulating layer disposed on the substrate and including a first reflective layer and a first pitch forming layer; a first anode electrode disposed on the second insulating layer; a third insulating layer disposed on the second insulating layer; a fourth insulating layer disposed on the third insulating layer; a fifth insulating layer disposed on the fourth insulating layer; and a first opening in the first sub-pixel passing through the third, fourth, and fifth insulating layers in a thickness direction to expose the first anode electrode and the second insulating layer, in which the first reflective layer includes a plurality of inorganic films having different refractive indexes.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0137741, filed on October 10, 2024, the entire contents of which are incorporated herein by reference for all purposes. Technical Field

[0003] This disclosure relates to display devices. Background Technology

[0004] With the development of the information society, the demand for display devices for displaying images continues to increase, and various types of display devices, such as liquid crystal display (LCD) devices and organic light-emitting diode (OLED) display devices, continue to be used.

[0005] Among these display devices, OLED displays, as self-emissive devices, offer the following advantages over LCD devices: wider viewing angles and higher contrast ratios; they can be lighter and thinner, and consume less power because they do not require a separate backlight. Furthermore, OLED displays can be driven with low voltage, have fast response times, and, most importantly, are inexpensive to manufacture.

[0006] Recently, there has been a continued increase in demand for display devices that require augmented reality (AR), virtual reality (VR), or equivalent ultra-high resolution using such OLED display devices. Summary of the Invention

[0007] This disclosure relates to a display device that can suppress or prevent lateral leakage current between adjacent pixels (or sub-pixels).

[0008] This disclosure also relates to a display device that can minimize microcavity deviations and process errors.

[0009] This disclosure also relates to a display device that can suppress or prevent light color mixing between pixels (or subpixels).

[0010] This disclosure also relates to a display device that can achieve high color reproduction by emitting clearer colors and can suppress or prevent image quality degradation.

[0011] The purpose of this disclosure is not limited to the above-described purposes, and other technical purposes can be deduced from the following embodiments.

[0012] According to one embodiment of the disclosure, there is provided a display device including: a substrate having a first sub-pixel, a second sub-pixel, and a third sub-pixel, each of the first sub-pixel, the second sub-pixel, and the third sub-pixel including a light emitting area and a non-light emitting area; a second insulating layer disposed on the substrate and including a first reflective layer and a first spacing forming layer; a first anode electrode disposed on the second insulating layer; a third insulating layer formed on the second insulating layer; a fourth insulating layer formed on the third insulating layer; a fifth insulating layer disposed on the fourth insulating layer; and a first opening in the first sub-pixel, the first opening passing through the third insulating layer, the fourth insulating layer, and the fifth insulating layer in a thickness direction and exposing the first anode electrode and the second insulating layer, wherein the first reflective layer includes a plurality of inorganic films having different refractive indexes.

[0013] According to another embodiment of the disclosure, there is provided a display device including: a substrate; a second insulating layer formed on the substrate; an anode electrode disposed on the second insulating layer; a third insulating layer disposed on the second insulating layer; and an opening passing through the third insulating layer in a thickness direction to expose the anode electrode and the second insulating layer, wherein the third insulating layer includes a plurality of inorganic layers forming a side surface of the opening, and the plurality of inorganic layers includes a plurality of undercut regions having an undercut shape between adjacent inorganic layers on the side surface of the opening.

[0014] Details of other embodiments are included in the detailed description and the accompanying drawings.

[0015] According to embodiments of the disclosure, lateral leakage current between adjacent pixels (or sub-pixels) can be suppressed or prevented.

[0016] According to embodiments of the disclosure, deviation of a microcavity and process error can be minimized.

[0017] According to embodiments of the disclosure, light color mixing between pixels (or sub-pixels) can be suppressed or prevented.

[0018] According to embodiments of the disclosure, high color reproduction can be achieved by emitting clearer colors, and degradation of image quality can be suppressed or prevented.

[0019] According to embodiments of the disclosure, high color reproduction can be achieved and power consumption can be reduced.

[0020] However, the effects obtainable from the disclosure are not limited to the above-mentioned effects, and other effects not mentioned can be clearly understood by those skilled in the art to which the disclosure pertains based on the following description. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1is a plan view of a display device according to an embodiment.

[0022] Figure 2 is a cross-sectional view along line A-A' in Figure 1

[0023] Figure 3 is a schematic view showing a microcavity of each sub-pixel.

[0024] Figure 4 is a schematic view showing a reflection principle of the first reflection layer. Figure 2

[0025] Figure 5 is a cross-sectional view of an organic light emitting diode OLED according to Figure 2

[0026] Figure 6 is a cross-sectional view of an organic light emitting diode OLED according to a modified example of Figure 2

[0027] Figure 7 is an enlarged view of region Q2 in Figure 2

[0028] Figures 8 to 13 is a cross-sectional view of each process in a method of manufacturing a display device according to an embodiment.

[0029] Figure 14 is a cross-sectional view of a display device according to another embodiment.

[0030] Figure 15 is a cross-sectional view of a display device according to yet another embodiment.

[0031] Figure 16 is a cross-sectional view of a display device according to still another embodiment.

[0032] Figure 17 is an enlarged view of region Q3 in Figure 16 DETAILED DESCRIPTION

[0033] Hereinafter, embodiments will be described with reference to the accompanying drawings. In the disclosure, when a first component (or region, layer, part, etc.) is described as being "on", "connected to", or "coupled to" a second component, it means that the first component can be directly connected / coupled to the second component, or a third component can be disposed between the first component and the second component.

[0034] ​​​​​​Like reference numerals refer to like parts throughout the specification. Also, in the drawings, the thickness, proportions, and dimensions of components are exaggerated for effective description of the technical content. The term "and / or" includes all one or more combinations that can be defined by the associated configurations.

[0035] Terms such as first and second can be used to describe various components, but the components are not limited by the terms. The terms are used only for the purpose of distinguishing one component from another component. For example, a first component can be referred to as a second component, and similarly, a second component can also be referred to as a first component, without departing from the scope of the embodiments. Singular includes plural unless the context clearly dictates otherwise.

[0036] Terms such as "below", "under", "above", and "on" are used to describe relationships between components shown in the drawings. These terms are relative concepts and are described with respect to the direction marked in the drawings.

[0037] It should be understood that terms such as "include" or "have" are intended to designate the presence of features, numbers, steps, operations, components, parts, or combinations thereof described in the disclosure and do not exclude the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0038] Figure 1 is a plan view of a display device according to one embodiment. Figure 2 is a cross-sectional view along line A-A' in Figure 1 . Figure 3 is a schematic view showing a microcavity of each subpixel. Figure 4 is a schematic view showing a reflection principle of the first reflective layer. Figure 2 is a schematic enlarged view of a region Q1 in

[0039] Although Figure 4 the reflection principle of the first reflective layer RF1 is shown, the description of the first reflective layer RF1 can be applied to the second reflective layer RF2 and the third reflective layer RF3 in the same manner.

[0040] Referring to Figures 1 to 4 , a display device 1 according to one embodiment includes a substrate 2, insulating layers 3 (3a, 3b, 3c, 3d, and 3e), anode electrodes 4 (4a, 4b, and 4c), a common light emitting layer 5, and a cathode electrode 6.

[0041] A plurality of subpixels 21, 22, and 23 are formed on the substrate 2. The plurality of subpixels 21, 22, and 23 can form one pixel. A plurality of pixels can be formed on the substrate 2.

[0042] The plurality of sub-pixels 21, 22, and 23 includes a first sub-pixel 21, a second sub-pixel 22, and a third sub-pixel 23. The first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 can be sequentially, alternately, and repeatedly arranged along a first direction DR1. Each of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 can be repeatedly arranged along a second direction DR2.

[0043] Since the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 can be sequentially arranged, the second sub-pixel 22 can be disposed adjacent to one side, for example, a left side, of the first sub-pixel 21, and the third sub-pixel 23 can be disposed adjacent to one side, for example, a left side, of the second sub-pixel 22.

[0044] Throughout the present disclosure, when two sub-pixels are disposed adjacent to each other, this should be interpreted to mean that no other sub-pixel is disposed between the two sub-pixels.

[0045] The first sub-pixel 21 can be disposed to emit red (R) light, the second sub-pixel 22 can be disposed to emit green (G) light, and the third sub-pixel 23 can be disposed to emit blue (B) light, but embodiments of the present disclosure are not necessarily limited thereto.

[0046] Although Figure 1 An example is shown in which a pixel includes only three sub-pixels 21, 22, and 23, but embodiments of the present disclosure are not limited thereto, and a pixel can include four sub-pixels. When a pixel includes four sub-pixels, the pixel can further include a fourth sub-pixel disposed to emit white (W) light.

[0047] Each of the first to third sub-pixels 21, 22, and 23 can be disposed to have the same size. For example, each of the first to third sub-pixels 21, 22, and 23 can be disposed to have the same width and the same height.

[0048] Here, based on Figure 1 , the width can refer to a horizontal direction (first direction DR1), and based on Figure 1 , the height can refer to a direction perpendicular to the width (second direction DR2), but embodiments of the present disclosure are not necessarily limited thereto. The first direction DR1 can intersect the second direction DR2, and the third direction DR3 can intersect the first direction DR1 and the second direction DR2. The third direction DR3 can refer to a thickness direction of the display device 1, but is not limited thereto.

[0049] The first direction DR1, the second direction DR2, and the third direction DR3 should be understood as relative directions, and are not limited to embodiments of the present disclosure.

[0050] Although Figure 1Each sub-pixel 21, 22, or 23 having a height greater than a width in the second direction DR2 and a strip type in which the sub-pixels 21, 22, and 23 are sequentially and repeatedly arranged in the first direction DR1 is shown, but the flat surface shape and arrangement of the sub-pixels 21, 22, and 23 are not limited thereto and can be different.

[0051] For example, two sub-pixels selected from the sub-pixels 21, 22, and 23 can be arranged adjacent to each other in the first direction DR1, and the remaining one sub-pixel can be arranged at one side or the other of the two sub-pixels in the second direction DR2. In this case, the two sub-pixels can extend in the second direction DR2, and the remaining one sub-pixel can extend in the first direction DR1, but embodiments of the present disclosure are not limited thereto.

[0052] That is, each sub-pixel 21, 22, or 23 can be arranged in at least one type selected from, for example, a strip type, a planar S strip type, a pentile (sub-pixel arrangement) type, a diamond structure type, and the like.

[0053] A bank BK can be arranged in each of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23. The bank BK can define a light emitting area EA1 of the sub-pixel 21, a light emitting area EA2 of the sub-pixel 22, and a light emitting area EA3 of the sub-pixel 23.

[0054] The bank BK is shown as being formed of a single layer, but is not limited thereto and can be formed of multiple layers. The bank BK can be formed of an inorganic insulating material, but is not limited thereto.

[0055] The sub-pixels 21, 22, and 23 can include light emitting areas EA1, EA2, and EA3 and non-light emitting areas NEA1, NEA2, and NEA3, respectively. The first sub-pixel 21 can include a first light emitting area EA1 and a first non-light emitting area NEA1 surrounding the first light emitting area EA1. The second sub-pixel 22 can include a second light emitting area EA2 and a second non-light emitting area NEA2 surrounding the second light emitting area EA2. The third sub-pixel 23 can include a third light emitting area EA3 and a third non-light emitting area NEA3 surrounding the third light emitting area EA3. Each light emitting area EA1, EA2, or EA3 can be the same as an area exposed from the bank BK of the anode electrode 4a, 4b, or 4c described later.

[0056] The anode electrode 4 is patterned for each sub-pixel 21, 22, or 23. That is, one anode electrode 4 is formed in the first sub-pixel 21, another anode electrode 4 is formed in the second sub-pixel 22, and yet another anode electrode 4 is formed in the third sub-pixel 23.

[0057] The anode electrode 4 can include a first anode electrode 4a, a second anode electrode 4b, and a third anode electrode 4c. The first anode electrode 4a, the second anode electrode 4b, and the third anode electrode 4c can be respectively disposed in the sub-pixels 21, 22, and 23.

[0058] The anode electrode 4 can serve as an anode of the display device 1. The bank BK can be disposed to cover edges of the anode electrode 4 disposed in each of the first to third sub-pixels 21, 22, and 23 to distinguish the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23.

[0059] The display device 1 can have reflectors (reflective layers RF1, RF2, and RF3) having different distances from the cathode electrode 6, thereby further improving light extraction efficiency using microcavity characteristics.

[0060] The microcavity characteristics refer to characteristics in which when a distance between the reflectors (reflective layers RF1, RF2, and RF3) and the cathode electrode 6 is an integer multiple of a half wavelength (λ / 2) of light emitted from the sub-pixels 21, 22, and 23, constructive interference occurs to amplify light, and as the process of reflection and re-reflection is repeated between the reflectors (reflective layers RF1, RF2, and RF3) and the cathode electrode 6, the degree of amplification of light is constantly increased, thereby improving external extraction efficiency of light.

[0061] The common light emitting layer 5 can be disposed to emit white light. For example, the common light emitting layer 5 can be disposed to emit white light by having a two-stack structure including a blue light emitting layer, a yellow-green light emitting layer, and a charge generation layer or a three-stack structure including a blue light emitting layer, a green light emitting layer, a red light emitting layer, and a charge generation layer, but is not necessarily limited thereto, and the common light emitting layer 5 can be formed of more than 3 stacks as long as it can emit white light.

[0062] The common light emitting layer 5 can be formed as a common layer across the first to third sub-pixels 21, 22, and 23.

[0063] The cathode electrode 6 serves to generate an electric field together with the anode electrode 4, and can serve as a cathode. The cathode electrode 6 can be disposed on an upper surface of the common light emitting layer 5 opposite a lower surface of the common light emitting layer 5 in contact with the anode electrode 4, and the cathode electrode 6 can be disposed as a common layer across the first to third sub-pixels 21, 22, and 23.

[0064] In the case of a top emission type, the cathode electrode 6 can be provided as a first electrode, and in the case of a bottom emission type, the cathode electrode 6 can be provided as an opaque cathode electrode including a reflective material. In the case of a top emission type, the cathode electrode 6 can be formed as a cathode electrode including a semi-transparent material to improve light extraction efficiency using a microcavity characteristic. Since the display device 1 improves light extraction efficiency using a microcavity characteristic in the case of a top emission type, an example in which the cathode electrode 6 is formed as a cathode electrode including a semi-transparent material will be described.

[0065] A color filter layer 9 is provided in each of the first to third sub-pixels 21, 22, and 23 to block a specific color among light emitted from the light emitting layer of each sub-pixel. The color filter layer 9 can include a first color filter 91 provided in the first sub-pixel 21, a second color filter 92 provided in the second sub-pixel 22, and a third color filter 93 provided in the third sub-pixel 23.

[0066] The first color filter 91 can be provided to block light of other colors except for red (R) light. In this case, the first color filter 91 can be provided as a red color filter. The second color filter 92 can be provided to block light of other colors except for green (G) light. In this case, the second color filter 92 can be provided as a green color filter. The third color filter 93 can be provided to block light of other colors except for blue (B) light. In this case, the third color filter 93 can be provided as a blue color filter. However, embodiments of the present disclosure are not necessarily limited thereto.

[0067] The first to third color filters 91, 92, and 93 provided in the first to third sub-pixels 21, 22, and 23, respectively, can be provided in the same size as the corresponding sub-pixel, or by being reduced or enlarged by a predetermined ratio with respect to each sub-pixel.

[0068] The transistors 31, 32, and 33 can be provided in the non-emitting areas NEA1, NEA2, and NEA3 of the sub-pixels 21, 22, and 23, respectively. For example, at least part of the transistors 31, 32, 33 can be provided in the emitting areas EA1, EA2, EA3.

[0069] The anode electrodes 4a, 4b, and 4c and the transistors 31, 32, and 33 provided in the sub-pixels 21, 22, and 23, respectively, can correspond to each other. The anode electrodes 4a, 4b, and 4c can be electrically connected to the corresponding transistors 31, 32, and 33, respectively, through the contact holes CNT1, CNT2, and CNT3 provided in the sub-pixels 21, 22, and 23, respectively. The contact holes CNT1, CNT2, and CNT3 can be provided in the non-emitting areas NEA1, NEA2, and NEA3, but are not limited thereto.

[0070] In this embodiment, the anode electrodes 4a, 4b, 4c are in direct contact with the transistors 31, 32, 33, respectively, but the manner in which the anode electrodes 4a, 4b, 4c are electrically connected to the transistors 31, 32, 33 is not limited thereto.

[0071] For example, since at least one connection electrode can be provided between each of the anode electrodes 4a, 4b, and 4c and each of the transistors 31, 32, and 33, the anode electrodes 4a, 4b, and 4c and the transistors 31, 32, and 33 can be electrically connected through the connection electrodes.

[0072] The transistors 31, 32, and 33 can include a first transistor 31, a second transistor 32, and a third transistor 33 that respectively correspond to the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23.

[0073] The first anode electrode 4a can be contactually electrically connected to the first transistor 31 through a first contact hole CNT1. The second anode electrode 4b can be contactually electrically connected to the second transistor 32 through a second contact hole CNT2. The third anode electrode 4c can be contactually electrically connected to the third transistor 33 through a third contact hole CNT3.

[0074] In the light emitting areas EA1, EA2, and EA3, the surface heights of the anode electrodes 4a, 4b, and 4c provided in the sub-pixels 21, 22, and 23, respectively, can be different. The surface height of the third anode electrode 4c provided in the third light emitting area EA3 of the third sub-pixel 23 can be greater than the surface height of the second anode electrode 4b provided in the second light emitting area EA2 of the second sub-pixel 22. The surface height of the second anode electrode 4b provided in the second light emitting area EA2 of the second sub-pixel 22 can be greater than the surface height of the first anode electrode 4a provided in the first light emitting area EA1 of the first sub-pixel 21.

[0075] The anode electrodes 4a, 4b, and 4c provided in the sub-pixels 21, 22, and 23, respectively, can be provided on different layers in the light emitting areas EA1, EA2, and EA3. In the first light emitting area EA1, the first anode electrode 4a can be provided on the second insulating layer 3b and can be in direct contact with the second insulating layer 3b. In the second light emitting area EA2, the second anode electrode 4b can be provided on the third insulating layer 3c and can be in direct contact with the third insulating layer 3c. In the third light emitting area EA3, the third anode electrode 4c can be provided on the fourth insulating layer 3d and can be in direct contact with the fourth insulating layer 3d.

[0076] The trench TR can be provided between the sub-pixels 21, 22, and 23 (or between the light emitting regions EA1, EA2, and EA3 of the sub-pixels 21, 22, and 23). In a plan view, the trench TR can extend between the sub-pixels 21, 22, and 23 in the first direction DR1 and the second direction DR2.

[0077] The trench TR can be defined by the fifth insulating layer 3e and the fourth insulating layer 3d. The trench TR can be formed in a groove or recess shape by removing at least a portion of the fifth insulating layer 3e and the fourth insulating layer 3d. For example, the trench TR can be formed in a shape extending into the fifth insulating layer 3e in the thickness direction (third direction DR3) and in which a portion of the fourth insulating layer 3d is removed.

[0078] Since the trench TR is provided between the sub-pixels 21, 22, and 23, even when the common light emitting layer 5 and the cathode electrode 6 are provided across the sub-pixels 21, 22, and 23, the first stack structure EL1 (see Figure 5 ) and the first charge generation layer CGL1 (see Figure 5 ) are separated in each sub-pixel 21, 22, or 23, and the second stack structure EL2 (see Figure 5 ) can be provided between the first charge generation layer CGL1 (see Figure 5 ) and the cathode electrode 6.

[0079] Accordingly, it is possible to prevent lateral leakage current between the sub-pixels 21, 22, and 23, prevent short circuit between the first charge generation layer CGL1 and the cathode electrode 6, and prevent light color mixing.

[0080] Hereinafter, the stack structure of the display device 1 according to one embodiment will be described in detail.

[0081] The display device 1 according to one embodiment includes a substrate 2, an insulating layer 3, an anode electrode 4, a bank BK, a common light emitting layer 5, a cathode electrode 6, a cover layer 7, an encapsulation layer 8, and a color filter layer 9.

[0082] The substrate 2 can be a plastic film, a glass substrate, or a semiconductor substrate such as silicon.

[0083] The substrate 2 can be formed of a transparent material or an opaque material. The first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 are provided on the substrate 2. The first sub-pixel 21 can be provided to emit red (R) light, the second sub-pixel 22 can be provided to emit blue (B) light, and the third sub-pixel 23 can be provided to emit green (G) light.

[0084] Since the display device 1 according to one embodiment is configured as a so-called top emission type in which emitted light is emitted upward, both a transparent material and an opaque material can be used as a material of the substrate 2. Color filters 91, 92, and 93 can be respectively provided above the first to third sub-pixels 21, 22, and 23 that emit light, to transmit light of the above colors.

[0085] An insulating layer 3 is formed on the substrate 2. The insulating layer 3 can include a plurality of insulating layers 3a, 3b, 3c, 3d, and 3e. Hereinafter, the insulating layer 3 is described as including first to fifth insulating layers 3a, 3b, 3c, 3d, and 3e, but is not limited thereto, and an additional insulating layer can be further provided between the first to fifth insulating layers 3a, 3b, 3c, 3d, and 3e.

[0086] The first insulating layer 3a is provided on the substrate 2, and circuit elements of a plurality of thin film transistors 31, 32, and 33, various signal lines, a capacitor, and the like are provided in the first insulating layer 3a of each sub-pixel 21, 22, or 23. Each of the plurality of transistors 31, 32, and 33 can be formed as a thin film transistor, but is not limited thereto.

[0087] The signal lines can include gate lines, data lines, power lines, and reference lines, and the transistors 31, 32, and 33 can include switching transistors, driving transistors, and sensing transistors. Each of the sub-pixels 21, 22, and 23 is defined by an intersection structure of the gate lines and the data lines.

[0088] The switching transistors are switched according to a gate signal provided to the gate lines to provide a data voltage provided from the data lines to the driving transistors.

[0089] The driving transistors are switched according to the data voltage provided from the switching transistors to generate a data current according to a power source provided from the power lines and provide the data current to the anode electrodes 4.

[0090] The sensing transistors function to detect a threshold voltage deviation of the driving transistors that causes a reduction in image quality, and provide a current of the driving transistors to the reference lines in response to a sensing control signal provided from the gate lines or a separate sensing line.

[0091] The capacitor functions to maintain the data voltage supplied to the driving transistors for one frame, and is connected with each of gate and source terminals of the driving transistors.

[0092] The first to third transistors 31, 32, and 33 are respectively provided in the sub-pixels 21, 22, and 23 in the first insulating layer 3a. The first transistor 31 can be connected with the first anode electrode 4a provided in the first sub-pixel 21 to apply a driving voltage for emitting light of a color corresponding to the first sub-pixel 21.

[0093] The second transistor 32 can be connected with the second anode electrode 4b provided in the second sub-pixel 22 to apply a driving voltage for emitting light of a color corresponding to the second sub-pixel 22.

[0094] The third transistor 33 can be connected with the third anode electrode 4c provided in the third sub-pixel 23 to apply a driving voltage for emitting light of a color corresponding to the third sub-pixel 23.

[0095] When each of the transistors 31, 32, and 33 receives a gate signal from a gate line, each of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 provides a predetermined current to the light emitting layer according to a data voltage of a data line. Accordingly, the light emitting layer of each of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 can emit light at a predetermined brightness according to the predetermined current.

[0096] The first insulating layer 3a can protect the transistors 31, 32, and 33. The first insulating layer 3a can be formed of an inorganic insulating material, but is not necessarily limited thereto, and can be formed of an organic insulating material. The transistors 31, 32, and 33 can be located in the first insulating layer 3a. For example, the first insulating layer 3a can be formed of an inorganic material such as silicon nitride (SiN x ), silicon oxide (SiO x ), aluminum oxide (Al2O3), etc., but embodiments of the present disclosure are not limited thereto.

[0097] The second to fourth insulating layers 3b, 3c, and 3d can be sequentially stacked on the first insulating layer 3a. The second to fourth insulating layers 3b, 3c, and 3d can each include a reflective layer RF1, RF2, and RF3 and a pitch forming layer SC1, SC2, and SC3.

[0098] The reflective layers RF1, RF2, and RF3 of the second to fourth insulating layers 3b, 3c, and 3d can be a distributed Bragg reflector (DBR) including a plurality of layers having different refractive indexes.

[0099] The pitch forming layers SC1, SC2, and SC3 of the second to fourth insulating layers 3b, 3c, and 3d can have different thicknesses. Accordingly, in each of the sub-pixels 21, 22, and 23 emitting light of different colors, a microcavity can be satisfied.

[0100] The second insulating layer 3b can be provided on the first insulating layer 3a. For example, the second insulating layer 3b can be formed of an inorganic material such as silicon nitride (SiN x ), silicon oxide (SiO xInorganic materials such as silicon oxide (SiO2), aluminum oxide (Al2O3), and the like are formed, but embodiments of the present disclosure are not limited thereto.

[0101] The second insulating layer 3b can include a first reflective layer RF1 and a first pitch forming layer SC1. The first reflective layer RF1 can be disposed on the first insulating layer 3a, and the first pitch forming layer SC1 can be disposed on the first reflective layer RF1. The first reflective layer RF1 can be disposed between the first insulating layer 3a and the first pitch forming layer SC1.

[0102] The first reflective layer RF1 can function as a reflector. The first reflective layer RF1 can include a plurality of inorganic films having different refractive indices. The plurality of inorganic films having different refractive indices can be alternately stacked.

[0103] The first reflective layer RF1 can have a structure in which low refractive index layers and high refractive index layers are alternately stacked. The low refractive index layers and the high refractive index layers have different refractive indices, and the refractive index of the high refractive index layers can be greater than the refractive index of the low refractive index layers. Here, the low refractive index and the high refractive index can refer to relative refractive indices.

[0104] The first reflective layer RF1 can have a total of at least five low refractive index layers and high refractive index layers. The first reflective layer RF1 can have a total of 5 to 50 low refractive index layers and high refractive index layers, but is not limited thereto.

[0105] In the present embodiment, the first reflective layer RF1 is described as having a plurality of low refractive index layers and a plurality of high refractive index layers and being formed of a total of five layers, but is not limited thereto.

[0106] The thickness of each layer forming the first reflective layer RF1 can be formed to be an integer multiple of 1 / 4 of the wavelength (λ) of light emitted from the first sub-pixel 21. In this case, since reflection (and diffraction) occurs between the low refractive index layers and the high refractive index layers having different refractive indices and constructive interference can occur, the first reflective layer RF1 can function as a reflector.

[0107] For example, when the first sub-pixel 21 emits red (R) light, the thickness of each layer forming the first reflective layer RF1 can be formed to be an integer multiple of 1 / 4 of the wavelength (λ) of the red (R) light.

[0108] However, embodiments of the present disclosure are not limited thereto, for example, the low refractive index layer can be formed of silicon dioxide (SiO2), and the high refractive index layer can be formed of silicon nitride (SiN x ) or titanium dioxide (TiO2).

[0109] The first sub-pixel 21 can emit first light L1. The emitted first light L1 can travel from the common light emitting layer 5 toward the first reflective layer RF1. In the case where the first reflective layer RF1 is formed of a Bragg reflector, the first light L1 can be reflected from the first reflective layer RF1.

[0110] Specifically, the first reflective layer RF1 can include 11th to 15th inorganic layers RF11 to RF15 having different refractive indexes. The 11th to 15th inorganic layers RF11 to RF15 can be sequentially stacked from the first pitch forming layer SC1 toward the first insulating layer 3a.

[0111] The 11th, 13th, and 15th inorganic layers RF11, RF13, and RF15 can have the same first refractive index n1. The 12th and 14th inorganic layers RF12 and RF14 can have the same second refractive index n2. The first refractive index n1 can be greater than the second refractive index n2, but is not limited thereto, and the first refractive index n1 can be less than the second refractive index n2.

[0112] The 11th to 15th inorganic layers RF11 to RF15 can have different refractive indexes. The thickness of each of the 11th to 15th inorganic layers RF11 to RF15 can be formed to be an integer multiple of 1 / 4 of the wavelength (λ) of the first light L1. In this case, the first light L1 traveling toward the first reflective layer RF1 can be reflected (and diffracted) at the boundary of each inorganic layer. The light reflected (and diffracted) at the boundary of each inorganic layer can interfere constructively with each other.

[0113] For example, a portion of the first light L1 can be reflected at the boundary between the first pitch forming layer SC1 and the 11th inorganic layer RF11 to become 11th reflected light L11. A portion of the first light L1 passing through the 11th inorganic layer RF11 can be reflected at the boundary between the 11th inorganic layer RF11 and the 12th inorganic layer RF12 to become 12th reflected light L12. A portion of the first light L1 passing through the 12th inorganic layer RF12 can be reflected at the boundary between the 12th inorganic layer RF12 and the 13th inorganic layer RF13 to become 13th reflected light L13. A portion of the first light L1 passing through the 13th inorganic layer RF13 can be reflected at the boundary between the 13th inorganic layer RF13 and the 14th inorganic layer RF14 to become 14th reflected light L14. A portion of the first light L1 passing through the 14th inorganic layer RF14 can be reflected at the boundary between the 14th inorganic layer RF14 and the 15th inorganic layer RF15 to become 15th reflected light L15.

[0114] The 11th, 13th, and 15th inorganic layers RF11, RF13, and RF15 can be formed of silicon nitride (SiN x) or titanium dioxide (TiO2), and the 12th inorganic layer RF12 and the 14th inorganic layer RF14 can be formed of silicon dioxide (SiO2), but the material of each inorganic layer is not limited thereto.

[0115] When the thickness of each of the 11th inorganic layer RF11 to the 15th inorganic layer RF15 is formed to be an integer multiple of 1 / 4 of the wavelength (λ) of the first light L1, the 11th reflected light L11 to the 15th reflected light L15 can interfere with each other, and the first reflective layer RF1 can function as a reflector, and thus the first light L1 can be reflected by the first reflective layer RF1.

[0116] When the reflector of the first light L1 emitted from the first sub-pixel 21 is formed of an inorganic film (inorganic insulating film) rather than metal, separate patterning can not be required, and thus process error and microcavity deviation can be reduced or minimized, thereby improving the reliability of the display device 1.

[0117] In each of the inorganic layers RF11 to RF15 of the first reflective layer RF1, adjacent inorganic layers can be formed to have high selectivity. High refractive index layers and low refractive index layers can be alternately disposed, and the high refractive index layers and the low refractive index layers can have different etching rates. The first spacing formation layer SC1 can be formed by including a material having a different etching rate from the adjacent 11th inorganic layer RF11.

[0118] The first spacing formation layer SC1 can have a first thickness t1. The first spacing formation layer SC1 can have a thickness capable of satisfying a microcavity in the first sub-pixel 21.

[0119] For example, the first sub-pixel 21 can emit the first light L1 as red (R) light. The first light L1 can be emitted from the common light emitting layer 5 of the first sub-pixel 21, and can travel toward the first reflective layer RF1. The first spacing formation layer SC1 can be disposed between the common light emitting layer 5 and the first reflective layer RF1 to adjust the spacing between the cathode electrode 6 and the first reflective layer RF1.

[0120] The first spacing formation layer SC1 can be adjusted according to the first thickness t1 so that the spacing between the cathode electrode 6 and the first reflective layer RF1 is an integer multiple of a half wavelength (λ / 2) of the first light L1 emitted from the first sub-pixel 21.

[0121] The first spacing formation layer SC1 can be adjusted so that the spacing between the cathode electrode 6 and the first reflective layer RF1 has a microcavity corresponding to the color of the light emitted from the first sub-pixel 21. Accordingly, the light extraction efficiency of the light emitted from the first sub-pixel 21 can be further improved.

[0122] For example, when the first light L1 emitted from the first sub-pixel 21 is red (R) light, the first interval forming layer SC1 can be formed so that the interval between the cathode electrode 6 and the first reflective layer RF1 is an integer multiple of the half wavelength (λ / 2) of the red (R) light.

[0123] Therefore, the interval between the cathode electrode 6 and the first reflective layer RF1 can have a thickness capable of satisfying a microcavity. In this case, the first thickness t1 of the first interval forming layer SC1 can be greater than the second thickness t2 of the second interval forming layer SC2 and the third thickness t3 of the third interval forming layer SC3.

[0124] The third insulating layer 3c can be disposed on the second insulating layer 3b. For example, the third insulating layer 3c can be formed of an inorganic material such as silicon nitride (SiN x ), silicon oxide (SiO x ), aluminum oxide (Al2O3), or the like, but embodiments of the present disclosure are not limited thereto.

[0125] The third insulating layer 3c can include the second reflective layer RF2 and the second interval forming layer SC2. The second reflective layer RF2 can be disposed on the second insulating layer 3b, and the second interval forming layer SC2 can be disposed on the second reflective layer RF2. The second reflective layer RF2 can be disposed between the second insulating layer 3b and the second interval forming layer SC2.

[0126] The second reflective layer RF2 can function as a reflector. The second reflective layer RF2 can include a plurality of inorganic films having different refractive indices. The plurality of inorganic films having different refractive indices can be alternately stacked. The configuration and reflection principle of the second reflective layer RF2 can be substantially the same as those of the first reflective layer RF1.

[0127] The second reflective layer RF2 can have a structure in which a low-refractive-index layer and a high-refractive-index layer are alternately stacked. The low-refractive-index layer and the high-refractive-index layer have different refractive indices, and the refractive index of the high-refractive-index layer can be greater than the refractive index of the low-refractive-index layer. Here, the low-refractive-index and the high-refractive-index can refer to relative refractive indices.

[0128] The second reflective layer RF2 can have a total of at least five low-refractive-index layers and high-refractive-index layers. The second reflective layer RF2 can have a total of 5 to 50 low-refractive-index layers and high-refractive-index layers, but is not limited thereto.

[0129] In the present embodiment, the second reflective layer RF2 is described as having a plurality of low-refractive-index layers and a plurality of high-refractive-index layers and being formed of a total of five layers, but is not limited thereto.

[0130] The thickness of each layer forming the second reflective layer RF2 can be formed to be an integer multiple of 1 / 4 of the wavelength (λ) of the light emitted from the second sub-pixel 22. In this case, since reflection (and diffraction) occurs between the low refractive layer and the high refractive layer having different refractive indices and constructive interference can occur, the second reflective layer RF2 can function as a reflector.

[0131] For example, when the second sub-pixel 22 emits green (G) light, the thickness of each layer forming the second reflective layer RF2 can be formed to be an integer multiple of 1 / 4 of the wavelength (λ) of the green (G) light.

[0132] However, embodiments of the present disclosure are not limited thereto, for example, the low refractive layer can be formed of silicon dioxide (SiO2), and the high refractive layer can be formed of silicon nitride (SiN x ) or titanium dioxide (TiO2).

[0133] The second sub-pixel 22 can emit second light L2. The emitted second light L2 can travel from the common light-emitting layer 5 toward the second reflective layer RF2. In the case where the second reflective layer RF2 is formed of a Bragg reflector, the second light L2 can be reflected from the second reflective layer RF2.

[0134] When the thickness of each of the low refractive layer and the high refractive layer of the second reflective layer RF2 is formed to be an integer multiple of 1 / 4 of the wavelength (λ) of the second light L2, the second reflective layer RF2 can function as a reflector, and thus the second light L2 can be reflected by the second reflective layer RF2.

[0135] When the reflector of the second light L2 emitted from the second sub-pixel 22 is formed of an inorganic film (inorganic insulating film) rather than metal, separate patterning can not be required, and thus process error and microcavity deviation can be reduced or minimized, thereby improving the reliability of the display device 1.

[0136] Each inorganic layer of the second reflective layer RF2 can be formed to have a high etching rate (selectivity). The high refractive layer and the low refractive layer can be alternately disposed, and the high refractive layer and the low refractive layer can have different etching rates. The second spacing forming layer SC2 can be formed of a material including an inorganic layer of the second reflective layer RF2 disposed closest to the second spacing forming layer SC2, which has a different etching rate.

[0137] The second spacing forming layer SC2 can have a second thickness t2. The second spacing forming layer SC2 can have a thickness capable of satisfying a microcavity in the second sub-pixel 22.

[0138] For example, the second sub-pixel 22 can emit second light L2 as green (G) light. The second light L2 can be emitted from the common light emitting layer 5 of the second sub-pixel 22 and can travel toward the second reflective layer RF2. The second spacing forming layer SC2 can be disposed between the common light emitting layer 5 and the second reflective layer RF2 to adjust the spacing between the cathode electrode 6 and the second reflective layer RF2.

[0139] The second spacing forming layer SC2 can be adjusted according to the second thickness t2 so that the spacing between the cathode electrode 6 and the second reflective layer RF2 is an integer multiple of a half wavelength (λ / 2) of the second light L2 emitted from the second sub-pixel 22.

[0140] The second spacing forming layer SC2 can be adjusted so that the spacing between the cathode electrode 6 and the second reflective layer RF2 has a microcavity corresponding to the color of the light emitted from the second sub-pixel 22. Accordingly, the light extraction efficiency of the light emitted from the second sub-pixel 22 can be further improved.

[0141] For example, when the second light L2 emitted from the second sub-pixel 22 is green (G) light, the second spacing forming layer SC2 can be formed so that the spacing between the cathode electrode 6 and the second reflective layer RF2 is an integer multiple of a half wavelength (λ / 2) of the green (G) light.

[0142] Accordingly, the spacing between the cathode electrode 6 and the second reflective layer RF2 can have a thickness capable of satisfying a microcavity. In this case, the second thickness t2 of the second spacing forming layer SC2 can be greater than the third thickness t3 of the third spacing forming layer SC3.

[0143] The fourth insulating layer 3d can be disposed on the third insulating layer 3c. For example, the fourth insulating layer 3d can be formed of an inorganic material such as silicon nitride (SiN x ), silicon oxide (SiO x ), aluminum oxide (Al2O3), or the like, but embodiments of the disclosure are not limited thereto.

[0144] The fourth insulating layer 3d can include a third reflective layer RF3 and a third spacing forming layer SC3. The third reflective layer RF3 can be disposed on the third insulating layer 3c, and the third spacing forming layer SC3 can be disposed on the third reflective layer RF3. The third reflective layer RF3 can be disposed between the third insulating layer 3c and the third spacing forming layer SC3.

[0145] The third reflective layer RF3 can function as a reflector. The third reflective layer RF3 can include a plurality of inorganic films having different refractive indices. The plurality of inorganic films having different refractive indices can be alternately stacked. The configuration and reflection principle of the third reflective layer RF3 can be substantially the same as those of the first reflective layer RF1.

[0146] The third reflective layer RF3 can have a structure in which low refractive index layers and high refractive index layers are alternately stacked. The low refractive index layers and the high refractive index layers have different refractive indices, and the refractive index of the high refractive index layers can be greater than the refractive index of the low refractive index layers. Here, the low refractive index and the high refractive index can refer to relative refractive indices.

[0147] The third reflective layer RF3 can have a total of at least five low refractive index layers and high refractive index layers. The third reflective layer RF3 can have a total of 5 to 50 low refractive index layers and high refractive index layers, but is not limited thereto.

[0148] In the present embodiment, the third reflective layer RF3 is described as having a plurality of low refractive index layers and a plurality of high refractive index layers and being formed of a total of five layers, but is not limited thereto.

[0149] The thickness of each layer forming the third reflective layer RF3 can be formed to a thickness that is an integer multiple of 1 / 4 of the wavelength (λ) of the light emitted from the third sub-pixel 23. In this case, since reflection (and diffraction) occurs between the low refractive index layers and the high refractive index layers having different refractive indices and constructive interference can occur, the third reflective layer RF3 can function as a reflector.

[0150] For example, when the third sub-pixel 23 emits blue (B) light, the thickness of each layer forming the third reflective layer RF3 can be formed to a thickness that is an integer multiple of 1 / 4 of the wavelength (λ) of the blue (B) light.

[0151] However, embodiments of the present disclosure are not limited thereto, for example, the low refractive index layer can be formed of silicon dioxide (SiO2), and the high refractive index layer can be formed of silicon nitride (SiN x ) or titanium dioxide (TiO2).

[0152] The third sub-pixel 23 can emit third light L3. The emitted third light L3 can travel from the common light-emitting layer 5 toward the third reflective layer RF3. In the case where the third reflective layer RF3 is formed of a Bragg reflector, the third light L3 can be reflected from the third reflective layer RF3.

[0153] When the thickness of each of the low refractive index layers and the high refractive index layers of the third reflective layer RF3 is formed to a thickness that is an integer multiple of 1 / 4 of the wavelength (λ) of the third light L3, the third reflective layer RF3 can function as a reflector, and thus the third light L3 can be reflected by the third reflective layer RF3.

[0154] When the reflector of the third light L3 emitted from the third sub-pixel 23 is formed of an inorganic film (inorganic insulating film) rather than metal, separate patterning can not be required, and thus process errors and microcavity deviations can be minimized, thereby improving the reliability of the display device 1.

[0155] Each inorganic layer of the third reflective layer RF3 can be formed to have a high etching rate (selectivity). The high refractive index layer and the low refractive index layer can be alternately disposed, and the high refractive index layer and the low refractive index layer can have different etching rates. The third spacing forming layer SC3 can be formed of a material including a different etching rate from the inorganic layer of the third reflective layer RF3 disposed closest to the third spacing forming layer SC3.

[0156] The third spacing forming layer SC3 can have a third thickness t3. The third spacing forming layer SC3 can have a thickness capable of satisfying a microcavity in the third sub-pixel 23.

[0157] For example, the third sub-pixel 23 can emit third light L3 as blue (B) light. The third light L3 can be emitted from the common light emitting layer 5 of the third sub-pixel 23 and can travel toward the third reflective layer RF3. The third spacing forming layer SC3 can be disposed between the common light emitting layer 5 and the third reflective layer RF3 to adjust a spacing between the cathode electrode 6 and the third reflective layer RF3.

[0158] The third spacing forming layer SC3 can be adjusted according to the third thickness t3 so that the spacing between the cathode electrode 6 and the third reflective layer RF3 is an integer multiple of a half wavelength (λ / 2) of the third light L3 emitted from the third sub-pixel 23.

[0159] The third spacing forming layer SC3 can be adjusted so that the spacing between the cathode electrode 6 and the third reflective layer RF3 has a microcavity corresponding to a color of light emitted from the third sub-pixel 23. Accordingly, light extraction efficiency of light emitted from the third sub-pixel 23 can be further improved.

[0160] For example, when the third light L3 emitted from the third sub-pixel 23 is blue (B) light, the third spacing forming layer SC3 can be formed so that the spacing between the cathode electrode 6 and the third reflective layer RF3 is an integer multiple of a half wavelength (λ / 2) of the blue (B) light. Accordingly, the spacing between the cathode electrode 6 and the third reflective layer RF3 can have a thickness capable of satisfying a microcavity.

[0161] A fifth insulating layer 3e can be disposed on the fourth insulating layer 3d. The fifth insulating layer 3e can be formed of a plurality of layers including different materials. Hereinafter, the fifth insulating layer 3e is described as being formed of four layers, but the number of layers forming the fifth insulating layer 3e is not limited thereto.

[0162] Adjacent layers of the fifth insulating layer 3e can have a high etching rate (selectivity) with respect to each other. Each layer of the fifth insulating layer 3e can include substantially the same material as the high refractive index layer and the low refractive index layer of the reflective layers RF1, RF2, and RF3.

[0163] Each inorganic layer of the second reflective layer RF2, the second space forming layer SC2, each inorganic layer of the third reflective layer RF3, the third space forming layer SC3, and each inorganic layer of the fifth insulating layer 3e can have a high etching rate with respect to an adjacent layer.

[0164] Each inorganic layer of the second reflective layer RF2, the second space forming layer SC2, each inorganic layer of the third reflective layer RF3, the third space forming layer SC3, and each inorganic layer of the fifth insulating layer 3e can sequentially and alternately have different etching rates.

[0165] In the first sub-pixel 21, the first insulating layer 3a, the first transistor 31 provided in the first insulating layer 3a, the second insulating layer 3b provided on the first insulating layer 3a, the third insulating layer 3c provided on the second insulating layer 3b, the first anode electrode 4a provided on the second insulating layer 3b, the bank BK provided on the first anode electrode 4a, the fourth insulating layer 3d provided on the third insulating layer 3c, and the fifth insulating layer 3e provided on the fourth insulating layer 3d can be sequentially provided on the substrate 2.

[0166] The third insulating layer 3c, the fourth insulating layer 3d, and the fifth insulating layer 3e can define a first opening OP1 that exposes the second insulating layer 3b. The first opening OP1 can pass through the third insulating layer 3c, the fourth insulating layer 3d, and the fifth insulating layer 3e in the thickness direction (third direction DR3) to expose the second insulating layer 3b.

[0167] That is, the first opening OP1 can expose the second insulating layer 3b, and a sidewall of the first opening OP1 can be formed by the third insulating layer 3c, the fourth insulating layer 3d, and the fifth insulating layer 3e.

[0168] The first anode electrode 4a can be provided in the first opening OP1. The first anode electrode 4a can be provided on the second insulating layer 3b exposed by the first opening OP1 and can be in direct contact with an upper surface of the second insulating layer 3b.

[0169] The first anode electrode 4a can be contactually electrically connected with the first transistor 31 through a first contact hole CNT1 that extends to a portion of the second insulating layer 3b and the first insulating layer 3a in the thickness direction (third direction DR3) to expose the first transistor 31.

[0170] In the second sub-pixel 22, the first insulating layer 3a, the second transistor 32 provided in the first insulating layer 3a, the second insulating layer 3b provided on the first insulating layer 3a, the third insulating layer 3c provided on the second insulating layer 3b, the second anode electrode 4b provided on the third insulating layer 3c, the bank BK provided on the second anode electrode 4b, the fourth insulating layer 3d provided on the third insulating layer 3c, and the fifth insulating layer 3e provided on the fourth insulating layer 3d can be sequentially provided on the substrate 2.

[0171] The fourth insulating layer 3d and the fifth insulating layer 3e can define a second opening OP2 that exposes the third insulating layer 3c. The second opening OP2 can pass through the fourth insulating layer 3d and the fifth insulating layer 3e in the thickness direction (third direction DR3) to expose the third insulating layer 3c.

[0172] That is, the second opening OP2 can expose the third insulating layer 3c, and a sidewall of the second opening OP2 can be formed by the fourth insulating layer 3d and the fifth insulating layer 3e.

[0173] The second anode electrode 4b can be provided in the second opening OP2. The second anode electrode 4b can be provided on the third insulating layer 3c exposed by the second opening OP2, and can be in direct contact with an upper surface of the third insulating layer 3c.

[0174] The second anode electrode 4b can be in contact electrically connected with the second transistor 32 through a second contact hole CNT2 that passes through a portion of the first insulating layer 3a, the second insulating layer 3b, and the third insulating layer 3c in the thickness direction (third direction DR3) to expose the second transistor 32.

[0175] In the third sub-pixel 23, the first insulating layer 3a, the third transistor 33 provided in the first insulating layer 3a, the second insulating layer 3b provided on the first insulating layer 3a, the third insulating layer 3c provided on the second insulating layer 3b, the fourth insulating layer 3d provided on the third insulating layer 3c, the third anode electrode 4c provided on the fourth insulating layer 3d, the bank BK provided on the third anode electrode 4c, and the fifth insulating layer 3e provided on the fourth insulating layer 3d can be sequentially provided on the substrate 2.

[0176] The fifth insulating layer 3e can define a third opening OP3 that exposes the fourth insulating layer 3d. The third opening OP3 can pass through the fifth insulating layer 3e in the thickness direction (third direction DR3) to expose the fourth insulating layer 3d.

[0177] That is, the third opening OP3 can expose the fourth insulating layer 3d, and a sidewall of the third opening OP3 can be formed by the fifth insulating layer 3e.

[0178] The third anode electrode 4c can be disposed in the third opening OP3. The third anode electrode 4c can be disposed on the fourth insulating layer 3d exposed through the third opening OP3, and can be in direct contact with the upper surface of the fourth insulating layer 3d.

[0179] The third anode electrode 4c can be in contact with the third transistor 33 through a third contact hole CNT3 extending in a thickness direction (third direction DR3) into a portion of the first insulating layer 3a, the second insulating layer 3b, the third insulating layer 3c, and the fourth insulating layer 3d to expose the third transistor 33.

[0180] The display device 1 according to one embodiment can be disposed in a top emission type, and for this, the reflective layers RF1, RF2, and RF3 can be disposed to reflect light emitted from the common light emitting layer 5 upward.

[0181] Each of the reflective layers RF1, RF2, or RF3 can reflect light emitted from the common light emitting layer 5 of the sub-pixel 21, 22, or 23 toward the cathode electrode 6 or the encapsulation layer 8 toward which the light emitted from the common light emitting layer 5 of the sub-pixel 21, 22, or 23 is emitted. In addition, each of the reflective layers RF1, RF2, or RF3 is formed to achieve microcavity characteristics together with the cathode electrode 6 by reflection and re-reflection. For this, each of the reflective layers RF1, RF2, or RF3 can be formed as a reflector for reflecting light.

[0182] Since the reflective layers RF1, RF2, and RF3 are disposed at a relatively low position compared to the common light emitting layer 5 for emitting light, the reflective layers RF1, RF2, and RF3 can reflect light emitted from the common light emitting layer 5 upward. Here, upward can refer to a direction in which a user can perceive light, for example, a side on which the encapsulation layer 8 or the color filter layer 9 is disposed. Thus, compared to a case in which the reflective layers RF1, RF2, and RF3 are not present, light efficiency of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 can be further improved, and a user can perceive a high-luminance image, i.e., a clear image, through the improved light efficiency.

[0183] As described above, by including the reflective layers RF1, RF2, and RF3, the display device 1 can also improve light extraction efficiency with microcavity characteristics.

[0184] A distance between the first reflective layer RF1 and the anode electrode 4 can be greater than a distance between the second reflective layer RF2 and the anode electrode 4. The distance between the second reflective layer RF2 and the anode electrode 4 can be greater than a distance between the third reflective layer RF3 and the anode electrode 4.

[0185] The reason why the reflective layers RF1, RF2, and RF3 are formed to have various separation distances (or resonance distances) from the cathode electrode 6 is that, depending on the separation distance, the light extraction efficiency of different colors of light can be improved by reflection and re-reflection between the reflective layers RF1, RF2, and RF3 and the cathode electrode 6. Thus, the light extraction efficiency of red light in the first sub-pixel 21 can be improved, the light extraction efficiency of green light in the second sub-pixel 22 can be improved, and the light extraction efficiency of blue light in the third sub-pixel 23 can be improved.

[0186] The anode electrode 4 is provided on the reflective layers RF1, RF2, and RF3. The anode electrode 4 is formed to supply holes to the common light-emitting layer 5. The anode electrode 4 can be provided to be transparent so that light reflected from the reflective layers RF1, RF2, and RF3 can travel upward. The anode electrode 4 can be formed of a transparent material, but is not limited thereto, and can be formed in the form of a thin film having a thin metal material. For example, the anode electrode 4 can include titanium nitride (TiN), but is not limited thereto. The anode electrode 4 can be formed of a very thin film so that light reflected from the reflective layers RF1, RF2, and RF3 can travel upward. For example, the thickness of the anode electrode 4 can be about 5 nm or less. For example, the thickness of the anode electrode 4 can be about 3 nm or less, but is not limited thereto.

[0187] The anode electrode 4 can be electrically connected to the first to third transistors 31, 32, and 33 through the contact holes CNT1 to CNT3, respectively, so that a driving voltage provided by each of the first to third transistors 31, 32, and 33 can be applied to the anode electrode 4. The anode electrode 4 can supply holes to the common light-emitting layer 5 when the driving voltage is applied from the first to third transistors 31, 32, and 33.

[0188] The anode electrodes 4a, 4b, and 4c provided in the sub-pixels 21, 22, and 23, respectively, can be provided on different layers in the light-emitting areas EA1, EA2, and EA3.

[0189] A bank BK can be provided on the anode electrode 4 (4a, 4b, and 4c). The bank BK can be formed of an inorganic material such as silicon nitride (SiN x ), silicon oxide (SiO x ), aluminum oxide (Al2O3), or the like, but embodiments of the present disclosure are not limited thereto.

[0190] In the light-emitting areas EA1, EA2, and EA3, the bank BK can define the light-emitting areas EA1, EA2, and EA3 by exposing the upper surfaces of the anode electrodes 4 (4a, 4b, and 4c). On the other hand, in the non-light-emitting areas NEA1, NEA2, and NEA3, the bank BK can cover the upper surfaces of the anode electrodes 4a, 4b, and 4c.

[0191] In each of the sub-pixels 21, 22, or 23, the entire area of the bank BK can be disposed in each of the openings OP1, OP2, or OP3, but is not limited thereto. The bank BK disposed in each of the sub-pixels 21, 22, or 23 can be patterned, and the entire area of each of the patterned banks BK can be disposed in one of the openings OP1, OP2, and OP3.

[0192] The common light emitting layer 5 is formed on the anode electrode 4 and the bank BK. The common light emitting layer 5 can also be formed on the filling member disposed between the plurality of sub-pixels 21, 22, and 23. The common light emitting layer 5 can be in contact with the upper surface of the anode electrode 4. The common light emitting layer 5 can be in direct contact with the side surface and the upper surface of the bank BK.

[0193] The organic light emitting diode (OLED) according to one embodiment can include the anode electrode 4, the cathode electrode 6, and the common light emitting layer 5 between the anode electrode 4 and the cathode electrode 6.

[0194] The common light emitting layer 5 can be disposed to emit white (W) light. To this end, the common light emitting layer 5 can include a plurality of stacked structures for emitting light of different colors. Specifically, the common light emitting layer 5 can include a first stacked structure, a second stacked structure, and a charge generation layer (CGL) disposed between the first stacked structure and the second stacked structure.

[0195] The cathode electrode 6 is formed on the common light emitting layer 5. The cathode electrode 6 can serve as a cathode of the display device 1. Like the common light emitting layer 5, the cathode electrode 6 is formed in each of the sub-pixels 21, 22, and 23 and between the sub-pixels 21, 22, and 23.

[0196] In the display device 1 according to one embodiment, the cathode electrode 6 can be formed as a cathode electrode including a semi-transparent material in order to achieve white light with certain light efficiency in a top emission type. Accordingly, for each of the first to third sub-pixels 21, 22, and 23, a microcavity effect can be obtained. When the cathode electrode 6 is formed as a cathode electrode including a semi-transparent material, the microcavity effect can be obtained due to repeated reflection and re-reflection of light between the cathode electrode 6 and the reflection layers RF1, RF2, and RF3, thereby increasing light extraction efficiency.

[0197] Meanwhile, since the cathode electrode 6 is formed on the upper surface of the common light emitting layer 5, the cathode electrode 6 can be formed along the contour of the common light emitting layer 5. Since the common light emitting layer 5 is formed along the contour of the anode electrode 4 in the light emitting area, the cathode electrode 6 can finally be formed along the contour of the anode electrode 4. Further, the cover layer 7 on the cathode electrode 6 can also be formed along the contour of the cathode electrode 6.

[0198] The cover layer 7 can be formed of an inorganic insulating material, but is not limited thereto. The cover layer 7 can be formed of a single layer, but is not limited thereto, and can be formed of multiple layers. The cover layer (CPL) 7 can be disposed on the cathode electrode (CAT) 6 to protect the organic light emitting diode OLED.

[0199] The encapsulation layer 8 is formed on the cathode electrode 6 to prevent external moisture from penetrating the common light emitting layer 5. The encapsulation layer 8 can be formed of an inorganic insulating material, or in a structure in which inorganic insulating materials and organic insulating materials are alternately stacked, but is not necessarily limited thereto.

[0200] The color filter layer 9 is formed on the encapsulation layer 8. The color filter layer 9 can include a red (R) first color filter 91 disposed in the first sub-pixel 21, a green (G) second color filter 92 disposed in the second sub-pixel 22, and a blue (B) third color filter 93 disposed in the third sub-pixel 23, but is not necessarily limited thereto.

[0201] Figure 5 is a cross-sectional view of an organic light emitting diode OLED according to Figure 2 Figure 6 is a cross-sectional view of an organic light emitting diode OLED according to Figure 2 a modification example.

[0202] Referring to Figures 2 to 6 , the common light emitting layer 5 can include a first stack structure EL1 disposed on the anode electrode (ANO) 4, a second stack structure EL2, and a first charge generation layer CGL1.

[0203] The first stack structure EL1 can be disposed on the anode electrode 4 and be configured in a structure in which a hole injection layer HIL, a hole transport layer HTL, a blue (B) light emitting layer EML1, and an electron transport layer ETL can be sequentially stacked.

[0204] The first stack structure EL1 can be disposed between the first sub-pixel 21 and the second sub-pixel 22 and between the second sub-pixel 22 and the third sub-pixel 23.

[0205] The first charge generation layer CGL1 serves to supply charges to the first stack structure EL1 and the second stack structure EL2. The first charge generation layer CGL1 can include an N-type charge generation layer for supplying electrons to the first stack structure EL1 and a P-type charge generation layer for supplying holes to the second stack structure EL2. The N-type charge generation layer can include a metal material as a dopant.

[0206] The second stack structure EL2 can be disposed on the first stack structure EL1 and be configured in a structure in which a hole transport layer HTL, a yellow-green (YG) light emitting layer EML2, an electron transport layer ETL, and an electron injection layer EIL are sequentially stacked.​

[0207] The second stack structure EL2 can be disposed between the first sub-pixel 21 and the second sub-pixel 22 and between the second sub-pixel 22 and the third sub-pixel 23.

[0208] Accordingly, as shown in FIG. 1B, the common light-emitting layer 5 can be disposed as a common layer across the first to third sub-pixels 21, 22, and 23. Figure 2

[0209] As shown in FIG. 1B, the common light-emitting layer 5' of the organic light-emitting diode OLED according to one embodiment can include a first stack structure EL1 disposed on the anode electrode 4, a second stack structure EL2, a third stack structure EL3, a first charge generation layer CGL1 between the first stack structure EL1 and the second stack structure EL2, and a second charge generation layer CGL2 between the second stack structure EL2 and the third stack structure EL3. Figure 6 The first stack structure EL1 can be disposed on the anode electrode 4 and configured in a structure in which a hole injection layer HIL, a hole transport layer HTL, a blue (B) light-emitting layer EML1, and an electron transport layer ETL can be sequentially stacked.

[0210] The first stack structure EL1 can be disposed between the first sub-pixel 21 and the second sub-pixel 22 and between the second sub-pixel 22 and the third sub-pixel 23, i.e., on the bank BK.

[0211] The first charge generation layer CGL1 serves to supply charges to the first stack structure EL1 and the second stack structure EL2. The first charge generation layer CGL1 can include an N-type charge generation layer for supplying electrons to the first stack structure EL1 and a P-type charge generation layer for supplying holes to the second stack structure EL2. The N-type charge generation layer can include a metal material as a dopant.

[0212] The second stack structure EL2 can be disposed on the first stack structure EL1 and configured in a structure in which a hole transport layer HTL, a green (G) light-emitting layer EML2, and an electron transport layer ETL are sequentially stacked.

[0213] The second stack structure EL2 can be disposed between the first sub-pixel 21 and the second sub-pixel 22 and between the second sub-pixel 22 and the third sub-pixel 23, i.e., on the bank BK.

[0214]

[0215] ​​The second charge generation layer CGL2 serves to supply charges to the second stack structure EL2 and the third stack structure EL3. The second charge generation layer CGL2 can include an N-type charge generation layer for supplying electrons to the second stack structure EL2 and a P-type charge generation layer for supplying holes to the third stack structure EL3. The N-type charge generation layer can include a metal material as a dopant.

[0216] The third stack structure EL3 can be disposed on the second stack structure EL2 and be configured in a structure in which a hole transport layer HTL, a red (R) emission layer EML3, an electron transport layer ETL, and an electron injection layer EIL are sequentially stacked.

[0217] Even when the common emission layer 5 is formed to be disposed as a common layer across the first to third sub-pixels 21, 22, and 23, the leakage current between the adjacent sub-pixels 21, 22, and 23 can be suppressed or prevented by the sidewalls of the first to third openings OP1, OP2, and OP3.

[0218] Reference will also be made to Figure 7 for a detailed description thereof.

[0219] Figure 7 is Figure 2 a magnified view of the region Q2 in

[0220] For ease of description, Figure 7 only the hole injection layer HIL and the anode electrode 4a of the common emission layer 5 of the organic light emitting diode OLED are separately shown in

[0221] Although the description of Figure 7 is made based on the first opening OP1 of the first sub-pixel 21, the description thereof can also be applied to the second opening OP2 of the second sub-pixel 22 and the third opening OP3 of the third sub-pixel 23 in substantially the same manner.

[0222] Reference will be made to Figure 2 and Figures 5 to 7 , the organic layer EL11 can be disposed on the hole injection layer HIL, the first charge generation layer CGL1 can be disposed on the organic layer EL11, and the second stack structure EL2 can be disposed on the first charge generation layer CGL1. Here, the organic layer EL11 can include Figure 5 a hole transport layer HTL, a blue emission layer EML1, and an electron transport layer ETL of . The first stack structure EL1 can include the organic layer EL11 and the hole injection layer HIL.

[0223] The hole injection layer HIL can be patterned into a plurality of patterns in the first opening OP1, and the plurality of patterns can be disconnected without being connected.

[0224] Specifically, the first opening OP1 can be defined by a plurality of inorganic films, and adjacent inorganic films can have a high etching rate with respect to each other. For example, inorganic films having a first etching rate and inorganic films having a second etching rate can be alternately and sequentially disposed, and the first etching rate and the second etching rate can be different.

[0225] The plurality of inorganic films defining the first opening OP1 can form a third insulating layer 3c, a fourth insulating layer 3d, and a fifth insulating layer 3e.

[0226] Accordingly, during an etching process of forming the first opening OP1, the plurality of inorganic films defining the first opening OP1 can be etched to different degrees. At a sidewall of the first opening OP1, a plurality of undercut shapes can be formed between adjacent inorganic films in a thickness direction (third direction DR3).

[0227] The plurality of inorganic films defining the first opening OP1 can be formed such that protruding inorganic films whose side surfaces protrude toward an inner side of the first opening OP1 and recessed inorganic films whose side surfaces are recessed toward an outer side of the first opening OP1 are alternately and repeatedly disposed in the thickness direction (third direction DR3), but are not limited thereto. The side surfaces of the protruding inorganic films can protrude more toward the inner side of the first opening OP1 than the side surfaces of the recessed inorganic films.

[0228] Specifically, the second reflective layer RF2 can include 21st inorganic layers RF21 to 25th inorganic layers RF25. The 21st inorganic layers RF21, the 23rd inorganic layers RF23, and the 25th inorganic layers RF25 can have a first etching rate, and the 22nd inorganic layers RF22 and the 24th inorganic layers RF24 can have a second etching rate. Further, the second space forming layer SC2 can have the same second etching rate as the 22nd inorganic layers RF22 and the 24th inorganic layers RF24.

[0229] For example, the first etching rate can be greater than the second etching rate for a specific etchant formed due to etching the first opening OP1. During a process of forming the first opening OP1, the 21st inorganic layers RF21, the 23rd inorganic layers RF23, and the 25th inorganic layers RF25 can be etched more than the 22nd inorganic layers RF22, the 24th inorganic layers RF24, and the second space forming layer SC2.

[0230] Accordingly, the side surfaces of the second space forming layer SC2 can protrude more toward an inner side of the first opening OP1 than the side surfaces of the 21st inorganic layers RF21, and the second space forming layer SC2 and the 21st inorganic layers RF21 can have an undercut shape (or include an undercut region having an undercut shape) at a sidewall of the first opening OP1.

[0231] The side surface of the 22nd inorganic layer RF22 can protrude more to the inner side of the first opening OPl than the side surface of the 21st inorganic layer RF21 and the side surface of the 23rd inorganic layer RF23, and the 22nd inorganic layer RF22 and the 23rd inorganic layer RF23 can have an undercut shape at the sidewall of the first opening OPl.

[0232] The side surface of the 24th inorganic layer RF24 can protrude more to the inner side of the first opening OPl than the side surface of the 23rd inorganic layer RF23 and the side surface of the 25th inorganic layer RF25, and the 24th inorganic layer RF24 and the 25th inorganic layer RF25 can have an undercut shape at the sidewall of the first opening OPl.

[0233] Further, the 21st inorganic layer RF21, the 23rd inorganic layer RF23, and the 25th inorganic layer RF25 can have the same first refractive index n1. The 22nd inorganic layer RF22 and the 24th inorganic layer RF24 can have the same second refractive index n2. The first refractive index n1 can be greater than the second refractive index n2, but is not limited thereto, and the first refractive index n1 can be less than the second refractive index n2. Accordingly, the second reflective layer RF2 can function as a reflector.

[0234] The third reflective layer RF3 can include a 31st inorganic layer RF31 to a 35th inorganic layer RF35. The 31st inorganic layer RF31, the 33rd inorganic layer RF33, and the 35th inorganic layer RF35 can have a first etching rate, and the 32nd inorganic layer RF32 and the 34th inorganic layer RF34 can have a second etching rate. Further, the third space forming layer SC3 can have the same second etching rate as the 32nd inorganic layer RF32 and the 34th inorganic layer RF34.

[0235] For example, the first etching rate can be greater than the second etching rate for a specific etchant due to etching the first opening OPl. During the process of forming the first opening OPl, the 31st inorganic layer RF31, the 33rd inorganic layer RF33, and the 35th inorganic layer RF35 can be etched more than the 32nd inorganic layer RF32, the 34th inorganic layer RF34, and the third space forming layer SC3.

[0236] Accordingly, the side surface of the third space forming layer SC3 can protrude more to the inner side of the first opening OPl than the side surface of the 31st inorganic layer RF31, and the third space forming layer SC3 and the 31st inorganic layer RF31 can have an undercut shape (or include an undercut region having an undercut shape) at the sidewall of the first opening OPl.

[0237] The side surface of the 32nd inorganic layer RF32 can protrude more to the inner side of the first opening OP1 than the side surface of the 31st inorganic layer RF31 and the side surface of the 33rd inorganic layer RF33, and the 32nd inorganic layer RF32 and the 33rd inorganic layer RF33 can have an undercut shape at the sidewall of the first opening OP1.

[0238] The side surface of the 34th inorganic layer RF34 can protrude more to the inner side of the first opening OP1 than the side surface of the 33rd inorganic layer RF33 and the side surface of the 35th inorganic layer RF35, and the 34th inorganic layer RF34 and the 35th inorganic layer RF35 can have an undercut shape at the sidewall of the first opening OP1.

[0239] In addition, the 31st inorganic layer RF31, the 33rd inorganic layer RF33, and the 35th inorganic layer RF35 can have the same first refractive index n1. The 32nd inorganic layer RF32 and the 34th inorganic layer RF34 can have the same second refractive index n2. The first refractive index n1 can be greater than the second refractive index n2, but is not limited thereto, and the first refractive index n1 can be less than the second refractive index n2. Accordingly, the third reflective layer RF3 can function as a reflector.

[0240] The fifth insulating layer 3e can include a first inorganic layer 31e to a fourth inorganic layer 34e. The second inorganic layer 32e and the fourth inorganic layer 34e can have a first etching rate, and the first inorganic layer 31e and the third inorganic layer 33e can have a second etching rate.

[0241] For example, the first etching rate can be greater than the second etching rate for a specific etchant due to etching of the first opening OP1. The second inorganic layer 32e and the fourth inorganic layer 34e can be etched more than the first inorganic layer 31e and the third inorganic layer 33e during a process of forming the first opening OP1.

[0242] The side surface of the first inorganic layer 31e can protrude more to the inner side of the first opening OP1 than the side surface of the second inorganic layer 32e, and the first inorganic layer 31e and the second inorganic layer 32e can have an undercut shape at the sidewall of the first opening OP1.

[0243] The side surface of the third inorganic layer 33e can protrude more to the inner side of the first opening OP1 than the side surface of the second inorganic layer 32e and the side surface of the fourth inorganic layer 34e, and the third inorganic layer 33e and the fourth inorganic layer 34e can have an undercut shape at the sidewall of the first opening OP1.

[0244] The common light-emitting layer 5 can be commonly provided across all regions of the sub-pixels 21, 22, and 23, and the hole injection layer HIL can also be commonly provided across all regions of the sub-pixels 21, 22, and 23. The hole injection layer HIL can be provided on the first anode electrode 4a and the bank BK, and on the side wall of the first opening OPl along the side wall of the first opening OPl.

[0245] Since the side wall of the first opening OPl is formed of a plurality of inorganic films, and a plurality of undercut shapes are formed between adjacent inorganic films, the hole injection layer HIL can be patterned and provided to be broken in the undercut regions of the side wall of the first opening OPl due to step coverage.

[0246] The hole injection layer HIL at the side wall of the first opening OPl can be formed as a plurality of separate patterns. The hole injection layer HIL can be provided on the inorganic layers protruding toward the inner side of the first opening OPl among the plurality of inorganic layers forming the side wall of the first opening OPl, and the hole injection layer HIL provided on each of the protruding inorganic layers can be respectively patterned so as not to be electrically connected.

[0247] For example, the separate patterns of the hole injection layer HIL can be provided on the side surface and the upper surface of each of the first inorganic layer 31e, the third inorganic layer 33e, the 32nd inorganic layer RF32, the 34th inorganic layer RF34, the third spacing formation layer SC3, the 22nd inorganic layer RF22, the 24th inorganic layer RF24, and the second spacing formation layer SC2, and the respective patterns can be separated.

[0248] The hole injection layer HIL can be directly provided on the first anode electrode 4a, provided as a plurality of separate patterns at the side wall of the first opening OPl, and can be separated and not electrically connected from the hole injection layer HIL provided in the second sub-pixel 22 and the third sub-pixel 23 adjacent to the first sub-pixel 21.

[0249] Accordingly, the lateral leakage current between the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 adjacent to each other can be more smoothly suppressed or prevented. Furthermore, the light color mixing between the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 adjacent to each other can be suppressed or prevented, thereby achieving high color reproduction by emitting clearer colors and suppressing or preventing degradation of image quality. Accordingly, power consumption of the display device can be reduced.

[0250] Further, since the hole injection layer HIL is separated by the plurality of inorganic films included in the insulating layer 3, a separate configuration for separating the hole injection layer HIL is not required, and thus the aperture ratio of each light emitting region EA1, EA2, or EA3 can be increased, or a decrease in the aperture ratio can be minimized, and the process of manufacturing the display device 1 can be minimized.

[0251] Further, in the first opening OP1, a hollow space can be defined between the inorganic film having a recessed side surface and the organic layer EL11, but embodiments of the present disclosure are not limited thereto.

[0252] The second opening OP2 can be defined by the fourth insulating layer 3d and the fifth insulating layer 3e. Similarly to the first opening OP1, at the side wall of the second opening OP2, the third reflective layer RF3 and the third spacing formation layer SC3 of the fourth insulating layer 3d and the fifth insulating layer 3e can have a plurality of undercut shapes between adjacent inorganic films in the thickness direction (third direction DR3).

[0253] The hole injection layer HIL provided in the second opening OP2 can be directly provided on the second anode electrode 4b, be provided as a plurality of separated patterns at the side wall of the second opening OP2, and can be separated from and not electrically connected to the hole injection layer HIL provided in the first sub-pixel 21 and the third sub-pixel 23 adjacent to the second sub-pixel 22.

[0254] Thus, the lateral leakage current between the adjacent sub-pixels 21, 22, and 23 can be more smoothly suppressed or prevented, light color mixing can be prevented, high color reproduction can be achieved by emitting clearer colors, and degradation of image quality can be suppressed or prevented. Thus, power consumption of the display device 1 can be reduced.

[0255] The third opening OP3 can be defined by the fifth insulating layer 3e. Similarly to the first opening OP1, at the side wall of the third opening OP3, the fifth insulating layer 3e can have a plurality of undercut shapes between adjacent inorganic films in the thickness direction (third direction DR3).

[0256] The hole injection layer HIL provided in the third opening OP3 can be directly provided on the third anode electrode 4c, be provided as a plurality of separated patterns at the side wall of the third opening OP3, and can be separated from and not electrically connected to the hole injection layer HIL provided in the first sub-pixel 21 and the second sub-pixel 22 adjacent to the third sub-pixel 23.

[0257] Thus, the lateral leakage current between the adjacent sub-pixels 21, 22, and 23 can be more smoothly suppressed or prevented, light color mixing can be prevented, high color reproduction can be achieved by emitting clearer colors, and degradation of image quality can be suppressed or prevented. Thus, power consumption of the display device 1 can be reduced.

[0258] Hereinafter, a method of manufacturing the display device 1 according to one embodiment will be described. In describing the method of manufacturing the display device 1 according to one embodiment, the description of the portions already described in Figures 1 to 7 will be briefly given or omitted.

[0259] Figures 8 to 13 is a cross-sectional view of each process in the method of manufacturing the display device according to one embodiment.

[0260] First, referring to Figure 8 , a substrate 2 on which first to fifth insulating layers 3a, 3b, 3c, 3d, and 3e are provided is provided. Circuit elements including a plurality of thin film transistors 31, 32, and 33, various signal lines, capacitors, and the like can be provided in the first insulating layer 3a of each sub-pixel 21, 22, or 23.

[0261] The first to fifth insulating layers 3a, 3b, 3c, 3d, and 3e can be sequentially stacked on the substrate 2. The first to fifth insulating layers 3a, 3b, 3c, 3d, and 3e can be provided across the entire area of the substrate 2, but are not limited thereto.

[0262] Subsequently, referring to Figure 9 , a first opening OP1’ exposing the second insulating layer 3b, a second opening OP2’ exposing the third insulating layer 3c, and a third opening OP3’ exposing the fourth insulating layer 3d are formed.

[0263] The first opening OP1’ can be provided in the first sub-pixel 21, the second opening OP2’ can be provided in the second sub-pixel 22, and the third opening OP3’ can be provided in the third sub-pixel 23.

[0264] The first opening OP1’ can pass through the third insulating layer 3c, the fourth insulating layer 3d, and the fifth insulating layer 3e in the thickness direction (third direction DR3) to expose the second insulating layer 3b, and can be defined by the third insulating layer 3c, the fourth insulating layer 3d, and the fifth insulating layer 3e.

[0265] The second opening OP2’ can pass through the fourth insulating layer 3d and the fifth insulating layer 3e in the thickness direction (third direction DR3) to expose the third insulating layer 3c, and can be defined by the fourth insulating layer 3d and the fifth insulating layer 3e.

[0266] The third opening OP3’ can pass through the fifth insulating layer 3e in the thickness direction (third direction DR3) to expose the fourth insulating layer 3d, and can be defined by the fifth insulating layer 3e.

[0267] A patterned first photoresist (not shown) can be disposed on the fifth insulating layer 3e, and the insulating layer 3 of the region exposed through the first photoresist (not shown) can be etched. Thus, the first opening OP1', the second opening OP2', and the third opening OP3' can be formed.

[0268] However, embodiments of the present disclosure are not limited thereto, and a plurality of photoresists can be used to etch the insulating layers 3c, 3d, and 3e, respectively, in the process of forming the first opening OP1', the second opening OP2', and the third opening OP3'.

[0269] The side surfaces of the inorganic film forming the sidewalls of the first opening OP1', the second opening OP2', and the third opening OP3' can be aligned, but are not limited thereto.

[0270] Subsequently, with reference to Figure 10 , the first to third contact holes CNT1, CNT2, and CNT3 are formed, and the anode electrodes 4a, 4b, and 4c are patterned and disposed.

[0271] The first contact hole CNT1 to the third contact hole CNT3 can be formed in the non-emitting regions NEA1, NEA2, and NEA3, respectively. The first contact hole CNT1 can pass through a portion of the second insulating layer 3b and the first insulating layer 3a in the thickness direction (third direction DR3) to expose the first transistor 31. The second contact hole CNT2 can pass through a portion of the third insulating layer 3c, the second insulating layer 3b, and the first insulating layer 3a in the thickness direction (third direction DR3) to expose the second transistor 32. The third contact hole CNT3 can pass through a portion of the fourth insulating layer 3d, the third insulating layer 3c, the second insulating layer 3b, and the first insulating layer 3a in the thickness direction (third direction DR3) to expose the third transistor 33.

[0272] Subsequently, the anode electrodes 4a, 4b, and 4c are patterned and disposed in the first opening OP1', the second opening OP2', and the third opening OP3', respectively.

[0273] The anode electrode 4 before being patterned can be disposed on the second to fourth insulating layers 3b, 3c, 3d, and at least a portion of the anode electrode 4 can be disposed in the first opening OP1', the second opening OP2', and the third opening OP3'. A patterned second photoresist (not shown) can be disposed on the anode electrode 4, a portion of the anode electrode 4 exposed through the second photoresist (not shown) can be removed, and the anode electrode 4 can be patterned to form the anode electrodes 4a, 4b, and 4c. The second photoresist (not shown) can be removed by a ashing process.

[0274] Anode electrodes 4a, 4b, and 4c can be patterned individually, but are not limited to this.

[0275] Anode electrodes 4a, 4b, and 4c can be formed using the same process (or mask), and anode electrodes 4a, 4b, and 4c can comprise the same material. A first anode electrode 4a can be disposed in a first sub-pixel 21, a second anode electrode 4b can be disposed in a second sub-pixel 22, and a third anode electrode 4c can be disposed in a third sub-pixel 23.

[0276] The first anode electrode 4a can be disposed in the first opening OP1', the second anode electrode 4b can be disposed in the second opening OP2', and the third anode electrode 4c can be disposed in the third opening OP3'.

[0277] Anode electrodes 4a, 4b and 4c can fill the first to third contact holes CNT1, CNT2 and CNT3 respectively, and contact transistors 31, 32 and 33.

[0278] Subsequently, further reference Figure 11 ,exist Figure 10 Multiple undercut shapes are formed on the sidewalls of each of the first opening OP1', the second opening OP2', and the third opening OP3'.

[0279] Formed separately Figure 10 The inorganic films of the third to fifth insulating layers 3c, 3d, and 3e on the sidewalls of the first opening OP1', the second opening OP2', and the third opening OP3' have different etching rates. An etchant capable of selectively etching only portions of the inorganic films of each of the third to fifth insulating layers 3c, 3d, and 3e is used to selectively etch only portions of the inorganic films of each of the third to fifth insulating layers 3c, 3d, and 3e.

[0280] Therefore, a first opening OP1, a second opening OP2, and a third opening OP3 can be formed, and the sidewall of each of the first opening OP1, the second opening OP2, and the third opening OP3 can include multiple undercut shapes.

[0281] Subsequently, referring to Figure 12 The embankment BK is patterned and disposed on the anode electrodes 4a, 4b and 4c.

[0282] The bank BK before being patterned can be provided on the anode electrodes 4a, 4b, and 4c and the insulating layers 3b, 3c, and 3d on which the anode electrodes 4a, 4b, and 4c are provided, and at least a part of the bank BK can be provided in each of the openings OP1, OP2, and OP3. A patterned third photoresist (not shown) can be provided on the bank BK, and a part of the bank BK exposed through the third photoresist (not shown) can be removed to expose the anode electrodes 4a, 4b, and 4c. Thus, the light-emitting regions EA1, EA2, and EA3 and the non-light-emitting regions NEA1, NEA2, and NEA3 can be formed. The third photoresist (not shown) can be removed by an ashing process.

[0283] Subsequently, referring to Figure 13 , the trench TR is formed between the sub-pixels 21, 22, and 23, and the common light-emitting layer 5 is provided.

[0284] At least a part of the insulating layers 3a, 3b, 3c, 3d, and 3e can be etched in a region between the sub-pixels 21, 22, and 23 to form the trench TR.

[0285] After the trench TR is formed, the common light-emitting layer 5 can be provided on the anode electrodes 4a, 4b, and 4c and the bank BK. The common light-emitting layer 5 can be provided across the entire region of the substrate 2, but is not limited thereto.

[0286] Even when the common light-emitting layer 5 is provided across the entire region, the first stack structure EL1 (see Figure 5 ) and the first charge generation layer CGL1 (see Figure 5 ) can be separated by the trench TR in each sub-pixel 21, 22, or 23, and the hole injection layer HIL can be separated by each opening OP1, OP2, or OP3 in each sub-pixel 21, 22, or 23. Thus, the lateral current leakage between the adjacent sub-pixels 21, 22, and 23 can be suppressed or prevented.

[0287] Further referring to Figure 2 , the cathode electrode 6, the cover layer 7, the encapsulation layer 8, and the color filter layer 9 can also be provided in this order on the common light-emitting layer 5.

[0288] Hereinafter, other embodiments of the present disclosure will be described. For the contents substantially the same as those described with reference to Figures 1 to 13 , the same reference numerals are given, and overlapping contents can be omitted or briefly described.

[0289] Figure 14 is a cross-sectional view of a display device according to another embodiment.

[0290] Referring to Figure 14According to the present embodiment, the display device 1_1 can further include connection electrodes CE (CE1, CE2, and CE3) that electrically connect the anode electrodes 4a, 4b, and 4c to the transistors 31, 32, and 33.

[0291] Specifically, the first connection electrode CE1 can be provided in the first sub-pixel 21 and can be in contact with the first transistor 31 by filling the first contact hole CNT1. The first anode electrode 4a can cover and be in contact with the first connection electrode CE1. The first anode electrode 4a and the first transistor 31 can be electrically connected through the first connection electrode CE1.

[0292] The second connection electrode CE2 can be provided in the second sub-pixel 22 and can be in contact with the second transistor 32 by filling the second contact hole CNT2. The second anode electrode 4b can cover and be in contact with the second connection electrode CE2. The second anode electrode 4b and the second transistor 32 can be electrically connected through the second connection electrode CE2.

[0293] The third connection electrode CE3 can be provided in the third sub-pixel 23 and can be in contact with the third transistor 33 by filling the third contact hole CNT3. The third anode electrode 4c can cover and be in contact with the third connection electrode CE3. The third anode electrode 4c and the third transistor 33 can be electrically connected through the third connection electrode CE3.

[0294] Further referring to Figure 8 and Figure 9 The first insulating layer 3a and the second insulating layer 3b can be provided on the substrate 2 in this order, and then the second insulating layer 3b and the first insulating layer 3a can be etched to form the first contact hole CNT1, and a deposited first conductive layer (not shown) can be patterned to form the first connection electrode CE1.

[0295] Thereafter, the third insulating layer 3c can be provided to cover the first connection electrode CE1, the first insulating layer 3a, the second insulating layer 3b, and the third insulating layer 3c can be etched to form the second contact hole CNT2, and a deposited second conductive layer (not shown) can be patterned to form the second connection electrode CE2.

[0296] Thereafter, the fourth insulating layer 3d can be provided to cover the second connection electrode CE2, the first insulating layer 3a, the second insulating layer 3b, the third insulating layer 3c, and the fourth insulating layer 3d can be etched to form the third contact hole CNT3, and a deposited third conductive layer (not shown) can be patterned to form the third connection electrode CE3.

[0297] Thereafter, the fifth insulating layer 3e can be provided to cover the third connection electrode CE3, and as Figure 9As illustrated, the first to third openings OP1', OP2', and OP3' can be formed to expose the connection electrodes CE1, CE2, and CE3, respectively.

[0298] In this case, since the anode electrode 4 and each of the transistors 31, 32, or 33 are connected by the connection electrodes CE, the electrical connection between the anode electrode 4 and each of the transistors 31, 32, or 33 can be smoother, and the manufacturing process can proceed more smoothly.

[0299] Even in this case, since the second to fourth insulating layers 3b, 3c, and 3d include the reflection layers RF1, RF2, and RF3 and the pitch forming layers SC1, SC2, and SC3, respectively, process errors and microcavity deviations can be minimized, thereby improving the reliability of the display device 1. Further, since the hole injection layer HIL can be separately patterned in each of the openings OP1, OP2, or OP3, the lateral leakage current between the adjacent subpixels 21, 22, and 23 can be suppressed or prevented.

[0300] Figure 15 is a cross-sectional view of a display device according to still another embodiment.

[0301] Referring to Figure 15 In the display device 1_2 according to the present embodiment, in at least one of the subpixels 21, 22, and 23, the connection of the anode electrodes 4a, 4b, and 4c to the connection electrodes CE (CE1, CE2, CE3, CE4, CE5, and CE6) of the transistors 31, 32, and 33 can be provided as a plurality of connection electrodes.

[0302] In the first subpixel 21, the first connection electrode CE1 can fill the first contact hole CNT1 passing through a portion of the second insulating layer 3b and the first insulating layer 3a, and contact the first transistor 31. The first anode electrode 4a can cover and contact the first connection electrode CE1.

[0303] The first anode electrode 4a and the first transistor 31 can be electrically connected through the first connection electrode CE1.

[0304] In the second subpixel 22, the second connection electrode CE2 can fill the second contact hole CNT2 passing through a portion of the second insulating layer 3b and the first insulating layer 3a, and contact the second transistor 32. The fourth connection electrode CE4 can fill the fourth contact hole CNT4 passing through the third insulating layer 3c, and contact the second connection electrode CE2. The second anode electrode 4b can cover and contact the fourth connection electrode CE4.

[0305] The second anode electrode 4b and the second transistor 32 can be electrically connected through the second connection electrode CE2 and the fourth connection electrode CE4.

[0306] In the third sub-pixel 23, the third connection electrode CE3 can fill the third contact hole CNT3 passing through a portion of the second insulating layer 3b and the first insulating layer 3a, and contact the third transistor 33. The fifth connection electrode CE5 can fill the fifth contact hole CNT5 passing through the third insulating layer 3c, and contact the third connection electrode CE3. The sixth connection electrode CE6 can fill the sixth contact hole CNT6 passing through the fourth insulating layer 3d, and contact the fifth connection electrode CE5. The third anode electrode 4c can cover and contact the sixth connection electrode CE6.

[0307] The third anode electrode 4c and the third transistor 33 can be electrically connected through the third connection electrode CE3, the fifth connection electrode CE5, and the sixth connection electrode CE6.

[0308] Further referring to Figure 8 and Figure 9 The first insulating layer 3a and the second insulating layer 3b can be sequentially disposed on the substrate 2, then the second insulating layer 3b and the first insulating layer 3a can be etched to form the first contact hole CNT1, the second contact hole CNT2, and the third contact hole CNT3, and the deposited first conductive layer (not shown) can be patterned to form the first connection electrode CE1, the second connection electrode CE2, and the third connection electrode CE3.

[0309] Thereafter, the third insulating layer 3c can be disposed to cover the first connection electrode CE1, the second connection electrode CE2, and the third connection electrode CE3, the third insulating layer 3c can be etched to form the fourth contact hole CNT4 and the fifth contact hole CNT5, and the deposited second conductive layer (not shown) can be patterned to form the fourth connection electrode CE4 and the fifth connection electrode CE5.

[0310] Thereafter, the fourth insulating layer 3d can be disposed to cover the fourth connection electrode CE4 and the fifth connection electrode CE5, the fourth insulating layer 3d can be etched to form the sixth contact hole CNT6, and the deposited third conductive layer (not shown) can be patterned to form the sixth connection electrode CE6.

[0311] Thereafter, the fifth insulating layer 3e can be disposed to cover the sixth connection electrode CE6, and as Figure 9 indicated, the first to third openings OP1’, OP2’, and OP3’ can be formed to respectively expose the connection electrodes CE1, CE4, and CE6.

[0312] In this case, since the anode electrode 4 and each of the transistors 31, 32, or 33 are connected through the connection electrodes CE, the electrical connection between the anode electrode 4 and each of the transistors 31, 32, or 33 can be smoother, and the manufacturing process can proceed more smoothly.

[0313] Even in this case, since the second to fourth insulating layers 3b, 3c, and 3d each include the reflective layers RF1, RF2, and RF3 and the pitch forming layers SC1, SC2, and SC3, process errors and microcavity deviations can be minimized, thereby improving the reliability of the display device 1. Further, since the hole injection layer HIL can be separately patterned in each of the openings OP1, OP2, or OP3, lateral leakage current between adjacent subpixels 21, 22, and 23 can be suppressed or prevented.

[0314] Figure 16 is a cross-sectional view of a display device according to still another embodiment. Figure 17 is Figure 16 is an enlarged view of a region Q3 in

[0315] Referring to Figure 16 and Figure 17 , the display device 1_3 according to the present embodiment includes the openings OP1, OP2, and OP3, and the side surfaces of the second pitch forming layer SC2 and the third pitch forming layer SC3 forming the side walls of the openings OP1, OP2, and OP3 can be recessed more than the side surfaces of the inorganic films disposed adjacent thereto.

[0316] Specifically, in the first opening OP1, the side surfaces of the second pitch forming layer SC2 can be recessed more than the side surfaces of the 35th inorganic layer RF35 and the 21st inorganic layer RF21 disposed above and below the second pitch forming layer SC2, respectively. That is, in the first opening OP1, the side surfaces of the 21st inorganic layer RF21 and the 35th inorganic layer RF35 can protrude more to the inside of the first opening OP1 than the side surfaces of the second pitch forming layer SC2.

[0317] In the first opening OP1, the side surfaces of the third pitch forming layer SC3 can be recessed more than the side surfaces of the 34th inorganic layer 34e and the 31st inorganic layer RF31 disposed above and below the third pitch forming layer SC3, respectively. That is, in the first opening OP1, the side surfaces of the 31st inorganic layer RF31 and the 34th inorganic layer 34e can protrude more to the inside of the first opening OP1 than the side surfaces of the third pitch forming layer SC3.

[0318] Therefore, in the first opening OP1, the first charge generation layer CGL1 disposed around the side surfaces of the second pitch forming layer SC2 and the side surfaces of the third pitch forming layer SC3 can be separately patterned.

[0319] The thickness of the second space forming layer SC2 and the thickness of the third space forming layer SC3 can be greater than the thickness of each of the inorganic films of the insulating layer 3. Thus, the space between the side surface of the 21st inorganic layer RF21 protruding from the side surface of the second space forming layer SC2 and the side surface of the 35th inorganic layer RF35 can be increased.

[0320] In the peripheral region of the side surface of the second space forming layer SC2 and the side surface of the third space forming layer SC3, the hole injection layer HIL can be separated, and the organic layer EL11 can also be separated. Thus, the first charge generation layer CGL1 provided on the organic layer EL11 can be separated.

[0321] The first charge generation layer CGL1 can be provided on the anode electrode 4a and the second reflective layer RF2, on the third reflective layer RF3, and on the fifth insulating layer 3e.

[0322] The first charge generation layer CGL1 provided on the anode electrode 4a and the second reflective layer RF2, the first charge generation layer CGL1 provided on the third reflective layer RF3, and the first charge generation layer CGL1 provided on the fifth insulating layer 3e can be separately patterned and can not be electrically connected.

[0323] In the second opening OP2, the side surface of the third space forming layer SC3 can be more recessed than the side surface of the fourth inorganic layer 34e and the side surface of the 31st inorganic layer RF31 provided above and below the third space forming layer SC3, respectively. That is, in the second opening OP2, the side surface of the 31st inorganic layer RF31 and the side surface of the fourth inorganic layer 34e can protrude more to the inside of the second opening OP2 than the side surface of the third space forming layer SC3.

[0324] Although not shown, as described in the first opening OP1, in the peripheral region of the side surface of the third space forming layer SC3 in the second opening OP2, the hole injection layer HIL can be separated, and the organic layer EL11 can also be separated. Thus, the first charge generation layer CGL1 provided on the organic layer EL11 can be separated.

[0325] The organic layer EL11 can not be provided on at least a portion of the side surface of the second space forming layer SC2. An empty space ET can be defined between the side surface of the second space forming layer SC2 on which the organic layer EL11 is not provided and the second stacked structure EL2.

[0326] The organic layer EL11 can not be provided on at least a portion of the side surface of the third space forming layer SC3. An empty space ET can be defined between the side surface of the third space forming layer SC3 on which the organic layer EL11 is not provided and the second stacked structure EL2.

[0327] Further referring to Figure 10 and Figure 11 In the process of forming the openings OP1, OP2 and OP3 with the openings OP1’, OP2’ and OP3’, an etchant capable of selectively etching only some portions in the inorganic layer of each of the third to fifth insulating layers 3c, 3d and 3e is used to selectively etch only some portions in the inorganic layer of each of the third to fifth insulating layers 3c, 3d and 3e. During this process, the second and third pitch forming layers SC2 and SC3 can be etched.

[0328] However, the method of forming each of the openings OP1, OP2 or OP3 according to the embodiments of Figure 16 is not limited thereto. For example, by replacing the materials of some of the inorganic layers of each of the third to fifth insulating layers 3c, 3d and 3e with other materials, or by changing the stacking order of the inorganic layers, each of the openings OP1, OP2 or OP3 according to the embodiments of Figure 16 can be formed.

[0329] In the second opening OP2, the first charge generation layer CGL1 can be disposed on the anode electrode 4b and the third reflective layer RF3, and on the fifth insulating layer 3e.

[0330] In the second opening OP2, each of the first charge generation layer CGL1 disposed on the anode electrode 4b and the third reflective layer RF3 and the first charge generation layer CGL1 disposed on the fifth insulating layer 3e can be separately patterned and can not be electrically connected.

[0331] Therefore, even when the common light emitting layer 5 is formed as a common layer across the first to third sub-pixels 21, 22 and 23, the lateral leakage current between the adjacent sub-pixels 21, 22 and 23, which can be generated by the first charge generation layer CGL1, can be suppressed or prevented by the sidewalls of the first and second openings OP1 and OP2.

[0332] Further, since the first charge generation layer CGL1 is split in the first and second openings OP1 and OP2, the trench TR can not be needed. Therefore, the overall process can be simplified.

[0333] Even in this case, since the second to fourth insulating layers 3b, 3c and 3d respectively include the reflective layers RF1, RF2 and RF3 and the pitch forming layers SC1, SC2 and SC3, the process error and the microcavity deviation can be reduced or minimized, thereby improving the reliability of the display device 1. Further, since the hole injection layer HIL can be separately patterned in each of the openings OP1, OP2 or OP3, the lateral leakage current between the adjacent sub-pixels 21, 22 and 23 can be suppressed or prevented.

[0334] The display device according to various embodiments of the disclosure can be described as follows.

[0335] According to embodiments of the disclosure, there is provided a display device including a substrate having a first sub-pixel, a second sub-pixel, and a third sub-pixel, each of the first sub-pixel, the second sub-pixel, and the third sub-pixel including a light emitting area and a non-light emitting area; a second insulating layer disposed on the substrate and including a first reflective layer and a first spacing forming layer; a first anode electrode disposed on the second insulating layer; a third insulating layer disposed on the second insulating layer; a fourth insulating layer disposed on the third insulating layer; a fifth insulating layer disposed on the fourth insulating layer; and a first opening in the first sub-pixel, the first opening passing through the third insulating layer, the fourth insulating layer, and the fifth insulating layer in a thickness direction to expose the first anode electrode and the second insulating layer, wherein the first reflective layer includes a plurality of inorganic films having different refractive indexes.

[0336] According to various embodiments of the disclosure, the first spacing forming layer can be disposed between the first anode electrode and the first reflective layer, and the first reflective layer can be a distributed Bragg reflector (DBR).

[0337] According to various embodiments of the disclosure, each of the third insulating layer, the fourth insulating layer, and the fifth insulating layer can include a plurality of inorganic layers, the plurality of inorganic layers forming a side surface of the first opening, and the plurality of inorganic layers can include a plurality of undercut regions having an undercut shape between adjacent inorganic layers on the side surface of the first opening.

[0338] According to various embodiments of the disclosure, the plurality of inorganic layers of the third insulating layer, the fourth insulating layer, and the fifth insulating layer can be sequentially stacked in a thickness direction, and the plurality of inorganic layers can be formed such that a protruding inorganic layer in which a side surface protrudes inward of the first opening and a recessed inorganic layer in which a side surface is recessed outward of the first opening are alternately disposed.

[0339] According to various embodiments of the disclosure, the plurality of undercut regions are disposed in a thickness direction.

[0340] According to various embodiments of the present disclosure, the display device can further include a second opening in the second sub-pixel extending in a thickness direction into the fourth insulating layer and the fifth insulating layer to expose the third insulating layer, and a third opening in the third sub-pixel extending in the thickness direction into the fifth insulating layer to expose the fourth insulating layer, wherein the plurality of inorganic layers of each of the fourth insulating layer and the fifth insulating layer can form side surfaces of the second opening, and the plurality of inorganic layers of each of the fourth insulating layer and the fifth insulating layer can have a plurality of undercut shapes between adjacent inorganic layers on the side surfaces of the second opening, and the plurality of inorganic layers of the fifth insulating layer can form side surfaces of the third opening, and the plurality of inorganic layers of the fifth insulating layer can have a plurality of undercut shapes between adjacent inorganic layers on the side surfaces of the third opening.

[0341] According to various embodiments of the present disclosure, the display device can further include a hole injection layer disposed on the first anode electrode, wherein the hole injection layer can include a plurality of separate patterns in the plurality of undercut regions in the first opening.

[0342] According to various embodiments of the present disclosure, an entire area of the first anode electrode can be disposed in the first opening.

[0343] According to various embodiments of the present disclosure, the display device can further include a bank disposed on the first anode electrode and defining the light emitting area and the non-light emitting area, wherein an entire area of the bank can be disposed in the first opening.

[0344] According to various embodiments of the present disclosure, the display device can further include a second anode electrode disposed on the third insulating layer, and a second opening in the second sub-pixel extending in a thickness direction into the fourth insulating layer and the fifth insulating layer to expose the second anode electrode and the third insulating layer, wherein the third insulating layer can include a second reflection layer and a second spacing formation layer, and the second reflection layer can include a plurality of inorganic films having different refractive indexes.

[0345] According to various embodiments of the present disclosure, the second spacing formation layer can be disposed between the second anode electrode and the second reflection layer.

[0346] According to various embodiments of the present disclosure, the display device can further include a third anode electrode disposed on the fourth insulating layer, and a third opening in the third sub-pixel extending in a thickness direction into the fifth insulating layer to expose the third anode electrode and the fourth insulating layer, wherein the fourth insulating layer can include a third reflection layer and a third spacing formation layer, and the third reflection layer can include a plurality of inorganic films having different refractive indexes.

[0347] According to various embodiments of the present disclosure, a third spacing formation layer can be disposed between the third anode electrode and the third reflective layer.

[0348] According to various embodiments of the present disclosure, a thickness of the first reflective layer can be greater than a thickness of the second reflective layer, and the thickness of the second reflective layer can be greater than a thickness of the third reflective layer.

[0349] According to various embodiments of the present disclosure, the second reflective layer and the third reflective layer can be a distributed Bragg reflector (DBR).

[0350] According to various embodiments of the present disclosure, the display device can further include a first insulating layer disposed between the substrate and the second insulating layer, and a transistor disposed in the first insulating layer and electrically connected with the first anode electrode.

[0351] According to an embodiment of the present disclosure, a display device is provided, the display device including: a substrate; a second insulating layer disposed on the substrate; an anode electrode disposed on the second insulating layer; a third insulating layer disposed on the second insulating layer; and an opening passing through the third insulating layer in a thickness direction to expose the anode electrode and the second insulating layer, wherein the third insulating layer includes a plurality of inorganic layers forming a side surface of the opening, and the plurality of inorganic layers includes a plurality of undercut regions having an undercut shape between adjacent inorganic layers on the side surface of the opening.

[0352] According to various embodiments of the present disclosure, the plurality of inorganic layers of the third insulating layer can be sequentially stacked in the thickness direction, and the plurality of inorganic layers can be formed such that a protruding inorganic layer in which the side surface protrudes inward of the opening and a recessed inorganic layer in which the side surface is recessed outward of the opening are alternately disposed.

[0353] According to various embodiments of the present disclosure, the display device can further include a bank disposed on the anode electrode and defining a light emitting area, wherein the anode electrode can be in direct contact with an upper surface of the second insulating layer, the opening can expose the anode electrode and the bank, and an entire area of each of the anode electrode and the bank can be disposed in the opening.

[0354] According to various embodiments of the present disclosure, the second insulating layer can include a reflective layer and a spacing formation layer, the spacing formation layer can be disposed between the anode electrode and the reflective layer, and the reflective layer can be a distributed Bragg reflector including a plurality of inorganic films having different refractive indexes.

[0355] Although the embodiments have been described above with reference to the accompanying drawings, it will be understood by those skilled in the art that the technical configuration described above can be implemented in other specific forms without changing the technical spirit or essential characteristics thereof. Therefore, it should be understood that the above-described embodiments are illustrative in all aspects and are not restrictive. Furthermore, the scope of the embodiments is determined not by the detailed description but by the appended claims. Furthermore, the meaning and scope of the claims and all changes or modified forms derived from the equivalent concepts thereof should be interpreted to be included in the scope of the embodiments.

[0356] Explanation of Reference Signs

[0357] 1: Display device

[0358] 2: Substrate

[0359] 3: Insulating layer

[0360] RF: Reflective layer

[0361] SC: Spacing forming layer

[0362] 4: Anode electrode

[0363] 5: Common light emitting layer

[0364] 6: Cathode electrode

[0365] 7: Cover layer

[0366] 8: Encapsulation layer

[0367] 9: Color filter layer

[0368] TR: Trench

[0369] OP: Opening

Claims

1. A display device comprising: a substrate having a first sub-pixel, a second sub-pixel, and a third sub-pixel, each of the first sub-pixel, the second sub-pixel, and the third sub-pixel including a light emitting area and a non-light emitting area; a second insulating layer disposed on the substrate and including a first reflective layer and a first gap forming layer; a first anode electrode disposed on the second insulating layer; a third insulating layer formed on the second insulating layer; a fourth insulating layer formed on the third insulating layer; a fifth insulating layer disposed on the fourth insulating layer; and a first opening in the first sub-pixel, the first opening extending in a thickness direction into the third insulating layer, the fourth insulating layer, and the fifth insulating layer, and exposing the first anode electrode and the second insulating layer, wherein the first reflective layer includes a plurality of inorganic films having different refractive indexes. the first gap forming layer is disposed between the first anode electrode and the first reflective layer, and 2. The display device according to claim 1, wherein wherein the first reflective layer includes a distributed Bragg reflector (DBR). each of the third insulating layer, the fourth insulating layer, and the fifth insulating layer includes a plurality of inorganic layers forming a side surface of the first opening, and 3. The display device according to claim 1, wherein wherein the plurality of inorganic layers includes a plurality of undercut regions having an undercut shape between adjacent inorganic layers on the side surface of the first opening. the plurality of inorganic layers of the third insulating layer, the fourth insulating layer, and the fifth insulating layer are sequentially stacked in a thickness direction, and 4. The display device according to claim 3, wherein wherein the plurality of inorganic layers are disposed such that a protruding inorganic layer whose side surface protrudes inward of the first opening and a recessed inorganic layer whose side surface is recessed outward of the first opening are alternately disposed. the plurality of undercut regions are disposed in a thickness direction.

5. The display device of claim 4, wherein, a second opening in the second sub-pixel, the second opening extending in a thickness direction into the fourth insulating layer and the fifth insulating layer to expose the third insulating layer; and a third opening in the third sub-pixel, the third opening extending in a thickness direction into the fifth insulating layer to expose the fourth insulating layer, 6. The display device of claim 3, further comprising: wherein a plurality of inorganic layers of each of the fourth insulating layer and the fifth insulating layer form a side surface of the second opening, wherein the plurality of inorganic layers of each of the fourth insulating layer and the fifth insulating layer form a plurality of undercut shapes between adjacent inorganic layers on the side surface of the second opening, wherein a plurality of inorganic layers of the fifth insulating layer form a side surface of the third opening, and wherein the plurality of inorganic layers of the fifth insulating layer form a plurality of undercut shapes between adjacent inorganic layers on the side surface of the third opening. 7.The display device of claim 3, further comprising a hole injection layer disposed on the first anode electrode, the hole injection layer including a plurality of separate patterns in the plurality of undercut regions in the first opening. an entire area of the first anode electrode is disposed in the first opening. wherein, ​ 8. The display device according to claim 1, wherein ​ 9. The display device according to claim 8, further comprising a bank provided over the first anode electrode and defining a light-emitting region and a non-light-emitting region, wherein, an entire region of the bank is provided in the first opening in the first sub-pixel.

10. The display device of claim 1, further comprising: a second anode electrode provided over the third insulating layer; and a second opening in the second sub-pixel, the second opening extending in a thickness direction into the fourth insulating layer and the fifth insulating layer to expose the second anode electrode and the third insulating layer, wherein the third insulating layer includes a second reflective layer and a second gap-forming layer, and wherein the second reflective layer includes a plurality of inorganic films having different refractive indexes.

11. The display device of claim 10, wherein, the second gap-forming layer is provided between the second anode electrode and the second reflective layer.

12. The display device of claim 10, further comprising: a third anode electrode provided over the fourth insulating layer; and a third opening in the third sub-pixel, the third opening extending in a thickness direction into the fifth insulating layer to expose the third anode electrode and the fourth insulating layer, wherein the fourth insulating layer includes a third reflective layer and a third gap-forming layer, and wherein the third reflective layer includes a plurality of inorganic films having different refractive indexes.

13. The display device of claim 12, wherein, the third gap-forming layer is provided between the third anode electrode and the third reflective layer.

14. The display device of claim 12, wherein, a thickness of the first reflective layer is greater than a thickness of the second reflective layer, and the thickness of the second reflective layer is greater than a thickness of the third reflective layer.

15. The display device of claim 12, wherein, the second reflective layer and the third reflective layer are distributed Bragg reflectors (DBRs).

16. The display device according to claim 1, further comprising: a first insulating layer provided between the substrate and the second insulating layer; and a transistor provided in the first insulating layer and electrically connected to the first anode electrode.

17. A display device comprising: a substrate; a second insulating layer provided over the substrate; an anode electrode provided over the second insulating layer; a third insulating layer provided over the second insulating layer; and an opening extending in a thickness direction into the third insulating layer to expose the anode electrode and the second insulating layer, wherein the third insulating layer includes a plurality of inorganic layers forming side surfaces of the opening, and the plurality of inorganic layers include a plurality of undercut regions having an undercut shape between adjacent inorganic layers on the side surfaces of the opening.

18. The display device of claim 17, wherein, the plurality of inorganic layers of the third insulating layer are sequentially stacked in a thickness direction, and wherein the plurality of inorganic layers are provided so that a protruding inorganic layer whose side surface protrudes inward of the opening and a recessed inorganic layer whose side surface is recessed outward of the opening are alternately provided.

19. The display device according to claim 17, further comprising a bank provided over the anode electrode to define a light-emitting region, wherein, the anode electrode is in direct contact with an upper surface of the second insulating layer, wherein the opening exposes the anode electrode and the bank, and wherein an entire region of each of the anode electrode and the bank is provided in the opening.

20. The display device of claim 17, wherein, the second insulating layer includes a reflective layer and a gap-forming layer, The spacing forming layer is arranged between the anode electrode and the reflective layer, and The reflective layer includes a plurality of inorganic films having different refractive indexes.

21. The display device of claim 20, wherein, The reflective layer is a distributed Bragg reflector (DBR).

22. The display device of claim 20, further comprising a cathode electrode disposed on a common light emitting layer disposed on the third insulating layer, the spacing between the reflective layer and the cathode electrode being an integer multiple of a half wavelength of light emitted by a sub-pixel on the substrate.

23. The display device of claim 17, further comprising: a first insulating layer disposed between the substrate and the second insulating layer; and a transistor disposed in the first insulating layer and electrically connected to the anode electrode.

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