Resetting quantum states of qubits via on-chip lossy resonators within quantum computing system

Abstract

A quantum computing system includes a cryogenic cavity and an integrated circuit located in the cavity. The integrated circuit includes a substrate, a qubit formed on the substrate, and a dissipative element formed on the substrate and coupled to the qubit. When the qubit is tuned to a first flux value, the integrated circuit is enabled to perform a quantum computing operation on a set of quantum states of the qubit. The quantum state comprises a ground state and an excited state. When the qubit is tuned to a second flux value, the qubit is enabled to transfer energy associated with the excited state from the qubit to the dissipative element. After energy transfer, the qubit jumps to the ground state. The dissipative element is enabled to dissipate the transferred energy to a portion of the substrate.

Description

[0001] CLAIM OF PRIORITY

[0002] This application is based on and claims priority to U.S. Application 18 / 456,208, filed August 25, 2023, which is incorporated by reference herein. TECHNICAL FIELD

[0003] The present disclosure relates generally to quantum computing and information processing systems, and more specifically to resetting quantum states of on-chip lossy resonator reset polymorphic devices (e.g., qubits) via a quantum computing system. BACKGROUND

[0004] Quantum computing is a method of computing that leverages quantum effects, such as superposition of basis states and entanglement, to perform certain computations more efficiently than classical digital computers. Unlike digital computers, which store and process information in the form of bits (e.g., “1” or “0”), quantum computing systems can use qubits to process information. A qubit can refer to a quantum device that enables superposition of multiple states (e.g., being in both a “0” state and a “1” state), and / or to the superposition of data itself in multiple states. According to conventional terminology, the superposition of a “0” state and a “1” state in a quantum system can be represented as, for example, + b The “0” state and the “1” state of a digital computer are analogous to the and basis states of a qubit, respectively. SUMMARY

[0005] Aspects and advantages of embodiments of the present disclosure will be set forth in part in the following description, or can be apparent from the description, or can be learned through practice of the embodiments.

[0006] One example aspect of the present disclosure is directed to a quantum computing system. The quantum computing system includes a cryogenic cavity and an integrated circuit integrated on a substrate. The substrate is located within the cryogenic cavity. The integrated circuit includes a first tunable qubit and a first dissipative element coupled to the first tunable qubit. The integrated circuit is enabled to perform one or more quantum computing operations on a set of quantum states of the first tunable qubit when the first tunable qubit is tuned to a first flux value. The set of quantum states of the first tunable qubit includes at least a ground state and one or more excited states. The first tunable qubit is enabled to transfer energy associated with the one or more excited states from the first tunable qubit to the first dissipative element such that the first tunable qubit transitions to the ground state when the first tunable qubit is tuned to a second flux value. The first dissipative element is enabled to dissipate the energy associated with the one or more excited states to a portion of the substrate.

[0007] Other aspects of the disclosure relate to various systems, methods, apparatuses, non-transitory computer-readable media, computer-readable instructions, and computing devices.

[0008] These and other features, aspects, and advantages of various embodiments of the present disclosure will be better understood when considered with reference to the following description and accompanying drawings. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate example embodiments of the present disclosure and, together with the description, explain related principles. BRIEF DESCRIPTION OF DRAWINGS

[0009] With reference to the accompanying drawings, a detailed discussion of embodiments oriented to one of ordinary skill in the art is set forth in the present specification, in which:

[0010] Figure 1 An example quantum computing system according to example embodiments of the present disclosure is depicted;

[0011] Figure 2 A set of qubit frequency bands according to various embodiments is depicted;

[0012] Figure 3 An example quantum computing system according to various embodiments is depicted;

[0013] Figure 4 Another example quantum computing system according to various embodiments is depicted; and

[0014] FIGS. 5A-5B provide circuit-level diagrams of integrated circuits according to various embodiments. DETAILED DESCRIPTION

[0015] Example aspects of the present disclosure relate to methods, architectures, and hardware configurations that enable resetting quantum states via on-chip lossy resonators within a quantum computing system. Quantum error correction (QEC) algorithms that utilize stabilizer measurements (e.g., surface codes) generally involve an array of qubits that encode quantum information (“data qubits”) interleaved with qubits that periodically and repeatedly perform checks on the encoded information (“measurement qubits”). These checks can be performed utilizing multi-qubit gates (e.g., fSim gates) between data qubits and measurement qubits, and ultimately measuring the measurement qubits. At the end of the measurement, the state of the measurement qubits is essentially random and must be reinitialized before the next round of checks can be performed.

[0016] To reinitialize the measurement qubits, a qubit reset operation removes the excitation associated with an excited state (e.g., ) from the measurement qubits and restores the qubits to their ground state (e.g., ). In some embodiments, the reset operation involves exchanging energy associated with the qubit excitation (e.g., the energy difference between the excited state and the qubit ground state) from the qubit to the resonator. When the energy associated with the excited state is transferred to the resonator, the qubit transitions to its ground state. In the resonator, the energy associated with the qubit excitation decays due to the resonator being coupled to the external environment.

[0017] In contrast to these embodiments, previous methods and architectures for resetting qubits require at least about 160 ns to reset a measurement qubit. To implement a scalable quantum computing system, given the error rates for current qubit implementations, QEC algorithms will require a measurement qubit reset period of about 50 ns or less. These embodiments implement a reset period of about 50 ns (or less) and thus provide for a scalable quantum computing system. Moreover, these previous qubit reset methods (and architectures) are susceptible to crosstalk between the resonators due to the shared coupling of the resonators to the external environment. In previous architectures, the energy absorption element (e.g., a resistor) is located “off-chip.” That is, in previous architectures, the energy absorption element is not located on the integrated circuit that includes the qubit. Thus, the qubit must be coupled to the energy absorption element via a coupling channel that is at some distance. Moreover, in these previous architectures, multiple qubits share a common channel and energy absorption element, resulting in crosstalk.

[0018] These embodiments provide for a dedicated dissipative resonator (or similar resonator) structure for each qubit by including the dissipative resonator (or similar resonator) structure on-chip, enabling a coupling between the qubit and the dissipative resonator (or similar resonator) structure that is significantly smaller in distance than previous architectures, implementing a reset operation of about 50 ns (or less), and significantly reducing crosstalk. Throughout, these dissipative resonator (or similar resonator) structures can be referred to as “lossy resonators” because they enable the transfer of energy (e.g., energy stored by a qubit) to the resonator structure and are then further enabled to dissipate the transferred energy. A lossy resonator can include a “dissipative element” (or dissipative structure), such as but not limited to a resistive element and / or a “lossy” dielectric element. Thus, in some embodiments, each qubit has a dedicated dissipative resonator structure (and coupling channel) such that multiple qubits do not share a common resonator (or common coupling channel), which further reduces crosstalk.

[0019] More specifically, to reset a qubit, a dissipative element (or structure) is needed to absorb the qubit energy. Previous architectures employed an off-chip resistor as the dissipative element. The resistor is mounted in a cryogenic cavity that houses the superconducting devices (e.g., superconducting chips and / or substrates) that implement the qubits. In some of these previous architectures, the off-chip resistor is about 10 inches (or further) away from the chip that implements the qubits (and quantum logic gates). In these previous architectures, multiple qubits can share access to this dissipative resistor due to space and wire routing constraints that limit the number of wires that can leave the chip per qubit. Crosstalk occurs during reset due to this shared channel (e.g., wire) that can allow a certain amount of energy to be exchanged between qubits.

[0020] These embodiments address the crosstalk problem by moving the dissipative element onto the qubit chip, allowing each qubit to have its own dissipative element. In some embodiments, each qubit can be coupled to its own on-chip dissipative element via a separate coupling channel (e.g., wire). In some embodiments, a lossy dielectric can be fabricated as a stripline or microstrip geometry on the chip. Such a technique is compatible with existing microwave routing on the qubit chip and can be fabricated as a microwave resonator that can be used for qubit reset. In other embodiments, a metal resistor can be fabricated on the chip via a metallization layer and can be used as the dissipative element.

[0021] For example, various embodiments of a quantum computing system include a cryogenic cavity and a superconducting device located within the cryogenic cavity. In various embodiments, the superconducting device can be a substrate (e.g., a superconducting substrate and / or a semiconductor substrate). The superconducting device can be a superconductor chip (or substrate) that implements quantum devices (e.g., qubits, qubit couplers, etc.). As such, the superconducting device (or substrate) can integrate various quantum circuit elements to form a quantum integrated circuit. Throughout, the quantum logic circuit can be referred to as an integrated circuit. And throughout, the quantum logic circuit (e.g., integrated circuit) can be integrated on a superconducting device (e.g., chip and / or substrate). The substrate can be located in a cryogenic cavity of the quantum computing system.

[0022] A quantum logic circuit (or integrated circuit) can be enabled to perform and / or implement quantum computing operations (e.g., single-qubit quantum computing operations and / or multi-qubit quantum computing operations) associated with quantum logic gates (on qubits included on a superconducting device). For example, a quantum logic circuit can be enabled to implement single-qubit quantum logic gates that perform quantum computing operations (e.g., Pauli X, Y, Z operations, Hadamard operations, etc.) on each qubit. A single-qubit quantum logic gate (for a qubit) can be implemented by the quantum logic circuit by providing one or more control signals (e.g., microwave signals) to the qubit. A quantum logic circuit can be enabled to implement multi-qubit quantum logic gates that perform quantum computing operations (e.g., CNOT, CZ, SWAP, Toffoli, etc.) on pairs of qubits. A qubit coupler (included in the quantum logic circuit) can be used to implement a fSim gate (e.g., a generalized multi-qubit quantum logic gate) for a pair of qubits. Thus, although a quantum logic circuit does not necessarily include physical quantum logic gates, it can be said that a quantum logic circuit can implement quantum logic gates via various elements (e.g., qubit couplers) and / or operations (e.g., providing one or more control signals to a qubit). Thus, it can be said that a quantum logic circuit can implement one or more quantum logic gate operations (e.g., quantum computing operations) on qubits. A quantum logic circuit can perform one or more quantum computing operations on a set of quantum states for each qubit.

[0023] A quantum logic circuit can include at least a first qubit and a first dissipative element. The first dissipative element can be coupled to the first qubit. In various embodiments, the first qubit can be a transmon qubit. As such, the qubit can be implemented by one or more Josephson junctions on a chip. The Josephson junction has a loop structure, where by tuning a magnetic flux through the loop structure, various properties and / or characteristics of the qubit can be changed. As such, the first qubit can be a first tunable qubit. For example, by tuning the magnetic flux through the loop structure, a frequency band associated with qubit (computational and non-computational) states can be shifted. As such, in some embodiments, when the first tunable qubit is tuned to a first flux value, the quantum logic circuit is enabled (via implementing a quantum logic gate and / or a quantum logic gate operation) to perform one or more quantum computing operations on a set of quantum states of the first tunable qubit. The set of quantum states can include at least a ground state and one or more excited states (e.g., computational states of the qubit). The set of quantum states can include additional excited states (e.g., non-computational states). A qubit reset operation can include tuning the first qubit to a second flux value. When the first qubit is tuned to the second flux value, the first qubit is enabled to transfer energy associated with the one or more excited states from the first tunable qubit to the first dissipative element, such that the first tunable qubit transitions to the ground state, i.e., performs a qubit reset operation. The on-chip first dissipative element is enabled to dissipate the energy associated with the one or more excited states to a portion of the superconducting device.

[0024] In various embodiments, the first dissipative element is part of a first resonator structure included in the integrated circuit. The first resonator structure is coupled to the first qubit. The first resonator can be coupled to the first qubit via a first filter structure of the integrated circuit. The first filter can be enabled to transfer the energy associated with the one or more excited states from the first qubit to the first resonator. The first filter can be a lossless resonator, such that the transfer of the energy associated with the one or more excited states from the first tunable qubit to the first resonator is substantially lossless energy transfer. Due to the inclusion of the first dissipative element, the first resonator can be a lossy resonator. The first resonator can include a first capacitor, a first inductor, and the first dissipative element. The first filter can include a second capacitor and a second inductor.

[0025] A first filter can be coupled to a first qubit via a first coupling element. A first resonator can be coupled to the first filter via a second coupling element. In various embodiments, the first coupling element can be a capacitor, and the second coupling element can be another capacitor. In other embodiments, the first coupling element can be an inductor, and the second coupling element can be another inductor. In still other embodiments, the coupling element can include various combinations of capacitors and inductors. The first filter can be coupled to a ground source, and the first resonator can also be coupled to a ground source.

[0026] In various embodiments, the first filter is a coplanar waveguide (CPW) resonator fabricated (or including) a CPW trace on a superconducting device (or substrate). The first resonator may be a stripline resonator. In some embodiments, the first dissipative element may be fabricated (or including) a stripline trace on a superconducting device (or substrate). In other embodiments, the first resonator may be a microstrip resonator and the first dissipative element may be fabricated (or including) a microstrip trace on a superconducting device. In some embodiments, the first dissipative element may include a lossy dielectric material. The lossy dielectric material may be deposited on the superconducting device (or substrate). In other embodiments, the first dissipative element may include a metal resistor. The metal resistor may be included in a metallization layer of the superconducting device (or substrate). In still other embodiments, the first dissipative element may include a combination of a resistor and a lossy dielectric material.

[0027] In various embodiments, a plurality of qubits, a plurality of dissipative elements (included in a plurality of lossy resonators), and a plurality of coupling channels coupling the qubits to the lossy resonators may be included. In such embodiments, for each qubit, there may be a separate dissipative element (and therefore a separate resonator) and a separate coupling channel (e.g., a wire). For example, an integrated circuit may include a set of qubits, a set of coupling channels, and a set of lossy resonators. Each lossy resonator in a set of lossy resonators may include a dissipative element (e.g., a lossy dielectric and / or a resistor). Thus, an integrated circuit may include a set of dissipative elements. A set of qubits may include at least a first qubit and a second qubit. A set of coupling channels may include at least a first coupling channel and a second coupling channel. A tunable qubit is coupled to a first dissipative element via a first coupling channel. A set of dissipative elements includes at least a first dissipative element and a second dissipative element, the second dissipative element being coupled to a second qubit via a second coupling channel. In such embodiments, each qubit in a set of tunable qubits can be coupled to a separate dissipative element in a set of dissipative elements via a separate coupling channel in a set of coupling elements, thereby reducing the tendency for crosstalk between the coupling channels in the set of coupling channels. As noted above, each dissipative element in a set of dissipative elements can be included in a separate lossy resonator in a set of lossy resonators.

[0028] The first qubit can be a measurement qubit included in the logical qubits of a quantum error-correcting (QEC) code (e.g., a surface code) of a quantum computing system. As noted above, the first qubit (and each qubit in a set of qubits) can be a transmon qubit with a superconducting loop. A first flux value can include a first magnetic flux through the superconducting loop. A second flux value can include a second magnetic flux through the superconducting loop. The first flux value can be associated with a first frequency band corresponding to one or more quantum computing operations. The second flux value can be associated with a second frequency band corresponding to a readout operation of the first tunable qubit. A first center frequency of the first frequency band can be greater than a second center frequency of the second frequency band.

[0029] The aspects of this disclosure provide numerous technical effects and benefits. For example, by positioning the lossy resonators on-chip, each qubit has its own resonator to transfer energy during qubit reset. This one-to-one correspondence between qubits and lossy resonators significantly reduces crosstalk during qubit reset. Furthermore, by positioning the lossy resonators on-chip, the embodiments significantly reduce the time associated with qubit reset.

[0030] As used in this article, the term “about” in conjunction with numerical values ​​means within 10% of the specified amount.

[0031] Figure 1An example quantum computing system 100 according to various embodiments is depicted. System 100 is an example of a system of one or more classical computers and / or quantum computing devices located in one or more locations, in which the systems, components and techniques described below may be implemented. Those skilled in the art will understand, using the disclosure provided herein, that other quantum computing devices or systems may be used without departing from the scope of this disclosure.

[0032] System 100 includes quantum hardware 102 that communicates data with one or more classical processors 104. The classical processor 104 can be configured to execute computer-readable instructions stored in one or more memory devices to perform operations such as any of the operations described herein. Quantum hardware 102 includes components for performing quantum computing. For example, quantum hardware 102 includes a quantum system 110, a control device 112, and a readout device 114 (e.g., a readout resonator). Quantum system 110 may include a register of one or more multi-level quantum subsystems, such as qubits (e.g., qubit 120). In some implementations, the multi-level quantum subsystem may include superconducting qubits, such as flux qubits, charge qubits, transmon qubits, gmon qubits, spin-based qubits, etc.

[0033] The type of multilevel quantum system used in system 100 can vary. For example, in some cases, it may be convenient to include one or more readout devices 114 attached to one or more superconducting qubits (e.g., transmon qubits, flux qubits, gmon qubits, xmon qubits, or other qubits). In other cases, ion traps, photonic devices, or superconducting cavities can be used (e.g., which allow for state preparation without the need for qubits). Further examples of implementations of multilevel quantum systems include fluxmon qubits, silicon quantum dots, or phosphorus-impurity qubits.

[0034] Quantum circuits can be constructed and applied to registers of qubits included in quantum system 110 via multiple control lines coupled to one or more control devices 112. Example control devices 112 operating on qubit registers can be used to implement quantum gates or quantum circuits with multiple quantum gates, such as Pauli gates, Hadamard gates, controlled-NOT (CNOT) gates, controlled-phase gates, T-gates, multi-qubit quantum gates, coupler quantum gates, etc. One or more control devices 112 can be configured to operate quantum system 110 via one or more corresponding control parameters (e.g., one or more physical control parameters). For example, in some implementations, the multi-level quantum system can be superconducting qubits, and control devices 112 can be configured to provide control pulses to the control lines to generate magnetic fields to adjust the frequency of the qubits.

[0035] Quantum hardware 102 may further include a readout device 114 (e.g., a readout resonator). Measurement results 108 obtained via the measurement device can be provided to classical processor 104 for processing and analysis. In some implementations, quantum hardware 102 may include quantum circuitry, and control device 112 and readout device 114 may implement one or more quantum logic gates that operate the quantum system 102 via physical control parameters (e.g., microwave pulses), which are transmitted via wires included in the quantum hardware 102. Further examples of the control device include an arbitrary waveform generator, where a DAC (digital-to-analog converter) creates the signal.

[0036] The readout device 114 can be configured to perform quantum measurements on the quantum system 110 and send the measurement result 108 to the classical processor 104. Additionally, the quantum hardware 102 can be configured to receive data specifying physical control qubit parameter values ​​106 from the classical processor 104. The quantum hardware 102 can use the received physical control qubit parameter values ​​106 to update the actions of the control device 112 and the readout device 114 on the quantum system 110. For example, the quantum hardware 102 can receive data specifying new values ​​and can accordingly update the actions of one or more DACs on the quantum system 110, these new values ​​representing the voltage strength of the DACs included in the control device 112. The classical processor 104 can be configured, for example, to initialize the quantum system 110 to an initial quantum state by sending data specifying an initial parameter set 106 to the quantum hardware 102.

[0037] In some implementations, the readout device 114 can utilize elements of a quantum system, such as qubits. state and The impedance difference between states is used to measure the state of an element (e.g., a qubit). For example, due to the nonlinearity of the qubit, when the qubit is in a state... or state The resonant frequency of the readout resonator can be different. Therefore, the microwave pulse reflected from the readout device 114 carries an amplitude and phase shift depending on the qubit state. In some implementations, a Purcell filter can be used in conjunction with the readout device 114 to impede microwave propagation at the qubit frequency.

[0038] In some embodiments, the quantum system 110 may include, for example, a plurality of qubits 120 arranged in a two-dimensional grid 122. For clarity, Figure 1The two-dimensional grid 122 depicted includes 4×4 qubits; however, in some implementations, system 110 may include fewer or more qubits. In some embodiments, multiple qubits 120 can interact with each other through multiple qubit couplers (e.g., qubit coupler 124). A qubit coupler can define the nearest-neighbor interaction between the multiple qubits 120. In some implementations, the strength of the multiple qubit couplers is a tunable parameter. In some cases, the multiple qubit couplers included in the quantum computing system 100 may be couplers with a fixed coupling strength.

[0039] In some implementations, the plurality of qubits 120 may include data qubits (such as qubit 126) and measurement qubits (such as qubit t). Data qubits are qubits that participate in computations performed by system 100. Measurement qubits are qubits that can be used to determine the result of a computation performed by the data qubits. That is, during computation, the unknown state of the data qubits is transferred to the measurement qubits using appropriate physical operations and measured via appropriate measurement operations performed on the measurement qubits.

[0040] In some implementations, each of the multiple qubits 120 can operate using a corresponding operating frequency, such as an idle frequency and / or an interaction frequency and / or a readout frequency and / or a reset frequency. The operating frequencies of different qubits can be different. For example, each qubit can be idle at a different operating frequency. The operating frequency for the qubits 120 can be selected before performing computation.

[0041] Figure 1 An example quantum computing system that can be used to implement the methods and operations according to the exemplary aspects of this disclosure is described. Other quantum computing systems may be used without departing from the scope of this disclosure.

[0042] Figure 2 A set of qubit frequency bands 200 according to various embodiments is depicted. More specifically, Figure 2 The vertical axis in the diagram is the frequency axis 242. Figure 2The horizontal axis in the diagram is the qubit magnetic flux axis 244. A set of qubit bands 200 includes three qubit bands. These three qubit bands include: a reset and readout band 220, a computation band 220, and a readout band 230. The three bands are vertically stacked along the vertical frequency axis 242, corresponding to the frequency ranges within each band. The frequencies within the reset band 210 are lower than those within the computation band 220 and the readout band 230. The frequencies within the computation band 220 are lower than those within the readout band 230, but higher than those within the reset band 210. The frequencies within the readout band 230 are higher than those within the computation band 220 and the reset band 210. In various embodiments, the readout band 230 represents the band containing the readout resonator frequency. Readout is performed when the qubit is tuned to the computation band 220 via dispersive coupling between the qubit and a (higher frequency) resonator.

[0043] Unrestricted values ​​for the upper and lower limits of the qubit band are shown. Figure 2 In a non-limiting example, the reset band 210 includes qubit frequencies between 3.9 GHz and 4.0 GHz. Figure 2 In a non-limiting example, the computational band 220 includes qubit frequencies between 4.7 GHz and 5.3 GHz. Figure 2 In a non-limiting example, readout band 230 includes readout resonator frequencies between 6.0 GHz and 6.5 GHz. Note that non-limiting example values ​​exist, and the lower and upper limits on each of the qubit bands can vary across embodiments. While frequency values ​​can vary, in embodiments, readout band 230 is typically the highest band, while reset band 210 is typically the lowest band. Although bands are shown to have no overlap within their included frequencies, some overlap may exist between bands in various embodiments.

[0044] As noted above, the qubits in various embodiments can be transmon qubits. Therefore, a qubit can be implemented by one or more Josephson junctions on a superconducting device. A Josephson junction has a loop structure in which various properties and / or characteristics of the qubit can be altered by tuning the magnetic flux through the loop structure. Thus, a qubit can be a tunable qubit. For example, by tuning the magnetic flux through the loop structure, the frequency band associated with the qubit's (computational and non-computational) state can be shifted. Figure 2 An example qubit frequency versus magnetic flux curve 240 is also shown. Note that the qubit frequency versus magnetic flux curve 240 is positioned about the horizontal qubit magnetic flux axis 244 and the vertical frequency axis 242. Also note that the qubit frequency versus magnetic flux curve 240 is a non-limiting example, and this curve can be subjected to various affine transformations in various embodiments.

[0045] Quantum bits in various embodiments are typically... Figure 2 The frequency of the qubit operates within the defined domain of the magnetic flux curve 240. Therefore, the tunable qubit typically operates (via the tunable qubit) in the reset band 210 and the computation band 220. When the qubit operates within the computation band 220, quantum logic gates (located on the superconducting device) can perform quantum operations on the qubit. Therefore, when the qubit operates within the computation band 220, the qubit can be used for quantum computing; for example, one or more quantum logic operations can be performed on the qubit. In various embodiments, when the qubit operates...

[0046] Furthermore, in an embodiment, when the quantum state of a qubit (e.g., a measured qubit in a quantum error-correcting (QEC) code) is measured (e.g., read out) and reset, the qubit operates with magnetic flux at a frequency that places the qubit in reset band 210. Thus, when the qubit is tuned to a first flux value (e.g., a flux value corresponding to computation band 220), a quantum circuit is enabled to perform one or more quantum computation operations on a set of quantum states of the qubit (e.g., by implementing operations associated with quantum logic gates). The set of quantum states includes at least two quantum states (e.g., a ground state and a first excited state). In some embodiments, the set of quantum states may include non-computational states (e.g., additional excited states). As described below, when the qubit is tuned to a second flux value (e.g., a flux value corresponding to reset band 210), the qubit is enabled to transfer energy associated with one or more excited states from the qubit to a dissipative element (e.g., a dissipative element included in a lossy resonator located on the same superconducting device). When energy is transferred from the qubit to the dissipative element, the qubit's quantum state transitions to the ground state. Therefore, the qubit has been reset. Furthermore, as discussed below, the dissipative element is activated to dissipate the energy associated with one or more excited states to a portion of the superconducting device. In contrast to the embodiments, the previous architecture operated the qubit in readout band 230 for readout purposes.

[0047] Figure 3 An example quantum computing system 300 according to various embodiments is depicted. More specifically, Figure 3 A block diagram depicts the components included in the integrated circuit 306 integrated on the superconducting device 304 of the quantum computing system 300. The quantum computing system 300 can be used with... Figure 1 The quantum computing system 100 is similar to that in the text.

[0048] Quantum computing system 300 includes a cryogenic cavity 302. Quantum computing system 300 further includes an integrated circuit 306 integrated on a superconducting device 304. The superconducting device 304 is located (or placed) within the cryogenic cavity 302. The superconducting device 304 may be a substrate, a chip, or a die. In various embodiments, the superconducting device 304 may be a semiconductor device (e.g., a semiconductor substrate or a die). Integrated circuit 306 includes a set of qubits. This set of qubits may include a first qubit 310 (e.g., a first tunable qubit). This set of qubits may additionally include a second qubit 360 (e.g., a second tunable qubit). Integrated circuit 306 may implement a quantum logic gate (e.g., a multi-qubit quantum logic gate 350) that is enabled to perform quantum logic operations on at least the first qubit 310 and the second qubit 360. In some embodiments, the operation of the implemented multi-qubit quantum logic gate 350 may perform an entanglement operation on the qubit pair consisting of the first qubit 310 and the second qubit 360. As discussed above, the multi-qubit quantum logic gate 350 may not be a physical device included in the integrated circuit 306. Instead, the multi-qubit quantum logic gate 350 may be located via a qubit coupler included in the integrated circuit 306 (which is located in...). Figure 3 (Not shown in the diagram) and / or one or more control signals provided to the first qubit 310 and / or the second qubit 360 to achieve this. Therefore, although in Figure 3 The above is shown as a discrete physical device, but the multi-qubit quantum logic gate 350 may not be a physical element, but rather a set of implementable operations that can operate on the first qubit 310 and / or the second qubit 360. By implementing the multi-qubit quantum logic gate 350, the integrated circuit 306 can be enabled to perform one or more quantum computing operations on the first qubit 310 and / or the second qubit 360.

[0049] Integrated circuit 306 may include a first lossy resonator 330. Although Figure 3 While not explicitly shown, the first lossy resonator 330 may include a first dissipative element. For example, see [link to relevant documentation]. Figure 3 The first lossy resonator 330 includes a first dissipative element 432. The first lossy resonator 330 can be coupled to a first qubit 310 via a first coupling channel 340. Similarly, the integrated circuit 306 may include a second lossy resonator 380, which is coupled to a second qubit 360 via a second coupling channel 390. The second lossy resonator 380 may include a second dissipative element (…). Figure 3 (Not shown in the image). The first lossy resonator 330 and the second lossy resonator 380 can be coupled with... Figure 4The first lossy resonator 430 is similar. The first coupling channel 340 and the second coupling channel 390 may include separate wires (or conductive traces) that at least partially couple qubits to their respective lossy resonators. Figure 3 As shown, lossless filters (e.g., first lossless filter 320 and second lossless filter 370) can exist between qubits and their lossy resonators.

[0050] As discussed below, integrated circuit 306 may include a first lossless filter 320 and a second lossless filter 370. The first lossless filter 320 and the second lossless filter 370 may be used with… Figure 4 The first lossless filter 420 is similar. However, briefly here, the first lossless filter 320 can be coupled to the first qubit 310 via the first coupling element 342. The first lossless filter 320 can be coupled to the first lossy resonator 330 via the second coupling element 344. The second lossless filter 370 can be coupled to the second qubit 360 via the third coupling element 392. The second lossless filter 370 can be coupled to the second lossy resonator 380 via the fourth coupling element 394. The coupling elements are in... Figure 3 The element is shown as a capacitor. However, embodiments are not limited thereto, and the coupling element may include one or more inductors. A lossless filter can be enabled to transfer energy losslessly between its qubits and its lossy resonator within the frequency band targeted for tuning by the lossless filter (and the lossy resonator), while preventing energy transfer outside the frequency band of the lossless filter.

[0051] Such as combination Figure 2 As indicated, when the first qubit 310 is tuned to the first flux value (e.g., Figure 2 The quantum bit frequency and the magnetic curve 240 Figure 2 When the flux value corresponding to the computational frequency band 220 is reached, integrated circuit 306 is enabled to perform one or more quantum computation operations on a set of quantum states of the first qubit 310 via a quantum logic gate (e.g., a multi-qubit quantum logic gate 350). The set of quantum states may include at least a ground state and a first excited state (e.g., the computational state of the first qubit 310). This set of quantum states may include additional excited states (e.g., non-computational states). A first dissipative element (e.g., the dissipative element of the first lossy resonator 330) may be coupled to the first qubit 310. When the first qubit 310 is tuned to a second flux value (e.g., the qubit frequency versus the flux value on the magnetic curve 240), integrated circuit 306 is enabled to perform one or more quantum computation operations on a set of quantum states of the first qubit 310 via a quantum logic gate (e.g., a multi-qubit quantum logic gate 350). Figure 2When the flux value corresponding to the reset band 210 is reached, the first qubit 310 is activated to transfer the energy associated with one or more excited states from the first qubit 310 to the first dissipative element. After the energy transfer, the first qubit 310 transitions to the ground state. The first dissipative element is activated to dissipate the energy associated with one or more excited states to a portion of the superconducting device 304.

[0052] Similarly, when the second qubit 360 is tuned to a third flux value (e.g., the flux value corresponding to computation band 220 on the qubit frequency versus magnetic curve 240), integrated circuit 306 is enabled to perform one or more quantum computation operations on a set of quantum states of the second qubit 360 via a quantum logic gate (e.g., a multi-qubit quantum logic gate 350). A second dissipative element (e.g., a dissipative element of the second lossy resonator 380) may be coupled to the second qubit 360. When the first qubit 360 is tuned to a fourth flux value (e.g., the flux value corresponding to reset band 210 on the qubit frequency versus magnetic curve 240), the second qubit 360 is enabled to transfer energy associated with one or more excited states from the second qubit 360 to the second dissipative element. After the energy transfer, the second qubit 360 transitions to the ground state. The second dissipative element is enabled to dissipate the energy associated with one or more excited states to a portion of the superconducting device 304.

[0053] In various embodiments, integrated circuit 306 includes a set of tunable qubits, which includes at least a first qubit 310 and a second qubit 360. Integrated circuit 306 may further include a set of coupling channels. This set of coupling channels includes at least a first coupling channel 340 and a second coupling channel 390. The first qubit 310 is coupled to a first dissipative element (of the first lossy resonator 330) via the first coupling channel 340. Integrated circuit 306 may further include a set of dissipative elements. This set of dissipative elements includes at least a first dissipative element and a second dissipative element (e.g., of the second lossy resonator 380). The second dissipative element may be coupled to the second qubit 360 via the second coupling channel 390. Each qubit in the set of tunable qubits is coupled to a separate dissipative element in the set of dissipative elements via a separate coupling channel in the set of coupling elements, thereby reducing the tendency for crosstalk between the coupling channels in the set of coupling channels.

[0054] Figure 4 Another example quantum computing system 400 according to various embodiments is depicted. More specifically, Figure 4 A circuit diagram depicts the components included in the integrated circuit 406, which is integrated onto the superconducting device 404 of the quantum computing system 400. The quantum computing system 400 can be used with... Figure 1 Quantum computing system 100 and / orFigure 3 Similar to the quantum computing system 300.

[0055] The quantum computing system 400 includes a cryogenic cavity 402. The quantum computing system 400 further includes an integrated circuit 406 integrated on a superconducting device 404. The superconducting device 404 (e.g., a substrate or chip) is located (or placed) within the cryogenic cavity 402. The integrated circuit 406 includes a first qubit 410 (e.g., a first tunable qubit). The first qubit 410 can be coupled with… Figure 3 The first quantum bit 310 and Figure 3 Each of the second qubits 360 is similar. The integrated circuit 406 may implement a quantum logic gate (e.g., a single-qubit quantum logic gate 450) that is enabled to perform quantum logic operations on at least the first qubit 410. In some embodiments, the operation of the implemented single-qubit quantum logic gate 450 may perform quantum computation operations on the quantum state of the first qubit 410. As discussed above, the single-qubit quantum logic gate 450 may not be a physical device included in the integrated circuit 406. Rather, the single-qubit quantum logic gate 450 may be implemented via one or more control signals provided to the first qubit 410. Accordingly, although shown as Figure 4 The single-qubit quantum logic gate 450 is a discrete physical device, but it may not be a physical element; rather, it may be a set of implementable operations that can operate on the first qubit 410. By implementing the single-qubit quantum logic gate 450, the integrated circuit 406 can be enabled to perform one or more quantum computing operations on the first qubit 410.

[0056] Integrated circuit 406 may include a first lossy resonator 430. The first lossy resonator 430 includes a first dissipative element 432, a first inductor 434, and a first capacitor 436. For example... Figure 4 As shown, the first dissipation 432 may be a metallic resistor. In other embodiments, the first dissipation element 432 may include a lossy dielectric. The first lossy resonator 430 is coupled to a ground source 448. The first lossy resonator 430 may be... Figure 3 The first lossy resonator 330 and Figure 3 The second lossy resonator 480 is similar. A coupling channel 440 (e.g., comprising one or more wires and / or conductive traces) can couple the first qubit 410 to the first lossy resonator 430. The coupling channel 440 can be connected to... Figure 3 The first coupling channel 340 and Figure 3 The second coupling channel 390 is similar.

[0057] Integrated circuit 406 may further include a first lossless filter 420. The first lossless filter 420 may be connected to... Figure 3The first lossless filter 320 and Figure 3 Each of the second lossless filters 370 is similar. However, in short, the first lossless filter 420 may include a second inductor 424 and a second capacitor 426. The first lossless filter 420 is coupled to a first qubit 410 via a first coupling element 442. The first lossless filter 420 is coupled to a first lossy resonator 430 via a second coupling element 442. Figure 4 In this embodiment, the coupling element is shown as a capacitor. However, in other embodiments, the coupling element may include one or more inductors. The first lossless filter 420 may be enabled to transfer energy losslessly between the first qubit 410 and its lossy resonator 430 within the frequency band targeted for tuning by the first lossless filter 420 (and the first lossy resonator 430), while preventing energy transfer outside the frequency band of the first lossless filter 420.

[0058] Such as combination Figure 2 As indicated, when the first qubit 410 is tuned to the first flux value (e.g., Figure 2 The quantum bit frequency and the magnetic curve 240 Figure 2 When the first qubit 410 is tuned to a second flux value (e.g., the flux value corresponding to the computational frequency band 220), integrated circuit 406 is enabled to perform one or more quantum computation operations on a set of quantum states of the first qubit 410 by implementing quantum logic gates (e.g., single-qubit logic gate 450). The set of quantum states may include at least a ground state and a first excited state (e.g., the computational state of the first qubit 410). The set of quantum states may include additional excited states of the first qubit 410 (e.g., non-computational states). Dissipative element 432 may be (indirectly) coupled to the first qubit 410. When the first qubit 410 is tuned to a second flux value (e.g., the flux value corresponding to the qubit frequency on the magnetic curve 240), integrated circuit 406 is enabled to perform one or more quantum computation operations on a set of quantum states of the first qubit 410 by implementing quantum logic gates (e.g., single-qubit logic gate 450). Figure 2 When the flux value corresponding to the reset band 210 is reached, the first qubit 410 is activated to transfer the energy associated with one or more excited states from the first qubit 410 to the first dissipation element 432. After the energy transfer, the first qubit 410 transitions to the ground state. The first dissipation element 432 is activated to dissipate the energy associated with one or more excited states to a portion of the superconducting device 404.

[0059] As noted above, the first lossy resonator 430 included in integrated circuit 406 includes a first dissipative element 432. The first resonator 430 is coupled to a first qubit 410. A first lossless filter 420 included in integrated circuit 406 couples the first qubit 410 to the first lossy resonator 430. The first lossy filter 420 is enabled to transfer energy associated with one or more excited states from the first qubit 410 to the first lossy resonator 430. The first lossless filter 420 may be a lossless resonator such that the transfer of energy associated with one or more excited states from the first qubit 410 to the first lossy resonator 430 is a lossless energy transfer. As noted above, the first lossy resonator 430 includes a first capacitor 436, a first inductor 434, and a first dissipative element 432. The first lossless filter 420 includes a second capacitor 426 and a second inductor 424.

[0060] The first lossless filter 420 may be coupled to the first qubit 410 via a first coupling element 442. The first lossy resonator 430 is coupled to the first lossless filter 420 via a second coupling element 444. In various embodiments, the first coupling element 442 and the second coupling element 444 include one or more capacitors. In other embodiments, the first coupling element 442 and the second coupling element 444 include one or more inductors. The first lossless filter 420 is coupled to a ground source 448, and the first lossy resonator 430 is coupled to the ground source 448. In various embodiments, the first dissipative element 432 includes a lossy dielectric material deposited on the superconducting device 404. In other embodiments, the first dissipative element 432 includes a metal resistor included in a metallization layer on the superconducting device 404.

[0061] The first qubit 410 may be a measurement qubit included in the logical qubits of the quantum error correction (QEC) code of the quantum computing system 400. The first qubit 410 may be a transmon qubit with a superconducting loop. A first flux value may include a first magnetic flux through the superconducting loop. A second flux value may include a second magnetic flux through the superconducting loop. The first flux value may correspond to a first frequency band (e.g., ...) corresponding to the same or more quantum computing operations. Figure 2 The second flux value can be associated with the second frequency band (220) corresponding to the readout operation of the first qubit 410. Figure 2 This is associated with the reset frequency band 210. The first center frequency of the first frequency band may be greater than the second center frequency of the second frequency band. The first frequency band may include frequencies between 4.7 GHz and 5.3 GHz. The second frequency band may include frequencies between 3.9 GHz and 4.0 GHz, as combined Figure 2 The subject of discussion.

[0062] Figures 5A and 5B provide circuit-level diagrams of integrated circuit 506 according to various embodiments. The integrated circuit 506 of Figures 5A and 5B can be used with... Figure 3 Integrated circuit 306 and / or Figure 4 The integrated circuit 406 is similar. More specifically, Figure 5A provides a top view of integrated circuit 506. Figure 5B provides a cross-sectional side view of integrated circuit 506. The double-headed arrows indicate the correspondence between the two.

[0063] As shown in the top view of Figure 5A, the integrated circuit 506 includes a first qubit 510, a first lossless filter 520, and a first lossy resonator 530. The first qubit 510 can be connected to... Figure 3 First qubit 310 Figure 3 The second quantum bit 360, and / or Figure 4 The first quantum bit 410 is similar. The first lossless filter 520 can be compared with... Figure 3 The first lossless filter 320 Figure 3 The second lossless filter 370, and / or Figure 4 The first lossless filter 420 is similar. The first lossy resonator 530 can be compared with... Figure 3 The first lossy resonator 330 Figure 3 The second lossy resonator 380, and / or Figure 4 The first lossy resonator is similar to the 430.

[0064] Turning attention to the cross-sectional side view of Figure 5B, integrated circuit 506 may include a substrate 550, a bare wire layer 560, a dielectric 570, and a top conductor 580. The substrate 550 may be a superconducting device (e.g., Figure 3 Superconducting device 304 and / or Figure 4The superconducting device 404. The substrate 550 may include a silicon die 554 (or chip). Embodiments are not limited thereto, and the substrate 550 may be composed of one or more additional and / or alternative semiconductor materials. The integrated circuit 506 may include a baseline layer 560. The baseline layer 560 may consist of: a first baseline segment 562 corresponding to the first qubit 510, a second baseline segment 564 corresponding to the inner portion of the first lossless filter 520 and the first lossy resonator 530, and a third baseline segment 566 corresponding to the capacitor of the first lossy resonator 530. In a non-limiting embodiment, the baseline layer 560 may include 100 nm of Al. The integrated circuit 506 may include a dielectric (e.g., a lossy dielectric) corresponding to the middle portion of the first lossy resonator 530. In a non-limiting embodiment, the dielectric 570 may include 500 nm of silicon dioxide. The integrated circuit 506 may further include a top conductor 580 corresponding to the outer portion of the first lossy resonator 530. In a non-limiting embodiment, the top conductive layer 580 may comprise 200 nm of aluminum. In other embodiments, the top conductive layer 580 may be composed of other conductive materials, such as, but not limited to, gold, copper, silver, platinum, or any other such conductive metallization. In at least one embodiment, the top conductive layer 580 may be composed of a non-metallic but conductive material.

[0065] In various embodiments, the first qubit 510 is a transmon tunable qubit. The first lossless filter 520 may be a coplanar waveguide (CPW) filter (or resonator) fabricated via stripline traces on a superconducting device. The first lossy resonator 530 may be a microstrip resonator. The first dissipative element (of the first lossy resonator 53) may be fabricated via microstrip traces on a superconducting device. In other embodiments, the first lossy resonator 530 is a stripline resonator. The first dissipative element may be fabricated via stripline traces on a superconducting device.

[0066] Other embodiments

[0067] The implementations of the digital, classical, and / or quantum themes, as well as digital function operations and quantum operations described in this specification, may be implemented in digital electronic circuit systems, suitable quantum circuit systems, or more generally, quantum computing systems, in tangibly implemented digital and / or quantum computer software or firmware, in digital and / or quantum computer hardware (including the structures disclosed in this specification and their structural equivalents), or in a combination of one or more of these. The term "quantum computing system" may include, but is not limited to, quantum computers / computing systems, quantum information processing systems, quantum cryptography systems, or quantum simulators.

[0068] The implementations of the digital, classical, and / or quantum themes, as well as digital function operations and quantum operations described in this specification, may be implemented in digital electronic circuit systems, suitable quantum circuit systems, or more generally, quantum computing systems, in tangibly implemented digital and / or quantum computer software or firmware, in digital and / or quantum computer hardware (including the structures disclosed in this specification and their structural equivalents), or in a combination of one or more of these. The term "quantum computing system" may include, but is not limited to, quantum computers / computing systems, quantum information processing systems, quantum cryptography systems, or quantum simulators.

[0069] The implementation of the digital and / or quantum themes described in this specification can be implemented as one or more digital and / or quantum computer programs, i.e., one or more modules of digital and / or quantum computer program instructions encoded on a tangible, non-transitory storage medium for execution by a data processing device or for controlling the operation of a data processing device. The digital and / or quantum computer storage medium can be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, one or more qubit / qubit structures, or a combination of one or more of these. Alternatively or additionally, the program instructions can be encoded on an artificially generated propagation signal (e.g., a machine-generated electrical, optical, or electromagnetic signal) capable of encoding digital and / or quantum information, which is generated to encode the digital and / or quantum information for transmission to a suitable receiver device for execution by the data processing device.

[0070] The terms quantum information and quantum data refer to information or data carried, stored, or preserved by quantum systems, the smallest nontrivial system being a qubit, i.e., a system that defines the unit of quantum information. It is understood that the term "qubit" encompasses all quantum systems that can be appropriately approximated as a two-level system in the corresponding context. Such quantum systems can include multi-level systems, e.g., systems with two or more energy levels. For example, such systems can include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, the computational ground state is considered as the ground state and the first excited state; however, it should be understood that other settings where the computational state is considered as a higher-level excited state (e.g., a qubit) are also possible.

[0071] The term "data processing device" refers to digital and / or quantum data processing hardware and encompasses all kinds of devices, apparatuses, and machines for processing digital and / or quantum data, including, for example, programmable digital processors, programmable quantum processors, digital computers, quantum computers, or multiple digital and quantum processors or computers, and combinations thereof. The device may also be, or further include, a dedicated logic circuit system, such as an FPGA (Field-Programmable Gate Array), or an ASIC (Application-Specific Integrated Circuit), or a quantum simulator, i.e., a quantum data processing device designed to simulate or generate information about a particular quantum system. Specifically, a quantum simulator is a dedicated quantum computer that does not have the capability to perform general-purpose quantum computing. In addition to hardware, the device may optionally include code that creates an execution environment for digital and / or quantum computer programs, such as code constituting processor firmware, protocol stacks, database management systems, operating systems, or combinations thereof.

[0072] Digital or classical computer programs, which can also be referred to or described as programs, software, software applications, modules, software modules, scripts, or code, can be written in any form of programming language (including compiled or interpreted languages, or declarative or procedural languages), and can be deployed in any form, including as standalone programs or as modules, components, subroutines, or other units suitable for use in a digital computing environment. Quantum computer programs, which can also be referred to or described as programs, software, software applications, modules, software modules, scripts, or code, can be written in any form of programming language (including compiled or interpreted languages, or declarative or procedural languages) and translated into a suitable quantum programming language, or can be written in quantum programming languages ​​such as QCL, Quipper, Cirq, etc.

[0073] Digital and / or quantum computer programs may, but do not necessarily, correspond to files in a file system. Programs may be stored as a portion of a file containing other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinating files (e.g., files storing one or more modules, subroutines, or code sections). Digital and / or quantum computer programs can be deployed to execute on a single digital or quantum computer, or on multiple digital and / or quantum computers located at a single site or distributed across multiple sites and interconnected via digital and / or quantum data communication networks. A quantum data communication network is understood as a network that can transmit quantum data using quantum systems (e.g., qubits). Generally, digital data communication networks cannot transmit quantum data; however, quantum data communication networks can transmit both quantum and digital data.

[0074] The processes and logic flows described in this specification can be executed by one or more programmable digital and / or quantum computers (which, where appropriate, operate using one or more digital and / or quantum processors) executing one or more digital and / or quantum computer programs to perform functions by manipulating input digital and quantum data and generating outputs. The processes and logic flows can also be executed by a dedicated logic circuit system (e.g., an FPGA or ASIC or a quantum simulator) or by a combination of a dedicated logic circuit system or quantum simulator and one or more programmable digital and / or quantum computers, and the device can also be implemented as such a dedicated logic circuit system or such combination.

[0075] For a system "configured" or "operable to" perform a specific operation or action, it means that the system has software, firmware, hardware, or a combination thereof installed thereon that causes the system to perform the operation or action in operation. For one or more digital and / or quantum computer programs to be configured to perform a specific operation or action, it means that the one or more programs include instructions that cause the digital and / or quantum data processing device to perform the operation or action when executed by the device. A quantum computer can receive instructions from a digital computer that, when executed by the quantum computing device, cause the device to perform the operation or action.

[0076] A digital and / or quantum computer suitable for executing digital and / or quantum computer programs can be based on a general-purpose or special-purpose digital and / or quantum microprocessor or both, or any other kind of central digital and / or quantum processing unit. Generally, the central digital and / or quantum processing unit receives instructions and digital and / or quantum data from read-only memory, or random access memory, or a quantum system suitable for transmitting quantum data (e.g., photons), or a combination thereof.

[0077] Some example elements of a digital and / or quantum computer are a central processing unit (CPU) for making or executing instructions and one or more memory devices for storing instructions and digital and / or quantum data. The CPU and memory may be supplemented by or incorporated into a dedicated logic circuit system or quantum simulator. Generally, a digital and / or quantum computer will also include one or more mass storage devices for storing digital and / or quantum data, such as magnetic disks, magneto-optical disks, or optical disks, or quantum systems suitable for storing quantum information, or operatively coupled to receive digital and / or quantum data from or to such mass storage devices, or both. However, a digital and / or quantum computer need not have such devices.

[0078] Digital and / or quantum computer-readable media suitable for storing digital and / or quantum computer program instructions and digital and / or quantum data include all forms of non-volatile digital and / or quantum memories, media, and memory devices, including, for example, semiconductor memory devices, such as EPROM, EEPROM, and flash memory devices; magnetic disks, such as internal hard disks or removable hard disks; magneto-optical disks; and CD-ROM and DVD-ROM disks; and quantum systems, such as trapped atoms or electrons. It is understood that quantum memory is a device capable of storing quantum data for a long period with high fidelity and high efficiency, for example, using light for transmission and using matter for storage and preservation of quantum characteristics (such as superposition or quantum coherence) of the quantum data at an optical-material interface.

[0079] Control of the various systems or portions thereof described in this specification can be implemented in a digital and / or quantum computer program product, which includes instructions stored on one or more tangible, non-transitory, machine-readable storage media and executable on one or more digital and / or quantum processing devices. The systems or portions thereof described in this specification can each be implemented as an apparatus, method, or electronic system, which may include one or more digital and / or quantum processing devices and memory for storing executable instructions to perform the operations described in this specification.

[0080] While this specification contains numerous details of specific implementations, these details should not be construed as limiting the scope of what may be claimed, but rather as descriptions of features that may be specific to particular implementations. Certain features described in this specification within the context of individual implementations may also be implemented in combination within a single implementation. Conversely, individual features described within the context of a single implementation may also be implemented individually or in any suitable sub-combination in multiple implementations. Furthermore, although features are described above as functioning in certain combinations, and even initially claimed in this way, one or more features from a claimed combination may, in some cases, be removed from that combination, and the claimed combination may be for a sub-combination or a variation thereof.

[0081] Similarly, although operations are depicted in a specific order in the accompanying drawings, this should not be construed as requiring such operations to be performed in the specific order shown or in sequential order, or requiring all shown operations to achieve the desired result. In some cases, multitasking and parallel processing can be advantageous. Furthermore, the separation of the various system modules and components in the implementations described above should not be construed as requiring such separation in all implementations, and it should be understood that the described program components and systems can generally be integrated together in a single software product or encapsulated in multiple software products.

[0082] Specific implementations of this subject matter have been described. Other implementations are within the scope of the appended claims. For example, the actions described in the claims can be performed in different orders and still achieve the desired result. As an example, the processes depicted in the figures do not necessarily require a specific order or sequence shown to achieve the desired result. In some cases, multitasking and parallel processing can be advantageous.

Claims

1. A quantum computing system, comprising: cryogenic chamber; as well as An integrated circuit, the integrated circuit being integrated on a substrate located within the cryogenic cavity, the integrated circuit comprising: A first tunable qubit, wherein when the first tunable qubit is tuned to a first flux value, the integrated circuit is enabled to perform one or more quantum computing operations on a set of quantum states of the first tunable qubit, the set of quantum states including at least a ground state and one or more excited states; as well as A first dissipative element is coupled to a first tunable qubit, wherein when the first tunable qubit is tuned to a second flux value, the first tunable qubit is enabled to transfer energy associated with the one or more excited states from the first tunable qubit to the first dissipative element, such that the first tunable qubit transitions to the ground state and the first dissipative element is enabled to dissipate the energy associated with the one or more excited states to a portion of the substrate.

2. The quantum computing system of claim 1, wherein the integrated circuit further comprises: A first resonator, the first resonator including the first dissipative element, wherein the first resonator is coupled to the first tunable qubit.

3. The quantum computing system of claim 2, wherein the integrated circuit further comprises: A first filter couples the first tunable qubit to the first resonator, wherein the first filter is enabled to transfer the energy associated with the one or more excited states from the first tunable qubit to the first resonator.

4. The quantum computing system of claim 3, wherein the first filter is a lossless resonator, such that the energy transfer from the first tunable qubit to the first resonator associated with the one or more excited states is a lossless energy transfer and the first resonator is a lossy resonator.

5. The quantum computing system of claim 3, wherein the first resonator comprises a first capacitor, a first inductor and the first dissipative element, and the first filter comprises a second capacitor and a second inductor.

6. The quantum computing system of claim 3, wherein the first filter is coupled to the first tunable qubit via a first coupling element, and the first resonator is coupled to the first filter via a second coupling element.

7. The quantum computing system of claim 6, wherein the first coupling element is a first capacitor and the second coupling element is a second capacitor.

8. The quantum computing system of claim 3, wherein the first coupling element is a first inductor and the second coupling element is a second inductor.

9. The quantum computing system of claim 3, wherein the first filter is coupled to a ground source and the first resonator is coupled to the ground source.

10. The quantum computing system of claim 3, wherein the first filter is a coplanar waveguide (CPW) filter, comprising CPW traces on the substrate.

11. The quantum computing system of claim 2, wherein the first resonator is a stripline resonator and the first dissipative element comprises a stripline trace on the substrate.

12. The quantum computing system of claim 2, wherein the first resonator is a microstrip resonator and the first dissipative element comprises a microstrip trace on the substrate.

13. The quantum computing system of claim 1, wherein the first dissipative element comprises a lossy dielectric material deposited on the substrate.

14. The quantum computing system of claim 1, wherein the first dissipative element comprises a metal resistor, the metal resistor being incorporated in a metallization layer on the substrate.

15. The quantum computing system of claim 1, wherein the integrated circuit further comprises: A set of tunable qubits, wherein the set of tunable qubits includes at least a first tunable qubit and a second tunable qubit; A set of coupling channels, the set of coupling channels including at least a first coupling channel and a second coupling channel, wherein the first tunable qubit is coupled to the first dissipative element via the first coupling channel; as well as A set of dissipative elements, the set of dissipative elements including at least a first dissipative element and a second dissipative element, the second dissipative element being coupled to a second tunable qubit via a second coupling channel, wherein each tunable qubit in the set of tunable qubits is coupled to a separate dissipative element in the set of tunable elements via a separate coupling channel in the set of tunable elements, such that the tendency for crosstalk between the coupling channels in the set of tunable qubits is reduced.

16. The quantum computing system of claim 1, wherein the first tunable qubit is a measurement qubit included in the logical qubits of the quantum error correction (QEC) code of the quantum computing system.

17. The quantum computing system of claim 1, wherein the first tunable qubit is a transmon qubit with a superconducting loop, the first flux value includes a first magnetic flux through the superconducting loop, and the second flux value includes a second magnetic flux through the superconducting loop.

18. The quantum computing system of claim 1, wherein the first flux value is associated with a first frequency band corresponding to one or more quantum computing operations, and the second flux value is associated with a second frequency band corresponding to a readout operation of the first tunable qubit, and the first center frequency of the first frequency band is greater than the second center frequency of the second frequency band.

19. The quantum computing system of claim 18, wherein the first frequency band includes frequencies between about 4.7 GHz and about 5.3 GHz, and the second frequency band includes frequencies between about 3.9 GHz and about 4.0 GHz.

20. An integrated circuit, comprising: Substrate; A first tunable qubit is formed on the substrate, wherein when the first tunable qubit is tuned to a first flux value, the integrated circuit is enabled to perform one or more quantum computing operations on a set of quantum states of the first tunable qubit, the set of quantum states including at least a ground state and one or more excited states; A first dissipative element, formed on the substrate and coupled to the first tunable qubit, wherein when the first tunable qubit is tuned to a second flux value, the first tunable qubit is enabled to transfer energy associated with the one or more excited states from the first tunable qubit to the first dissipative element, such that the first tunable qubit transitions to the ground state and the first dissipative element is enabled to dissipate the energy associated with the one or more excited states to a portion of the substrate.

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