Semiconductor warping parameter acquisition method and related equipment

Abstract

The embodiment of the invention provides a semiconductor warping parameter acquisition method and related equipment, and belongs to the technical field of optical measurement. According to the embodiment of the invention, the method comprises the steps: obtaining a three-dimensional coordinate data point cloud of the upper surface of a to-be-measured semiconductor at a target temperature when the to-be-measured semiconductor is placed in a temperature control box; performing plane fitting on the three-dimensional coordinate data point cloud by adopting a least square method to obtain a fitting plane; respectively acquiring the nearest distance value between the measuring point in the upper surface and the fitting plane; and determining a warping parameter of the semiconductor to be detected based on a maximum value and a minimum value in the nearest distance values. According to the embodiment of the invention, the fitting plane is generated through the three-dimensional coordinate data point cloud, and the calculation of the warping parameter is realized based on the distance value between the measurement point and the fitting plane, so that the objective and quantitative evaluation of warping is realized, a high-precision data source which can be directly used for production judgment is provided for the warping control of the semiconductor packaging process, and the production efficiency is improved. The method is highly practical and can be easily integrated into an automatic detection system.

Description

Technical Field

[0001] This application relates to the field of optical measurement technology, and in particular to a method and related equipment for obtaining semiconductor warp parameters. Background Technology

[0002] In the field of advanced semiconductor packaging, chip warpage is one of the core challenges affecting yield and reliability. During the thermal cycling of processes such as reflow soldering, the packaging structure generates internal stress due to the mismatch of thermal expansion coefficients between multiple layers of materials, which in turn causes warpage. Excessive warpage can lead to serious problems such as chip cracking and connection loss. As chip size increases and thickness decreases, accurate measurement of this deformation becomes crucial.

[0003] Currently, the chip warpage measurement methods widely used in the industry mainly include traditional methods such as laser contour scanning and white light interferometers. These traditional methods all have significant limitations and are difficult to capture dynamic thermal warpage in actual processes.

[0004] In summary, the technical problems existing in the relevant technologies need to be improved. Summary of the Invention

[0005] The main objective of this application is to provide a method and related equipment for obtaining semiconductor warp parameters.

[0006] To achieve the above objectives, one aspect of this application proposes a method for obtaining semiconductor warpage parameters, the method comprising: When the semiconductor under test is placed in the temperature control chamber, the three-dimensional coordinate point cloud of the upper surface of the semiconductor under test at the target temperature is acquired; The least squares method is used to perform plane fitting on the three-dimensional coordinate data point cloud to obtain the fitting plane; Obtain the nearest distance between the measurement point on the upper surface and the fitting plane; The warpage parameters of the semiconductor under test are determined based on the maximum and minimum values ​​of the nearest distance values.

[0007] In some embodiments, acquiring the three-dimensional coordinate point cloud data of the upper surface of the semiconductor under test at a target temperature includes: Acquire a calibration image of the upper surface of the semiconductor under test at a standard temperature, and calibration coordinate data of the upper surface of the semiconductor under test. Acquire a target image of the semiconductor under test, including the upper surface of the semiconductor under test, at a target temperature; Based on the deformation of the target image relative to the calibration image and the calibration coordinate data, the three-dimensional coordinate point cloud of the upper surface of the semiconductor under test at the target temperature is determined.

[0008] In some embodiments, after performing plane fitting on the three-dimensional coordinate data point cloud using the least squares method to obtain the fitting plane, the method further includes: Determine the rotation matrix based on the rotation relationship between the fitted plane and the unit normal vector; Based on the rotation matrix, the three-dimensional coordinate data point cloud is rotated until the fitting plane is parallel to the horizontal plane, and the rotated three-dimensional coordinate data point cloud is determined.

[0009] In some embodiments, after acquiring the three-dimensional coordinate point cloud data of the upper surface of the semiconductor under test at a target temperature, the method further includes: Determine the two diagonals on the upper surface of the semiconductor under test, and determine the starting point of each diagonal; Determine multiple points along each diagonal; Obtain the distance between each of the points and the starting point; Determine the height value of each point from the three-dimensional coordinate data point cloud; A curve is created based on the distance between the points and the height of the points; The warpage parameters of the semiconductor under test are determined by the curve.

[0010] In some embodiments, the target temperature is in the range of -60°C to 150°C.

[0011] To achieve the above objectives, another aspect of this application provides a semiconductor warpage parameter acquisition system, the system comprising: The system includes at least two industrial cameras, at least two light sources, a temperature control box, and a controller. The controller is connected to the light sources, the industrial cameras, and the temperature control box, respectively. The temperature control box has a viewing window. The target semiconductor is fixed in the temperature-controlled chamber. The controller controls the light source to illuminate the upper surface of the target semiconductor through the viewing window. The controller also controls the industrial camera to photograph the upper surface of the target semiconductor through the viewing window. The controller controls the internal temperature of the temperature-controlled chamber. When the semiconductor under test is placed in the temperature-controlled chamber, the controller acquires a three-dimensional coordinate point cloud of the upper surface of the semiconductor under test at a target temperature. The three-dimensional coordinate point cloud is fitted with a plane using the least squares method to obtain a fitted plane. The nearest distance between the measurement point on the upper surface and the fitted plane is obtained. Based on the maximum and minimum values ​​of the nearest distance, the warpage parameter of the semiconductor under test is determined.

[0012] In some embodiments, the viewing window of the temperature control box is provided with at least four or five layers of glass.

[0013] To achieve the above objectives, another aspect of this application provides a semiconductor warpage parameter acquisition device, the device comprising: The acquisition module is used to acquire the three-dimensional coordinate point cloud of the upper surface of the semiconductor under test at the target temperature when the semiconductor under test is placed in the temperature control chamber; The fitting module is used to perform plane fitting on the three-dimensional coordinate data point cloud using the least squares method to obtain the fitting plane; The calculation module is used to obtain the nearest distance value between the measurement point on the upper surface and the fitting plane, respectively; A determination module is used to determine the warpage parameters of the semiconductor under test based on the maximum and minimum values ​​among the nearest distance values.

[0014] To achieve the above objectives, another aspect of this application provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the method described above.

[0015] To achieve the above objectives, another aspect of the embodiments of this application proposes a computer-readable storage medium storing a computer program that, when executed by a processor, implements the methods described above.

[0016] To achieve the above objectives, another aspect of the embodiments of this application proposes a computer program product, including a computer program that, when executed by a processor, implements the aforementioned method.

[0017] The embodiments of this application include at least the following beneficial effects: This application provides a method, apparatus, electronic device, storage medium, and program product for obtaining semiconductor warpage parameters. This solution acquires a three-dimensional coordinate point cloud of the upper surface of the semiconductor under test at a target temperature when the semiconductor under test is placed in a temperature-controlled chamber; performs plane fitting on the three-dimensional coordinate point cloud using the least squares method to obtain a fitting plane; obtains the nearest distance values ​​between the measurement points on the upper surface and the fitting plane; and determines the warpage parameters of the semiconductor under test based on the maximum and minimum values ​​of the nearest distance values. The embodiments of this application generate a fitting plane through a three-dimensional coordinate point cloud and calculate the warpage parameters based on the distance values ​​between the measurement points and the fitting plane, achieving an objective and quantitative evaluation of warpage. This provides a high-precision data source that can be directly used for production judgment in semiconductor packaging process warpage control, possessing strong practicality and easy integration into automated testing systems. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the semiconductor warp parameter acquisition system provided in an embodiment of this application; Figure 2 A flowchart of the semiconductor warpage parameter acquisition method provided in this application embodiment; Figure 3 This is a three-dimensional schematic diagram of the diagonal curve provided in the embodiments of this application; Figure 4 This is a side view of the diagonal curve provided in an embodiment of this application; Figure 5 This is a schematic diagram of the semiconductor warp parameter acquisition device provided in the embodiments of this application; Figure 6 This is a schematic diagram of the hardware structure of the electronic device provided in the embodiments of this application. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit it. In the following description, when referring to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with those of this application; they are merely examples of apparatuses and methods consistent with some aspects of the embodiments of this application as detailed in the appended claims.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0021] The semiconductor warpage parameter acquisition method provided in this application relates to the field of optical measurement technology. This method can be applied to a terminal, a server, or software running on either a terminal or server. The server can be configured as an independent physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server providing basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, CDN, and big data and artificial intelligence platforms. The server can also be a node server in a blockchain network. The software can be an application implementing the semiconductor warpage parameter acquisition method, but is not limited to the above forms.

[0022] This application can be used in a wide variety of general-purpose or special-purpose computer system environments or configurations. Examples include: personal computers, server computers, handheld or portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics devices, network PCs, minicomputers, mainframe computers, and distributed computing environments including any of the above systems or devices. This application can be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform specific tasks or implement specific abstract data types. This application can also be practiced in distributed computing environments where tasks are performed by remote processing devices connected via a communication network. In distributed computing environments, program modules can reside in local and remote computer storage media, including storage devices.

[0023] This application addresses the chip warpage problem caused by thermal stress during advanced semiconductor packaging by proposing a fully automated, high-precision, non-contact, and temperature-controlled method and system for acquiring warpage parameters. This solution deeply integrates optical three-dimensional measurement technology, temperature environment simulation technology, and data processing algorithms to achieve dynamic, full-field, and quantitative measurement of the warpage morphology of semiconductor devices under real process temperature conditions.

[0024] In semiconductor packaging processes, mismatches in the coefficients of thermal expansion between the chip, substrate, and packaging materials can generate internal stress during reflow soldering, thermal cycling tests, and other processes, leading to chip warping. Excessive warping can cause problems such as poor soldering between the chip and substrate, chip cracks or delamination, and electrical connection failures, ultimately resulting in decreased semiconductor reliability.

[0025] Traditional measurement methods, such as laser contour scanning and white light interferometers, can achieve high-precision topography measurement, but they generally have the following limitations: most traditional equipment is used for room temperature measurement, which makes it difficult to simulate temperature changes in real processes; point-by-point scanning is time-consuming and not suitable for online inspection; high-precision interferometers are expensive and sensitive to environmental vibrations; and most methods can only obtain local or static deformation data.

[0026] This solution achieves the following innovations by integrating a multi-view vision system, a temperature-controlled enclosure, and intelligent processing algorithms: The process temperature is simulated by a temperature control chamber ranging from -60℃ to 150℃, and the feasibility of optical measurement is ensured by a multi-layer window structure. The three-dimensional point cloud of the entire upper surface is acquired in one go by using structured light or speckle projection combined with binocular stereo vision. Based on the least squares method or robust fitting method, the warped reference surface is automatically identified and the warping parameters are calculated. Both the hardware and software support modular configuration and can be flexibly adjusted according to the size and accuracy requirements of the measured part.

[0027] This solution is applicable to chip warpage process monitoring and yield analysis; evaluation of the thermomechanical properties of substrates and packaging materials; thermal deformation testing of PCBs and flexible circuit boards; and research related to microelectronic packaging and thermodynamics.

[0028] This embodiment provides a method for obtaining semiconductor warpage parameters, with the structure as follows: Figure 1 As shown, it mainly includes: 1. Industrial cameras Quantity: At least two units, forming a binocular stereo vision system; three or four units can be selected to improve measurement coverage and accuracy. Type: Global shutter CMOS or CCD camera, with a resolution of no less than 5 megapixels; Frame rate: ≥ 30 fps, supports externally triggered synchronization; Lens: Telecentric lens; Installation location: The cameras are symmetrically arranged on both sides of the temperature control box to improve the accuracy of stereo matching.

[0029] 2. Light source and projection module Type: Laser speckle projector; Wavelength: 450nm±10nm, to reduce thermal radiation interference from the temperature control box glass window; Projection pattern: grid or random speckle, suitable for different surface reflectivities; Synchronization control: The trigger signals of the light source and the camera are precisely synchronized by the controller to ensure consistent image acquisition.

[0030] 3. Temperature control box Internal dimensions: can be customized according to the dimensions of the part being measured; Temperature range: -60℃ ~ +150℃, supports constant temperature and programmed heating / cooling; Temperature control accuracy: ±1℃; 4. View Window Structure Number of layers: at least four layers of optical glass, with a stabilizing gas filling the space between for thermal insulation; Optical correction: The window is designed with a parallel flat plate structure to reduce refractive distortion.

[0031] 5. Controller Hardware platform: Industrial PC or embedded industrial control computer, equipped with multiple I / O, GPIO and gigabit network ports; 6. Clamping mechanism: Used for stress-free fixation of semiconductor test pieces.

[0032] 7. System Integration and Communication Communication interfaces: The camera connects via GigE Vision or USB 3.0; the temperature control box communicates via RS485 or Ethernet. Synchronization signal: The controller sends a TTL trigger signal to synchronize all cameras and light sources; Data stream: Image data is transmitted to the controller memory in real time.

[0033] This embodiment eliminates the need for specialized low-temperature control chambers equipped with expensive, high-transmittance, heat-insulating windows required for traditional optical methods such as the shadow pattern method. Instead, it modifies a commercially available standard high and low temperature test chamber. An observation port is opened on the side of the chamber, and a hollow, multi-layered window composed of four to five layers of ordinary optical glass is installed. Vacuuming or filling the spaces between the layers with a dry, inert gas (such as argon) effectively isolates heat exchange between the inside and outside of the chamber, preventing condensation and frost formation on the outer wall at low temperatures, while also being significantly less expensive than specialized optical heat-insulating windows. The chamber temperature control range must cover -60℃ to 150℃, with a temperature control accuracy better than ±1℃, to meet semiconductor thermal testing standards.

[0034] Figure 2 This is an optional flowchart of the semiconductor warpage parameter acquisition method provided in the embodiments of this application. Figure 2 The method may include, but is not limited to, steps S101 to S106.

[0035] Step S201: When the semiconductor under test is placed in a temperature control chamber, acquire the three-dimensional coordinate point cloud of the upper surface of the semiconductor under test at the target temperature.

[0036] In some embodiments, step S201 specifically includes: Acquire a calibration image of the semiconductor under test at a standard temperature, including calibration coordinate data of the upper surface of the semiconductor under test; acquire a target image of the semiconductor under test at a target temperature, including the upper surface of the semiconductor under test; and determine the three-dimensional coordinate point cloud of the upper surface of the semiconductor under test at the target temperature based on the deformation of the target image compared to the calibration image and the calibration coordinate data.

[0037] At room temperature (e.g., 25°C), place the prepared speckled sample in a temperature-controlled chamber (without turning on the temperature control).

[0038] Using a high-precision planar calibration board (such as a checkerboard or dot array), the binocular camera is calibrated near the sample location to obtain the camera's intrinsic parameter matrix, distortion coefficients, and the rotation matrix R and translation vector between the two cameras.

[0039] A speckle image of the sample at a reference temperature was acquired as a reference image.

[0040] Set the target temperature inside the temperature control chamber, and the controller starts the temperature control program; after the temperature inside the chamber stabilizes (fluctuation < ±1℃), maintain this temperature for at least 30 seconds to ensure uniform semiconductor temperature. The controller synchronously triggers the light source to project a structured light pattern; the left and right cameras simultaneously acquire images.

[0041] Step S202: The least squares method is used to perform plane fitting on the three-dimensional coordinate data point cloud to obtain the fitting plane.

[0042] Divide the image into multiple non-overlapping or partially overlapping subsets (usually squares, such as 21×21 pixels).

[0043] For each subset, high-precision sub-pixel matching is performed between images from the left and right cameras, as well as between speckle images at different temperatures. An iterative algorithm based on the zero-mean normalized cross-correlation criterion is used to calculate the disparity and in-plane displacement of the center point of each subset.

[0044] Using the principles of stereo vision and calibration parameters, successfully matched pixel pairs are converted into three-dimensional spatial coordinates. For each temperature, a three-dimensional coordinate point cloud representing the overall topography of the sample's upper surface is generated.

[0045] Before performing plane fitting using 3D coordinate data point cloud, point cloud preprocessing is first performed. Specific steps may include: Outlier removal: A statistical filtering method is used to remove noise points whose average distance from neighboring points exceeds several times the standard deviation.

[0046] Data simplification: If the point cloud is too dense, voxel grid method can be used for downsampling to improve computational efficiency while ensuring accuracy.

[0047] For the preprocessed point cloud, the least squares method is used to fit an optimal plane. Step S203: Obtain the nearest distance between the measurement point on the upper surface and the fitting plane.

[0048] Step S204: Determine the warpage parameters of the semiconductor under test based on the maximum and minimum values ​​among the nearest distance values.

[0049] Calculate the distance from each point in the point cloud to the fitting plane; a negative value indicates which side of the fitting plane the point is located on.

[0050] The overall warpage of a sample is defined as the maximum height difference of the undulations on the sample surface, and is a key macroscopic parameter for evaluating the degree of warpage.

[0051] In some embodiments, the refractive index of the multilayer glass of the temperature control chamber window undergoes a slight change when the temperature changes drastically (especially from room temperature to low temperatures), and may also deform slightly due to stress. This causes a systematic shift in the optical path through which the image is formed, which manifests in the measurement results as a non-physical overall rotation or translation of the entire reconstructed 3D point cloud. The fitted plane of the uncorrected point cloud is not horizontal.

[0052] During point cloud correction, a correction algorithm based on the Rodrigues rotation formula can be used to calculate the unit normal vector of the fitted plane. Ideally, if the sample has no warping and no systematic errors, its surface should be parallel to the horizontal plane. Therefore, the target normal vector is set as the Z-axis unit vector of the world coordinate system, n_target = (0, 0, 1).

[0053] The rotation axis k is determined by the unit vector and the unit normal vector, and these are normalized.

[0054] The rotation angle θ is determined by the dot product of the unit vector and the unit normal vector.

[0055] Based on the Rodriguez rotation formula, a rotation matrix is ​​constructed to rotate the unit vector to the unit normal vector: the rotation matrix is ​​applied to each point in the original point cloud to obtain the corrected point cloud.

[0056] To make the data more intuitive, the center or a corner point of the corrected point cloud can be shifted to near the origin. The corrected point cloud and the fitted plane are then aligned to a horizontal plane, eliminating optical biases caused by the temperature chamber.

[0057] In the corrected point cloud, the chip boundary is automatically determined based on the X and Y coordinates: min_x = min(x_i), max_x = max(x_i) min_y = min(y_i), max_y = max(y_i) This defines the four virtual corner points of the chip: C1 = (min_x, min_y); C2 = (max_x, min_y); C3 = (max_x, max_y); C4 = (min_x, max_y) Define two key diagonals that characterize the warpage morphology of a chip: Diagonal D1: from C1 (min_x, min_y) to C3 (max_x, max_y).

[0058] Diagonal D2: from C2 (max_x, min_y) to C4 (min_x, max_y).

[0059] Diagonal D1 is represented as a line segment from the starting point C1 to the ending point C3. Since the original point cloud is irregularly distributed, to obtain continuous and uniform height information along the diagonal, we first use the point cloud projection data onto the XY plane and construct a continuous function z = f(x, y) about the distance from position (x, y) to height z using cubic spline interpolation. Starting from the starting point C1, a series of continuous sampling points S_j, j=1,...,100, are generated along the diagonal D1 with a fixed step size (e.g., to make the total number of sampling points reach 100). The cumulative distance L_j from each sampling point to the starting point C1 is calculated. Using the interpolation function f(x, y), the height value H_j corresponding to each sampling point S_j is obtained. The "distance-height" curve of diagonal D1 is plotted with the cumulative distance L_j as the x-axis and the height value H_j as the y-axis (see 3D diagram). Figure 3 As shown, the side view is as follows Figure 4 (As shown). Repeat this process to generate the curve with diagonal D2.

[0060] A U-shaped curve (high at both ends and low in the middle) is typically a "smiling" warp; a ∩-shaped curve (low at both ends and high in the middle) is a "crying face" warp; and an S-shaped curve indicates complex distortion. Specific parameters such as the diagonal warp amount (the height difference between the highest and lowest points of the curve) and the radius of curvature can be directly read from the curve, providing precise input for process optimization.

[0061] Please see Figure 5 This application also provides a semiconductor warpage parameter acquisition device, which can implement the above-described method. The device includes: The acquisition module 51 is used to acquire the three-dimensional coordinate point cloud of the upper surface of the semiconductor under test at the target temperature when the semiconductor under test is placed in the temperature control chamber. Fitting module 52 is used to perform plane fitting on the three-dimensional coordinate data point cloud using the least squares method to obtain the fitting plane; Calculation module 53 is used to obtain the nearest distance value between the measurement point on the upper surface and the fitting plane respectively; The determination module 54 is used to determine the warpage parameters of the semiconductor under test based on the maximum and minimum values ​​among the nearest distance values.

[0062] In some embodiments, the acquisition module 51 is used for: Acquire a calibration image of the upper surface of the semiconductor under test at a standard temperature, and calibration coordinate data of the upper surface of the semiconductor under test. Acquire a target image of the semiconductor under test, including the upper surface of the semiconductor under test, at a target temperature; Based on the deformation of the target image relative to the calibration image and the calibration coordinate data, the three-dimensional coordinate point cloud of the upper surface of the semiconductor under test at the target temperature is determined.

[0063] In some embodiments, the calculation module 53 is configured to: Determine the rotation matrix based on the rotation relationship between the fitted plane and the unit normal vector; Based on the rotation matrix, the three-dimensional coordinate data point cloud is rotated until the fitting plane is parallel to the horizontal plane, and the rotated three-dimensional coordinate data point cloud is determined.

[0064] In some embodiments, the determining module 54 is configured to: Determine the two diagonals on the upper surface of the semiconductor under test, and determine the starting point of each diagonal; Determine multiple points along each diagonal; Obtain the distance between each of the points and the starting point; Determine the height value of each point from the three-dimensional coordinate data point cloud; A curve is created based on the distance between the points and the height of the points; The warpage parameters of the semiconductor under test are determined by the curve.

[0065] In some embodiments, the target temperature is in the range of -60°C to 150°C.

[0066] It is understood that the content of the above method embodiments is applicable to the present device embodiments. The specific functions implemented by the present device embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0067] This application also provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the above-described method. This electronic device can be any smart terminal, including tablet computers, in-vehicle computers, etc.

[0068] It is understood that the content of the above method embodiments is applicable to this device embodiment. The specific functions implemented by this device embodiment are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0069] Please see Figure 6 , Figure 6 The hardware structure of an electronic device according to another embodiment is illustrated. The electronic device includes: The processor 601 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application. The memory 602 can be implemented as a read-only memory (ROM), a static storage device, a dynamic storage device, or a random access memory (RAM). The memory 602 can store the operating system and other applications. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 602 and is called and executed by the processor 601 using the methods described in the embodiments of this application. The input / output interface 603 is used to implement information input and output; The communication interface 604 is used to enable communication and interaction between this device and other devices. Communication can be achieved through wired means (such as USB, network cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.). Bus 605 transmits information between various components of the device (e.g., processor 601, memory 602, input / output interface 603, and communication interface 604); The processor 601, memory 602, input / output interface 603, and communication interface 604 are connected to each other within the device via bus 605.

[0070] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described method.

[0071] It is understood that the content of the above method embodiments is applicable to this storage medium embodiment. The specific functions implemented in this storage medium embodiment are the same as those in the above method embodiments, and the beneficial effects achieved are also the same as those achieved in the above method embodiments.

[0072] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described method.

[0073] It is understood that the content of the above method embodiments is applicable to the embodiments of this program product. The specific functions implemented by the embodiments of this program product are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0074] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0075] The semiconductor warpage parameter acquisition method, system, apparatus, and electronic device provided in this application acquire three-dimensional coordinate point cloud data of the upper surface of the semiconductor under test at a target temperature while the semiconductor under test is placed in a temperature-controlled chamber; perform plane fitting on the three-dimensional coordinate point cloud data using the least squares method to obtain a fitting plane; obtain the nearest distance values ​​between the measurement points on the upper surface and the fitting plane; and determine the warpage parameters of the semiconductor under test based on the maximum and minimum values ​​of the nearest distance values. This application generates a fitting plane from the three-dimensional coordinate point cloud data and calculates the warpage parameters based on the distance values ​​between the measurement points and the fitting plane, achieving objective and quantitative evaluation of warpage. It provides a high-precision data source that can be directly used for production judgment in semiconductor packaging process warpage control, possesses strong practicality, and is easy to integrate into automated testing systems.

[0076] The embodiments described in this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided by the embodiments of this application. As those skilled in the art will know, with the evolution of technology and the emergence of new application scenarios, the technical solutions provided by the embodiments of this application are also applicable to similar technical problems.

[0077] Those skilled in the art will understand that the technical solutions shown in the figures do not constitute a limitation on the embodiments of this application, and may include more or fewer steps than shown, or combine certain steps, or different steps.

[0078] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0079] Those skilled in the art will understand that all or some of the steps in the methods disclosed above, as well as the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0080] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0081] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0082] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0083] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0084] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0085] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes multiple instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing programs, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0086] The preferred embodiments of the present application have been described above with reference to the accompanying drawings, but this does not limit the scope of the claims of the present application. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and substance of the embodiments of the present application shall be within the scope of the claims of the present application.

Claims

1. A method for obtaining semiconductor warpage parameters, characterized in that, The method includes: When the semiconductor under test is placed in the temperature control chamber, the three-dimensional coordinate point cloud of the upper surface of the semiconductor under test at the target temperature is acquired; The least squares method is used to perform plane fitting on the three-dimensional coordinate data point cloud to obtain the fitting plane; Obtain the nearest distance between the measurement point on the upper surface and the fitting plane; The warpage parameters of the semiconductor under test are determined based on the maximum and minimum values ​​of the nearest distance values.

2. The method according to claim 1, characterized in that, The step of acquiring the three-dimensional coordinate point cloud data of the upper surface of the semiconductor under test at the target temperature includes: Acquire a calibration image of the upper surface of the semiconductor under test at a standard temperature, and calibration coordinate data of the upper surface of the semiconductor under test. Acquire a target image of the semiconductor under test, including the upper surface of the semiconductor under test, at a target temperature; Based on the deformation of the target image relative to the calibration image and the calibration coordinate data, the three-dimensional coordinate point cloud of the upper surface of the semiconductor under test at the target temperature is determined.

3. The method according to claim 1, characterized in that, After performing plane fitting on the three-dimensional coordinate data point cloud using the least squares method to obtain the fitting plane, the method further includes: Determine the rotation matrix based on the rotation relationship between the fitted plane and the unit normal vector; Based on the rotation matrix, the three-dimensional coordinate data point cloud is rotated until the fitting plane is parallel to the horizontal plane, and the rotated three-dimensional coordinate data point cloud is determined.

4. The method according to claim 1, characterized in that, After acquiring the three-dimensional coordinate point cloud data of the upper surface of the semiconductor under test at the target temperature, the method further includes: Determine the two diagonals on the upper surface of the semiconductor under test, and determine the starting point of each diagonal; Determine multiple points along each diagonal; Obtain the distance between each of the points and the starting point; Determine the height value of each point from the three-dimensional coordinate data point cloud; A curve is created based on the distance between the points and the height of the points; The warpage parameters of the semiconductor under test are determined by the curve.

5. The method according to claim 1, characterized in that, The target temperature is in the range of -60℃ to 150℃.

6. A semiconductor warpage parameter acquisition system, characterized in that, include: The system includes at least two industrial cameras, at least two light sources, a temperature control box, and a controller. The controller is connected to the light sources, the industrial cameras, and the temperature control box, respectively. The temperature control box has a viewing window. The target semiconductor is fixed in the temperature-controlled chamber. The controller controls the light source to illuminate the upper surface of the target semiconductor through the viewing window. The controller also controls the industrial camera to photograph the upper surface of the target semiconductor through the viewing window. The controller controls the internal temperature of the temperature-controlled chamber. When the semiconductor under test is placed in the temperature-controlled chamber, the controller acquires a three-dimensional coordinate point cloud of the upper surface of the semiconductor under test at a target temperature. The least squares method is used to perform plane fitting on the three-dimensional coordinate point cloud to obtain a fitted plane. The nearest distance between the measurement point on the upper surface and the fitted plane is then obtained. The warpage parameters of the semiconductor under test are determined based on the maximum and minimum values ​​of the nearest distance values.

7. The system according to claim 6, characterized in that, The temperature control box has at least four or five layers of glass in its viewing window.

8. A semiconductor warp parameter acquisition device, characterized in that, The device includes: The acquisition module is used to acquire the three-dimensional coordinate point cloud of the upper surface of the semiconductor under test at the target temperature when the semiconductor under test is placed in the temperature control chamber; The fitting module is used to perform plane fitting on the three-dimensional coordinate data point cloud using the least squares method to obtain the fitting plane; The calculation module is used to obtain the nearest distance value between the measurement point on the upper surface and the fitting plane, respectively; A determination module is used to determine the warpage parameters of the semiconductor under test based on the maximum and minimum values ​​among the nearest distance values.

9. An electronic device, characterized in that, The electronic device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the method according to any one of claims 1 to 5.

10. A computer-readable storage medium storing a computer program that, when executed by a processor, implements the method of any one of claims 1 to 5.

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