Upf file generation method, device, storage medium and program product

Abstract

This application relates to a method, apparatus, storage medium, and program product for generating UPF files, and pertains to the field of artificial intelligence chips. The method includes: obtaining a cross-domain signal analysis report of a chip containing multiple functional modules; the cross-domain signal analysis report includes at least one cross-domain signal of the chip and the signal type to which each cross-domain signal belongs; for each cross-domain signal, obtaining a UPF generation table for the functional module to which the cross-domain signal belongs; the UPF generation table includes low-power information of the functional module to which the cross-domain signal belongs; and executing a pre-written UPF generation script, such that the UPF generation script generates a UPF file for the functional module to which the cross-domain signal belongs, based on the UPF generation table of the functional module to which the cross-domain signal belongs, and according to the UPF syntax corresponding to the signal type of the cross-domain signal. This method can improve the efficiency of UPF file generation.

Description

Technical Field

[0001] This application relates to the field of artificial intelligence chips, and in particular to a method, apparatus, storage medium, and program product for generating UPF files. Background Technology

[0002] In the low-power design flow of modern VLSI (Very Large Scale Integration), a hierarchical design approach is widely adopted. Under this methodology, a complex chip consists of multiple functionally independent lower-level blocks. When a lower-level block is designed as a single power domain, logic units such as level shifters for communication between different voltage domains and isolation cells for power gating are typically inserted at the physical boundaries of these blocks.

[0003] In traditional technologies, generating UPF files mainly relies on manual writing. Manually writing UPF commands requires a significant investment of manpower and time, resulting in low efficiency in UPF file generation. This problem is particularly pronounced in complex designs with a large number of modules. Summary of the Invention

[0004] Therefore, it is necessary to provide a UPF file generation method, device, storage medium, and program product that can improve the efficiency of UPF file generation in response to the above-mentioned technical problems.

[0005] Firstly, this application provides a method for generating UPF files, the method comprising:

[0006] Obtain a cross-domain signal analysis report for a chip containing multiple functional modules; the cross-domain signal analysis report includes at least one cross-domain signal of the chip and the signal type to which each cross-domain signal belongs;

[0007] For each cross-domain signal, obtain the UPF generation table of the functional module to which the cross-domain signal belongs; the UPF generation table contains low power information of the functional module to which the cross-domain signal belongs;

[0008] Execute a pre-written UPF generation script so that the UPF generation script generates a UPF file for the functional module to which the cross-domain signal belongs, based on the UPF generation table of the functional module to which the cross-domain signal belongs and in accordance with the UPF syntax corresponding to the signal type to which the cross-domain signal belongs.

[0009] In one embodiment, obtaining a cross-domain signal analysis report of a chip containing multiple functional modules includes:

[0010] Obtain the full chip data constraint file; the full chip data constraint file records the connection relationships between the top layer of the chip and each functional module, as well as the source and load ends of each port between different functional modules;

[0011] Obtain the power domain mapping script file; the power domain mapping script file defines the power domain corresponding to each functional module in the chip;

[0012] Execute a pre-written report generation script to generate a cross-domain signal analysis report for the chip based on the full-chip data constraint file and the power domain mapping script file.

[0013] In one embodiment, executing a pre-written report generation script to generate a cross-domain signal analysis report for the chip based on the full-chip data constraint file and the power domain mapping script file includes:

[0014] For each port signal of the chip, a pre-written report generation script is executed, such that the report generation script, based on the full chip data constraint file, determines the driving source module and the load module of the port signal in the chip; the driving source module and the load module are one of the functional modules of the chip;

[0015] Based on the power domain mapping script file, the source power domain of the driver source module and the load power domain of the load module are determined.

[0016] If the operating voltages of the source power domain and the load power domain are different, then the port signal is determined to be a cross-domain signal, and the signal type of the cross-domain signal is a level conversion type.

[0017] If the source power domain is a domain that can be powered off, and the load power domain is a normally open domain, then the port signal is determined to be a cross-domain signal, and the signal type of the cross-domain signal is a signal isolation type.

[0018] Based on the signal type of each cross-domain signal in the chip, a cross-domain signal analysis report of the chip is generated.

[0019] In one embodiment, obtaining the full-chip data constraint file includes:

[0020] Obtain the original register transfer level design file of the chip;

[0021] Based on the original register transfer level design file, obtain a target register transfer level design file that only contains the port definitions of the functional modules in the chip;

[0022] Based on the original register transfer level design file and the target register transfer level design file, the functional modules of the chip are assembled in an EDA tool to obtain a full chip data constraint file.

[0023] In one embodiment, obtaining a target register transfer level design file containing only the port definitions of the functional modules in the chip, based on the original register transfer level design file, includes:

[0024] Execute a pre-written design file processing script to remove all logical function descriptions from the original register transfer level design file except for the port definitions of the functional modules in the chip, resulting in a target register transfer level design file that contains only the port definitions of the functional modules in the chip.

[0025] In one embodiment, obtaining the UPF generation table of the functional module to which the cross-domain signal belongs for each cross-domain signal includes:

[0026] Obtain a predefined UPF template table;

[0027] For each cross-domain signal, in response to a low-power information input operation for the functional module to which the cross-domain signal belongs, the low-power information indicated by the low-power information input operation is imported into the UPF generation template table to obtain the UPF generation table of the functional module to which the cross-domain signal belongs.

[0028] In one embodiment, executing a pre-written UPF generation script, such that the UPF generation script generates a UPF file for the functional module to which the cross-domain signal belongs, based on the UPF generation table of the functional module to which the cross-domain signal belongs and according to the UPF syntax corresponding to the signal type to which the cross-domain signal belongs, includes:

[0029] Execute a pre-written UPF generation script so that the UPF generation script generates the basic UPF command of the functional module to which the cross-domain signal belongs, based on the UPF generation table of the functional module to which the cross-domain signal belongs;

[0030] Based on the aforementioned basic UPF commands, construct the internal power system of the functional module to which the cross-domain signal belongs;

[0031] Based on the internal power system, and according to the UPF syntax corresponding to the signal type of the cross-domain signal, generate the signal level UPF command of the functional module to which the cross-domain signal belongs;

[0032] The basic UPF command and the signal-level UPF command are combined to obtain the UPF file of the functional module to which the cross-domain signal belongs.

[0033] Secondly, this application provides a UPF file generation apparatus, the apparatus comprising:

[0034] An acquisition module is used to acquire a cross-domain signal analysis report of a chip containing multiple functional modules; the cross-domain signal analysis report contains at least one cross-domain signal of the chip and the signal type to which each cross-domain signal belongs; for each cross-domain signal, an UPF generation table of the functional module to which the cross-domain signal belongs is acquired; the UPF generation table contains low power information of the functional module to which the cross-domain signal belongs;

[0035] The generation module is used to execute a pre-written UPF generation script, so that the UPF generation script generates a UPF file of the functional module to which the cross-domain signal belongs, based on the UPF generation table of the functional module to which the cross-domain signal belongs.

[0036] Thirdly, this application provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the various method embodiments of this application.

[0037] Fourthly, this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps in the various method embodiments of this application.

[0038] Fifthly, this application provides a computer program product, including a computer program that, when executed by a processor, implements the steps in the various method embodiments of this application.

[0039] The aforementioned UPF file generation method, device, storage medium, and program product obtain a cross-domain signal analysis report for a chip containing multiple functional modules. The cross-domain signal analysis report includes at least one cross-domain signal of the chip and the signal type of each cross-domain signal. For each cross-domain signal, a UPF generation table for the functional module to which the cross-domain signal belongs is obtained. The UPF generation table contains low-power information of the functional module to which the cross-domain signal belongs. A pre-written UPF generation script is executed, so that the UPF generation script generates a UPF file for the functional module to which the cross-domain signal belongs, based on the UPF generation table of the functional module and according to the UPF syntax corresponding to the signal type of the cross-domain signal. Compared to the traditional method of manually writing UPF files, this application modularizes and parameterizes the low-power design intent within the functional modules to form a UPF generation table. By executing the UPF generation script to call the UPF generation table and the cross-domain signal analysis report, the UPF file is automatically generated, reducing manpower and time costs and improving the efficiency of UPF file generation. This is especially true in complex designs with a large number of modules, where the efficiency of UPF file generation can be significantly improved. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 This is a diagram illustrating the application environment of a UPF file generation method in one embodiment.

[0042] Figure 2 This is a flowchart illustrating a UPF file generation method in one embodiment;

[0043] Figure 3 This is a flowchart illustrating the UPF file generation method in another embodiment;

[0044] Figure 4 This is a structural block diagram of a UPF file generation device in one embodiment;

[0045] Figure 5 This is an internal structural diagram of a computer device in one embodiment;

[0046] Figure 6 This is a diagram of the internal structure of a computer device in another embodiment. Detailed Implementation

[0047] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0048] The UPF file generation method provided in this application can be applied to, for example... Figure 1In the application environment shown, terminal 102 communicates with server 104 via a network. The data storage system can be set up independently and can store the data that server 104 needs to process. The data storage system can be integrated onto server 104 or placed on the cloud or other servers. Terminal 102 can be, but is not limited to, various desktop computers, laptops, smartphones, and tablets. Server 104 can be a standalone physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server providing cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, cloud security, host security and other network security services, CDN, and basic cloud computing services such as big data and artificial intelligence platforms. Terminal 102 and server 104 can be directly or indirectly connected via wired or wireless communication; this application does not impose any restrictions.

[0049] Terminal 102 can obtain a cross-domain signal analysis report of a chip containing multiple functional modules; the cross-domain signal analysis report contains at least one cross-domain signal of the chip and the signal type to which each cross-domain signal belongs; for each cross-domain signal, obtain a UPF generation table of the functional module to which the cross-domain signal belongs; the UPF generation table contains low-power information of the functional module to which the cross-domain signal belongs; execute a pre-written UPF generation script so that the UPF generation script generates a UPF file of the functional module to which the cross-domain signal belongs based on the UPF generation table of the functional module to which the cross-domain signal belongs, according to the UPF syntax corresponding to the signal type to which the cross-domain signal belongs, and sends the UPF file to server 104 for storage.

[0050] It is understood that this embodiment does not limit this aspect. Figure 1 The application scenarios shown are for illustrative purposes only and are not limited to these.

[0051] In one embodiment, such as Figure 2 As shown, a method for generating UPF files is provided. This method can be applied to computer devices, which can be terminals or servers. That is, the method can be executed independently by the terminal or server, or it can be implemented through interaction between the terminal and the server. This embodiment illustrates the method applied to a computer device as an example, including the following steps:

[0052] Step 202: Obtain the cross-domain signal analysis report of the chip containing multiple functional modules; the cross-domain signal analysis report contains at least one cross-domain signal of the chip and the signal type to which each cross-domain signal belongs.

[0053] Cross-domain signals refer to port signals of functional modules (blocks) that span different power domains. Cross-domain signals fall into two signal types: level-shifting and signal isolation. Level-shifting cross-domain signals require level shifting, while signal-isolation cross-domain signals require signal isolation.

[0054] In one embodiment, a third-party device may send a cross-domain signal analysis report of a chip containing multiple functional modules to a computer device, and the computer device may receive the cross-domain signal analysis report.

[0055] Step 204: For each cross-domain signal, obtain the UPF generation table of the functional module to which the cross-domain signal belongs; the UPF generation table contains the low power information of the functional module to which the cross-domain signal belongs.

[0056] UPF (Unified Power Format) is a Tcl (tool command language)-based format defined by the IEEE standard (IEEE 1801) for describing the power intent of integrated circuits. It is widely used in various stages of low-power design, including functional verification, logic synthesis, and physical implementation, to define power domains, power networks, level shifters, isolation cells, and power states.

[0057] In one embodiment, low-power information includes, but is not limited to, power network definition, operating voltage, PST Table (Power State Table), and hardware macrocell connections.

[0058] In one embodiment, for each cross-domain signal, a third-party device may send a UPF generation table of the functional module to which the cross-domain signal belongs to a computer device, and the computer device may receive the UPF generation table of the functional module to which the cross-domain signal belongs.

[0059] Step 206: Execute the pre-written UPF generation script so that the UPF generation script generates the UPF file of the functional module to which the cross-domain signal belongs, based on the UPF generation table of the functional module to which the cross-domain signal belongs and according to the UPF syntax corresponding to the signal type to which the cross-domain signal belongs.

[0060] In one embodiment, for each cross-domain signal, the computer device can execute a pre-written UPF generation script, such that the UPF generation script generates UPF commands for the functional module to which the cross-domain signal belongs, based on the UPF generation table of the functional module to which the cross-domain signal belongs, and according to the UPF syntax corresponding to the signal type to which the cross-domain signal belongs, and imports the UPF commands into a pre-set blank document to form a UPF file for the functional module to which the cross-domain signal belongs.

[0061] The aforementioned UPF file generation method involves obtaining a cross-domain signal analysis report for a chip containing multiple functional modules. This report includes at least one cross-domain signal from the chip and the signal type of each cross-domain signal. For each cross-domain signal, a UPF generation table for the functional module to which the cross-domain signal belongs is obtained. The UPF generation table contains low-power information for the functional module. A pre-written UPF generation script is executed, which generates a UPF file for the functional module based on the UPF generation table and the UPF syntax corresponding to the signal type of the cross-domain signal. Compared to the traditional method of manually writing UPF files, this application modularizes and parameterizes the low-power design intent within the functional modules to form a UPF generation table. By executing the UPF generation script to call the UPF generation table and the cross-domain signal analysis report, the UPF file is automatically generated, reducing manpower and time costs and improving UPF file generation efficiency. This is particularly significant in complex designs with numerous modules.

[0062] In one embodiment, obtaining a cross-domain signal analysis report for a chip containing multiple functional modules includes: obtaining a full-chip data constraint file; the full-chip data constraint file records the connection relationships between the top layer of the chip and each functional module, as well as the source and load terminals of each port between different functional modules; obtaining a power domain mapping script file; the power domain mapping script file defines the power domain corresponding to each functional module in the chip; and executing a pre-written report generation script so that the report generation script generates a cross-domain signal analysis report for the chip based on the full-chip data constraint file and the power domain mapping script file.

[0063] In one embodiment, a third-party device may send a full-chip data constraint file (i.e., a full-chip ddc) to a computer device, and the computer device may receive the full-chip data constraint file.

[0064] In the above embodiments, compared with the traditional method of manually determining cross-domain signals and the signal type of each cross-domain signal to obtain a cross-domain signal analysis report, the embodiments of this application automatically determine the cross-domain signals and the signal type of each cross-domain signal by executing an automated report generation script, which can improve the generation efficiency of cross-domain signal analysis reports, thereby further improving the generation efficiency of UPF files.

[0065] In one embodiment, a pre-written report generation script is executed to generate a cross-domain signal analysis report for the chip based on a full-chip data constraint file and a power domain mapping script file. This includes: for each port signal of the chip, executing the pre-written report generation script to determine the driving source module and load module of the port signal in the chip based on the full-chip data constraint file; the driving source module and load module are one of the functional modules of the chip; determining the source power domain of the driving source module and the load power domain of the load module based on the power domain mapping script file; if the operating voltages of the source power domain and the load power domain are different, the port signal is determined to be a cross-domain signal, and the signal type of the cross-domain signal is a level conversion type; if the source power domain is a domain that can be de-energized and the load power domain is a normally open domain, the port signal is determined to be a cross-domain signal, and the signal type of the cross-domain signal is a signal isolation type; and generating a cross-domain signal analysis report for the chip based on the signal type of each cross-domain signal in the chip.

[0066] In one embodiment, for each port signal of the chip, the computer device can execute a pre-written report generation script. This script, based on the full chip data constraint file (full chip DDC), determines the driving source module and load module of the port signal within the chip. Based on the power domain mapping script file, it determines the source-side power domain (PD_source) of the driving source module and the load-side power domain (PD_load) of the load module. If PD_source ≠ PD_load, the port signal is determined to be a cross-domain signal. Further, if the operating voltages of PD_source and PD_load are different, the signal type of the cross-domain signal can be determined to be a level-shifting type, and it can be categorized into the "signals requiring level shifting set". If PD_source is a domain that can be de-energized, while PD_load is a normally open domain, the signal type of the cross-domain signal can be determined to be a signal isolation type, and it can be categorized into the "signals requiring signal isolation set". Based on the signal type of each cross-domain signal in the chip, a cross-domain signal analysis report for the chip is generated.

[0067] In the above embodiments, the driver source and load module of each port signal are accurately located through an automated report generation script. Based on the operating voltage and switching state of its power domain, the requirements for level conversion and signal isolation are automatically determined. The originally tedious and error-prone manual inspection is transformed into an efficient and traceable automated process, which significantly improves the accuracy and completeness of cross-domain signal analysis, improves the accuracy of UPF file generation, and provides a reliable data foundation for subsequent low-power design implementation.

[0068] In one embodiment, obtaining a full-chip data constraint file includes: obtaining the original register-transfer level design file of the chip; based on the original register-transfer level design file, obtaining a target register-transfer level design file that only contains port definitions of functional modules in the chip; and assembling the functional modules of the chip in an EDA tool according to the original register-transfer level design file and the target register-transfer level design file to obtain a full-chip data constraint file.

[0069] In one embodiment, the computer device can obtain the chip's original register-transfer level (RTL) design file. Based on the RTL design file, a target RTL design file containing only the port definitions of the functional modules in the chip is obtained. According to the original and target RTL design files, the functional modules of the chip are assembled (linked) in an EDA tool (such as DesignCompiler) to obtain the full chip data constraint file.

[0070] In the above embodiments, by extracting and reconstructing the register-transfer level design file of the entire chip, a complete port view of the functional modules was established, and EDA tools were used to assemble it into a full-chip data constraint file. This process automatically constructs the chip-level interconnection relationships and constraint framework, providing a reliable data foundation for subsequent cross-domain signal analysis and improving the automation level and data reliability of the design process.

[0071] In one embodiment, obtaining a target register transfer level design file containing only port definitions of functional modules in the chip, based on the original register transfer level design file, includes: executing a pre-written design file processing script to remove all logical function descriptions except for the port definitions of functional modules in the chip from the original register transfer level design file, thereby obtaining a target register transfer level design file containing only the port definitions of functional modules in the chip.

[0072] In the above embodiments, by using an automated design file processing script, the port definition files of the pure functional modules are precisely extracted from the original register transfer level design file. This ensures that the input data for subsequent assembly is concise and the objectives are clear, reducing design complexity and further improving the automation level of the process while also enhancing the reliability of the data preparation stage.

[0073] In one embodiment, for each cross-domain signal, obtaining the UPF generation table of the functional module to which the cross-domain signal belongs includes: obtaining a predefined UPF generation template table; for each cross-domain signal, in response to a low-power information input operation for the functional module to which the cross-domain signal belongs, importing the low-power information indicated by the low-power information input operation into the UPF generation template table to obtain the UPF generation table of the functional module to which the cross-domain signal belongs.

[0074] In the above embodiments, a template table is generated using UPF to collect low-power information of functional modules in a structured and standardized manner. This ensures that the content of the UPF generated table for each module to which the cross-domain signal belongs is complete and the format is uniform, providing high-quality and unambiguous input data for the subsequent automated generation of accurate UPF files that conform to the design intent, further improving the accuracy of UPF file generation.

[0075] In one embodiment, executing a pre-written UPF generation script to generate a UPF file for the functional module to which the cross-domain signal belongs, based on the UPF generation table of the functional module, includes: executing the pre-written UPF generation script to generate basic UPF commands for the functional module to which the cross-domain signal belongs, based on the UPF generation table of the functional module; constructing an internal power system for the functional module to which the cross-domain signal belongs based on the basic UPF commands; generating signal-level UPF commands for the functional module to which the cross-domain signal belongs according to the internal power system and the UPF syntax corresponding to the signal type to which the cross-domain signal belongs; and merging the basic UPF commands and the signal-level UPF commands to obtain the UPF file for the functional module to which the cross-domain signal belongs.

[0076] In one embodiment, the basic UPF commands may specifically be UPF commands such as create_power_domain, create_supply_port, create_supply_net, and set_supply_net.

[0077] In the above embodiments, an automated UPF generation script accurately converts the UPF generation table into basic UPF commands to construct the internal power system of the functional module. Then, based on the internal power system, commands for level conversion or isolation of cross-domain signals are generated, and finally, the UPF file is merged and output, which further improves the generation accuracy of the UPF file.

[0078] In one embodiment, such as Figure 3As shown, the original register-transfer level (RTL) design file of the chip is obtained; a pre-written design file processing script is executed to remove all logical function descriptions from the original RTL design file except for the port definitions of the functional modules in the chip, resulting in a target RTL design file containing only the port definitions of the functional modules in the chip. Based on the original and target RTL design files, the functional modules of the chip are assembled in an EDA tool to obtain the full chip data constraint file. Obtain the power domain mapping script file; for each port signal of the chip, execute the pre-written report generation script so that the report generation script, based on the full chip data constraint file, determines the driving source module and load module of the port signal in the chip; based on the power domain mapping script file, determine the source power domain of the driving source module and the load power domain of the load module; if the operating voltage of the source power domain and the load power domain are different, the port signal is determined to be a cross-domain signal, and the signal type of the cross-domain signal is a level conversion type; if the source power domain is a domain that can be de-energized and the load power domain is a normally open domain, the port signal is determined to be a cross-domain signal, and the signal type of the cross-domain signal is a signal isolation type; based on the signal type of each cross-domain signal in the chip, generate a cross-domain signal analysis report for the chip. Obtain a predefined UPF generation template table; for each cross-domain signal, in response to the low-power information input operation for the functional module to which the cross-domain signal belongs, import the low-power information indicated by the low-power information input operation into the UPF generation template table to obtain the UPF generation table of the functional module to which the cross-domain signal belongs. Execute a pre-written UPF generation script to generate basic UPF commands for the functional module to which the cross-domain signal belongs, based on the UPF generation table of the functional module. Based on the basic UPF commands, construct the internal power system of the functional module to which the cross-domain signal belongs. According to the internal power system, generate signal-level UPF commands for the functional module to which the cross-domain signal belongs, according to the UPF syntax corresponding to the signal type of the cross-domain signal. Merge the basic UPF commands and the signal-level UPF commands to obtain the UPF file of the functional module to which the cross-domain signal belongs.

[0079] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially, these steps are not necessarily executed in that order. Unless otherwise expressly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some of the steps in the above embodiments may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least a portion of the sub-steps or stages of other steps.

[0080] Based on the same inventive concept, this application also provides a UPF file generation apparatus for implementing the UPF file generation method described above. The solution provided by this apparatus is similar to the implementation described in the above method; therefore, the specific limitations in one or more UPF file generation apparatus embodiments provided below can be found in the limitations of the UPF file generation method described above, and will not be repeated here.

[0081] In one embodiment, such as Figure 4 As shown, a UPF file generation apparatus 400 is provided, which specifically includes:

[0082] The acquisition module 402 is used to acquire a cross-domain signal analysis report of a chip containing multiple functional modules; the cross-domain signal analysis report contains at least one cross-domain signal of the chip and the signal type to which each cross-domain signal belongs; for each cross-domain signal, the UPF generation table of the functional module to which the cross-domain signal belongs is acquired; the UPF generation table contains low power information of the functional module to which the cross-domain signal belongs.

[0083] The generation module 404 is used to execute a pre-written UPF generation script, so that the UPF generation script generates a UPF file of the functional module to which the cross-domain signal belongs, based on the UPF generation table of the functional module to which the cross-domain signal belongs, and according to the UPF syntax corresponding to the signal type to which the cross-domain signal belongs.

[0084] In one embodiment, the acquisition module 402 is further configured to acquire a full-chip data constraint file; the full-chip data constraint file records the connection relationships between the top layer of the chip and each functional module, as well as the source and load ends of each port between different functional modules; acquire a power domain mapping script file; the power domain mapping script file defines the power domain corresponding to each functional module in the chip; and execute a pre-written report generation script so that the report generation script generates a cross-domain signal analysis report of the chip based on the full-chip data constraint file and the power domain mapping script file.

[0085] In one embodiment, the acquisition module 402 is further configured to execute a pre-written report generation script for each port signal of the chip, such that the report generation script, based on the full-chip data constraint file, determines the driving source module and load module of the port signal in the chip; the driving source module and load module are one of the functional modules of the chip; based on the power domain mapping script file, it determines the source power domain of the driving source module and the load power domain of the load module; if the operating voltage of the source power domain and the load power domain are different, the port signal is determined to be a cross-domain signal, and the signal type of the cross-domain signal is a level conversion type; if the source power domain is a domain that can be de-energized and the load power domain is a normally open domain, the port signal is determined to be a cross-domain signal, and the signal type of the cross-domain signal is a signal isolation type; based on the signal type of each cross-domain signal in the chip, a cross-domain signal analysis report of the chip is generated.

[0086] In one embodiment, the acquisition module 402 is further configured to acquire the original register transfer level design file of the chip; based on the original register transfer level design file, acquire the target register transfer level design file containing only the port definitions of the functional modules in the chip; and assemble the functional modules of the chip in an EDA tool according to the original register transfer level design file and the target register transfer level design file to obtain the full chip data constraint file.

[0087] In one embodiment, the acquisition module 402 is further configured to execute a pre-written design file processing script, such that the design file processing script removes all logical function descriptions from the original register transfer level design file except for the port definitions of the functional modules in the chip, and obtains a target register transfer level design file that only contains the port definitions of the functional modules in the chip.

[0088] In one embodiment, the acquisition module 402 is further configured to acquire a predefined UPF generation template table; for each cross-domain signal, in response to a low-power information input operation for the functional module to which the cross-domain signal belongs, the low-power information indicated by the low-power information input operation is imported into the UPF generation template table to obtain the UPF generation table of the functional module to which the cross-domain signal belongs.

[0089] In one embodiment, the generation module 404 is further configured to execute a pre-written UPF generation script, such that the UPF generation script generates basic UPF commands for the functional module to which the cross-domain signal belongs, based on the UPF generation table of the functional module to which the cross-domain signal belongs; constructs the internal power system of the functional module to which the cross-domain signal belongs, based on the basic UPF commands; generates signal-level UPF commands for the functional module to which the cross-domain signal belongs, according to the UPF syntax corresponding to the signal type to which the cross-domain signal belongs, based on the internal power system; and merges the basic UPF commands and the signal-level UPF commands to obtain the UPF file of the functional module to which the cross-domain signal belongs.

[0090] The aforementioned UPF file generation apparatus acquires a cross-domain signal analysis report of a chip containing multiple functional modules. The cross-domain signal analysis report includes at least one cross-domain signal of the chip and the signal type of each cross-domain signal. For each cross-domain signal, a UPF generation table for the functional module to which the cross-domain signal belongs is acquired. The UPF generation table contains low-power information of the functional module to which the cross-domain signal belongs. A pre-written UPF generation script is executed, so that the UPF generation script generates a UPF file for the functional module to which the cross-domain signal belongs, based on the UPF generation table of the functional module and according to the UPF syntax corresponding to the signal type of the cross-domain signal. Compared to the traditional method of manually writing UPF files, this application modularizes and parameterizes the low-power design intent within the functional modules to form a UPF generation table. By executing the UPF generation script to call the UPF generation table and the cross-domain signal analysis report, the UPF file is automatically generated, reducing manpower and time costs and improving the efficiency of UPF file generation. Especially in complex designs with a large number of modules, the efficiency of UPF file generation can be significantly improved.

[0091] Each module in the aforementioned UPF file generation device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the operations corresponding to each module.

[0092] In one embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 5 As shown, this computer device includes a processor, memory, input / output interfaces (I / O), and a communication interface. The processor, memory, and I / O interfaces are connected via a system bus, and the communication interface is also connected to the system bus via the I / O interfaces. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and databases. The internal memory provides the environment for the operating system and computer programs stored in the non-volatile storage media to run. The I / O interfaces are used for exchanging information between the processor and external devices. The communication interface is used for communicating with external terminals via a network connection. When the computer program is executed by the processor, it implements a UPF file generation method.

[0093] In one embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as follows: Figure 6As shown, the computer device includes a processor, memory, input / output interfaces, a communication interface, a display unit, and an input device. The processor, memory, and input / output interfaces are connected via a system bus, and the communication interface, display unit, and input device are also connected to the system bus via the input / output interfaces. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The input / output interfaces are used for exchanging information between the processor and external devices. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, NFC (Near Field Communication), or other technologies. When executed by the processor, the computer program implements a UPF file generation method. The display unit of the computer device is used to form a visually visible image. It can be a display screen, a projection device, or a virtual reality imaging device. The display screen can be an LCD screen or an e-ink screen. The input device of the computer device can be a touch layer covering the display screen, or buttons, trackballs, or touchpads set on the casing of the computer device, or external keyboards, touchpads, or mice, etc.

[0094] Those skilled in the art will understand that Figure 5 and Figure 6 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0095] In one embodiment, a computer device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above method embodiments.

[0096] In one embodiment, a computer-readable storage medium is provided storing a computer program that, when executed by a processor, implements the steps in the above method embodiments.

[0097] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above method embodiments.

[0098] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of related data must comply with the relevant laws, regulations and standards of the relevant countries and regions.

[0099] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0100] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0101] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for generating UPF files, characterized in that, The method includes: Obtain a cross-domain signal analysis report for a chip containing multiple functional modules; the cross-domain signal analysis report includes at least one cross-domain signal of the chip and the signal type to which each cross-domain signal belongs; For each cross-domain signal, obtain the UPF generation table of the functional module to which the cross-domain signal belongs; the UPF generation table contains low power information of the functional module to which the cross-domain signal belongs; Execute a pre-written UPF generation script so that the UPF generation script generates the basic UPF command of the functional module to which the cross-domain signal belongs, based on the UPF generation table of the functional module to which the cross-domain signal belongs; Based on the aforementioned basic UPF commands, construct the internal power system of the functional module to which the cross-domain signal belongs; Based on the internal power system, and according to the UPF syntax corresponding to the signal type of the cross-domain signal, generate the signal level UPF command of the functional module to which the cross-domain signal belongs; The basic UPF command and the signal-level UPF command are combined to obtain the UPF file of the functional module to which the cross-domain signal belongs.

2. The method according to claim 1, characterized in that, The process of obtaining a cross-domain signal analysis report for a chip containing multiple functional modules includes: Obtain the full chip data constraint file; the full chip data constraint file records the connection relationships between the top layer of the chip and each functional module, as well as the source and load ends of each port between different functional modules; Obtain the power domain mapping script file; the power domain mapping script file defines the power domain corresponding to each functional module in the chip; Execute a pre-written report generation script to generate a cross-domain signal analysis report for the chip based on the full-chip data constraint file and the power domain mapping script file.

3. The method according to claim 2, characterized in that, The execution of the pre-written report generation script, which generates a cross-domain signal analysis report for the chip based on the full-chip data constraint file and the power domain mapping script file, includes: For each port signal of the chip, a pre-written report generation script is executed, such that the report generation script, based on the full chip data constraint file, determines the driving source module and the load module of the port signal in the chip; the driving source module and the load module are one of the functional modules of the chip; Based on the power domain mapping script file, the source power domain of the driver source module and the load power domain of the load module are determined. If the operating voltages of the source power domain and the load power domain are different, then the port signal is determined to be a cross-domain signal, and the signal type of the cross-domain signal is a level conversion type. If the source power domain is a domain that can be powered off, and the load power domain is a normally open domain, then the port signal is determined to be a cross-domain signal, and the signal type of the cross-domain signal is a signal isolation type. Based on the signal type of each cross-domain signal in the chip, a cross-domain signal analysis report of the chip is generated.

4. The method according to claim 2, characterized in that, The process of obtaining the full-chip data constraint file includes: Obtain the original register transfer level design file of the chip; Based on the original register transfer level design file, obtain a target register transfer level design file that only contains the port definitions of the functional modules in the chip; Based on the original register transfer level design file and the target register transfer level design file, the functional modules of the chip are assembled in an EDA tool to obtain a full chip data constraint file.

5. The method according to claim 4, characterized in that, The process of obtaining a target register transfer level design file containing only the port definitions of the functional modules in the chip, based on the original register transfer level design file, includes: Execute a pre-written design file processing script to remove all logical function descriptions from the original register transfer level design file except for the port definitions of the functional modules in the chip, resulting in a target register transfer level design file that contains only the port definitions of the functional modules in the chip.

6. The method according to claim 1, characterized in that, The step of obtaining the UPF generation table of the functional module to which the cross-domain signal belongs for each cross-domain signal includes: Obtain a predefined UPF template table; For each cross-domain signal, in response to a low-power information input operation for the functional module to which the cross-domain signal belongs, the low-power information indicated by the low-power information input operation is imported into the UPF generation template table to obtain the UPF generation table of the functional module to which the cross-domain signal belongs.

7. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 6.

8. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.

9. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.

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