Semiconductor structure and manufacturing method thereof
By employing a titanium nitride layer structure in DRAM and controlling the difference in chlorine residual concentration in the word line design, the complexity of word line materials was solved, costs were reduced, threshold voltage was increased, resistance was reduced, and the process flow was simplified.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-11
- Publication Date
- 2026-04-14
AI Technical Summary
In the prior art, the material configuration of word lines in dynamic random access memory (DRAM) is complex, resulting in high manufacturing costs and difficulty in optimizing word line resistance and increasing the threshold voltage of buried transistors.
By employing a word line structure composed of a first titanium nitride layer and a second titanium nitride layer, the threshold voltage is increased and the resistivity is reduced by controlling the difference in chlorine residual concentration, thus simplifying the process flow.
This approach reduces manufacturing costs while increasing the threshold voltage of embedded transistors, decreasing word line resistance, and simplifying the manufacturing process.
Smart Images
Figure CN121865609A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of semiconductor technology, and more particularly to a semiconductor structure and a method for manufacturing the same. Background Technology
[0002] Dynamic Random Access Memory (DRAM) comprises multiple memory cells, each including a transistor and a capacitor coupled to the transistor. One of the source and drain of the transistor is connected to a bit line, the other of the source and drain is connected to a capacitor, and the gate of the transistor is connected to a word line. Under the control of the word line, the transistor writes data to or reads data from the capacitor via the bit line. The transistors in the DRAM memory cells can be embedded transistors.
[0003] As feature size decreases, optimizing word line material configuration, reducing word line resistance, and increasing the threshold voltage of embedded transistors remain problems that need to be solved. Summary of the Invention
[0004] According to a first aspect of the present disclosure, a semiconductor structure is provided, comprising: a substrate including an active region and a trench isolation structure defining the active region; a word line trench located in the substrate and passing through the active region and the trench isolation structure; a gate dielectric layer covering at least the active region exposed by the word line trench; a word line and a word line capping layer located on the word line, wherein the word line and the word line capping layer cover the gate dielectric layer and jointly fill the word line trench; wherein the word line includes a first titanium nitride layer and a second titanium nitride layer, the first titanium nitride layer conformally covering the bottom of the word line trench and the lower portion of the sidewall of the word line trench, the second titanium nitride layer at least filling the groove defined by the first titanium nitride layer, and the residual chlorine concentration in the second titanium nitride layer being lower than the residual chlorine concentration in the first titanium nitride layer.
[0005] In some embodiments, the word line capping layer is in contact with both the first titanium nitride layer and the second titanium nitride layer.
[0006] In some embodiments, the second titanium nitride layer covers the top of the first titanium nitride layer, and the word line capping layer is in contact with the second titanium nitride layer.
[0007] In some embodiments, the active region includes a first source-drain region and a second source-drain region, located on opposite sides of the word line trench; wherein the first source-drain region and the second source-drain region both overlap laterally with the second titanium nitride layer, and neither overlaps laterally with the first titanium nitride layer.
[0008] According to a second aspect of the present disclosure, a method for manufacturing a semiconductor structure is provided, comprising: providing a substrate, wherein the substrate includes an active region and a trench isolation structure defining the active region; forming a word line trench in the substrate, wherein the word line trench passes through the active region and the trench isolation structure; forming a gate dielectric layer in the word line trench, wherein the gate dielectric layer at least covers the active region exposed by the word line trench; forming a word line and a word line capping layer located on the word line in the word line trench, wherein the word line and the word line capping layer cover the gate dielectric layer and jointly fill the word line trench; wherein the word line includes a first titanium nitride layer and a second titanium nitride layer, the first titanium nitride layer conformally covering the bottom of the word line trench and the lower portion of the sidewall of the word line trench, the second titanium nitride layer covering the first titanium nitride layer and at least filling a groove defined by the first titanium nitride layer, and the residual chlorine concentration in the second titanium nitride layer being lower than the residual chlorine concentration in the first titanium nitride layer.
[0009] In some embodiments, forming word lines in the word line trench includes: forming a first titanium nitride material layer that conformally covers the bottom and sidewalls of the word line trench, wherein the residual chlorine concentration in the first titanium nitride material layer is a first concentration; forming a second titanium nitride material layer that covers the first titanium nitride material layer, wherein the second titanium nitride material layer fills the word line trench, the residual chlorine concentration in the second titanium nitride material layer is a second concentration, the second concentration being less than the first concentration; and etching back the second titanium nitride material layer and the first titanium nitride material layer, wherein the retained second titanium nitride material layer is used as the second titanium nitride layer, and the retained first titanium nitride material layer is used as the first titanium nitride layer, both the first titanium nitride layer and the second titanium nitride layer being below the top surface of the substrate.
[0010] In some embodiments, forming word lines in the word line trench includes: forming a first titanium nitride material layer conformally covering the bottom and sidewalls of the word line trench, wherein the residual chlorine concentration in the first titanium nitride material layer is a first concentration; forming a sacrificial layer covering the first titanium nitride material layer, wherein the sacrificial layer fills the word line trench; etching back the sacrificial layer and the first titanium nitride material layer, wherein the retained first titanium nitride material layer serves as the first titanium nitride layer, the first titanium nitride layer being lower than the top surface of the substrate; removing the remaining sacrificial layer; forming a second titanium nitride material layer covering the first titanium nitride layer, wherein the second titanium nitride material layer fills the word line trench, the residual chlorine concentration in the second titanium nitride material layer is a second concentration, the second concentration being less than the first concentration; etching back the second titanium nitride material layer, wherein the retained second titanium nitride material layer serves as the second titanium nitride layer, the second titanium nitride layer covering the top of the first titanium nitride layer.
[0011] In some embodiments, the first titanium nitride material layer is formed using a continuous flow deposition process, wherein the process gas of the continuous flow deposition process includes titanium tetrachloride, ammonia, and nitrogen; and the second titanium nitride material layer is formed using an atomic layer deposition process, wherein the process gas of the atomic layer deposition process includes titanium tetrachloride, ammonia, hydrogen, and nitrogen.
[0012] In some embodiments, the first titanium nitride material layer is formed using a first atomic layer deposition process, wherein the process gases of the first atomic layer deposition process include titanium tetrachloride, ammonia, hydrogen, and nitrogen, and the process temperature of the first atomic layer deposition process is a first temperature, the value of which ranges from 430°C to 550°C; the second titanium nitride material layer is formed using a second atomic layer deposition process, wherein the process gases of the second atomic layer deposition process include titanium tetrachloride, ammonia, hydrogen, and nitrogen, and the process temperature of the second atomic layer deposition process is a second temperature, the value of which ranges from 550°C to 650°C, and the second temperature is higher than the first temperature.
[0013] In some embodiments, a first source-drain region and a second source-drain region are formed in the active region, wherein the first source-drain region and the second source-drain region are located on opposite sides of the word line trench; wherein both the first source-drain region and the second source-drain region laterally overlap with the second titanium nitride layer, and neither laterally overlaps with the first titanium nitride layer.
[0014] In the semiconductor structure provided in the embodiments of this disclosure, the first titanium nitride layer with a higher residual chlorine concentration has a higher work function, which can improve the threshold voltage of the buried transistor; the second titanium nitride layer with a lower residual chlorine concentration has a lower resistivity, which can reduce the resistance of the word line; the first titanium nitride layer with a higher residual chlorine concentration and the second titanium nitride layer with a lower residual chlorine concentration can be achieved by controlling the residual chlorine concentration during the titanium nitride formation process, which is beneficial to simplifying the process; in addition, the word line itself uses only one material (i.e., titanium nitride), which is beneficial to reducing manufacturing costs. Attached Figure Description
[0015] Figure 1 This is a schematic diagram of a cross-sectional structure of an embedded transistor;
[0016] Figure 2A This is a partial planar schematic diagram of a semiconductor structure provided in some embodiments of the present disclosure;
[0017] Figure 2B For along Figure 2A A schematic diagram of a cross-sectional structure taken from line AB in the diagram;
[0018] Figure 2C For along Figure 2A A schematic diagram of another cross-sectional structure taken from line AB in the diagram;
[0019] Figure 2D This is a partial cross-sectional schematic diagram of a semiconductor structure provided in some embodiments of the present disclosure;
[0020] Figures 3A-3F This is a schematic diagram of some stages of a method for manufacturing a semiconductor structure according to some embodiments of the present disclosure;
[0021] Figures 4A-4E A schematic diagram of some stages of a method for manufacturing another semiconductor structure provided in some embodiments of this disclosure;
[0022] Figure 5 This is a schematic block diagram of the structure of an electronic device provided in some embodiments of this disclosure. Detailed Implementation
[0023] The technical solutions of this disclosure will be further described in detail below with reference to the accompanying drawings and embodiments. Although exemplary embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be limited to the embodiments described herein. Rather, these embodiments are provided to enable a more thorough understanding of this disclosure and to fully convey the scope of this disclosure to those skilled in the art.
[0024] The present disclosure is described in more detail below by way of example with reference to the accompanying drawings. The advantages and features of the present disclosure will become clearer from the following description and claims. It should be noted that the drawings are in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present disclosure.
[0025] It is understood that the meanings of “on”, “above” and “above” in this disclosure should be interpreted in the broadest sense, such that “on” means not only that it is “on” something without any intervening feature or layer (i.e., directly on something), but also that it is “on” something with an intervening feature or layer.
[0026] In the embodiments of this disclosure, the terms "first," "second," "third," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.
[0027] In embodiments of this disclosure, the term "layer" refers to a portion of material comprising a region having thickness. A layer may extend over the entirety of a lower or upper structure, or may have a range smaller than that of the lower or upper structure. Furthermore, a layer may be a region of a homogeneous or heterogeneous continuous structure with a thickness less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure, or a layer may be located between any horizontal faces at the top and bottom surfaces of the continuous structure. A layer may extend horizontally, vertically, and / or along an inclined surface. A layer may include multiple sublayers.
[0028] In embodiments of this disclosure, the term "coupling" refers to the operative connection of two (or more) conductive structures to each other. Depending on actual needs, this may include, but is not limited to, the following: 1) two conductive structures are directly electrically connected; 2) two conductive structures are indirectly electrically connected (through other conductive structures); 3) although two conductive structures are not electrically connected (e.g., an insulating layer is provided between them), one of the two conductive structures can control the electrical performance of the other two conductive structures in response to an electrical signal, for example, a gate (or word line) is coupled to an active region (or channel region).
[0029] It should be noted that the technical solutions and technical features described in the embodiments of this disclosure can be combined arbitrarily without conflict.
[0030] Figure 1 This is a schematic diagram of a cross-sectional structure of an embedded transistor. (Example) Figure 1 As shown, the buried transistor includes an active region ACT, a gate dielectric layer GI, a word line (or gate) WL, and a word line capping layer CL. A trench WLT is formed in the active region ACT. The gate dielectric layer GI conformally covers the bottom and sidewalls of the trench WLT. The word line capping layer CL is located on the word line WL, and the word line capping layer CL and the word line WL cover the gate dielectric layer GI and together fill the trench WLT. The word line WL includes a first conductive layer HW conformally covering the bottom and lower part of the sidewalls of the trench WLT, a second conductive layer LR filling the groove defined by the first conductive layer HW, and a third conductive layer LW covering the first conductive layer HW and the second conductive layer LR. The active region ACT includes source / drain regions SFD1 and SD2 located on both sides of the trench WLT, and the third conductive layer LW laterally overlaps with the source / drain regions SFD1 and SD2.
[0031] For example, the first conductive layer HW is typically a high work function layer to increase the threshold voltage of the buried transistor, and the first conductive layer HW can also serve as a diffusion barrier layer for the second conductive layer LR; the second conductive layer LR is typically a low resistivity layer to reduce the resistance of the word line WL; and the third conductive layer LW is typically a low work function layer to suppress gate-induced drain leakage (GIDL). It is understood that the materials of the first conductive layer HW, the second conductive layer LR, and the third conductive layer LW are typically different. For example, in one word line material configuration, the first conductive layer HW is made of titanium nitride (TiN), the second conductive layer LR is made of tungsten (W), and the third conductive layer LR is made of doped polysilicon (Poly).
[0032] The inventors of this application have noted that, due to the complex material configuration of the word lines in existing embedded transistors, the manufacturing process of these word lines places high demands on the type and functionality of the related equipment, which is not conducive to reducing manufacturing costs.
[0033] This disclosure provides at least some embodiments of a semiconductor structure comprising: a substrate including an active region and a trench isolation structure defining the active region; a word line trench located in the substrate and passing through the active region and the trench isolation structure; a gate dielectric layer covering at least the active region exposed by the word line trench; a word line and a word line capping layer located on the word line, wherein the word line and the word line capping layer cover the gate dielectric layer and jointly fill the word line trench; wherein the word line includes a first titanium nitride layer and a second titanium nitride layer, the first titanium nitride layer conformally covering the bottom of the word line trench and the lower portion of the sidewall of the word line trench, the second titanium nitride layer at least filling the groove defined by the first titanium nitride layer, and the residual chlorine concentration in the second titanium nitride layer being lower than the residual chlorine concentration in the first titanium nitride layer.
[0034] In the semiconductor structure provided in the embodiments of this disclosure, the first titanium nitride layer with a higher residual chlorine concentration has a higher work function, which can improve the threshold voltage of the buried transistor; the second titanium nitride layer with a lower residual chlorine concentration has a lower resistivity, which can reduce the resistance of the word line; the first titanium nitride layer with a higher residual chlorine concentration and the second titanium nitride layer with a lower residual chlorine concentration can be achieved by controlling the residual chlorine concentration during the titanium nitride formation process, which is beneficial to simplifying the process; in addition, the word line itself uses only one material (i.e., titanium nitride), which is beneficial to reducing manufacturing costs.
[0035] Figure 2A This is a partial planar schematic diagram of a semiconductor structure provided in some embodiments of this disclosure. Figure 2B For along Figure 2A A schematic diagram of a cross-sectional structure taken from line AB in the diagram. Figure 2C For along Figure 2A A schematic diagram of another cross-sectional structure taken from line AB in the diagram.
[0036] like Figure 2AAs shown, the semiconductor structure includes a substrate 100, which includes an active region 101 and a trench isolation structure 102 defining the active region 101. For example, the active region 101 is strip-shaped and arranged in a zigzag pattern. For example, see reference... Figure 2A As shown, the horizontal extension direction P of the active region 101 intersects the first horizontal direction X and the second horizontal direction Y, respectively. Multiple active regions 101 arranged along the second horizontal direction Y form an active region column, with adjacent active region columns staggered. It is understood that in the embodiments of this disclosure, "row" and "column" are interchangeable.
[0037] For example, the material of the active region 101 may include any suitable semiconductor material, such as silicon, germanium, silicon-germanium, etc. For example, the material of the trench isolation structure 102 may include any suitable dielectric material, such as silicon oxide, silicon nitride, silicon oxynitride, or any combination thereof.
[0038] like Figure 2A-2C As shown, the semiconductor structure also includes a word line trench 110T located in the substrate 100, the word line trench 110T passing through the active region 101 and the trench isolation structure 102. For example, see reference... Figure 2A As shown, an active region 101 is traversed by two word line grooves 110T.
[0039] like Figure 2B and Figure 2C As shown, the semiconductor structure also includes a gate dielectric layer 109, which at least covers the active region 101 exposed by the word line trench 110T. For example, the material of the gate dielectric layer 109 may include any suitable dielectric material, such as silicon oxide, high-k dielectric material, or any combination thereof; for example, high-k dielectric materials may include, but are not limited to, hafnium oxide (HfO2), zirconium oxide (ZrO2), etc.
[0040] like Figure 2B and Figure 2C As shown, the semiconductor structure also includes a word line 110 and a word line capping layer 115 located on the word line 110. The word line 110 and the word line capping layer 115 cover the gate dielectric layer 109 and together fill the word line trench 110T. The word line 110 includes a first titanium nitride layer 111 and a second titanium nitride layer 112. The first titanium nitride layer 111 conformally covers the bottom of the word line trench 110T and the lower portion of the sidewalls of the word line trench 110T (here, the lower portion refers to a portion near the bottom of the word line trench 110T). The second titanium nitride layer 112 at least fills the groove defined by the first titanium nitride layer 111. For example, as... Figure 2B and Figure 2C As shown, the cross-sectional shape of the first titanium nitride layer 111 can be U-shaped, and correspondingly, the groove defined by the first titanium nitride layer 111 can refer to the internal space of the U-shape.
[0041] For example, the material of the word line cover 115 may include any suitable dielectric material, such as silicon nitride, silicon oxynitride, etc.
[0042] In their research, the inventors of this application noted that the residual chlorine concentration in titanium nitride affects its work function and resistivity. Specifically, a higher residual chlorine concentration results in a higher work function and a higher resistivity; conversely, a lower residual chlorine concentration results in a lower work function and a lower resistivity. Therefore, in the semiconductor structure provided in the embodiments of this disclosure, the residual chlorine concentration in the second titanium nitride layer 112 is set to be lower than that in the first titanium nitride layer 111. Consequently, the first titanium nitride layer 111 has a relatively high work function, which helps to improve the threshold voltage of the embedded transistor in the semiconductor structure. At the same time, the second titanium nitride layer 112 has a relatively low resistivity, which helps to reduce the resistance of the word line 110.
[0043] For example, the difference between the residual chlorine concentration in the first titanium nitride layer 111 and the residual chlorine concentration in the second titanium nitride layer 112 is greater than 0.50 at.% (atomic percentage concentration). For example, the difference between the residual chlorine concentration in the first titanium nitride layer 111 and the residual chlorine concentration in the second titanium nitride layer 112 is greater than 0.60 at.%. For example, the difference between the residual chlorine concentration in the first titanium nitride layer 111 and the residual chlorine concentration in the second titanium nitride layer 112 is greater than 0.70 at.%. For example, the difference between the residual chlorine concentration in the first titanium nitride layer 111 and the residual chlorine concentration in the second titanium nitride layer 112 is greater than 0.80 at.%. For example, the difference between the residual chlorine concentration in the first titanium nitride layer 111 and the residual chlorine concentration in the second titanium nitride layer 112 is greater than 0.90 at.%. For example, the difference between the residual chlorine concentration in the first titanium nitride layer 111 and the residual chlorine concentration in the second titanium nitride layer 112 is greater than 1.00 at.%.
[0044] For example, in some examples, the residual chlorine concentration in the first titanium nitride layer 111 ranges from 1.00 at.% to 1.50 at.%; the residual chlorine concentration in the second titanium nitride layer 112 is less than 0.50 at.%, or less than 0.40 at.%, or less than 0.30 at.%, or less than 0.20 at.%.
[0045] like Figure 2B and Figure 2C As shown, the active region 101 may include a first source-drain region 101a and a second source-drain region 101b, which are located on opposite sides of the word line trench 110T. The first source-drain region 101a and the second source-drain region 101b have the same doping type.
[0046] For example, in some embodiments, such as Figure 2B As shown, the character line capping layer 115 is in contact with both the first titanium nitride layer 111 and the second titanium nitride layer 112. In this case, as... Figure 2B As shown, the second titanium nitride layer 112 only fills the groove defined by the first titanium nitride layer 111; the first source / drain region 101a and the second source / drain region 101b not only overlap laterally with the first titanium nitride layer 111, but also laterally with the second titanium nitride layer 112, to ensure that the word line 110 effectively controls the channel in the active region 101.
[0047] For example, in other embodiments, such as Figure 2C As shown, the second titanium nitride layer 112 not only fills the groove defined by the first titanium nitride layer 111, but also covers the top of the first titanium nitride layer 111; the letter line capping layer 115 contacts the second titanium nitride layer 112. In this case, as Figure 2C As shown, both the first source / drain region 101a and the second source / drain region 101b overlap laterally with the second titanium nitride layer 112, but neither overlaps laterally with the first titanium nitride layer 111; and with Figure 2B Compared to the illustrated embodiment, the second titanium nitride layer 112 has a relatively low work function, which can suppress gate-induced drain leakage (GIDL).
[0048] For example, based on the aforementioned embodiments, the semiconductor structure may further include bit lines coupled to the second source-drain region 101b and memory nodes coupled to the first source-drain region 101a, that is, the semiconductor structure may be formed as DRAM. Figure 2D This is a partial cross-sectional schematic diagram of a semiconductor structure provided for some embodiments of this disclosure. For example, such as... Figure 2D As shown, an active region 101 may include two first source-drain regions 101a and one second source-drain region 101b, that is, two buried transistors can share the second active region 101b.
[0049] For example, such as Figure 2D As shown, the semiconductor structure may further include a bit line contact plug 121 coupled to the second source / drain region 101b, a bit line 122 disposed on the bit line contact plug 121, and a bit line capping layer 123 disposed on the bit line 122. For example, the material of the bit line contact plug 121 may include any suitable conductive material, such as doped polysilicon, metal silicide, metal nitride, and metal. For example, the material of the bit line 122 may include any suitable conductive material, such as doped polysilicon, metal silicide, metal nitride, and metal. For example, the material of the bit line capping layer 123 may include any suitable dielectric material, such as silicon nitride and silicon oxynitride.
[0050] For example, such as Figure 2D As shown, the semiconductor structure may further include spacer structures 125 disposed on the sidewalls of the bit line contact plug 121, bit line 122, and bit line capping layer 123. For example, the spacer structure 125 may include any suitable dielectric material, such as silicon oxide, silicon nitride, silicon oxynitride, or any combination thereof.
[0051] For example, such as Figure 2D As shown, the semiconductor structure may further include an isolation layer 128 disposed on the substrate 100 and contact plugs 132 disposed in the isolation layer 128. For example, the material of the isolation layer 128 may include any suitable dielectric material, such as silicon oxide, silicon nitride, silicon oxynitride, or any combination thereof. For example, the material of the contact plugs 132 may include any suitable conductive material, such as doped polysilicon, metal silicides, metal nitrides, and metals.
[0052] For example, the semiconductor structure may further include a memory node 135, which is coupled to the first source-drain region 101a via a contact plug 132. For example, the memory node 135 may be a capacitor, a ferroelectric capacitor, a phase-change unit, a magnetic tunnel junction (MTJ), etc. The embodiments of this disclosure do not limit the structure of the memory node 135.
[0053] Understandably, although Figure 2D The Chinese character line uses Figure 2C The method of setting the character line 110 in the text is not limited to this; for example, Figure 2D The character lines in the middle can also be used Figure 2B The setting method for character line 110 in the text.
[0054] In the semiconductor structure provided in the embodiments of this disclosure, the first titanium nitride layer with a higher residual chlorine concentration has a higher work function, which can improve the threshold voltage of the buried transistor; the second titanium nitride layer with a lower residual chlorine concentration has a lower resistivity, which can reduce the resistance of the word line; the first titanium nitride layer with a higher residual chlorine concentration and the second titanium nitride layer with a lower residual chlorine concentration can be achieved by controlling the residual chlorine concentration during the titanium nitride formation process, which is beneficial to simplifying the process; in addition, the word line itself uses only one material (i.e., titanium nitride), which is beneficial to reducing manufacturing costs.
[0055] At least some embodiments of this disclosure also provide a method for manufacturing a semiconductor structure, which can be used to manufacture the semiconductor structure provided in the foregoing embodiments. Figures 3A-3F This diagram illustrates some stages of a method for manufacturing a semiconductor structure according to some embodiments of this disclosure. The following, in conjunction with... Figure 2A , Figure 2B as well as Figures 3A-3FA method for manufacturing a semiconductor structure provided by an embodiment of this disclosure will be described. For example, the manufacturing method may include the following steps S100 to S400.
[0056] S100: Provides a substrate, wherein the substrate includes an active region and a trench isolation structure defining the active region.
[0057] For example, refer to Figure 2A A semiconductor substrate can be etched to form a plurality of active regions 101 and shallow trenches defining the plurality of active regions 101. Figure 2A (Not shown in the image), and then a trench isolation structure 102 is formed in the shallow trench to obtain a substrate 100. For example, the material of the semiconductor substrate can include any suitable semiconductor material, such as silicon, germanium, silicon-germanium, etc. For example, the material of the trench isolation structure 102 can include any suitable dielectric material, such as silicon oxide, silicon nitride, silicon oxynitride, or any combination thereof. For example, see reference... Figure 2A As shown, the horizontal extension direction P of the active region 101 intersects the first horizontal direction X and the second horizontal direction Y, respectively.
[0058] S200: A word line trench is formed in the substrate, wherein the word line trench passes through the active area and the trench isolation structure.
[0059] For example, refer to Figure 2A and Figure 3A A word line trench 110T extending along the first horizontal direction X can be formed in the substrate 100 by an etching process. The word line trench 110T passes through the active region 101 and the trench isolation structure 102.
[0060] S300: A gate dielectric layer is formed in the word line trench, wherein the gate dielectric layer at least covers the active region exposed by the word line trench.
[0061] For example, refer to Figure 3B The gate dielectric material layer 1090 can be formed by thermal oxidation and / or deposition processes, wherein the portion of the gate dielectric material layer 1090 outside the word line trench 110T can be removed in a subsequent step, and the portion of the gate dielectric material layer 1090 within the word line trench 110T serves as the gate dielectric layer 109 (see [link to documentation]). Figure 2B ).
[0062] S400: A word line and a word line capping layer located on the word line are formed in the word line trench, wherein the word line and the word line capping layer cover the gate dielectric layer and together fill the word line trench.
[0063] For example, refer to Figure 2BThe word line 110 and the word line capping layer 115 located on the word line 110 cover the gate dielectric layer 109 and together fill the word line trench 110T. The word line 110 includes a first titanium nitride layer 111 and a second titanium nitride layer 112. The first titanium nitride layer 111 conformally covers the bottom of the word line trench 110T and the lower part of the sidewall of the word line trench 110T (here, the lower part refers to a portion near the bottom of the word line trench 110T). The second titanium nitride layer 112 fills the groove defined by the first titanium nitride layer 111.
[0064] For example, in some embodiments, forming word lines in word line grooves may include the steps S401 to S403.
[0065] S401: Reference Figure 3C A first titanium nitride material layer 1110 is formed on the bottom and sidewalls of the contour-covered character line groove 110T, wherein the residual chlorine concentration in the first titanium nitride material layer 1110 is a first concentration;
[0066] S402: Reference Figure 3D A second titanium nitride material layer 1120 is formed covering the first titanium nitride material layer 1110, wherein the second titanium nitride material layer 1120 fills the word line trench 110T, and the residual chlorine concentration in the second titanium nitride material layer 1120 is a second concentration, which is less than the first concentration.
[0067] S403: Reference Figure 3E The second titanium nitride material layer 1120 and the first titanium nitride material layer 1110 are etched back, wherein the second titanium nitride material layer 1120 is retained as the second titanium nitride layer 112, and the first titanium nitride material layer 1110 is retained as the first titanium nitride layer 111. Both the first titanium nitride layer 111 and the second titanium nitride layer 112 are lower than the top surface of the substrate 100.
[0068] For example, in some examples, a first titanium nitride material layer 1110 can be formed using a continuous flow deposition (SFD) process, with process gases including titanium tetrachloride, ammonia, and nitrogen; a second titanium nitride material layer 1120 can be formed using an atomic layer deposition (ALD) process, with process gases including titanium tetrachloride, ammonia, hydrogen, and nitrogen. It is understood that in the above-mentioned ALD process, hydrogen ions formed by hydrogen gas can combine with residual chloride ions to form hydrogen chloride gas, thereby reducing chlorine residue; thus, the chlorine residue concentration (i.e., the second concentration) of the second titanium nitride material layer 1120 formed by the ALD process can be lower than the chlorine residue concentration (i.e., the first concentration) of the first titanium nitride material layer 1110 formed by the continuous flow deposition process. For example, in one specific example, the residual chlorine concentration of the first titanium nitride material layer 1110 formed by continuous flow deposition is approximately 1.24 at.%, and the work function of the first titanium nitride material layer 1110 is approximately 4.98 eV; the residual chlorine concentration of the second titanium nitride material layer 1120 formed by atomic layer deposition is approximately 0.19 at.%, the work function of the second titanium nitride material layer 1120 is approximately 4.28 eV, and the resistivity of the second titanium nitride material layer 1120 is approximately 80% of the resistivity of the first titanium nitride material layer 1110.
[0069] For example, in other examples, a first atomic layer deposition process can be used to form a first titanium nitride material layer 1110. The process gases for the first atomic layer deposition process include titanium tetrachloride, ammonia, hydrogen, and nitrogen. The process temperature for the first atomic layer deposition process is a first temperature, with a value ranging from 430°C to 550°C. A second atomic layer deposition process can be used to form a second titanium nitride material layer 1120. The process gases for the second atomic layer deposition process include titanium tetrachloride, ammonia, hydrogen, and nitrogen. The process temperature for the second atomic layer deposition process is a second temperature, with a value ranging from 550°C to 650°C. The second temperature is higher than the first temperature. For example, the difference between the second temperature and the first temperature is not less than 50°C, or, not less than 60°C, or, not less than 70°C, or, not less than 80°C, or, not less than 90°C, or, not less than 90°C. It is understandable that the main difference between the second atomic layer deposition process and the first atomic layer deposition process lies in the process temperature; the higher the process temperature, the easier it is for residual chloride ions to combine with hydrogen ions to form hydrogen chloride gas, and correspondingly, the lower the residual chloride concentration. Therefore, the residual chloride concentration (i.e., the second concentration) of the second titanium nitride material layer 1120 formed using the second atomic layer deposition process can be lower than the residual chloride concentration (i.e., the first concentration) of the first titanium nitride material layer 1110 formed using the first atomic layer deposition process.
[0070] It is understood that in the embodiments of this disclosure, the first concentration and the second concentration can each represent a certain concentration range.
[0071] It is understandable that in step S403, reference Figure 3D and Figure 3E Alternatively, the second titanium nitride material layer 1120 and the first titanium nitride material layer 1110 can be etched back to obtain the first titanium nitride layer 111 and the second nitride layer 112; or the second titanium nitride material layer 1120 and the first titanium nitride material layer 1110 on the top surface of the substrate 100 can be removed first by chemical mechanical polishing (CMP) process, and then a portion of the second titanium nitride material layer 1120 and a portion of the first titanium nitride material layer 1110 located in the word line trench 110T can be removed by etching back process to obtain the first titanium nitride layer 111 and the second nitride layer 112.
[0072] For example, refer to Figure 3F and Figure 2BForming a word line capping layer in the word line trench can include: first forming a word line capping material layer 1150 covering the word line 110 and the gate dielectric material layer 1090, and then removing the word line capping material layer 1150 and the gate dielectric material layer 1090 (i.e., the portion of the gate dielectric material layer 1090 located outside the word line trench 110T) on the top surface of the substrate 100 by chemical mechanical polishing or etching back, so as to obtain the word line capping layer 115 and the gate dielectric layer 109.
[0073] For example, refer to Figure 2B The manufacturing method described above may further include: forming a first source-drain region 101a and a second source-drain region 101b in the active region 101, wherein the first source-drain region 101a and the second source-drain region 101b are located on opposite sides of the word line trench 110T.
[0074] For example, in some examples, the semiconductor substrate can be doped first to form a doped layer, so that after the trench isolation structure 102 and the word line trench 110T are formed, the corresponding regions of the doped layer can serve as the first source-drain region 101a and the second source-drain region 101b, respectively. For example, in other examples, after forming the trench isolation structure 102, the active region 101 can be doped first to form a doped region, so that after the word line trench 110T is formed, the remaining portion of the doped region can serve as the first source-drain region 101a and the second source-drain region 101b, respectively. For example, in still other examples, after forming the word line 110 and the word line capping layer 115, the active region 101 can be doped to form the first source-drain region 101a and the second source-drain region 101b. Therefore, it can be understood that... Figures 3A-3F The “101a” and “101b” in the text can represent the first source-drain region 101a and the second source-drain region 101b, or they can represent the regions used to form the first source-drain region 101a and the second source-drain region 101b. Figures 4A-4E The cases of "101a" and "101b" are similar and will not be discussed further.
[0075] For example, refer to Figure 2B In some embodiments, the source / drain regions 101a and 101b not only overlap laterally with the first titanium nitride layer 111, but also laterally with the second titanium nitride layer 112.
[0076] Figures 4A-4E This diagram illustrates some stages of a method for manufacturing a semiconductor structure according to some embodiments of this disclosure. The following is in conjunction with... Figure 2C , Figure 3C as well as Figures 4A-4E Another implementation of step S400 will be described. For example, refer to... Figure 2CThe word line 110 and the word line capping layer 115 located on the word line 110 cover the gate dielectric layer 109 and together fill the word line trench 110T. The word line 110 includes a first titanium nitride layer 111 and a second titanium nitride layer 112. The first titanium nitride layer 111 conformally covers the bottom of the word line trench 110T and the lower part of the sidewall of the word line trench 110T (here, the lower part refers to a portion near the bottom of the word line trench 110T). The second titanium nitride layer 112 not only fills the groove defined by the first titanium nitride layer 111, but also covers the top of the first titanium nitride layer 111.
[0077] For example, in other embodiments, forming word lines in word line grooves may include the steps S411 to S415.
[0078] S411: Reference Figure 3C A first titanium nitride material layer 1110 is formed on the bottom and sidewalls of the contour-covered character line groove 110T, wherein the residual chlorine concentration in the first titanium nitride material layer 1110 is a first concentration.
[0079] S412: Reference Figure 4A A sacrificial layer 1115 is formed covering the first titanium nitride material layer 1110, wherein the sacrificial layer 1115 fills the word line trench 110T;
[0080] S413: Reference Figure 4B The sacrificial layer 1115 and the first titanium nitride material layer 1110 are etched back, wherein the first titanium nitride material layer 1110 is retained as the first titanium nitride layer 111, and the first titanium nitride layer 111 is lower than the top surface of the substrate 100.
[0081] S414: Remove the remaining sacrificial layer 1115;
[0082] S415: Reference Figure 4C A second titanium nitride material layer 1120 is formed covering the first titanium nitride layer 111, wherein the second titanium nitride material layer 1120 fills the word line trench 110T, and the residual chlorine concentration in the second titanium nitride material layer 1120 is a second concentration, which is less than the first concentration.
[0083] S416: Reference Figure 4D The second titanium nitride material layer 1120 is etched back, wherein the retained second titanium nitride material layer 1120 serves as the second titanium nitride layer 112, and the second titanium nitride layer 112 covers the top of the first titanium nitride layer 111.
[0084] For example, the material of the sacrificial layer 1115 may include, but is not limited to, spin-coated carbon.
[0085] For example, the formation methods of the first titanium nitride material layer 1110 and the second titanium nitride material layer 1120 can be referred to the aforementioned relevant descriptions, and will not be repeated here.
[0086] For example, refer to Figure 4E and Figure 2C Forming a word line capping layer in the word line trench can include: first forming a word line capping material layer 1150 covering the word line 110 and the gate dielectric material layer 1090, and then removing the word line capping material layer 1150 and the gate dielectric material layer 1090 (i.e., the portion of the gate dielectric material layer 1090 located outside the word line trench 110T) on the top surface of the substrate 100 by chemical mechanical polishing or etching back, so as to obtain the word line capping layer 115 and the gate dielectric layer 109.
[0087] For example, refer to Figure 2C The manufacturing method described above may further include: forming a first source-drain region 101a and a second source-drain region 101b in the active region 101, wherein the first source-drain region 101a and the second source-drain region 101b are located on opposite sides of the word line trench 110T.
[0088] For example, refer to Figure 2C In other embodiments, the first source / drain region 101a and the second source / drain region 101b both overlap laterally with the second titanium nitride layer 112, but neither overlaps laterally with the first titanium nitride layer 111.
[0089] For example, refer to Figure 2D The manufacturing method provided in the embodiments of this disclosure may further include: forming a bit line contact plug 121 coupled to the second source-drain region 101b, a bit line 122 disposed on the bit line contact plug 121 (e.g., extending along the second horizontal direction Y), and a bit line capping layer 123 disposed on the bit line 122; forming a spacer structure 125 disposed on the sidewalls of the bit line contact plug 121, the bit line 122, and the bit line capping layer 123; forming an isolation layer 128 disposed on the substrate 100 and a contact plug 132 disposed in the isolation layer 128; and forming a storage node 135, wherein the storage node 135 is coupled to the first source-drain region 101a through the contact plug 132.
[0090] It should be noted that details not described in the embodiments of the manufacturing method disclosed herein can be referred to the relevant descriptions of the foregoing embodiments of the semiconductor structure, and will not be repeated here.
[0091] The technical effects of the manufacturing method provided in the embodiments of this disclosure can be found in the relevant descriptions of the foregoing embodiments of the semiconductor structure, and will not be repeated here.
[0092] At least some embodiments of this disclosure also provide an electronic device. Figure 5 This is a schematic block diagram illustrating the structure of an electronic device provided in some embodiments of this disclosure. For example... Figure 5As shown, the electronic device 1 includes a processor 20 and a memory 10 coupled to each other, wherein the memory 10 includes a semiconductor structure provided in any of the foregoing embodiments.
[0093] For example, processor 20 may include, but is not limited to, a central processing unit (CPU), a graphics processing unit (GPU), etc. Memory 10 may be configured to store data to be processed by processor 20 and / or data processed by the processor.
[0094] For example, electronic device 1 includes, but is not limited to, mobile phones, tablets, smart bracelets, wearable electronic devices, virtual reality devices, augmented reality devices, in-vehicle devices, servers, workstations, etc.
[0095] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.
Claims
1. A semiconductor structure, characterized in that, include: The substrate includes an active region and a trench isolation structure defining the active region; The character line trench is located in the substrate and passes through the active region and the trench isolation structure; A gate dielectric layer that at least covers the active region exposed by the word line trench; A word line and a word line capping layer located on the word line, wherein the word line and the word line capping layer cover the gate dielectric layer and together fill the word line trench; The word line includes a first titanium nitride layer and a second titanium nitride layer. The first titanium nitride layer conformally covers the bottom of the word line groove and the lower part of the sidewall of the word line groove. The second titanium nitride layer at least fills the groove defined by the first titanium nitride layer. The residual chlorine concentration in the second titanium nitride layer is lower than the residual chlorine concentration in the first titanium nitride layer.
2. The semiconductor structure according to claim 1, characterized in that, The word line capping layer is in contact with both the first titanium nitride layer and the second titanium nitride layer.
3. The semiconductor structure according to claim 1, characterized in that, The second titanium nitride layer covers the top of the first titanium nitride layer, and the word line capping layer is in contact with the second titanium nitride layer.
4. The semiconductor structure according to claim 3, characterized in that, The active region includes: The first source-drain region and the second source-drain region are located on opposite sides of the word line trench; The first source / drain region and the second source / drain region both overlap laterally with the second titanium nitride layer, but neither overlaps laterally with the first titanium nitride layer.
5. A method for manufacturing a semiconductor structure, characterized in that, include: A substrate is provided, wherein the substrate includes an active region and a trench isolation structure defining the active region; Word line trenches are formed in the substrate, wherein the word line trenches pass through the active region and the trench isolation structure; A gate dielectric layer is formed in the word line trench, wherein the gate dielectric layer at least covers the active region exposed by the word line trench; A word line and a word line capping layer located on the word line are formed in the word line trench, wherein the word line and the word line capping layer cover the gate dielectric layer and together fill the word line trench; The word line includes a first titanium nitride layer and a second titanium nitride layer. The first titanium nitride layer conformally covers the bottom of the word line groove and the lower part of the sidewall of the word line groove. The second titanium nitride layer covers the first titanium nitride layer and at least fills the groove defined by the first titanium nitride layer. The residual chlorine concentration in the second titanium nitride layer is lower than the residual chlorine concentration in the first titanium nitride layer.
6. The manufacturing method according to claim 5, characterized in that, Forming word lines in the word line groove includes: A first titanium nitride material layer is formed to conformally cover the bottom and sidewalls of the character line groove, wherein the residual chlorine concentration in the first titanium nitride material layer is a first concentration; A second titanium nitride material layer is formed to cover the first titanium nitride material layer, wherein the second titanium nitride material layer fills the word line trench, and the residual chlorine concentration in the second titanium nitride material layer is a second concentration, which is less than the first concentration; The second titanium nitride material layer and the first titanium nitride material layer are etched back, wherein the retained second titanium nitride material layer is used as the second titanium nitride layer, and the retained first titanium nitride material layer is used as the first titanium nitride layer. Both the first titanium nitride layer and the second titanium nitride layer are lower than the top surface of the substrate.
7. The manufacturing method according to claim 5, characterized in that, Forming word lines in the word line groove includes: A first titanium nitride material layer is formed to conformally cover the bottom and sidewalls of the character line groove, wherein the residual chlorine concentration in the first titanium nitride material layer is a first concentration; A sacrificial layer is formed covering the first titanium nitride material layer, wherein the sacrificial layer fills the word line trench; The sacrificial layer and the first titanium nitride material layer are etched back, wherein the retained first titanium nitride material layer serves as the first titanium nitride layer, and the first titanium nitride layer is lower than the top surface of the substrate; Remove the remaining sacrificial layer; A second titanium nitride material layer is formed to cover the first titanium nitride layer, wherein the second titanium nitride material layer fills the word line trench, and the residual chlorine concentration in the second titanium nitride material layer is a second concentration, which is less than the first concentration; The second titanium nitride material layer is etched back, wherein the retained second titanium nitride material layer serves as the second titanium nitride layer, and the second titanium nitride layer covers the top of the first titanium nitride layer.
8. The manufacturing method according to claim 6 or 7, characterized in that, The first titanium nitride material layer is formed using a continuous flow deposition process, wherein the process gases of the continuous flow deposition process include titanium tetrachloride, ammonia, and nitrogen; the second titanium nitride material layer is formed using an atomic layer deposition process, wherein the process gases of the atomic layer deposition process include titanium tetrachloride, ammonia, hydrogen, and nitrogen.
9. The manufacturing method according to claim 6 or 7, characterized in that, The first titanium nitride material layer is formed using a first atomic layer deposition process. The process gases for the first atomic layer deposition process include titanium tetrachloride, ammonia, hydrogen, and nitrogen. The process temperature for the first atomic layer deposition process is a first temperature, with a value ranging from 430℃ to 550℃. The second titanium nitride material layer is formed using a second atomic layer deposition process. The process gases for the second atomic layer deposition process include titanium tetrachloride, ammonia, hydrogen, and nitrogen. The process temperature for the second atomic layer deposition process is a second temperature, with a value ranging from 550℃ to 650℃, and the second temperature is higher than the first temperature.
10. The manufacturing method according to claim 7, characterized in that, Also includes: A first source-drain region and a second source-drain region are formed in the active region, wherein the first source-drain region and the second source-drain region are located on opposite sides of the word line trench; The first source / drain region and the second source / drain region both overlap laterally with the second titanium nitride layer, but neither overlaps laterally with the first titanium nitride layer.