Optical chip packaging module, optical module and laser radar

By setting partitions on the substrate to divide the optical and non-optical areas, the problem of distinguishing between optical and electrical chips during the packaging process of lidar chips is solved, achieving efficient packaging protection and light transmission requirements, reducing costs and improving structural strength and stability.

CN121886115APending Publication Date: 2026-04-17SUTENG INNOVATION TECHNOLOGY CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-12-06
Publication Date
2026-04-17

AI Technical Summary

Technical Problem

In the packaging process of LiDAR chips, the packaging requirements of optical chips and electrical chips are different, which makes it difficult to distinguish them during the packaging process. Moreover, existing technologies cannot simultaneously meet the requirements of packaging protection and light transmission.

Method used

By setting partitions on the substrate to divide the optical and non-optical areas, the optical chip is isolated from the devices in the non-optical area, and the packaging is performed on the substrate for protection, reducing packaging process steps and lowering costs.

Benefits of technology

It achieves effective isolation and protection of optical chips, reduces packaging and material costs, improves chip structural strength, enhances packaging compatibility and stability, and meets the light transmission requirements during the packaging process.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN121886115A_ABST
    Figure CN121886115A_ABST
Patent Text Reader

Abstract

The invention provides an optical chip packaging module, an optical module and a laser radar. According to the optical chip packaging scheme, the optical chip packaging module comprises a substrate provided with an optical area and a non-optical area; the optical chip is fixed in the optical area of the substrate; the separation piece is fixed on the substrate and is used for separating the optical area from the non-optical area so as to separate an optical chip in the optical area from a device in the non-optical area; and the light passing area is located above the optical area, and the emergent light beam of the optical chip is emitted from the light passing area. The strength of the optical chip packaging structure can be improved, and the packaging cost can be reduced.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application relates to the field of packaging technology, and in particular to an optical chip packaging module, an optical module module, and a lidar. Background Technology

[0002] In the fields of autonomous driving and intelligent sensing, LiDAR is a key component. Its working principle involves emitting a laser detection signal towards a target, then receiving the laser signal reflected back from the target and performing information comparison and processing to obtain relevant target information, such as target distance, azimuth, and speed. LiDAR consists of a transmitter, a receiver, and a signal processing unit. Both the transmitter and receiver require light-transmitting structures, which makes the packaging of LiDAR chips different from traditional integrated circuit packaging.

[0003] To simultaneously meet the requirements for packaging and protecting LiDAR chips while maintaining light transmission, and due to the size limitations of LiDAR chips, various chips and devices need to be integrated and interconnected on the same substrate and uniformly packaged. However, the packaging requirements for optical chips and electrical chips differ, leading to difficulties in distinguishing between the two types of chips during the packaging process. Summary of the Invention

[0004] This application provides an optical chip packaging scheme, optical module, and lidar suitable for transmitting or receiving modules and lidar, which can improve the strength of the optical chip packaging structure and reduce packaging costs.

[0005] In a first aspect, this application provides an optical chip packaging solution, including:

[0006] A substrate having optical and non-optical regions;

[0007] An optical chip fixed within the optical region of the substrate;

[0008] A partition fixed on the substrate for separating the optical region and the non-optical region, thereby isolating the optical chip in the optical region from the device in the non-optical region;

[0009] The light-transmitting area is located above the optical area, and the light beam emitted by the optical chip is emitted from the light-transmitting area.

[0010] Optionally, the optical chip includes at least one set of laser emitters or receivers;

[0011] The device located in the non-optical region includes an energy storage capacitor and a drive module for driving at least a portion of the energy emitted by the at least one group of laser emitters through the energy in the energy storage capacitor to emit a beam.

[0012] Optionally, the optical chip includes at least two sets of vertical cavity surface-emitting lasers;

[0013] The driving module includes at least a first low-side driving chip and at least a first high-side driving chip;

[0014] The first high-side driver chip and the first low-side driver chip drive the selected at least one set of vertical cavity surface-emitting lasers to emit light by gating at least one set of the at least two sets of vertical cavity surface-emitting lasers.

[0015] Optionally, the at least two sets of vertical cavity surface-emitting lasers are vertical cavity surface-emitting laser arrays;

[0016] The driving module further includes a second high-side driving chip. The first high-side driving chip and the second high-side driving chip are respectively located on opposite sides of the vertical-cavity surface-emitting laser array, and are used to drive different groups of vertical-cavity surface-emitting lasers in the vertical-cavity surface-emitting laser array; and / or,

[0017] The driving module further includes a second low-side driving chip. The first low-side driving chip and the second low-side driving chip are located on opposite sides of the vertical cavity surface-emitting laser array, respectively, and are used to drive different groups of vertical cavity surface-emitting lasers in the vertical cavity surface-emitting laser array.

[0018] Optionally, the device located in the non-optical region further includes at least one bootstrap capacitor for turning on or maintaining the driving state of the first high-side driver chip; and / or,

[0019] The device located in the non-optical region further includes at least one decoupling capacitor corresponding to the first high-side driving chip and / or the first low-side driving chip, wherein the first high-side driving chip and / or the first low-side driving chip are connected to ground through the corresponding decoupling capacitor.

[0020] Optionally, the coefficient of thermal expansion of both the partition and the substrate is within the range of [8×10]. -6 / deg, 12×10 -6 [ / deg] inside.

[0021] Optionally, the substrate is provided with a limiting groove for engaging with a protrusion on the bottom of the partition member to fix the partition member; and / or,

[0022] The bottom of the partition is provided with a limiting groove for engaging with a protrusion on the substrate to fix the partition.

[0023] Optionally, a light-transmitting cover plate is further provided on the substrate; the partition member is also used to support the light-transmitting cover plate, and the light-transmitting cover plate and the partition member form a sealed cavity on the substrate;

[0024] The optical chip is located inside the sealed cavity.

[0025] Optionally, the top of the partition is provided with a limiting step that cooperates with the light-transmitting cover plate, which is used to match the periphery of the light-transmitting cover plate to limit the light-transmitting cover plate.

[0026] Optionally, the substrate is made of a thermally conductive material; or,

[0027] The substrate has a heat-conducting channel in the optical region, and the optical chip is mounted on the heat-conducting channel.

[0028] Optionally, at least a portion of the non-optical areas on the substrate are provided with a molding compound to reinforce the optical chip packaging module.

[0029] Optionally, the molding material is also used to seal the device located in the non-optical area.

[0030] Optionally, the molding material extends beyond the periphery of the light-transmitting cover to press the light-transmitting cover against the top of the partition.

[0031] Optionally, the periphery of the light-transmitting cover has a beveled structure or a stepped structure, and the molding material extends over the beveled structure or stepped structure.

[0032] Optionally, the periphery of the light-transmitting cover extends to cover at least a portion of the molding material and is fixed to the molding material by adhesive; or, the periphery of the light-transmitting cover extends to abut against the side of the molding material.

[0033] Optionally, the coefficient of thermal expansion of the molding compound is located in the range [11×10]. -6 [ / deg, 14×10-6 / deg] within.

[0034] Optionally, the coefficient of thermal expansion of the molding compound is higher than that of the substrate and the spacer.

[0035] Secondly, this application provides a transmitting module, including the optical chip packaging module and circuit board as described in any one of the claims;

[0036] The circuit board is also equipped with power supply and charging circuits;

[0037] The circuit board is electrically connected to the optical chip packaging module.

[0038] Thirdly, this application provides a lidar, including the optical chip packaging module described in any one of the claims.

[0039] In this embodiment, by setting a partition on the substrate to divide the optical area and the non-optical area, the optical chip in the optical area and the device in the non-optical area can be effectively isolated while the two areas are encapsulated and protected. Moreover, the setting of the partition can eliminate the need for special differentiation and protection of the optical chip located in the optical area during the molding of the molding material and subsequent packaging process in the optical chip packaging module, thereby reducing the packaging process steps, improving the chip structure strength, and reducing material costs, fixture costs and packaging process costs. Attached Figure Description

[0040] Figure 1 This is a schematic diagram of one embodiment of the optical chip packaging module of this application;

[0041] Figure 2a This is a schematic diagram of the logical structure of an embodiment of the receiving module of this application;

[0042] Figure 2b This is a schematic diagram of the logical structure of one embodiment of the launch module of this application;

[0043] Figure 3 This is a schematic diagram of the circuit topology of one embodiment of the transmitting module of this application;

[0044] Figure 4 This is a schematic diagram of the circuit topology of another embodiment of the launch packaging module in this application;

[0045] Figure 5 This is a schematic diagram of an embodiment of the arrangement of at least some components in an emitter packaging module;

[0046] Figure 6 This is a schematic diagram of an embodiment of the arrangement of at least some components in a launch packaging module group;

[0047] Figure 7 This is a cross-sectional schematic diagram of a portion of the structure in one embodiment of the optical chip packaging module of this application;

[0048] Figure 8 This is a cross-sectional schematic diagram of a portion of the structure in one embodiment of the optical chip packaging module of this application;

[0049] Figure 9 This is a cross-sectional schematic diagram of a portion of the structure in one embodiment of the optical chip packaging module of this application;

[0050] Figure 10This is a cross-sectional schematic diagram of a portion of the structure in one embodiment of the optical chip packaging module of this application;

[0051] Figure 11 This is a cross-sectional schematic diagram of a portion of the structure in one embodiment of the optical chip packaging module of this application;

[0052] Figure 12 This is a schematic flowchart of one embodiment of the chip packaging process in this application.

[0053] Figure 13 This is a schematic diagram of one embodiment of the lidar in this application. Detailed Implementation

[0054] Embodiments of this application will now be described in more detail with reference to the accompanying drawings. While embodiments of this application are shown in the drawings, it should be understood that this application may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided to make this application more thorough and complete, and to fully convey the scope of this application to those skilled in the art.

[0055] The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The singular forms “a,” “the,” and “the” used in this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more of the associated listed items.

[0056] It should be understood that although the terms "first," "second," "third," etc., may be used in this application to describe various information, this information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0057] like Figure 1 As shown, Figure 1This is a schematic diagram of one embodiment of the optical chip packaging module of this application. The optical chip packaging module 10 includes a substrate 11, an optical chip 12, a spacer 13, and a light-transmitting area cover 14. The substrate 11 has an optical region 111 and a non-optical region 112, and the optical chip 12 is fixed within the optical region 111 of the substrate 11. The spacer 13 is fixed to the substrate 11 and is used to separate the optical region 111 and the non-optical region 112, thereby isolating the optical chip 12 within the optical region 111 from the devices within the non-optical region 112. The light-transmitting area cover 14 is located above the optical region 111, and the emitted light beam from the optical chip 12 exits from the light-transmitting area cover 14. Optionally, no devices may be placed on the light-transmitting area, or a light-transmitting area cover 14 may be provided. Optionally, the partition 13 also supports the light-transmitting cover 14, and the light-transmitting cover 14 and the partition 13 together form a sealed cavity on the substrate 11. The optical chip 12 is located within the sealed cavity, so as to protect the optical chip 12 using the light-transmitting cover 14 and the partition 13. Optionally, the sealed cavity is also filled with an inert gas.

[0058] In this embodiment, by setting a spacer on the substrate to divide the optical and non-optical regions, the optical chip in the optical region and the device in the non-optical region can be effectively isolated while the two regions are encapsulated and protected. In the optical chip packaging process, the spacer can be fabricated first, and then used as the protective boundary of the optical region for subsequent packaging processes. In this way, the spacer can protect the optical chip during the packaging process. In the molding of the molding compound and subsequent packaging processes, there is no need for additional special protection of the optical chip located in the optical region, and there is no need to use a specially shaped molding cavity, reducing packaging process steps, improving the compatibility of molding compounds, and reducing material costs, fixture costs, and packaging process costs. Due to the setting of the spacer, the risk of introducing damage to the optical chip is ensured during the packaging operation. Moreover, since there is no medium covering the optical chip, there is no need to use a special transparent medium, reducing packaging costs. Furthermore, the cavity where the optical chip is located is encapsulated and protected by the molding compound, further enhancing the cavity sealing and the mechanical strength of the package. The packaging materials used in this application, such as spacers, substrates, molding compounds, and light-transmitting covers (if any), do not require special customization, which greatly reduces packaging compatibility and consumable costs.

[0059] Optionally, a molding compound 15 is disposed on at least a portion of the non-optical area 112 on the substrate 11 to reinforce the optical chip packaging module. The molding process can be injection molding, compression molding, or glue injection curing. When no devices are fixed in the non-optical area 112, the molding compound 15 primarily strengthens the stability of the overall packaging structure. When driving circuit devices are fixed in the non-optical area 112, the molding compound also seals the devices located in the non-optical area, ensuring the stability of the sealing of the devices in the non-optical area. Optionally, the coefficient of thermal expansion of the molding compound is within the range of [11 × 10⁻⁶]. -6 / deg, 14×10 -6 Optionally, the coefficient of thermal expansion of the molding compound is similar to that of the substrate and the spacer, resulting in a relatively small thermal mismatch in the entire packaging structure and avoiding excessive warpage of the optical chip package.

[0060] Optionally, the partition 13 can be made of metal, ceramic, or plastic, or it can be formed by bonding metal and plastic parts together, or by resin bonding, integral injection molding, or scribing molding, which can reduce costs and process difficulty. There are various ways to fix the partition 13 to the substrate 11, such as by bonding with adhesive material 16, which can be an adhesive medium such as DAF film; or by metal welding. This application does not limit the fixing method of the partition.

[0061] Optionally, the substrate 11 may be made of a BT substrate, lead frame, ceramic substrate, etc. The electrical connection terminals led out from the substrate 11 may include, but are not limited to, metal pads, solder balls, etc. Optionally, the optical chip may be fixed to the substrate in various ways, such as by bonding with an adhesive material, which may be a silver paste, conductive adhesive, non-conductive adhesive, film, or other adhesive dielectric material; or by ball bonding, sintering, etc., without limitation. Optionally, the substrate may be made of a thermally conductive material; or, a thermally conductive channel may be provided on the substrate within the optical area, and the optical chip may be mounted on the thermally conductive channel to enable rapid heat dissipation from the optical chip.

[0062] Optionally, the light-transmitting cover 14 can be made of ordinary glass, coated glass, special glass, or transparent plastic. Optionally, the light-transmitting cover 14 is attached to the top of the partition 13 using adhesive 18. Optionally, the coefficient of thermal expansion of both the partition and the substrate is within the range of [8 × 10⁻⁶]. -6 / deg, 12×10 -6Within [ / deg], there is a relatively small thermal mismatch between the materials of the partition and the substrate, avoiding adhesive delamination failure of the optical chip package. In practical applications, depending on the dustproof, waterproof, and sealing sensitivity requirements of the optical chip 12, it can be selected whether to attach a light-transmitting cover plate 14 to the partition 13. Due to the presence of the partition 13, the light-transmitting cover plate 14 can easily form a cavity in the optical area, meeting the light transmission requirements and forming a sealed protective space.

[0063] Optionally, as an alternative embodiment of this application, the optical chip 12 is used to detect a light beam. For example, the optical chip 12 includes a photoelectric sensor for converting the received optical signal into an electrical signal. In the example where the optical chip is used to detect a light beam, the optical chip packaging module is specifically a receiving packaging module, and the optical module including the optical chip packaging module is specifically a receiving module. The circuit structure of the receiving module including the receiving packaging module can be varied. For example... Figure 2a As shown, Figure 2a This is a schematic diagram of the logical structure of one embodiment of the receiving module of this application. The receiving module includes a circuit board 201, and a power supply 202 and a charging circuit 203 disposed on the circuit board 201. Optionally, a receiving package module 204 can be disposed on the circuit board 205. The receiving package module 204 is electrically connected to the charging circuit 23. The power supply 202 is used to charge energy into the charging circuit 203, thereby powering the receiving package module 204. In some examples, such as... Figure 2a As shown, the receiving package module 204 includes an optical chip 241 located in the optical region and a driving module 2042 for the optical chip 241 located in the non-optical region. Optionally, a signal processing circuit is also provided on the circuit board 205 for processing the electrical signals output by the receiving package module 204.

[0064] Optionally, the optical chip 12 is used to emit a light beam. The optical chip can be an emitting optical chip. For example, the optical chip 12 includes at least one set of Vertical-Cavity Surface-Emitting Lasers (VCSELs). This at least one set of VCSELs is mounted to the substrate 11 using a die-attach process and electrically connected to pads on the substrate 11 via wire bonding. Optionally, each VCSEL can be mounted to the substrate using conductive silver paste 17. Alternatively, each VCSEL can be soldered to the substrate using gold solder, or mounted to the substrate using DA (die-attach) adhesive. Optionally, the VCSELs are arranged in an array on the substrate, with the pads corresponding to each row and column of VCSELs bonded together. In the example where the optical chip is used to emit a light beam, the optical chip packaging module is specifically an emitting packaging module, and the optical module including this optical chip packaging module is specifically an emitting module. The circuit structure of the emitting module including this emitting packaging module can be varied. Figure 2b As shown, Figure 2b This is a schematic diagram of the logical structure of one embodiment of the transmitting module of this application. The transmitting module includes a circuit board 21, and a power supply 22 and a charging circuit 23 disposed on the circuit board 21. The transmitting package module 24 can be disposed on the circuit board 25. Figure 2 illustrates the transmitting package module 24 disposed on the circuit board 25. The transmitting package module 24 is electrically connected to the charging circuit 23. The power supply 22 is used to charge energy into the charging circuit 23, and the charging circuit 23 supplies power to the transmitting package module. In some examples, as shown in Figure 2, in the transmitting package module 24, the optical chip 241 located in the optical region includes at least one set of laser emitters; the device located in the non-optical region includes an energy storage capacitor 242 and a driving module 243, which is used to drive at least a portion of the at least one set of laser emitters to emit a beam through the energy in the energy storage capacitor.

[0065] Optionally, the emission packaging module includes an energy conversion circuit and an energy release circuit. Energy in the charging circuit is transferred to the energy conversion circuit, and then from the energy conversion circuit to the energy release circuit, so that at least one group of laser emitters emits a beam. Optionally, the driving module includes a high-side driving chip located in the energy conversion circuit and a low-side driving chip located in the energy release circuit. The energy conversion circuit also includes an energy storage capacitor in the emission packaging module, and the energy release circuit also includes an optical chip in the emission packaging module. The high-side driving chip in the energy conversion circuit is used to transfer energy from the charging circuit to the energy storage capacitor, and the low-side driving chip in the energy release circuit is used to drive the energy in the energy storage capacitor to release energy to at least a portion of the laser emitters for emission.

[0066] Optionally, the optical chip includes at least two sets of VCSELs, the energy release circuit includes at least a first low-side driving chip, and the energy conversion circuit includes at least a first high-side driving chip. Optionally, different sets of VCSELs can emit beams simultaneously or separately at different times. Each set of VCSELs includes at least one VCSEL, and the VCSELs in the same set can be connected in series or in parallel to achieve simultaneous or time-division multiplexing of the detection beam.

[0067] The first high-side driver chip and the first low-side driver chip drive at least one selected group of VCSELs to emit light. In the prior art, single-side driving (i.e., only a high-side driver chip or only a low-side driver chip) is generally used to drive a group of VCSELs to emit light. This application uses double-side driving, meaning that a group of VCSELs can only emit a beam when driven by one high-side driver chip and one low-side driver chip. This improves control flexibility and facilitates the selection of the VCSEL to be driven to emit a beam when using integrated driving. Of course, single-side driving can also be used in this application, and this is not a limitation.

[0068] There are various connection methods for the VCSEL, energy release circuit, energy storage capacitor, and energy conversion circuit in the transmitter packaging module. The following section combines these methods... Figure 3 Provide an example of one of them. For example... Figure 3 As shown, Figure 3 This is a schematic diagram of the circuit topology of one embodiment of the transmitting module of this application. Figure 3 The example shown uses a group of VCSELs containing only one VCSEL. Figure 3 In the topology, the charging circuit 301 includes an inductor L1 and a drive switch Q1. The energy conversion circuit 302 includes an energy storage capacitor C1, a diode switch, and at least a portion of the high-side drive chip (i.e., drive switch Q2). The energy release circuit 303 includes at least a portion of the low-side drive chip (i.e., drive switch Q3). The drive switch element can be GaN (Gallium nitride), MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), or IGBT (Insulated Gate Bipolar Transistor), etc. This application does not limit the type of drive switch element; in this embodiment, a MOSFET switch is used as an example for explanation.

[0069] In this configuration, the power supply VCC is connected to one end of the inductor L1, and the other end of the inductor L1 is connected to the source of the drive switch Q1 and the source of the drive switch Q2, respectively. The gate of the drive switch Q1 is used to receive the first pulse control signal, and its drain is grounded. The gate of the drive switch Q2 is used to receive the second pulse control signal, and its drain is connected to the anode of the diode switch D1. The cathode of the diode switch D1 is connected to the positive plate of the energy storage capacitor C2 and the positive terminal of VCSEL 31, respectively. The cathode of VCSEL 31 is connected to one terminal of the drive switch Q3, the cathode plate of the energy storage capacitor C2 is grounded, and the drain of the other two terminals of the drive switch Q3 is grounded, while its gate is used to receive the third pulse control signal.

[0070] Figure 3 The circuit topology shown can operate in several ways. In one example, the VCSEL 31 periodically emits pulsed light. Before emitting a pulsed light in each cycle, drive switches Q2 and Q3 are off, and a first pulse control signal is used to turn on drive switch Q1, thus connecting the power supply VCC-inductor L1-drive switch Q1 charging circuit, allowing power supply VCC to charge inductor L1. After inductor L1 is fully charged, the first pulse control signal is used to turn off transistor switch Q1, and a second pulse control signal is used to turn on drive switch Q2, thus connecting the inductor L1-drive switch Q2-diode switch D1-energy storage capacitor C1 energy conversion circuit, allowing the energy of inductor L1 to be stored in energy storage capacitor C1 in the emitter package module. After storage is completed, drive switch Q2 is turned off, and the third pulse control signal is used to turn on drive switch Q3, so that the energy release circuit of energy storage capacitor C1-VCSEL31-drive switch Q3 is turned on, thereby releasing the energy in energy storage capacitor C1 to VCSEL 31, so that VCSEL 31 emits a laser beam.

[0071] In some examples, the transmitter package module includes x anode drive modules and y cathode drive modules. The transmitter package module includes p energy storage capacitors and n sets of VCSELs. The x anode drive modules correspond to the p energy storage capacitors, where p is a positive integer greater than or equal to 1 and less than or equal to n, and x is a positive integer less than or equal to p. Each anode drive module corresponds to at least one energy storage capacitor, and the energy storage capacitors corresponding to each anode drive module are different. The y cathode drive modules correspond to the n sets of VCSELs, where each cathode drive module corresponds to at least one set of VCSELs, and the VCSELs corresponding to each cathode drive module are different. Here, n is a positive integer greater than 1, and y is a positive integer less than or equal to n. Each anode drive module may include, for example: Figure 3 The drive switch Q2 and / or diode switch D1 shown are included. Each cathode drive module may include, for example, the drive switch Q2 and / or diode switch D1 shown. Figure 3The drive switch Q3 is shown. Each high-side drive chip includes at least a portion of the x anode drive modules, and each low-side drive chip includes at least a portion of the y cathode drive modules. For example, in an example where the emitter package module has only one high-side drive chip and one low-side drive chip, the high-side drive chip includes the x anode drive modules, and the low-side drive chip includes the y cathode drive modules. As another example, in an example where the emitter package module has two high-side drive chips and two low-side drive chips, one of the two high-side drive chips includes a portion of the x anode drive modules, and the other includes the remaining portion of the x anode drive modules; one of the two low-side drive chips includes a portion of the y cathode drive modules, and the other includes the remaining portion of the y cathode drive modules.

[0072] The n groups of VCSELs can be used to emit beams simultaneously, or their emission times can be staggered, emitting beams sequentially in n stages. Before each group of VCSELs emits its beam, the anode drive module corresponding to that group transfers energy from the charging circuit to the corresponding energy storage capacitor, and the cathode drive module releases energy from the corresponding energy storage capacitor to that group of VCSELs, enabling the group to emit its beam. Optionally, the emission module may further include m power sources and q charging circuits (where m ≤ q, and m is an integer greater than or equal to 1), corresponding to the p energy storage capacitors in the emission packaging module, and the p energy storage capacitors correspond to the n groups of VCSELs. When m is less than q, at least some of the power sources correspond to at least two charging circuits. When q is less than p, at least some of the charging circuits correspond to at least two energy storage capacitors. When p is less than n, in at least some of the energy storage capacitors, each energy storage capacitor corresponds to no less than two sets of VCSELs. Before at least one set of VCSELs emits a beam, the power supply corresponding to that set of VCSELs is used to charge the corresponding charging circuit, and the corresponding energy conversion circuit is used to convert the energy in the corresponding charging circuit to the energy storage capacitor corresponding to that set of VCSELs before the VCSELs emits a beam.

[0073] It is understood that the voltage values ​​of the m power supplies can be equal or unequal. This application does not limit the voltage values ​​of the m power supplies. As an optional embodiment, it is understood that the m power supplies can also drive different numbers of energy conversion circuits. It is understood that the power supply corresponding to the middle region of the detection field of view can drive fewer sets of energy release circuits, while the power supply corresponding to the edge region of the detection field of view can drive more sets of potential energy circuits. For example, if the power supply in the middle region drives a sets of energy release circuits and the power supply in the edge region drives b sets of energy release circuits, then a ≤ b. It is understood that by controlling the voltage values ​​of the m power supplies and the number of energy release circuits in the transmission array in the detection field of view corresponding to the m power supplies, the detection requirements can be further matched based on the transmission module, realizing the flexibility of detection.

[0074] like Figure 3 As shown, with Figure 3 In the topology shown, one set of VCSELs constitutes one transmission channel. Figure 3 The diagram illustrates a 4x4 VCSEL array, where each VCSEL group consists of one VCSEL. Figure 3 The diagram only shows the circuit loop corresponding to one group of VCSEL 31: power supply, charging circuit, and emitter package module. Optionally, the circuit loops of the remaining VCSEL groups in this 4*4 VCSEL array, excluding the first group of VCSEL 31, can be shown as the circuit loop of the first group of VCSEL 31, for simplicity. Figure 3 ,exist Figure 3 Not shown in the image.

[0075] Optionally, in this embodiment, the at least two sets of VCSELs are specifically VCSEL arrays arranged in a rectangular array, with each set of VCSELs being an element in the VCSEL array. A first high-side driving chip drives at least one selected row of elements in the VCSEL array; a first low-side driving chip drives at least one selected column of elements in the VCSEL array. Only a set of VCSELs simultaneously located in a row selected by the first high-side driving chip and a column selected by the first low-side driving chip will be successfully driven to emit a beam. This selection of rows and columns to drive the VCSELs improves control flexibility. Of course, the at least two sets of VCSELs in this embodiment can also be arranged in other array shapes, such as circular arrays, elliptical arrays, etc. The driving module can also drive different sets of VCSELs discretely, without limitation. It is understood that one set of VCSELs includes at least one VCSEL transmitter. Optionally, the group of VCSELs may also include multiple VCSEL transmitters, such as 2, 3, 8, 9, etc. This application does not limit the number of VCSEL transmitters included in a group of VCSELs.

[0076] In the above example, by systematically packaging at least two sets of VCSELs, their driving modules, and energy storage capacitors into a transmitter packaging module, the packaged transmitter packaging module can be mounted onto the circuit board during assembly. Compared to the prior art where multiple VCSELs, their driving modules, and energy storage capacitors are directly mounted on the circuit board, the presence of a defective VCSEL would render the entire circuit board unusable. This application embodiment allows for better pre-screening of the transmitter packaging module, achieving higher yield control. This application embodiment also reduces process difficulty. Existing products often require high-precision alignment and bonding of each VCSEL on the circuit board. In this application, pre-packaging to form the transmitter packaging module reduces the difficulty of packaging each VCSEL onto the circuit board. In addition, packaging each VCSEL, its energy storage capacitor, and driving module within the transmitter packaging module reduces parasitic parameters in the control drive circuitry. Moreover, by integrating and packaging the key component modules in the transmitter module, this approach ensures the consistency and stability of the multi-channel transmitter devices. The sealed packaging structure ensures internal environmental stability, thereby improving the reliability of the core power devices and driving devices, and enhancing the overall reliability of the transmitter module. Currently, automotive devices have very high reliability requirements and are typically subjected to WHTOL testing. The testing environment is usually a high temperature and high humidity environment. For unpackaged devices, bare dies often allow water molecules or impurities to seep into the device edges or relatively weak locations in the protective layer. Over a long period of time, electromigration can easily cause internal conduction or open circuit failures. In this application, the VCSEL, its driver module, and energy storage capacitor are locally packaged and systematized into a transmitter package module before being fixed to the circuit board of the transmitter module. This makes the transmitter module in this application more likely to meet the reliability requirements of automotive devices.

[0077] like Figure 4 As shown, Figure 4 This is a schematic diagram of the circuit topology of another embodiment of the launch packaging module in this application. (And...) Figure 3 The topology shown is different, Figure 4 In the topology shown, the energy transfer circuit 402 also includes drive switches Q4 and Q5, which are used to release the energy stored in the parasitic capacitances on each drive switch in the circuit after the energy storage capacitor C1 transfers energy to at least one set of VCSELs in the VCSEL array 404.

[0078] Optionally, the emitter package module also includes at least one bootstrap capacitor for turning on or maintaining the drive state of the first high-side driver chip. For example, as Figure 4As shown, the power conversion circuit 402 further includes at least one bootstrap capacitor C2, which is connected to one end of at least the first high-side driver chip to turn on or maintain the driving state of the connected high-side driver switch. Optionally, on the substrate of the emitter package module, the at least one bootstrap capacitor and the pins of the first high-side driver chip are arranged adjacent to each other.

[0079] Optionally, the emitter package module further includes at least one decoupling capacitor corresponding to the at least one high-side driver chip and / or the at least one low-side driver chip. The at least one high-side driver chip and / or at least one low-side driver chip in the emitter package module are respectively connected to the negative power supply (or ground) through the at least one decoupling capacitor. For example, all high-side driver chips are connected to the negative power supply (or ground) through one decoupling capacitor, and all low-side driver chips are connected to the negative power supply (or ground) through another decoupling capacitor; or, all high-side and low-side driver chips are connected to the negative power supply (or ground) through the same decoupling capacitor; or, each high-side driver chip is connected to the negative power supply (or ground) through a different decoupling capacitor, and each low-side driver chip is connected to the negative power supply (or ground) through a different decoupling capacitor. Figure 4 As shown, all anode drive switches in the energy conversion circuit 402 are connected to the power supply through the first decoupling capacitor C3, and all cathode drive switches in the energy release circuit 404 are connected to the negative terminal of the power supply (or ground) through the second decoupling capacitor C4. Both the first decoupling capacitor C3 and the second decoupling capacitor C4 are located on the non-optical area of ​​the substrate.

[0080] Generally, the operating voltages of the high-side driver chip and the low-side driver chip are fixed at a certain value. The power supply first passes through a decoupling capacitor before supplying power to the high-side driver chip and the low-side driver chip. This prevents parasitic oscillations caused by the positive feedback path formed by the power supply VCC, that is, it prevents current fluctuations in the power supply circuit from affecting the normal operation of the circuit when the circuit current changes. Therefore, it can effectively eliminate parasitic coupling between circuits to ensure the relative stability of the power supply. Optionally, the pins of at least the first high-side driver chip and / or the at least the first low-side driver chip are arranged adjacent to the corresponding decoupling capacitor.

[0081] like Figure 5 As shown, Figure 5 This is a schematic diagram of an embodiment of the component arrangement in an emitter packaging module. At least two sets of VCSELs 50 in the emitter packaging module are arranged in an array. A first high-side driver chip 511 and a first low-side driver chip 512 are located around the VCSEL array 510. Optionally, the emitter packaging module also includes a second high-side driver chip 513, which, along with the first high-side driver chip 511, is located on opposite sides of the VCSEL array, respectively, and is used to drive lasers in different regions of the VCSEL array. For example, as... Figure 5 As shown, the driving module includes a first high-side driver chip 511 located on the left side of the VCSEL array and a second high-side driver chip 513 located on the right side of the VCSEL array. The VCSEL array is divided into two different regions, driven by the first high-side driver chip 511 and the second high-side driver chip 513 respectively. For example, the first high-side driver chip 511 drives the VCSELs in the odd-numbered rows of the VCSEL array 510, and the second high-side driver chip 513 drives the VCSELs in the even-numbered rows of the VCSEL array 510. Alternatively, the first high-side driver chip 511 drives the VCSELs in the upper half of the VCSEL array 510, and the second high-side driver chip 513 drives the VCSELs in the lower half of the VCSEL array 510. When the number of columns in the VCSEL array is large, placing high-side driver chips on both sides of the VCSEL array can reduce the distance between the VCSELs and the high-side driver chips, improving the response speed of the VCSELs and reducing circuit losses.

[0082] Alternatively, the driving module may further include a second low-side driving chip 514, which, along with the first low-side driving chip 512, is located on opposite sides of the VCSEL array and is used to drive lasers in different regions of the VCSEL array. For example, as Figure 5 As shown, the driving module includes a first low-side driving chip 512 located on the upper side of the VCSEL array 510, and a second low-side driving chip 514 located on the lower side of the VCSEL array 510. The first low-side driving chip 512 is used to drive each group of VCSELs in the right region of the VCSEL array 510 near the first high-side driving chip 511. The second low-side driving chip 514 is used to drive each group of VCSELs in the left region of the VCSEL array 510 near the second high-side driving chip 513. When there are many rows in the VCSEL array, placing low-side driving chips on both sides of the VCSEL array can reduce the distance between the VCSELs and the low-side driving chips, improve the response speed of the VCSELs, and reduce circuit losses, thereby avoiding the situation where the laser output power does not meet the requirements.

[0083] In this configuration, a partition 516 is provided between the VCSEL array 510 and the first high-side driving chip 511, the second high-side driving chip 513, the first low-side driving chip 512, and the second low-side driving chip 514. The partition 516 is used to enclose the area between them into an optical region, and the VCSEL array 510 is disposed within the enclosed optical region.

[0084] Compared to an example with one high-side driver chip and one low-side driver chip, an example with two high-side driver chips and / or two low-side driver chips can simultaneously drive a larger number of VCSEL groups to emit light. This allows for easier selection of the number of VCSELs emitting beams simultaneously based on detection requirements, thereby further improving detection flexibility. It is understood that the emission package module contains only two high-side driver chips and one low-side driver chip. Optionally, the two high-side driver chips can drive VCSEL groups in different rows, and the one low-side driver chip can drive VCSEL groups in all columns. Alternatively, the emission package module contains only one high-side driver chip and two low-side driver chips. Optionally, the one high-side driver chip can drive VCSEL groups in all rows, and the two low-side driver chips can drive VCSEL groups in different columns.

[0085] Optionally, such as Figure 5 As shown, the emitter packaging module includes an energy storage capacitor array 517 arranged in two columns, located on both sides of the VCSEL array 510. Spacers 515 and 516 are located between the two columns of energy storage capacitors and the VCSEL array 510, respectively, to isolate the energy storage capacitor array 517 outside the optical region. Optionally, each column of energy storage capacitors is located between the VCSEL array 510 and the driver chip. Optionally, each column of energy storage capacitors is located between the VCSEL array 510 and the high-side driver chip. By placing the energy storage capacitors close to the VCSELs, reducing the distance between the energy storage capacitors and their corresponding VCSELs, parasitic parameters along the path between the energy storage capacitors and their corresponding VCSELs can be reduced, allowing more energy to be transferred to the VCSELs.

[0086] like Figure 6 As shown, Figure 6 This is a schematic diagram of an embodiment of the arrangement of at least some components in an emitter packaging module. On the substrate, spacers 66 enclose a rectangular area (i.e., an optical area) that surrounds the VCSEL array 60. The spacers 66 can be a single, integrally formed structural component, further ensuring the hermeticity of the packaged optical area. Optionally, as another alternative implementation, the spacers 66 can be a combination of multiple structural components forming a sealed space; this application is not limited in this regard. Outside the spacers 66, a row of energy storage capacitors 61 is arranged on each of the left and right sides of the VCSEL array 60.

[0087] A low-side driver chip 65 is disposed on the upper and lower sides of the VCSEL array 60. The pins of the low-side driver chip 65 are arranged along the side of the low-side driver chip 65 facing away from the VCSEL array 60, and the decoupling capacitors 65 corresponding to the low-side driver chip 65 are arranged along the side of the low-side driver chip 65 facing away from the VCSEL array 60, so as to be adjacent to the pins of the low-side driver chip 65.

[0088] Each column of energy storage capacitors 61 is further provided with a high-side driver chip 62 on the side facing away from the VCSEL array 60. The pins of the high-side driver chip 62 are arranged along the side facing away from the energy storage capacitors 61. The bootstrap capacitors 63 corresponding to the high-side driver chip 62 are also arranged along the side facing away from the energy storage capacitors 61, so as to be adjacent to the pins of the high-side driver chip 62. Optionally, a decoupling capacitor (not shown) corresponding to the high-side driver chip 62 is also provided on the side of the substrate facing away from the VCSEL array 60, and is arranged adjacent to the pins of the high-side driver chip 62.

[0089] Figure 5 and Figure 6 The example shown uses the energy storage capacitor located between the VCSEL array and the high-side driver chip. Optionally, the energy storage capacitor may also be located between the VCSEL array and the low-side driver chip; this is not a limitation. Optionally, both the energy storage capacitor and the low-side driver chip are located in non-optical regions.

[0090] Optionally, the capacitors (e.g., energy storage capacitors, decoupling capacitors, bootstrap capacitors) in the emitter package module can be mounted to the substrate using surface mount technology (SMT). Optionally, each capacitor can be connected to its corresponding VCSEL via leads.

[0091] Optionally, the high-edge driver chip can be pre-packaged using Chip Scale Package (CSP) technology. CSP is a standard packaging type that does not involve specific packaging technologies. The ratio of core area to package area in a CSP package is approximately 1:1.1. There are various CSP packaging technologies, such as WLCSP, uBGA, WBGA, TinyBGA, and FBGA, which are small chip packaging technologies. Compared to the COP process, where components in a direct driver module require extensive wire bonding, resulting in lower processing speed and integration density, pre-packaging the high-edge driver chip using WLCSP in this example simplifies the process of overall SIP (system-in-package) packaging and improves integration density. Optionally, the high-edge driver chip can be pre-packaged using WLCSP as a Ball Grid Array (BGA) package and mounted onto a non-optical area of ​​the substrate via ball leads.

[0092] Optionally, the high-edge driver chip is mounted onto a non-optical area of ​​the substrate using a flip-chip process or a surface mount technology (SMT) process. In this process, the front side of the high-edge driver chip is mounted to the substrate 101 with the substrate facing forward. Alternatively, the high-edge driver chip can also be mounted to the substrate using a COB process and then wire-bonded to pads on the substrate.

[0093] like Figure 7 As shown, Figure 7 This is a cross-sectional schematic diagram of a portion of the structure in one embodiment of the optical chip packaging module of this application. Optionally, four spacers 72 are disposed on the substrate 71, and the area enclosed by the four spacers 72 is the optical area on the substrate, while the area outside the enclosed area is the non-optical area. The optical chip 73 is disposed within the optical area. Optionally, a low-side driving chip (not shown) is also fixed outside the optical area, located on the upper and lower sides of the optical area.

[0094] Two high-edge driver chips 74 are pre-packaged into BGA packages using WLCSP technology and mounted onto the non-optical area of ​​the substrate via ball bearings 741, located on the left and right sides of the optical chip 73, respectively. Optionally, the optical chip packaging module can also be packaged into a BGA package and mounted onto the circuit board via ball bearings 75. In the non-optical areas on both sides of the optical chip 73, a row of energy storage capacitors 76 and a row of bootstrap capacitors 77 are fixed on each side. The components in the non-optical areas are encapsulated in a molding compound 78. Optionally, the optical chip packaging module also includes a light-transmitting cover plate 79, supported on the spacers 72, forming a sealed cavity with each spacer 72 on the substrate. Optionally, a stepped structure 791 is provided around the periphery of the light-transmitting cover plate 79, and the molding compound 78 extends onto the stepped structure 791 to press the light-transmitting cover plate 79 against the spacers 72. This prevents the light-transmitting cover plate from detaching.

[0095] In some examples, the structure on the cover plate used to secure it to the molding material may not be a stepped structure around the perimeter of the cover plate, but rather a structure of other shapes. For example, such as Figure 8 As shown, Figure 8 This is a cross-sectional schematic diagram of a portion of the structure in one embodiment of the optical chip packaging module of this application. A stepped structure 811 is provided around the periphery of the light-transmitting cover 81, and the molding material 82 extends onto the stepped structure 811 to press the light-transmitting cover 81 against the partition member 83, forming a structure that locks the light-transmitting cover 81, thereby enhancing the sealing of the cavity and improving reliability.

[0096] In some examples, the molding material may not extend to the edge covering the light-transmitting cover, but rather... Figure 1 In the illustrated embodiment, the side of the molding compound abuts against the periphery of the light-transmitting cover. Alternatively, in some examples, the periphery of the light-transmitting cover extends to press against the molding compound. Figure 9 As shown, Figure 9 This is a cross-sectional schematic diagram of a portion of the structure in one embodiment of the optical chip packaging module of this application. A partition 91 and a molding compound 92 are arranged side-by-side. A light-transmitting cover 93 is supported on the partition 92, and the periphery of the light-transmitting cover 93 extends to cover part or all of the molding compound 92, and is fixed to the molding compound 92 by adhesive. Figure 9 In the example shown, the periphery of the light-transmitting cover 93 only covers part of the molding material 92.

[0097] Or, such as Figure 10 As shown, Figure 10This is a cross-sectional schematic diagram of a portion of the structure in one embodiment of the optical chip packaging module of this application. The top of the partition 101 is provided with a limiting step 1011 that mates with the light-transmitting cover plate 102, for matching the periphery of the light-transmitting cover plate 102. The light-transmitting cover plate 102 is engaged within the limiting step 1011, and its periphery abuts against the inner surface of the limiting step 1011, thereby limiting the light-transmitting cover plate 102.

[0098] In some examples, the substrate and the spacer can be fixed to each other not only with adhesive but also through structural fit. For example... Figure 11 As shown, Figure 11 This is a cross-sectional schematic diagram of a portion of the structure in one embodiment of the optical chip packaging module of this application. A limiting groove 1111 is provided on the substrate 111 for engaging with a protrusion 1121 on the bottom of the partition 112 to fix the partition 112. Alternatively, a limiting groove 722 is provided on the bottom of the partition 112 for engaging with the protrusion 1112 on the substrate 111 to fix the partition 1121. Optionally, adhesive is applied to the bottom of the limiting groove 1111 or the limiting groove 1122 to bond the substrate 111 and the partition.

[0099] The packaging process of the optical chip packaging module in this application embodiment has multiple methods, which are described below. Figure 7 The illustrated embodiment provides an example description of the chip packaging process in this application. In this example, as... Figure 12 As shown, Figure 12 This is a schematic flowchart of one embodiment of the chip packaging process in this application. The packaging process of the transmitter packaging module includes, in sequence, a top mounting process 121, a spacer bonding process 122, an optical chip mounting process 123, a wiring process 124, a light cover mounting process 125, an injection molding process 126, a bottom mounting process 127, and a substrate cutting process 128.

[0100] In the top mounting process 121, electrical components and chips (such as high-edge driver chip 74, energy storage capacitor 76, bootstrap capacitor 77, etc.) on the upper side of the substrate are fixed to the upper side of the substrate and electrically connected to the substrate using surface mount technology (SMT). If the high-edge driver chip requires underfill, it is underfilled after SMT; if the ball gap of the high-edge driver chip 74 is large enough to support the filling of the molding material in the molding process, the underfill step can be omitted.

[0101] In the spacer bonding process 122, the spacer is bonded to the substrate using the same process as Die Attach, thereby separating the optical and non-optical areas on the substrate using the spacer. This step can be completed before the light cover mounting process 125.

[0102] In the optical chip mounting process 123, the optical chip is mounted onto the substrate using the Die Attach process.

[0103] In the wiring process 124, the wire bonding process is used to electrically connect the optical chip and the chip that needs to be connected to the substrate by wire bonding to the substrate through gold wires.

[0104] In the light cover mounting process 125, for chips that require a light-transmitting cover plate, the same process as Die Attach is used to apply adhesive material to the upper side of the partition and then bond and fix the light-transmitting cover plate to the partition, so that the optical area where the optical chip is located forms a sealed cavity and meets the light transmission requirements.

[0105] In injection molding process 126, the non-optical areas are encapsulated and protected using an injection molding process. In this step, the spacers provide physical protection for the optical areas, ensuring that the optical areas are not filled with encapsulating material.

[0106] In the bottom mounting process 127, electrical components under the substrate are fixed to the substrate using SMT technology and electrically connected to the substrate. For substrates requiring bottom ball mounting, this step simultaneously completes the connection between the solder balls 75 and the substrate.

[0107] In the substrate slitting process 128, the strip-shaped substrate is cut into individual chips to complete the packaging.

[0108] This application also provides a lidar system, including an optical chip packaging module, which can be any of the optical chip packaging modules described above. As an optional implementation, such as... Figure 13 As shown, Figure 13This is a schematic diagram of one embodiment of the lidar in this application. The lidar 130 includes the emitting optical chip package module 131 described above for emitting a detection beam. Optionally, the lidar also includes a receiving optical chip package module 132 for receiving the detection echo beam. Optionally, as an alternative implementation of this application, the lidar can be a solid-state lidar. It is understood that the lidar of this application may also include a scanning device to form a wider detection range. The scanning device can be, for example, a galvanometer, a rotating mirror, or a driving platform. It is understood that the scanning device can be one or more of the aforementioned driving devices. For example, the scanning device can be a combination of a galvanometer and a rotating mirror; optionally, the scanning device can also be a galvanometer, or a rotating mirror, or a driving platform. This application does not impose a unique limitation on whether the lidar includes a scanning device, or the specific form of the scanning device. It is understood that the lidar in this application may include only the transmitting optical chip package module in the above-described packaging form, or it may include only the receiving optical chip package module in the above-described packaging form, or it may include both the transmitting optical chip package module and the receiving optical chip package module. This application does not impose a single limitation on this. Of course, the optical chip package module in this application can also be used in infrared detectors, projector light sources, and 3D TOF modules of mobile phones, and there is no limitation here.

[0109] The various embodiments of this application have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or improvement of the technology in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. An optical chip packaging module, characterized in that, include: A substrate having optical and non-optical regions; An optical chip, wherein the optical chip is fixed in the optical region of the substrate; A partition member, fixed on the substrate, is used to separate the optical region and the non-optical region, so as to isolate the optical chip in the optical region from the device in the non-optical region; The light-transmitting area is located above the optical area, and the light beam emitted by the optical chip is emitted from the light-transmitting area.

2. The optical chip packaging module according to claim 1, characterized in that, The substrate is provided with a limiting groove for engaging with a protrusion on the bottom of the partition member to fix the partition member; and / or, The bottom of the partition is provided with a limiting groove for engaging with a protrusion on the substrate to fix the partition.

3. The optical chip packaging module according to claim 1, characterized in that, A light-transmitting cover plate is also provided on the substrate; the partition member is also used to support the light-transmitting cover plate, and the light-transmitting cover plate and the partition member form a sealed cavity on the substrate; The optical chip is located inside the sealed cavity.

4. The optical chip packaging module according to claim 3, characterized in that, The top of the partition is provided with a limiting step that matches the light-transmitting cover plate, so as to match the periphery of the light-transmitting cover plate and limit the light-transmitting cover plate.

5. The optical chip packaging solution according to claim 1, characterized in that, The substrate is made of a thermally conductive material; or... The substrate has a heat-conducting channel in the optical region, and the optical chip is mounted on the heat-conducting channel.

6. The optical chip packaging module according to any one of claims 1 to 5, characterized in that, At least a portion of the non-optical areas on the substrate are provided with a molding compound for reinforcing the optical chip packaging module.

7. The optical chip packaging module according to claim 6, characterized in that, The molding material is also used to seal devices located in the non-optical areas.

8. The optical chip packaging module according to claim 6, characterized in that, The molding material extends beyond the periphery of the light-transmitting cover to press the light-transmitting cover against the top of the partition.

9. The optical chip packaging module according to claim 8, characterized in that, The periphery of the light-transmitting cover has a sloping or stepped structure, and the molding material extends over the sloping or stepped structure.

10. An optical module, characterized in that, Includes the optical chip packaging module and circuit board as described in any one of claims 1 to 9; The circuit board is also equipped with power supply and charging circuits; The circuit board is electrically connected to the optical chip packaging module.

11. A lidar, characterized in that, Includes the optical chip packaging module as described in any one of claims 1 to 9.