Low-noise amplifier for realizing broadband noise matching
By combining a broadband input power matching network and a minimum noise figure extension network, the low-noise amplifier achieves impedance and noise figure optimization over a wide frequency range, solving the broadband matching problem and improving the amplifier's performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- NO 24 RES INST OF CETC
- Filing Date
- 2026-01-06
- Publication Date
- 2026-04-17
AI Technical Summary
Existing technologies make it difficult to simultaneously achieve wideband input power matching and wideband minimum noise matching in low-noise amplifiers, resulting in a low degree of agreement between the noise figure and the theoretical minimum noise, which affects amplifier performance.
By employing a wideband input power matching network and a minimum noise figure extension network, impedance matching and noise figure extension are achieved through a combination of LC circuits and inverters. Combined with the amplification stage and output stage, good input power matching and minimum noise matching are ensured throughout the entire operating frequency range.
Within a wide frequency range, the input impedance and noise figure of the low-noise amplifier are close to the theoretical optimal values, achieving wide-range input power matching and minimum noise matching, thus improving the amplifier's performance.
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Figure CN121887129A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of circuit system technology, and in particular to a low-noise amplifier that achieves broadband noise matching. Background Technology
[0002] The low-noise amplifier is the first stage of the radio frequency receiver, and its main function is to improve signal quality and increase the sensitivity of the receiving system.
[0003] On the one hand, the antenna impedance is 50 ohms. In order to achieve maximum power transmission, the input impedance of the low-noise amplifier also needs to meet 50 ohms to achieve input power matching.
[0004] On the other hand, the input impedance of a low-noise amplifier also affects the noise figure. When the transistor size, bias, and operating frequency of a low-noise amplifier are fixed, the minimum noise figure it can achieve is also fixed. When the input impedance of the low-noise amplifier is equal to the optimal input impedance Zopt, the noise figure of the low-noise amplifier reaches the minimum noise figure NFmin, at which point the low-noise amplifier achieves minimum noise matching.
[0005] Generally speaking, input power matching requires a low-noise amplifier with an input impedance of 50 ohms, which is far from the optimal input impedance Zopt required for minimum noise matching, making it difficult to achieve both input power matching and minimum noise matching simultaneously. Since the signal received by the receiver is relatively weak, a compromise is usually made between achieving a certain level of input power matching and minimum noise matching.
[0006] Noise cancellation technology can optimize the noise figure of low-noise amplifiers to some extent. This technology introduces an auxiliary branch to cancel the noise signal generated by the main path, thereby reducing the noise figure of the low-noise amplifier. However, because the signals in the main path and the auxiliary path will have different phase shifts at high frequencies, the phase difference of the noise signals cannot be precisely 180°, thus failing to cancel them. Therefore, noise cancellation technology will fail at high frequencies and may even worsen the noise figure.
[0007] Source-level degradation is a common matching technique. Its advantage lies in its ability to simultaneously alter the input impedance of a low-noise amplifier (LNA) to a certain extent, matching it to the optimal input impedance required for minimum noise matching. This allows the LNA to meet input power matching requirements to a degree while approaching the optimal noise impedance. However, this technique is narrowband and cannot achieve wideband input power matching and minimum noise matching.
[0008] In addition, achieving wideband input power matching is another challenge for wideband low-noise amplifiers. When the low-noise amplifier operates over a wide frequency range, it is even more difficult to achieve both wideband input power matching and wideband minimum noise matching. Summary of the Invention
[0009] To address the shortcomings of the prior art, the technical problem to be solved by this invention is to overcome the contradiction between broadband input power matching and broadband minimum noise matching, so that the low-noise amplifier can achieve broadband minimum noise matching on the basis of broadband input power matching, thereby making the noise figure of the low-noise amplifier match the theoretical minimum noise and improving the performance of the low-noise amplifier.
[0010] One technical solution adopted by this invention is to provide a low-noise amplifier that achieves broadband minimum noise matching, comprising: a broadband input power matching network, a minimum noise figure spreading network, an amplification stage, and an output stage, wherein, A broadband input power matching network, whose input is electrically connected to the signal source, is used for impedance matching of low-noise amplifiers; Minimum noise figure extension network is used to extend the frequency domain of the minimum noise figure NFmin achievable by a low-noise amplifier; The amplifier stage receives a signal that has undergone impedance matching and noise figure expansion at its input, which is used to cancel signal noise and amplify the signal. The output stage, whose input is electrically connected to the output of the amplification stage, is used to buffer and impedance transform the amplified signal from the amplification stage, and output the buffered signal to an external load.
[0011] Furthermore, the broadband input power matching network includes a first inductor and a first capacitor. The first terminal of the first capacitor is connected to the input voltage, the second terminal is electrically connected to the first terminal of the first capacitor, and the second terminal of the first capacitor is grounded.
[0012] Furthermore, the minimum noise figure extension network includes a second inductor and a third inductor, with a first end of the second inductor electrically connected to a second end of the first inductor, a first end of the third inductor electrically connected to a second end of the second inductor, and the second ends of the second and third inductors electrically connected to the two input terminals of the amplification stage.
[0013] Furthermore, the amplification stage includes a first inverter, a second inverter, and a first source follower; the first inverter is used to invert and amplify the input signal, and the first source follower is used to invert the signal that has been inverted and amplified by the first inverter again to output a first signal; the second inverter is used to invert the input signal and output a second signal; the first signal and the second signal are combined at the output of the first source follower and input to the output stage.
[0014] Furthermore, the first inverter includes a first PMOS transistor, a first NMOS transistor, and a first resistor. The gates of the first PMOS transistor and the first NMOS transistor are electrically connected, and the common gate of the first PMOS transistor and the first NMOS transistor is connected to the signal input terminal. The source of the first PMOS transistor is connected to the power supply, and the source of the first NMOS transistor is grounded. The drains of the first PMOS transistor and the first NMOS transistor are electrically connected, and the common drain of the first PMOS transistor and the first NMOS transistor is connected to the input terminal of the first source follower. The first end of the first resistor is connected to the common gate of the first PMOS transistor and the first NMOS transistor, and the second end is connected to the common drain of the first PMOS transistor and the first NMOS transistor.
[0015] Furthermore, the first PMOS transistor and the third NMOS transistor form a first source follower. The drain of the third NMOS transistor is connected to the power supply, the gate of the third NMOS transistor is electrically connected to the common drain of the first PMOS transistor and the first NMOS transistor, and the source of the third NMOS transistor is connected to the input terminal of the output stage.
[0016] Furthermore, the second inverter includes a second PMOS transistor and a second NMOS transistor. The gate of the second PMOS transistor is electrically connected to the gate of the second NMOS transistor, and the common gate of the second PMOS transistor and the second NMOS transistor is connected to the signal input terminal. The source of the second PMOS transistor is connected to the power supply, and the source of the second NMOS transistor is grounded. The drain of the second PMOS transistor is electrically connected to the drain of the second NMOS transistor, and the common drain of the second PMOS transistor and the second NMOS transistor is electrically connected to the source of the third NMOS transistor.
[0017] Furthermore, the first inverter also includes a fourth inductor, a fifth inductor, a second capacitor, and a third capacitor; the first terminal of the fourth inductor is electrically connected to the common drain of the first PMOS transistor and the first NMOS transistor, and the second terminal is electrically connected to the gate of the third NMOS transistor; the first terminal of the second capacitor is electrically connected to the second terminal of the fourth inductor, and the second terminal of the second capacitor is grounded; the first terminal of the fifth inductor is electrically connected to the source of the third NMOS transistor; the first terminal of the third capacitor is electrically connected to the second terminal of the fifth inductor, and the second terminal of the third capacitor is grounded.
[0018] Furthermore, the output stage includes a fourth NMOS transistor and a fifth NMOS transistor. The gate of the fifth NMOS transistor is electrically connected to the output terminal of the first source follower. The drain of the fifth NMOS transistor is connected to a power supply. The source of the fifth NMOS transistor is electrically connected to the drain of the fourth NMOS transistor. The source and drain of the fifth NMOS transistor are connected to the output terminal together. The gate of the fifth NMOS transistor is electrically connected to the second terminal of the fifth inductor. The gate of the fourth NMOS transistor is connected to a bias voltage. The source of the fourth NMOS transistor is grounded.
[0019] Furthermore, the broadband input power matching network and the minimum noise figure expansion network form a fusion network for impedance matching and noise figure expansion of the input signal. The fusion network includes a first inductor, a second inductor, a third inductor, and a first capacitor. The first end of the first inductor is connected to the signal source, and the second end is connected to the first input terminal of the amplification stage. The first end of the second inductor is connected to the first input terminal of the amplification stage, and the second end is connected to the second input terminal of the amplification stage. The first end of the third inductor is connected to the output terminal of the amplification stage, and the second end is connected to the signal output terminal. The first, second, and third inductors are mutually inductant to form a coupling network. The first end of the first capacitor is electrically connected to the second end of the third inductor, and the second end is grounded.
[0020] The low-noise amplifier for broadband noise matching of the present invention has at least the following beneficial effects: By combining the minimum noise figure extension network and the broadband input power matching network, the input impedance and the optimal input impedance Zopt required to achieve minimum noise matching are both transformed to around 50 ohms. This ensures that the low-noise amplifier achieves good input power matching across the entire operating frequency range, and the noise figure is close to the theoretical minimum noise figure NFmin. Thus, broadband input power matching and broadband minimum noise matching are achieved simultaneously, improving the performance of the low-noise amplifier and resolving the contradictions of traditional technologies. Attached Figure Description
[0021] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 This is a circuit diagram of a low-noise amplifier with broadband noise matching according to Embodiment 1 of the present invention.
[0022] Figure 2 This is a circuit diagram of a low-noise amplifier with broadband noise matching according to Embodiment 2 of the present invention.
[0023] Figure 3 This is the basic circuit diagram of a low-noise amplifier.
[0024] Figure 4 This is a noise simulation diagram of a low-noise amplifier with broadband noise matching according to Embodiment 1 of the present invention.
[0025] Figure 5 This is a noise simulation diagram of a low-noise amplifier with broadband noise matching according to Embodiment 2 of the present invention. Detailed Implementation
[0026] The invention will now be further described with reference to the accompanying drawings.
[0027] Example 1 Please see Figure 1 This is a circuit diagram of a low-noise amplifier with broadband noise matching according to Embodiment 1 of the present invention. The low-noise amplifier includes a broadband input power matching network, a minimum noise figure extension network, an amplification stage, and an output stage. A broadband input power matching network, electrically connected to the signal source at its input, functions to impedance match a low-noise amplifier. This network performs broadband input impedance transformation, converting the input impedance of the low-noise amplifier to 50 ohms. The standard impedance of the low-noise amplifier input is 50 ohms, facilitating maximum power transfer from an external signal source (such as an antenna). The signal output of the broadband input power matching network is then routed to a minimum noise figure extension network.
[0028] Specifically, this broadband input power matching network may include a first inductor L1 and a first capacitor C1. The first terminal of the first capacitor C1 is connected to the input voltage, and its second terminal is electrically connected to the first terminal of the first capacitor L1. The second terminal of the first capacitor C1 is grounded. Impedance matching is achieved through an LC circuit.
[0029] The minimum noise figure extension network extends the frequency domain of the minimum noise figure NFmin achievable by the low-noise amplifier. This minimum noise figure extension network extends the amplifier's minimum noise figure NFmin to a higher frequency and adjusts the optimal input impedance Zopt for achieving NFmin to be close to the input impedance of the low-noise amplifier. In this way, the broadband input power matching network transforms the input impedance and Zopt to 50 ohms at the same time. Therefore, this scheme can simultaneously achieve broadband input power matching and broadband minimum noise matching.
[0030] Specifically, this minimum noise figure extension network may include a second inductor L2 and a third inductor L3. The first terminal of the second inductor L2 is electrically connected to the second terminal of the first inductor L1, and the first terminal of the third inductor L3 is electrically connected to the second terminal of the second inductor L2. The second terminals of the second inductor L2 and the third inductor L3 are electrically connected to the two input terminals of the amplification stage. The second inductor L2 and the third inductor L3 are mutually inductant. This network extends the minimum noise figure NFmin in the frequency domain, reducing the minimum noise figure NFmin in the high-frequency range of the low-noise amplifier, thus making the low-noise amplifier flat within the target operating frequency range.
[0031] The amplifier stage receives the signal after passing through the broadband input power matching network and the minimum noise figure extension network at its input terminal. Its function is to cancel the noise signal generated by the main path and amplify the input signal. Its input comes from the output signal of the minimum noise figure extension network, and its amplified signal is input to the output stage.
[0032] (Requires modification according to the description of the claims) The amplification stage includes a first inverter, a second inverter, and a first source follower; the first inverter is used to invert and amplify the input signal, and the first source follower is used to invert the signal that has been inverted and amplified by the first inverter again to output a first signal; the second inverter is used to invert the input signal and output a second signal; the first signal and the second signal are combined at the output of the first source follower and input to the output stage.
[0033] The first inverter includes a first PMOS transistor P1, a first NMOS transistor N1, and a first resistor R1. The gates of the first PMOS transistor P1 and the first NMOS transistor N1 are electrically connected, and their common gate is connected to the signal input terminal. The source of the first PMOS transistor P1 is connected to the power supply, and the source of the first NMOS transistor N1 is grounded. The drains of the first PMOS transistor P1 and the first NMOS transistor N1 are electrically connected, and their common drain is connected to the input terminal of the first source follower. The first end of the first resistor R1 is connected to the common gate of the first PMOS transistor P1 and the first NMOS transistor N1, and the second end is connected to the common drain of the first PMOS transistor P1 and the first NMOS transistor N1.
[0034] The first PMOS transistor P1 and the third NMOS transistor N3 form a first source follower. The drain of the third NMOS transistor N3 is connected to the power supply. The gate of the third NMOS transistor N3 is electrically connected to the common drain of the first PMOS transistor P1 and the first NMOS transistor N1. The source of the third NMOS transistor N3 is connected to the input terminal of the output stage.
[0035] The second inverter includes a second PMOS transistor P2 and a second NMOS transistor N2. The gate of the second PMOS transistor P2 is electrically connected to the gate of the second NMOS transistor N2, and the common gate of the second PMOS transistor P2 and the second NMOS transistor N2 is connected to the signal input terminal. The source of the second PMOS transistor P2 is connected to the power supply, and the source of the second NMOS transistor N2 is grounded. The drain of the second PMOS transistor P2 is electrically connected to the drain of the second NMOS transistor N2, and the common drain of the second PMOS transistor P2 and the second NMOS transistor N2 is electrically connected to the source of the third NMOS transistor N3.
[0036] Please see Figure 3 This is the basic circuit diagram of a low-noise amplifier with a noise cancellation structure. It can be seen that the basic circuit of a classic low-noise amplifier with a noise cancellation structure does not include an LC structure.
[0037] To adjust the phase and impedance of the high-frequency signal, the first inverter in this scheme may further include a fourth inductor L4, a fifth inductor L5, a second capacitor C2, and a third capacitor C3. The first terminal of the fourth inductor L4 is electrically connected to the common drain of the first PMOS transistor P1 and the first NMOS transistor N1, and the second terminal is electrically connected to the gate of the third NMOS transistor N3. The first terminal of the second capacitor C2 is electrically connected to the second terminal of the fourth inductor L4, and the second terminal of the second capacitor C2 is grounded. The first terminal of the fifth inductor L5 is electrically connected to the source of the third NMOS transistor N3, and the second terminal is electrically connected to the gate of the fifth NMOS transistor N5. The first terminal of the third capacitor C3 is electrically connected to the second terminal of the fifth inductor L5, and the second terminal of the third capacitor C3 is grounded. The addition of the above LC circuit enables impedance matching, broadband optimization, and noise cancellation enhancement of the signal.
[0038] The output stage, whose input is electrically connected to the output of the amplification stage, is used to buffer and impedance transform the amplified signal from the amplification stage, and output the buffered signal to an external load.
[0039] The output stage includes a fourth NMOS transistor N4 and a fifth NMOS transistor N5. The gate of the fifth NMOS transistor N5 is electrically connected to the output terminal of the first source follower. The drain of the fifth NMOS transistor N5 is connected to the power supply. The source of the fifth NMOS transistor N5 is electrically connected to the drain of the fourth NMOS transistor N4. The source of the fifth NMOS transistor N5 and the drain of the fourth NMOS transistor N4 are connected to the output terminal. The gate of the fourth NMOS transistor N4 is connected to a bias voltage, and the source of the fourth NMOS transistor N4 is grounded. The fourth NMOS transistor N4 and the fifth NMOS transistor N5 in this output stage constitute a second source follower, which provides output buffering and impedance transformation to ensure that the amplified signal stably drives the load.
[0040] Please see Figure 4 This is a noise simulation diagram of a low-noise amplifier with broadband noise matching. Figure 4 The upper half of the graph shows the curves for NFmin and the actual noise figure NF. Within the operating frequency range, NFmin and NF match well, with a difference of <0.05dB, indicating that the low-noise amplifier has good minimum noise matching and achieves the beneficial effect of broadband minimum noise matching. The lower half of the graph shows the input matching curve (S11). Within the operating frequency range, S11 < -10dB, indicating that the low-noise amplifier has good input matching and achieves the beneficial effect of broadband input power matching.
[0041] Example 2 Please see Figure 2 This refers to the low-noise amplifier circuit diagram with broadband noise matching in Embodiment 2. Figure 2 The output terminal Vout can be connected to the output stage ( Figure 2 (Not shown in the image). The difference between this embodiment and Embodiment 1 is that in this embodiment, the broadband input power matching network and the minimum noise figure expansion network are combined into a fused network for impedance matching and noise figure expansion of the input signal. The fused network includes a first inductor L1, a second inductor L2, a third inductor L3, and a first capacitor C1. The first end of the first inductor L1 is connected to the signal source, and the second end is connected to the first input terminal of the amplifier stage. The first end of the second inductor L2 is connected to the first input terminal of the amplifier stage, and the second end is connected to the second input terminal of the amplifier stage. The first end of the third inductor L3 is connected to the output terminal of the amplifier stage, and the second end is connected to the signal output terminal. The first inductor L1, the second inductor L2, and the third inductor L3 are mutually inductive, forming a coupling network. The first end of the first capacitor C1 is electrically connected to the second end of the third inductor L3, and the second end is grounded.
[0042] Please see Figure 5 The above figure shows the noise simulation diagram of the low-noise amplifier with broadband noise matching in this embodiment. The upper half of the figure shows the curves of NFmin and NF. Within the operating frequency range, NFmin and NF match well, with a difference of <0.05dB, indicating that the minimum noise matching of the low-noise amplifier is good, achieving the beneficial effect of broadband minimum noise matching. The lower half of the figure shows the input matching curve (S11). Within the operating frequency range, S11 < -10dB, indicating that the input matching of the low-noise amplifier is good, achieving the beneficial effect of broadband input power matching.
[0043] The circuit proposed in this invention can achieve both broadband input power matching and broadband minimum noise matching through the synergy of a minimum noise figure extension network and a broadband input power matching network.
[0044] Specifically, the beneficial effect of the amplification stage is to achieve input power matching and minimum noise figure matching for the low-noise amplifier in the low-frequency range. However, this function is narrow-band, and as the frequency increases, the input power matching, minimum noise figure NFmin, and noise figure NF of the low-noise amplifier all deteriorate. In particular, the noise figure NF will differ significantly from the minimum noise figure NFmin. The beneficial effect of the minimum noise figure extension network is to extend the minimum noise figure NFmin of the amplifier to higher frequencies and adjust the optimal input impedance Zopt for achieving this NFmin to near the input impedance of the low-noise amplifier. The beneficial effect of the wideband input power matching network is to change the input impedance of the low-noise amplifier to 50 ohms. Since the minimum noise figure extension network adjusts the optimal input impedance Zopt to near the input impedance of the low-noise amplifier, the input impedance and the optimal input impedance Zopt for achieving minimum noise matching will be simultaneously transformed to near 50 ohms by the wideband input power matching network. This achieves input power matching across the entire operating frequency range while the noise figure approaches the theoretical minimum, improving the performance of the low-noise amplifier and resolving the contradictions of traditional technologies.
[0045] The above description merely illustrates preferred embodiments of the present invention and is quite specific and detailed; however, it should not be construed as limiting the scope of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the inventive concept, and these all fall within the scope of protection of the present invention. Therefore, the scope of protection of this invention should be determined by the appended claims.
Claims
1. A low-noise amplifier for achieving broadband noise matching, characterized in that, include: The system consists of a wideband input power matching network, a minimum noise figure extension network, an amplification stage, and an output stage. A broadband input power matching network, whose input is electrically connected to the signal source, is used for impedance matching of low-noise amplifiers; Minimum noise figure extension network is used to extend the frequency domain of the minimum noise figure NFmin achievable by a low-noise amplifier; The amplifier stage receives a signal that has undergone impedance matching and noise figure expansion at its input, which is used to cancel signal noise and amplify the signal. The output stage, whose input is electrically connected to the output of the amplification stage, is used to buffer and impedance transform the amplified signal from the amplification stage, and output the buffered signal to an external load.
2. The low-noise amplifier for broadband noise matching as described in claim 1, characterized in that, The broadband input power matching network includes a first inductor and a first capacitor. The first terminal of the first capacitor is connected to the input voltage, the second terminal is electrically connected to the first terminal of the first capacitor, and the second terminal of the first capacitor is grounded.
3. The low-noise amplifier for broadband noise matching as described in claim 2, characterized in that, The minimum noise figure spread network includes a second inductor and a third inductor. The first end of the second inductor is electrically connected to the second end of the first inductor, and the first end of the third inductor is electrically connected to the second end of the second inductor. The second ends of the second and third inductors are electrically connected to the two input terminals of the amplifier stage.
4. The low-noise amplifier for broadband noise matching as described in claim 3, characterized in that, The amplification stage includes a first inverter, a second inverter, and a first source follower; the first inverter is used to invert and amplify the input signal, and the first source follower is used to invert the signal that has been inverted and amplified by the first inverter again to output a first signal; the second inverter is used to invert the input signal and output a second signal; the first signal and the second signal are combined at the output of the first source follower and input to the output stage.
5. The low-noise amplifier for broadband noise matching as described in claim 4, characterized in that, The first inverter includes a first PMOS transistor, a first NMOS transistor, and a first resistor. The gates of the first PMOS transistor and the first NMOS transistor are electrically connected, and their common gate is connected to the signal input terminal. The source of the first PMOS transistor is connected to the power supply, and the source of the first NMOS transistor is grounded. The drains of the first PMOS transistor and the first NMOS transistor are electrically connected, and their common drain is connected to the input terminal of the first source follower. The first end of the first resistor is connected to the common gate of the first PMOS transistor and the first NMOS transistor, and the second end is connected to the common drain of the first PMOS transistor and the first NMOS transistor.
6. The low-noise amplifier for broadband noise matching as described in claim 5, characterized in that, The first PMOS transistor and the third NMOS transistor form a first source follower. The drain of the third NMOS transistor is connected to the power supply, the gate of the third NMOS transistor is electrically connected to the common drain of the first PMOS transistor and the first NMOS transistor, and the source of the third NMOS transistor is connected to the input terminal of the output stage.
7. The low-noise amplifier for broadband noise matching as described in claim 6, characterized in that, The second inverter includes a second PMOS transistor and a second NMOS transistor. The gate of the second PMOS transistor is electrically connected to the gate of the second NMOS transistor, and the common gate of the second PMOS transistor and the second NMOS transistor is connected to the signal input terminal. The source of the second PMOS transistor is connected to the power supply, and the source of the second NMOS transistor is grounded. The drain of the second PMOS transistor is electrically connected to the drain of the second NMOS transistor, and the common drain of the second PMOS transistor and the second NMOS transistor is electrically connected to the source of the third NMOS transistor.
8. The low-noise amplifier for broadband noise matching as described in claim 6, characterized in that, The first inverter further includes a fourth inductor, a fifth inductor, a second capacitor, and a third capacitor; the first terminal of the fourth inductor is electrically connected to the common drain of the first PMOS transistor and the first NMOS transistor, and the second terminal is electrically connected to the gate of the third NMOS transistor; the first terminal of the second capacitor is electrically connected to the second terminal of the fourth inductor, and the second terminal of the second capacitor is grounded; the first terminal of the fifth inductor is electrically connected to the source of the third NMOS transistor; the first terminal of the third capacitor is electrically connected to the second terminal of the fifth inductor, and the second terminal of the third capacitor is grounded.
9. The low-noise amplifier achieving broadband noise matching as described in any one of claims 4-8, characterized in that, The output stage includes a fourth NMOS transistor and a fifth NMOS transistor. The gate of the fifth NMOS transistor is electrically connected to the output terminal of the first source follower. The drain of the fifth NMOS transistor is connected to a power supply. The source of the fifth NMOS transistor is electrically connected to the drain of the fourth NMOS transistor. The source and drain of the fifth NMOS transistor are connected to the output terminal together. The gate of the fifth NMOS transistor is electrically connected to the second terminal of the fifth inductor. The gate of the fourth NMOS transistor is connected to a bias voltage. The source of the fourth NMOS transistor is grounded.
10. The low-noise amplifier for broadband noise matching as described in claim 1, characterized in that, The broadband input power matching network and the minimum noise figure expansion network form a fusion network for impedance matching and noise figure expansion of the input signal. The fusion network includes a first inductor, a second inductor, a third inductor, and a first capacitor. The first end of the first inductor is connected to the signal source, and the second end is connected to the first input terminal of the amplification stage. The first end of the second inductor is connected to the first input terminal of the amplification stage, and the second end is connected to the second input terminal of the amplification stage. The first end of the third inductor is connected to the output terminal of the amplification stage, and the second end is connected to the signal output terminal. The first, second, and third inductors are mutually inductive, forming a coupling network. The first end of the first capacitor is electrically connected to the second end of the third inductor, and the second end is grounded.