Method and device for determining code block segmentation of spatially coupled LDPC (Low Density Parity Check) code

Abstract

The embodiment of the invention provides a method and a device for determining code block segmentation of a spatially coupled LDPC (Low Density Parity Check) code, and relates to the technical field of coding and decoding. The method comprises the following steps: an encoder determines the maximum length of an information bit before a first code block is encoded in the SC-LDPC code; wherein the product of the number of the space coupling blocks divided by the first code block and the length of the information bits of the space coupling blocks needs to be greater than or equal to the maximum length of the information bits before the first code block is coded. Since the length of the information bit of the spatial coupling block is determined by the expansion factor, the maximum length of the information bit before the first code block is coded, the number of the spatial coupling blocks divided by the first code block and the incidence relation of the expansion factor can be obtained. Under the condition that the maximum length of the information bits before the first code block is coded is determined, different combination methods of the number of the spatial coupling blocks and the expansion factors can be selected, so that the first code block can be segmented according to the combination methods.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to a method and apparatus for determining the segmentation of spatially coupled LDPC code blocks. Background Technology

[0002] In the field of wireless communication, channel coding is one of the core technologies. The channel coding process mainly includes adding cyclic redundancy check (CRC) codes, code block segmentation, error correction coding, rate adaptation, code block concatenation, data interleaving, and data scrambling. Among these, error correction coding is a key step, mainly ensuring that the receiver can automatically correct errors that occur during data transmission by minimizing redundancy overhead. In 3G and 4G communication systems, the main types of channel coding include linear block codes, convolutional codes, and concatenated codes. However, in 5G communication, due to the increased requirements for channel coding in service scenarios, low-density parity-check (LDPC) codes and polar codes, which offer superior performance, have become the main choices for channel coding.

[0003] With the development of future communication technologies, real-time high-data-rate applications such as extended reality (XR) and immersive services place higher demands on channel coding. Spatially-coupled low-density parity check (SC-LDPC) has become a channel coding scheme in future communications due to its high throughput and low power consumption. However, currently, there are still some steps in the channel coding process of SC-LDPC that lack specific implementation methods. Summary of the Invention

[0004] This application provides a method and apparatus for determining the segmentation of spatially coupled LDPC code blocks. The scheme gives the segmentation rules of SC-LDPC code blocks, and by selecting different numbers of segmented code blocks, the storage consumption can be saved or the decoding performance can be improved.

[0005] The technical solution is as follows:

[0006] In a first aspect, embodiments of this application provide a method for determining the segmentation of a spatially coupled LDPC code block, comprising: an encoder determining the maximum length of information bits before encoding a first code block, wherein the first code block is a code block in an SC-LDPC code. The encoder determines the correlation between the number of spatially coupled blocks into which the first code block is segmented and a spreading factor based on the maximum length of information bits before encoding the first code block. The spreading factor is used to determine the length of information bits in the spatially coupled blocks, and the product of the number of spatially coupled blocks and the length of information bits in the spatially coupled blocks is greater than or equal to the maximum length of information bits before encoding the first code block.

[0007] In this application, the encoder first determines the maximum length of the information bits before encoding the first code block in the SC-LDPC code. Specifically, the product of the number of spatially coupled blocks into which the first code block is divided and the length of the information bits in each spatially coupled block must be greater than or equal to the maximum length of the information bits before encoding the first code block. Since the length of the information bits in each spatially coupled block is determined by the spread factor, the correlation between the maximum length of the information bits before encoding the first code block, the number of spatially coupled blocks into which the first code block is divided, and the spread factor can be obtained. Given a determined maximum length of the information bits before encoding the first code block, different combinations of the number of spatially coupled blocks and the spread factor can be selected to facilitate segmentation of the first code block according to the combination method.

[0008] In one possible implementation, the length of the information bits in the spatially coupled block is determined by the spread factor and the number of columns of information bits in the spatially coupled block.

[0009] As an example, the length of the information bits in a spatially coupled block is the product of the spread factor and the number of columns of information bits in the spatially coupled block. Since the length of the information bits in the spatially coupled block is directly related to the maximum length of the information bits before the first code block is encoded, the relationship between the spread factor and the maximum length of the information bits before the first code block is obtained.

[0010] In one possible implementation, the number of spatial coupling blocks is greater than or equal to 1 and less than or equal to a first parameter value, which is determined by the maximum length of the information bits before the first code block is encoded and the number of columns of information bits in the spatial coupling block.

[0011] As an example, the first parameter value is the ratio of the maximum length of the information bits before encoding the first code block to the number of columns of information bits in the spatially coupled block, rounded up.

[0012] In one possible implementation, the expansion factor is an integer, determined by the maximum length of the information bits before the first code block is encoded, the number of columns of information bits in the spatially coupled block, and the number of spatially coupled blocks.

[0013] As an example, the spread factor is the rounded-up ratio of the maximum length of the information bits before encoding the first code block to the product of the number of columns of information bits in the spatially coupled block and the number of spatially coupled blocks.

[0014] In one possible implementation, the method provided in this application further includes: the encoder determining the number of spatially coupled blocks and the expansion factor based on the correlation between the number of spatially coupled blocks and the expansion factor. The combination of the number of spatially coupled blocks and the expansion factor can be determined according to encoding requirements.

[0015] In one possible implementation, with a fixed length of information bits in the spatially coupled blocks, the number of spatially coupled blocks is inversely proportional to the spread factor. That is, when the number of spatially coupled blocks is large, the spread factor is small; when the number of spatially coupled blocks is small, the spread factor is large. This can satisfy different coding requirements.

[0016] In one possible implementation, the method provided in this application further includes: the encoder determining the length of the information bits in each spatial coupling block based on the maximum length of the information bits before encoding the first code block and the number of spatial coupling blocks. The encoder then places the information bits in each spatial coupling block.

[0017] In one possible implementation, the method provided in this application further includes: an encoder determining the length of padding bits for a first code block, wherein the padding bits are used to fill information bits such that the length of the bits to be encoded in the first code block is divisible by a spread factor. The encoder places the padding bits after the information bits of at least one spatially coupled block. This solves the problem that the maximum length of the information bits before encoding the first code block cannot be divisible by the spread factor.

[0018] In one possible implementation, the length L of the padding bits in the first code block padding The number of spatial coupling blocks C and the length of the information bits of the spatial coupling blocks z·k sub And the maximum length K of the information bits before the first code block is encoded. max Sure.

[0019] As an example, the length L of the padding bits in the first code block padding =z·C·k sub -K max .

[0020] In one possible implementation, the method provided in this application further includes: an encoder determining the length of the parity punctured bits of the first code block. The encoder places the parity punctured bits after the parity bits of at least one spatially coupled block. This can solve the problem that the bits after encoding the first code block may not be divisible by the spread factor, thus enabling rate matching padding.

[0021] In one possible implementation, the length of the parity bit punctured is determined by the spread factor z, the number of spatial coupling blocks C, and the number of columns n of the spatial coupling blocks. sub The number of columns m of parity bits in the spatially coupled block sub And the length N of the first code block after encoding is determined.

[0022] As an example, the length L of the parity bit punched bit RM =z·(C·n sub +m sub )-N.

[0023] In one possible implementation, the method provided in this application further includes: an encoder determining the position of a punctured bit on the information bits in each spatially coupled block; and the encoder setting punctured bits in the information bits of the spatially coupled block according to the position of the punctured bit, thereby achieving the effect of increasing the bit rate.

[0024] In one possible implementation, the method provided in this application further includes: an encoder determining the cyclic redundancy check (CRC) bits of a first code block. The encoder places the CRC bits in at least one spatially coupled block.

[0025] In one possible implementation, the method provided in this application further includes: an encoder determining the length of the tail bit of the first code block. The encoder places the tail bit after the last spatially coupled block.

[0026] As an example, the length of the tail bit is m, which is the number of columns of parity bits in the spatially coupled block. sub .

[0027] Secondly, embodiments of this application provide a method for determining the segmentation of a spatially coupled LDPC code block, comprising: a decoder receiving an SC-LDPC code, the SC-LDPC code including a first code block, the first code block including multiple spatially coupled blocks, wherein the product of the number of spatially coupled blocks and the information bit length of the spatially coupled blocks is greater than or equal to the maximum length of the information bits before encoding the first code block; and the decoder decoding the first code block according to the multiple spatially coupled blocks.

[0028] In one possible implementation, the length of the information bits in each spatially coupled block is determined by the spread factor and the number of columns of information bits in each spatially coupled block.

[0029] In one possible implementation, the method provided in this application embodiment further includes: a decoder determining the position of information bits in each spatially coupled block of the first code block.

[0030] In one possible implementation, the method provided in this application embodiment further includes: a decoder determining the position of the filling bit in each spatially coupled block of the first code block.

[0031] In one possible implementation, the method provided in this application embodiment further includes: a decoder determining the position of a parity punch bit in each spatially coupled block of the first code block.

[0032] In one possible implementation, the method provided in this application embodiment further includes: a decoder determining the position of the punched bit on the information bit in each spatially coupled block of the first code block.

[0033] In one possible implementation, the method provided in this application embodiment further includes: a decoder determining the position of a cyclic redundancy check bit in each spatially coupled block of the first code block.

[0034] In one possible implementation, the method provided in this application embodiment further includes: a decoder determining the position of the tail bit in the first code block.

[0035] Thirdly, embodiments of this application provide an encoder chip, including: a computing unit, a storage unit, and a control unit. The computing unit is responsible for processing the encoder's logical operations, the storage unit is responsible for storing data generated during the computing process, and the control unit is responsible for scheduling and controlling the computing unit and the storage unit.

[0036] In one possible implementation, the computation unit includes: a transport block cyclic redundancy check (TB CRC) unit, a base graph (BG) selection unit, a code block segmentation unit, a code block cyclic redundancy check (CB CRC) unit, an encoding unit, and a code block concatenation unit.

[0037] The code block segmentation unit is used to implement the method in the first aspect or any possible implementation of the first aspect.

[0038] Fourthly, embodiments of this application provide a decoder chip, including: a computing unit, a storage unit, and a control unit. The computing unit is responsible for processing the decoder's logical operations, the storage unit is responsible for storing data generated during the computing process, and the control unit is responsible for scheduling and controlling the computing unit and the storage unit.

[0039] In one possible implementation, the computation unit includes: a rate matching unit, a hybrid automatic repeat request (HARQ) unit, a decoding unit, a codeblock cyclic redundancy check (CB CRC) unit, and a transportblock cyclic redundancy check (TB CRC) unit.

[0040] The decoding unit is used to implement the method in the second aspect or any possible implementation of the second aspect.

[0041] Fifthly, embodiments of this application provide a code block segmentation determination apparatus. This apparatus can implement the method in the first aspect or any possible implementation of the first aspect, and therefore can also achieve the beneficial effects of the first aspect or any possible implementation of the first aspect. The code block segmentation determination can be an encoder, or an apparatus that supports the encoder in implementing the method in the first aspect or any possible implementation of the first aspect, such as a chip applied in an encoder. This apparatus can implement the above method through software, hardware, or hardware executing corresponding software.

[0042] Sixthly, embodiments of this application provide a code block segmentation determination apparatus. This apparatus can implement the method in the second aspect or any possible implementation of the second aspect, and therefore can also achieve the beneficial effects of the second aspect or any possible implementation of the second aspect. The code block segmentation determination can be a decoder, or an apparatus that supports the decoder in implementing the method in the second aspect or any possible implementation of the second aspect, such as a chip applied in a decoder. This apparatus can implement the above method through software, hardware, or hardware executing corresponding software.

[0043] In a seventh aspect, embodiments of this application provide a computer-readable storage medium storing a computer program or instructions that, when executed on a computer, cause the computer to perform a method for determining spatially coupled LDPC code block segmentation as described in any of the possible implementations of the first aspect.

[0044] Eighthly, embodiments of this application provide a computer-readable storage medium storing a computer program or instructions that, when executed on a computer, cause the computer to perform a method for determining spatially coupled LDPC code block segmentation as described in any of the possible implementations of the second aspect.

[0045] In a ninth aspect, embodiments of this application provide a computer program product including instructions that, when executed on a computer, cause the computer to perform a method for determining spatially coupled LDPC code block segmentation as described in the first aspect or various possible implementations of the first aspect.

[0046] In a tenth aspect, embodiments of this application provide a computer program product including instructions that, when executed on a computer, cause the computer to perform a method for determining spatially coupled LDPC code block segmentation as described in the second aspect or various possible implementations of the second aspect.

[0047] Eleventhly, embodiments of this application provide a communication device for implementing various methods in various possible designs of any of the first or second aspects described above. The communication device may be the encoder described above, or a device containing the encoder described above, or a component applied to the encoder (e.g., a chip). Alternatively, the communication device may be the decoder described above, or a device containing the decoder described above, or the communication device may be a component applied to the decoder (e.g., a chip). The communication device includes modules and units corresponding to the methods described above. These modules and units may be implemented in hardware, software, or by hardware executing corresponding software implementations. The hardware or software includes one or more modules or units corresponding to the functions described above.

[0048] It should be understood that the communication device described in aspect eleven above may further include a bus and a memory, the memory being used to store code and data. Optionally, at least one processor communication interface and the memory are coupled to each other.

[0049] In a twelfth aspect, embodiments of this application provide a communication device comprising at least one processor. The at least one processor is coupled to a memory, and when the communication device is in operation, the processor executes computer execution instructions or programs stored in the memory to cause the communication device to perform any of the various possible designs of the first aspect or any other aspect thereof. For example, the communication device may be an encoder, or a chip applied in an encoder.

[0050] In a thirteenth aspect, embodiments of this application provide a communication device comprising at least one processor. The at least one processor is coupled to a memory, and when the communication device is in operation, the processor executes computer execution instructions or programs stored in the memory to cause the communication device to perform any of the methods described in the second aspect or any of the various possible designs of the second aspect. For example, the communication device may be a decoder, or a chip applied in a decoder.

[0051] It should be understood that the memory described in any of the twelfth to thirteenth aspects can also be replaced by a storage medium, and the embodiments of this application do not limit this.

[0052] In one possible implementation, the memory described in any of the twelfth to thirteenth aspects can be a memory inside the communication device. Of course, the memory can also be located outside the communication device, but at least one processor can still execute computer execution instructions or programs stored in the memory.

[0053] In a fourteenth aspect, embodiments of this application provide a communication device comprising one or more modules for implementing the method of any one of the first and second aspects described above. The one or more modules may correspond to the various steps in the method of any one of the first and second aspects described above.

[0054] In a fifteenth aspect, embodiments of this application provide a chip system including a processor. The processor reads and executes a computer program stored in a memory to perform the methods of the first aspect and any possible implementation thereof. Optionally, the chip system may be a single chip or a chip module composed of multiple chips. Optionally, the chip system further includes a memory, which is connected to the processor via a circuit or wire. Further optionally, the chip system also includes a communication interface. The communication interface is used to communicate with other modules outside the chip.

[0055] In a sixteenth aspect, embodiments of this application provide a chip system including a processor. The processor reads and executes a computer program stored in a memory to perform the methods of the second aspect and any possible implementation thereof. Optionally, the chip system may be a single chip or a chip module composed of multiple chips. Optionally, the chip system further includes a memory, which is connected to the processor via circuitry or wiring. Further optionally, the chip system includes a communication interface. The communication interface is used to communicate with other modules outside the chip.

[0056] In a seventeenth aspect, embodiments of this application provide a communication system comprising a first communication device and a second communication device. Both the first and second communication devices include an encoder and a decoder. The encoder implements the method of the first aspect or any possible implementation thereof. The decoder implements the method of the second aspect or any possible implementation thereof.

[0057] Any of the devices, computer storage media, computer program products, chips, or communication systems provided above are used to execute the corresponding methods provided above. Therefore, the beneficial effects they can achieve can be referred to the beneficial effects of the corresponding solutions in the corresponding methods provided above, and will not be repeated here. Attached Figure Description

[0058] Figure 1 This is a communication system architecture diagram provided in an embodiment of this application;

[0059] Figure 2 This is a schematic diagram of a communication scenario provided in an embodiment of this application;

[0060] Figure 3This is a schematic diagram of the architecture of a mobile communication chip system in a communication device provided in an embodiment of this application;

[0061] Figure 4 This is a Tanner diagram of a verification matrix provided in an embodiment of this application;

[0062] Figure 5 This is a schematic diagram of transport block stuffing bits and code block segmentation provided in an embodiment of this application;

[0063] Figure 6 This is a schematic diagram of code block stuffing bits provided in an embodiment of this application;

[0064] Figure 7 This is a Tanner diagram of an SC-LDPC code provided in an embodiment of this application;

[0065] Figure 8 This is a schematic diagram of a sliding window decoding process provided in an embodiment of this application;

[0066] Figure 9 This is a schematic diagram of an SC-LDPC code encoding scheme provided in an embodiment of this application;

[0067] Figure 10 This is a schematic diagram of a method for determining the segmentation of spatially coupled LDPC code blocks provided in an embodiment of this application;

[0068] Figure 11 This is a schematic diagram of another method for determining the segmentation of spatially coupled LDPC code blocks provided in an embodiment of this application;

[0069] Figure 12 This is a schematic diagram illustrating a specific implementation of a method for determining spatially coupled LDPC code block segmentation provided in an embodiment of this application;

[0070] Figure 13 This is a schematic diagram of a specific code block segmentation scheme provided in an embodiment of this application;

[0071] Figure 14 This is a schematic diagram of a code block including information bits, check bits, padding, check bit puncturing bits, puncturing bits, CRC check bits, and tail bits, provided by an embodiment of this application.

[0072] Figure 15 This is a schematic diagram of the chip architecture of an encoder provided in an embodiment of this application;

[0073] Figure 16 This is a schematic diagram of the chip architecture of a decoder provided in an embodiment of this application;

[0074] Figure 17This is a schematic diagram of the hardware structure of a communication device provided in an embodiment of this application;

[0075] Figure 18 This is a schematic diagram of a chip structure provided in an embodiment of this application. Detailed Implementation

[0076] The technical solutions of the embodiments of this application will be described below with reference to the accompanying drawings. In the description of the embodiments of this application, unless otherwise stated, " / " means "or," for example, A / B can mean A or B; "and / or" in this text is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Furthermore, in the description of the embodiments of this application, "multiple" refers to two or more than two.

[0077] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this embodiment, unless otherwise stated, "a plurality of" means two or more.

[0078] Furthermore, the terms “comprising” and “having”, and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus.

[0079] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner to facilitate understanding.

[0080] It should be understood that in this application, "at least one (item)" means one or more. "More than one" means two or more. "At least two (items)" means two or three or more. "And / or" is used to describe the relationship between related objects, indicating that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural.

[0081] The character " / " generally indicates that the preceding and following objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any single or multiple items. For example, "at least one of a, b, or c" can be expressed as: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0082] Both "...when" and "if" indicate that a corresponding action will be taken under certain objective circumstances. They are not time limits, nor do they require a judgment action to be taken when the action is taken, nor do they imply any other limitations.

[0083] The steps involved in the communication method provided in this application embodiment are merely examples. Not all steps are mandatory, nor are all contents of each piece of information or message required. They can be added or removed as needed during use.

[0084] In this application, the same step or a step or message with the same function can be referenced and learned from each other in different embodiments.

[0085] The system architecture and business scenarios described in the embodiments of this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided in the embodiments of this application. As those skilled in the art will know, with the evolution of network architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0086] like Figure 1 As shown, Figure 1 This is a schematic diagram of the architecture of a communication system provided in an embodiment of the application. The communication system includes at least two communication devices. The communication devices can communicate wirelessly using air interface resources. These air interface resources may include, but are not limited to, time-domain resources, frequency-domain resources, code resources, and spatial resources.

[0087] The communication equipment can be either network equipment 110 or terminal equipment 120. For example, network equipment 110 can be a base station, and terminal equipment 120 can be a mobile phone.

[0088] As an example, the communication system includes at least one network device 110 and at least one terminal device 120.

[0089] For example, such as Figure 2 As shown in Figure (a), terminal device 120 is communicatively connected to a network device 110, a scenario that can also be referred to as a point-to-point single connection.

[0090] For example, such as Figure 2 As shown in Figure (b), terminal device 120 is communicatively connected to multiple network devices 110. For example, terminal device 120 is connected to network device 1101, which in turn is connected to network device 1102, and network device 1102 is connected to network device 1103. This scenario is also known as multi-hop single connection.

[0091] For example, such as Figure 2 As shown in Figure (c), terminal device 120 is connected to multiple network devices 110. For example, terminal device 120 is connected to network devices 1104 and 1105 respectively, a scenario also known as dual connectivity.

[0092] For example, such as Figure 2 As shown in Figure (d), multiple network devices 110 are connected to a terminal device 120. For example, terminal device 120 is connected to network devices 1106 and 1107 respectively, while network device 1106 is connected to network device 1108, and network device 1107 is also connected to network device 1108. This scenario is also known as multi-hop multi-connection.

[0093] like Figure 1 The communication system shown can be applied to future network architectures, as well as to fifth-generation (5G) network architectures, etc., and is not limited in this application.

[0094] In this embodiment, network device 110 is a network-side device with wireless transceiver capabilities. The network device can be a device in a RAN that provides wireless communication functions for terminal devices, referred to as RAN equipment. For example, network device 110 can be a base station, an evolved NodeB (eNodeB), a transmission reception point (TRP), a next-generation NodeB (gNB) in a 5th generation (5G) mobile communication system, a next-generation base station in a 6th generation (6G) mobile communication system, a base station in a future mobile communication system, or an access node in a WiFi system; it can also be a module or unit that performs some of the functions of a base station, for example, it can be a central unit (CU) or a distributed unit (DU). The CU here performs the functions of the radio resource control protocol and packet data convergence protocol (PDCP) of the base station, and can also perform the functions of the service data adaptation protocol (SDAP). The DU performs the functions of the radio link control layer and medium access control (MAC) layer of the base station, and can also perform some or all of the physical layer functions. For specific descriptions of the above-mentioned protocol layers, please refer to the relevant technical specifications of the 3rd Generation Partnership Project (3GPP). Network device 110 can be a macro base station, a micro base station, an indoor station, a relay node, or a donor node, etc. The embodiments of this application do not limit the specific technology and specific equipment form adopted by network device 110.

[0095] In this embodiment, the terminal device 120 is a user-side device with wireless transceiver capabilities. It can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted, and can also be a sensor-type device. It can also be deployed on water (such as on ships). Furthermore, it can be deployed in the air (e.g., on airplanes, balloons, and satellites). The terminal device 120 can also be referred to as user equipment (UE), access terminal, user unit, user station, mobile station, mobile station, remote station, remote terminal, mobile equipment, user terminal, wireless telecom equipment, user agent, user equipment, or user device. Terminals can be stations (STAs) in wireless local area networks (WLANs), cellular phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistant (PDA) devices, handheld devices with wireless communication capabilities, computing devices or other processing devices connected to a wireless modem, in-vehicle devices, wearable devices, and terminal devices in next-generation communication systems (e.g., fifth-generation (5G) communication networks) or future public land mobile networks (PLMNs). 5G can also be referred to as New Radio (NR).

[0096] Furthermore, terminal device 120 can also be a wearable device, which is a portable device worn directly on the body or integrated into the user's clothing or accessories. Wearable devices are not merely hardware devices, but also achieve powerful functions through software support, data interaction, and cloud interaction. Broadly defined, wearable smart devices include those with comprehensive functions, large size, and the ability to perform complete or partial functions without relying on a smartphone, such as smartwatches or smart glasses; as well as those focused on a specific application function that require the use of other devices such as smartphones, such as various smart bracelets and smart jewelry for vital sign monitoring. Examples include smartwatches, smart bracelets, and pedometers. Wireless terminals in vehicle-mounted devices (e.g., automobiles, bicycles, electric vehicles, airplanes, ships, trains, high-speed trains, etc.), virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control, smart home devices (e.g., refrigerators, televisions, air conditioners, electricity meters, etc.), intelligent robots, workshop equipment, wireless terminals in self-driving vehicles, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, or wireless terminals in smart homes, and flying devices (e.g., intelligent robots, hot air balloons, drones, airplanes), etc. In this application, for ease of description, the chip deployed in the above-mentioned devices, such as a system-on-a-chip (SOC), baseband chip, or other chip with communication functions, may also be referred to as terminal device 120.

[0097] In the embodiments of this application, the functions of network device 110 can also be executed by modules (such as chips) within network device 110, or by a control subsystem that includes the functions of network device 110. This control subsystem, including the functions of network device 110, can be a control center in the aforementioned application scenarios such as smart grids, industrial control, intelligent transportation, and smart cities. Similarly, the functions of terminal device 120 can also be executed by modules (such as chips or modems) within terminal device 120, or by a device that includes the functions of terminal device 120.

[0098] In this embodiment, the communication process between communication devices is divided into two parts: uplink processing and downlink processing. Uplink processing is used for communication devices to send signals to other communication devices, and uplink processing is used for communication devices to receive signals from other communication devices. For example, network device 110 sends a signal to terminal device 120, or terminal device 120 receives a signal from network device 110.

[0099] like Figure 3 The diagram shows the architecture of a mobile communication chip system in a communication device. Downlink processing performs encoding, modulation, layer mapping, precoding, framing, and inverse fast Fourier transform (IRF) on the data link layer (also known as layer 2) data, and finally processes the data into an over-the-air signal for transmission via IRF. Uplink processing obtains baseband data from the received signal after IRF processing, and then completes physical layer signal processing through fast Fourier transform, deframing, equalization, de-mapping, demodulation, and decoding.

[0100] In communication between devices, due to the inherent characteristics of the channel, such as noise, interference, and fading, direct data transmission is prone to errors. Therefore, encoding is necessary to improve the reliability and efficiency of information transmission. Decoding, the inverse process of encoding, is used to recover the original information from the received encoded signal. Encoding is implemented by an encoder, and decoding by a decoder.

[0101] In existing technologies, coding includes linear block codes, convolutional codes, concatenated codes, etc., each with its own characteristics and performance, suitable for different scenarios. For example, in mobile communication systems of the 3rd generation (3G) and 4th generation (4G) eras, Turbo codes in convolutional codes exhibited excellent performance, approaching the Shannon limit very closely. However, in the 5th generation (5G) era, data transmission rates are orders of magnitude higher than in 4G. For Turbo codes, their serial-processing-based decoders struggle to effectively support such high-speed data transmission. Moreover, the 5G era has seen the emergence of richer service applications and new requirements for channel coding. Therefore, the 5G standard adopts low-density parity-check (LDPC) codes. LDPC codes are block error-correcting codes with sparse parity-check matrices. Compared to linear block codes and convolutional codes, they are not only easier to implement in hardware, but their performance also approaches the Shannon limit, offering superior performance.

[0102] In one possible implementation of this application, for an LDPC code with K information bits and N code length, the dimension of its parity-check matrix H is (NK)×N, and the corresponding codeword c can be defined by the parity-check matrix H as follows:

[0103] c = {c|Hc} T =0, c∈{0,1} N}Formula 1

[0104] In the parity-check matrix H, each row corresponds to a parity-check equation of the LDPC code, and the NK parity-check equations correspond to the NK parity-check nodes of the LDPC code. Each column corresponds to a symbol of the LDPC code, and the N symbols correspond to the N variable nodes of the LDPC code. The non-zero elements h in matrix H... i,j This indicates that the i-th check node and the j-th variable node are connected. In the check matrix H, the number of non-zero elements in each row represents the degree of the check node, and the number of non-zero elements in each column represents the degree of the variable node. If all check nodes have the same degree, all variable nodes also have the same degree, and the LDPC code corresponding to this matrix is ​​a regular code; otherwise, it is an irregular code.

[0105] As an example, a checksum matrix H of a regular LDPC code with a code length of 10 and a code rate of 1 / 2 is shown below, where v0, v1, ..., v9 represent variable nodes, and c0, c1, ..., c4 represent checksum nodes:

[0106]

[0107] In one possible implementation of this application, LDPC codes can be represented using a graph model, with commonly used graph models including Tanner graphs, factor graphs, and tree graphs.

[0108] As an example, using a Tannery plot, the Tannery plot representation of the parity-check matrix H is shown in Figure 4. Figure 4 In a matrix description, the degree of a node can be defined as the number of edges connected to it, corresponding to the definition of degree in the matrix description.

[0109] Building upon LDPC codes, there is a type of quasi-cyclic low-density paritycheck (QC-LDPC) code. QC-LDPC codes are a special type of LDPC code with a quasi-cyclic structure; that is, its parity-check matrix follows a cyclic matrix pattern, allowing larger parity-check matrices to be obtained from smaller fundamental matrices through cyclic shifts and expansions. This structure allows it to maintain the performance advantage of LDPC codes approaching the Shannon limit while being simpler and more efficient in hardware implementation.

[0110] In one possible implementation of this application, for a (N,K) QC-LDPC code, the number of parity bits is M = NK, and the parity check matrix H can be represented as:

[0111]

[0112] Where N = n b ×Z,M=m b ×Z, Z≥1, P i,j A Z×Z cyclic shift matrix or a Z×Z all-zero matrix can be represented by the corresponding cyclic shift coefficient p. i,j To simplify the representation.

[0113] The cyclic shift matrix here is defined as a cyclic right shift matrix of an identity matrix. The shift factor is determined by the number of bits shifted to the right of the first element, and its value ranges from p. i,j ∈[-1,Z max -1].

[0114] Z max It is the maximum value of Z, Z≤Z max p i,j =-1 represents a matrix of all zeros, p i,j =0 represents the identity matrix, 1≤p i,j ≤Z max -1 indicates that each element 1 in the identity matrix is ​​cyclically shifted to the right by p. i,j The matrix obtained by the bit transformation function g(p) i,j (Z) usually has the following form:

[0115]

[0116] Here, % represents the modulo operation.

[0117] As an example, with Z=4, Z max For example, p in LDPC code = 8 i,j The corresponding matrices are the following 9 matrices:

[0118]

[0119] However, Tanner graphs exhibit a special structure called trap sets, which can cause a sharp decline in the decoding performance of LDPC codes in high signal-to-noise ratio regions, resulting in error flattening. Furthermore, when the code length of LDPC codes is large, the computational complexity of the encoding and decoding processes becomes very high. Therefore, it is common practice to split the original signal before transmission, encode it, and then send the encoded signal.

[0120] As an example, the original signal is also called the original source bits, and the original source bits are called a transport block (TB). Before encoding, the TB is split into code blocks (CB) for encoding.

[0121] For example, a TB can be evenly divided into multiple CBs. Let's say the original source bit length is A, and the length after adding a cyclic redundancy check (CRC) is B. Dividing the original information of length B evenly yields C CBs. Then, a CRC is added to each CB to obtain the length of each CB, denoted as K. r .

[0122] It is worth noting that when TB cannot be evenly divided, padding bits can be added at the beginning of the first CB block, such as... Figure 5 As shown, this ensures that the total length is divisible by CB. The added padding length is CB%C.

[0123] As an example, the encoding uses QC-LDPC codes.

[0124] For example, when encoding a TB that has been split into C CBs, the number of bits before encoding must be the same as the length K of the information bits in the parent code parity check matrix. Figure 6 As shown, the length K of the information bits in the mother code parity check matrix is ​​calculated by multiplying the number of columns in the mother code parity check matrix by the matrix expansion factor Z. c If K is obtained. r If the value is less than K, then (KK) needs to be added to the end of each CB. r ) CB padding bits are used to make the length after padding K.

[0125] As an example, during the encoding and transmission process, due to limitations in air interface resources, there may be a discrepancy between the air interface resources and the bit length obtained after encoding. Therefore, it is necessary to first encode according to the master code matrix given by the protocol, and then select the bits to be transmitted from the encoded result.

[0126] For example, each CB block, which is divided before encoding, serves as the input for encoding, denoted as c0, c1, c2, c3, ..., c K-1 Where K is the number of bits before encoding. Encoding with the mother code parity check matrix yields the sequence d0, d1, d2, d3, ..., d... N-1 Where N is the length of the mother code. For example, for basegraph (BG)1, N = 66Z. c For BG2, N = 50Z c Among them, Z cThis is the expansion factor of the LDPC code. Then, for the sequence d0, d1, d2, d3, ..., d... N-1 Rate matching is performed to obtain a sequence of length E: f0, f1, f2, f3, ..., f E-1 The relationship between the two is as follows:

[0127] f k =d kmodN Equation 5 above describes some implementations of channel coding in current 5G communication technology. However, with the development of future communication technologies, such as the emergence of real-time high-data-rate applications like XR and immersive services, the peak throughput and area efficiency of encoding and decoding are increasingly demanding, and the power consumption of decoders needs to be further reduced. Current 5G LDPC codes are no longer sufficient to meet these requirements. Therefore, space-coupled codes, which have the potential to achieve high throughput and low power consumption encoding and decoding, have become the subject of further research.

[0128] Spatially-coupled low-density parity check (SC-LDPC) codes are composed of multiple LDPC codes, where adjacent LDPC codes have local coupling relationships. SC-LDPC coding structures are simpler, and the unique sliding window decoding scheme effectively reduces decoding storage consumption. SC-LDPC codes are also considered a very promising encoding and decoding scheme for future communication technologies.

[0129] As an example, the SC-LDPC code base matrix B based on the original model diagram SC It can be represented as:

[0130]

[0131] Where L represents the coupling length, m s Indicates the coupling depth.

[0132] Basis matrix B SC Each column contains m s +1 submatrix, The size of each submatrix is ​​m0×n0.

[0133] Among them, in the basis matrix B SC Satisfy B i (i)=B i (i+1)=…=B i (i+L), i=0,1,…,m s In this case, it is called a time-invariant SC-LDPC code; in the basis matrix B SC Not satisfied with B i (i)=Bi (i+1)=…=B i (i+L), i=0,1,…,m s In this case, it is called a time-varying SC-LDPC code. In the embodiments of this application, time-invariant SC-LDPC is used for illustration.

[0134] The parity-check matrix B of the SC-LDPC code is used as the basis matrix. SC Expand the matrix and denote the expanded matrix as H. SC Size is [m0(m s The offset matrix corresponding to +L)·Z]×(n0L·Z) is denoted as P SC Each element p in i,j To satisfy p i,j Integers ≥ -1. If p i,j =-1, it can be expanded into a zero matrix of size Z×Z; otherwise, it can be expanded into a cyclic shift matrix of size Z×Z identity matrix, where the p-th element in the 0th row of the matrix is ​​the zero matrix. i,j Each element is represented as 1.

[0135] Similar to LDPC, time-invariant SC-LDPC codes can also be represented using Tanner diagrams. For example, let m s =1, select a subset of variable nodes on the uncoupled Tanner graph at time t and connect them to the next m. s Verification nodes on a Tanner graph. Figure 7 Figure (a) in the diagram represents the LDPC code used for coupling. Figure 7 Figure (b) in the middle represents the... Figure 7 The Tanner graph shown in Figure (a) is copied L times and coupled to generate SC-LDPC codes.

[0136] When time-invariant SC-LDPC codes undergo L-column truncation, additional check nodes are added and connected to the variable nodes from the previous time step. This results in a loss of code rate. The code rate of SC-LDPC codes is related to the coupling length L and coupling depth m. s Related, when m s When L is constant, increasing L can reduce bitrate loss. When L is infinitely large, bitrate loss is almost non-existent.

[0137] During decoding, the SC-LDPC code can be used to decode the entire parity check matrix H. sC Decoding can also be performed using sliding window decoding. The process of sliding window decoding is illustrated below. Figure 8As shown, the window size remains constant and slides sequentially to the lower right (moving from the solid-line rectangle to the dashed-line rectangle), decoding only the portion within the matrix window at a time. Sliding-window decoding reduces complexity and decoding latency.

[0138] like Figure 9 As shown, Figure 9 This is a schematic diagram of the SC-LDPC code encoding scheme. An SC-LDPC code consists of C blocks and one tail bit block. Each block is considered an LDPC code unit, containing source bits and encoded parity bits. The total length of the input source bits is K. max They are divided into different blocks, and the encoding is performed sequentially according to the blocks.

[0139] For example, when encoding the first block, only source bit 1 needs to be encoded to obtain parity bit 1. For subsequent blocks, parity bit 2 needs to be obtained by adding source bit 1, parity bit 1, and source bit 2; parity bit 3 needs to be obtained by adding source bit 2, parity bit 2, and source bit 3, and so on.

[0140] It is worth noting that for the last block, the tail parity bit needs to be obtained by adding 4 parity bits to the source bit. This ensures the error correction capability of the last block.

[0141] The above encoding method establishes coupling relationships between adjacent blocks. During decoding, this inter-block coupling allows for more efficient information exchange. At the same performance level, SC-LDPC codes require fewer iterations than LDPC codes, achieving higher throughput. During decoding, SC-LDPC codes can utilize a special sliding window decoding structure, which helps reduce decoding storage consumption. However, there is currently no specific block segmentation method for SC-LDPC codes. Furthermore, unlike LDPC codes, the coupled structure of multiple blocks in SC-LDPC codes requires specific design considerations for information bit placement and padding methods, rate matching methods, puncturing schemes, CRC check bit placement, and tail bit settings, none of which are addressed in existing technologies.

[0142] Based on this, embodiments of this application provide a method and apparatus for determining the segmentation of spatially coupled LDPC code blocks. The method first determines the correlation between the number of spatially coupled codes to be segmented into a code block and the spread factor based on the maximum length of the information bits before the code block is encoded, and then determines the number of spatially coupled codes to be segmented into a code block in combination with the optimization objective, thereby determining the specific segmentation method of the code block.

[0143] In this application embodiment, the specific structure of the execution entity of the spatially coupled LDPC code block segmentation determination method is not particularly limited, as long as it can communicate according to the communication method of this application embodiment by running a program that records the code of the spatially coupled LDPC code block segmentation determination method of this application embodiment. For example, the execution entity of the spatially coupled LDPC code block segmentation determination method provided in this application embodiment can be a functional module in the encoder that can call and execute the program, or a communication unit applied in the encoder, such as a chip, chip system, integrated circuit, etc. These chips, chip systems, and integrated circuits can be disposed inside the encoder or can be independent of the encoder, and this application embodiment does not impose any restrictions.

[0144] The following is combined with, for example Figure 1 The communication system shown illustrates an embodiment of this application. During wireless communication between two communication devices, for example... Figure 2 In the point-to-point single-connection scenario shown in Figure (a), before transmitting data to the terminal device 120, the network device 110 needs to encode the data. The encoded data is then processed by the network device 110 before being sent to the terminal device 120. After receiving the data, the terminal device 120 first processes it, then decodes the data using a decoder, and finally completes the data transmission.

[0145] In this process, data encoding is performed by the encoder in network device 110, and data decoding is performed by the decoder in terminal device 120. Before encoding, the encoder also needs to perform code block segmentation. The following embodiments use an encoder as an example to describe a method for determining code block segmentation of spatially coupled LDPC codes. Where there is no conflict, the solutions in the following embodiments can be combined.

[0146] like Figure 10 As shown, Figure 10 This application illustrates a method for determining the segmentation of spatially coupled LDPC code blocks, as provided in an embodiment of the present application. The method includes:

[0147] Step 1001: The encoder determines the maximum length of information bits before encoding the first code block. The first code block is a code block in the SC-LDPC code.

[0148] As an example, when encoding SC-LDPC codes, the encoder can divide the SC-LDPC code into multiple code blocks for encoding, or it can encode the SC-LDPC code as a single code block. In the embodiments of this application, the first code block is one of the multiple code blocks into which the SC-LDPC code is divided, or the first code block is a single code block corresponding to the SC-LDPC code.

[0149] For example, an SC-LDPC code includes code block 1, code block 2, and code block 3. The maximum length of the information bits before encoding code block 1 is K1, the maximum length of the information bits before encoding code block 2 is K2, and the maximum length of the information bits before encoding code block 3 is K3. When the first code block is code block 1, the encoder determines that the maximum length of the information bits before encoding the first code block is K1. When the first code block is code block 2, the encoder determines that the maximum length of the information bits before encoding the first code block is K2. When the first code block is code block 3, the encoder determines that the maximum length of the information bits before encoding the first code block is K3.

[0150] For example, an SC-LDPC code corresponds to a code block, where the maximum length of the information bits before encoding is K. max The encoder determines that the maximum length of the information bits before encoding this code block is K. max .

[0151] The information bits are used to represent the amount of valid information transmitted during the encoding of the first code block. For example, in addition to information bits, the first code block also includes parity bits.

[0152] Step 1002: The encoder determines the correlation between the number of spatially coupled blocks into which the first code block is divided and the spread factor, based on the maximum length of the information bits before encoding the first code block.

[0153] The spread factor is used to determine the length of the information bits in the spatially coupled block. The product of the number of spatially coupled blocks and the length of the information bits in the spatially coupled block is greater than or equal to the maximum length of the information bits before the first code block is encoded.

[0154] As an example, assuming the number of spatial coupling blocks is C, and the length of the information bits in each spatial coupling block is k, then the product of the number of spatial coupling blocks C and the length of the information bits in each spatial coupling block is greater than or equal to the maximum length of the information bits before the first code block is encoded.

[0155] For example, if the length of the information bits before encoding the first code block is 10, and assuming the number of spatially coupled blocks is 4, then the length of the information bits in each spatially coupled block is 3. Alternatively, if the length of the information bits before encoding the first code block is 10, and assuming the number of spatially coupled blocks is 5, then the length of the information bits in each spatially coupled block is 2.

[0156] In one possible embodiment of this application, the length of the information bits in the spatially coupled block is determined by the expansion factor and the number of columns of information bits in the spatially coupled block.

[0157] As an example, the length of the information bits in a spatially coupled block is the product of the expansion factor and the number of columns of information bits in the spatially coupled block. For instance, if the length of the information bits in the spatially coupled block is B, then B = k. sub ·z, where k sub Let z be the number of columns of information bits in the spatially coupled block, and z be the expansion factor.

[0158] In one possible implementation of this application, since the length of the information bits of the spatially coupled block is determined by the product of the spread factor and the number of columns of information bits in the spatially coupled block, the maximum length of the information bits before the first code block is encoded is determined by the number of spatially coupled blocks, the spread factor, and the number of columns of information bits in the spatially coupled block.

[0159] As an example, the encoder encodes the information bits before the first code block according to the maximum length K. max The number of spatial coupling blocks C and the expansion factor z satisfy the following relationship: K max ≤k sub ·C·z.

[0160] In this application, the encoder first determines the maximum length of the information bits before encoding the first code block in the SC-LDPC code. Specifically, the product of the number of spatially coupled blocks into which the first code block is divided and the length of the information bits in each spatially coupled block must be greater than or equal to the maximum length of the information bits before encoding the first code block. Since the length of the information bits in each spatially coupled block is determined by the spread factor, the correlation between the maximum length of the information bits before encoding the first code block, the number of spatially coupled blocks into which the first code block is divided, and the spread factor can be obtained. Given a determined maximum length of the information bits before encoding the first code block, different combinations of the number of spatially coupled blocks and the spread factor can be selected to facilitate segmentation of the first code block according to the combination method.

[0161] Step 1003: The encoder determines the number of spatially coupled blocks and the expansion factor based on the correlation between the number of spatially coupled blocks into which the first code block is divided and the expansion factor.

[0162] As an example, when the number of columns of information bits in a spatially coupled block is fixed, the number of spatially coupled blocks is inversely proportional to the spread factor.

[0163] For example, if the length of the information bits before encoding the first code block is 300, and the number of columns of information bits in the spatially coupled block is 2, then the product of the number of spatially coupled blocks C and the expansion factor z is a fixed value. Therefore, when the number of spatially coupled blocks C is large, the expansion factor z is small; when the number of spatially coupled blocks C is small, the expansion factor z is large.

[0164] In one possible embodiment of this application, the number of spatial coupling blocks is greater than or equal to 1 and less than or equal to a first parameter value. The first parameter value is determined by the maximum length of the information bits before encoding the first code block and the number of columns of information bits in the spatial coupling block.

[0165] As an example, the first parameter value is the maximum length K of the information bits before the first code block is encoded. max The number of columns k of information bits in the spatially coupled block sub The ratio is rounded up.

[0166] For example, the number C of spatial coupling blocks satisfies the following formula 7:

[0167]

[0168] For example, if the length of the information bits before encoding the first code block is 10, and the number of columns of information bits in the spatially coupled block is 3, then the ratio of the maximum length of the information bits before encoding the first code block (10) to the number of columns of information bits in the spatially coupled block (3), rounded up, is 4. Therefore, the number of spatially coupled blocks, C, ranges from 1 to 4.

[0169] For example, if the length of the information bits before encoding the first code block is 10, and the number of columns of information bits in the spatially coupled block is 2, then the ratio of the maximum length of the information bits before encoding the first code block (10) to the number of columns of information bits in the spatially coupled block (2) is 5. Therefore, the number of spatially coupled blocks, C, ranges from 1 to 5.

[0170] In one possible embodiment of this application, the expansion factor is an integer, and the expansion factor is determined by the maximum length of the information bits before the first code block is encoded, the number of columns of information bits in the spatial coupling block, and the number of spatial coupling blocks.

[0171] As an example, the spread factor z is the maximum length K of the information bits before the first code block is encoded. max The number of columns k of information bits in the spatially coupled block. sub The ratio of the product of the number of spatial coupling blocks C and the number of spatial coupling blocks is rounded up.

[0172] For example, the expansion factor z satisfies the following formula 8:

[0173]

[0174] It is worth noting that the number of columns k of the information bits in the spatially coupled block sub It can also be determined by the number of columns n of the spatially coupled block bits. sub The number of columns of parity bits m sub It means that k sub =n sub -m subTherefore, Formula 8 above can also be equivalent to Formula 9:

[0175]

[0176] For example, if the length of the information bits before encoding the first code block is 300, and the number of columns of information bits in the spatial coupling block is 2, then the range of the number of spatial coupling blocks C is 1 to 150. When the number of spatial coupling blocks C is 10, the spread factor z is equal to the ratio of the product of the length of the information bits before encoding the first code block being 300, the number of columns of information bits in the spatial coupling block being 2, and the number of spatial coupling blocks being 10, which is 15.

[0177] In this embodiment of the application, after determining the segmentation method of the first code block based on the correlation between the number of spatial coupling blocks C and the spread factor z, it is also necessary to determine the placement method of information bits and padding bits in the first code block, the rate matching method, the puncturing setting method, the cyclic redundancy check bit setting method, and the tail bit placement method.

[0178] The method provided in this application further includes: the encoder determining the length of the information bits in each spatial coupling block based on the maximum length of the information bits before encoding the first code block and the number of spatial coupling blocks. The encoder then places the information bits in each spatial coupling block.

[0179] In one possible implementation, the encoder distributes the information bits before encoding the first code block evenly to each spatially coupled block.

[0180] For example, the encoder determines the length of the information bits in each spatially coupled block as: And place the information bits on each spatial coupling block.

[0181] In another possible implementation, the encoder distributes information bits of unequal length to one or more spatially coupled blocks before encoding the first code block.

[0182] For example, the encoder determines the length of the information bits in each of the C spatially coupled codes. The length of the information bits in each spatially coupled code is different, and the sum of the lengths of the information bits in the C spatially coupled codes equals the maximum length of the information bits before the first code block is encoded.

[0183] For example, the encoder determines the length of the information bits in M ​​spatially coupled codes out of C spatially coupled codes. Here, M is less than C. The sum of the lengths of the information bits in the M spatially coupled codes is equal to the maximum length of the information bits before encoding the first code block.

[0184] In this embodiment, since the length of the SC-LDPC code's encoded bits is not necessarily divisible by the spread factor, padding with zeros is required. The method provided in this embodiment further includes: the encoder determining the length L of the padding bits for the first code block. padding Padding bits are used to fill in the information bits so that the length of the bits to be encoded in the first code block is divisible by the spread factor. The encoder places the padding bits after the information bits of at least one spatially coupled block.

[0185] The length of the padding bits in the first code block is determined by the spread factor z, the number of spatially coupled blocks C, and the length of the information bits in the spatially coupled blocks k. sub And the maximum length K of the information bits before the first code block is encoded. max Sure.

[0186] As an example, the length L of the padding bits in the first code block padding =z·C·k sub -K max .

[0187] In one possible implementation, the encoder distributes the padding bits of the first code block evenly to each spatially coupled block.

[0188] For example, the encoder determines the length of the padding bits in each spatially coupled block as: And place the padding bits on each spatial coupling block.

[0189] In another possible implementation, the encoder distributes the padding bits of the first code block to one or more spatially coupled blocks with unequal lengths.

[0190] For example, the encoder determines the length of the padding bits in M ​​spatially coupled codes out of C spatially coupled codes. Here, M is less than C. The sum of the lengths of the padding bits in the M spatially coupled codes is equal to the length of the padding bits in the first code block.

[0191] In another possible implementation, the encoder places the padding bits of the first code block in the last spatially coupled block of the C spatially coupled blocks.

[0192] For example, the first code block is divided into five spatially coupled codes: C1, C2, C3, C4, and C5. The encoder places the padding bits of the first code block after the information bits in C5.

[0193] In this embodiment, since the encoded bits of the SC-LDPC code are not necessarily divisible by z, rate matching padding is required. Therefore, the method provided in this embodiment further includes: the encoder determining the length L of the parity bit punched in the first code block. RMThe encoder places the parity bit punched after the parity bit of at least one spatially coupled block.

[0194] The length of the punctured check bit is determined by the spread factor z, the number of spatial coupling blocks C, and the number of columns n of the spatial coupling blocks. sub The number of columns m of parity bits in the spatially coupled block sub And the length N of the first code block after encoding is determined.

[0195] As an example, the length L of the parity bit punched bit RM =z·(C·n sub +m sub )-N.

[0196] In one possible implementation, the encoder evenly distributes the check bit punch bits to each spatial coupling block.

[0197] For example, the encoder determines the length of the check bit puncturing bit in each spatially coupled block as: The parity bit punched is placed after the parity bit in each spatially coupled block.

[0198] In another possible implementation, the encoder distributes the parity bit punch bits of the first code block of unequal length to one or more spatially coupled blocks.

[0199] For example, the encoder determines the length of the parity punctured bits in M ​​spatially coupled codes out of C spatially coupled codes. Here, M is less than C. The sum of the lengths of the parity punctured bits in the M spatially coupled codes is equal to the length of the parity punctured bits in the first code block.

[0200] In another possible implementation, the encoder places the parity bit punch bit of the first code block in the last spatially coupled block of the C spatially coupled blocks.

[0201] For example, the first code block is divided into five spatially coupled codes: C1, C2, C3, C4, and C5. The encoder places the parity bit punched in the first code block after the parity bit in C5.

[0202] In this embodiment, the bit rate can be increased by setting puncture bits in each spatial coupling block. The method provided in this embodiment further includes: an encoder determining the position of the puncture bits on the information bits in each spatial coupling block; and the encoder setting puncture bits in the information bits of the spatial coupling block according to the position of the puncture bits.

[0203] In one possible implementation, within each spatial coupling block, the top n... punc The column information bits are used as punched bits. Where n punc =0,1,2.

[0204] For example, the information bits in the spatial coupling block include 5 columns. The encoder selects the first two columns as punched bits; or, the encoder selects the first column as punched bits; or, the encoder does not set any punched bits.

[0205] It is worth noting that the number of punctured bits in each spatial coupling block can be the same or different.

[0206] The method provided in this application further includes: an encoder determining the cyclic redundancy check (CRC) bits of the first code block. The encoder places the CRC bits in at least one spatially coupled block.

[0207] In one possible implementation, the encoder distributes the CRC check bits of the first code block evenly to each spatially coupled block.

[0208] In another possible implementation, the encoder distributes the CRC check bits of the first code block to one or more spatially coupled blocks with unequal lengths.

[0209] For example, the encoder determines the length of the padding bits in M ​​spatially coupled codes out of C spatially coupled codes. Here, M is less than C. The sum of the lengths of the padding bits in the M spatially coupled codes is equal to the length of the padding bits in the first code block.

[0210] In another possible implementation, the encoder places the CRC check bit of the first code block in the last spatially coupled block of the C spatially coupled blocks.

[0211] For example, the first code block is divided into five spatially coupled codes: C1, C2, C3, C4, and C5. The encoder sets the CRC check bit of the first code block at the end of the information bits in C5.

[0212] The method provided in this application embodiment further includes: the encoder determining the length m of the tail bit of the first code block. sub The encoder places the tail bit after the last spatial coupling block.

[0213] For example, the encoder places the tail bit after the last spatially coupled code in the C spatially coupled codes.

[0214] The following embodiments use a decoder as an example to describe a method for determining code block segmentation of spatially coupled LDPC codes. Where there is no conflict, the solutions in the following embodiments can be combined.

[0215] like Figure 11 As shown, Figure 11This application illustrates a method for determining the segmentation of spatially coupled LDPC code blocks, as provided in an embodiment of the present application. The method includes:

[0216] Step 1101: The decoder receives the SC-LDPC code.

[0217] The SC-LDPC code includes a first code block, which includes multiple spatially coupled blocks. The product of the number of spatially coupled blocks and the information bit length of the spatially coupled blocks is greater than or equal to the maximum length of the information bits before the first code block is encoded.

[0218] Step 1102: The decoder performs corresponding processing on the bits in the first code block.

[0219] The bits in the first code block include information bits, padding bits, parity bit punching bits, punching bits, CRC check bits, and tail bits.

[0220] As an example, each spatially coupled block in the first code block contains information bits, padding bits, parity bit puncturing bits, and puncture bits. The last spatially coupled block contains CRC check bits. A tail bit is placed after the last spatially coupled block.

[0221] In one possible implementation, the decoder initializes the information bits, CRC check bits, and tail bits in the first code block with log-likelihood ratio (LLR) values, and initializes the padding bits, parity bit punching bits, and punching bit LLR in the first code block to 0.

[0222] Step 1103: The decoder decodes the first code block based on multiple spatially coupled blocks.

[0223] Optionally, the method provided in this application embodiment further includes: a decoder determining the position of information bits in each spatially coupled block of the first code block.

[0224] The position of the information bit in each spatial coupling block can be any of the information bit positions implemented in the above embodiments, which will not be elaborated here.

[0225] Optionally, the method provided in this application embodiment further includes: a decoder determining the position of the padding bit in each spatially coupled block of the first code block.

[0226] The position of the padding bit in each spatial coupling block can be any of the padding bit positions implemented in the above embodiments, and will not be elaborated here.

[0227] Optionally, the method provided in this application embodiment further includes: a decoder determining the position of the parity punch bit in each spatially coupled block of the first code block.

[0228] The position of the punctured bit in each spatial coupling block can be any of the filling bit positions implemented in the above embodiments, and will not be elaborated here.

[0229] Optionally, the method provided in this application embodiment further includes: a decoder determining the position of the punctured bit on the information bit in each spatially coupled block of the first code block.

[0230] The position of the punched bit in each spatial coupling block can be any of the filling bit positions implemented in the above embodiments, which will not be elaborated here.

[0231] Optionally, the method provided in this application embodiment further includes: the decoder determining the position of the cyclic redundancy check bit in each spatially coupled block of the first code block.

[0232] The position of the cyclic redundancy check bit in the first code block can be any of the cyclic redundancy check bit positions implemented in the above embodiments, and will not be described again here.

[0233] Optionally, the method provided in this application embodiment further includes: a decoder determining the position of the tail bit in the first code block.

[0234] In the first code block, the position of the tail bit can be after the last spatially coupled block among the C spatially coupled blocks.

[0235] The following explanation uses an SC-LDPC code consisting of a first code block as an example to illustrate the specific implementation method of code block segmentation. The maximum length of the information bits before encoding the first code block is K. max The encoded length is N. For example... Figure 12 As shown, Figure 12 This is a schematic diagram illustrating the specific process of code block segmentation for an embodiment of the present application. The specific method includes:

[0236] Step 1201: The encoder of the first communication device determines that the maximum length of the information bits before encoding the first code block is K. max .

[0237] Step 1202: The encoder of the first communication device determines the number C of spatial coupling blocks and the length k of the spatial coupling block information bits. sub The spread factor z and the maximum length K of the information bits before encoding the first code block. max The association relationship is k sub ·C·z≥K max .

[0238] Step 1203: The encoder of the first communication device determines the number C of spatial coupling blocks.

[0239] The number C of spatial coupling blocks satisfies the following relation: The number C of spatial coupling blocks can be selected in different sizes according to different needs.

[0240] Step 1204: The encoder of the first communication device determines the spread factor z based on the number C of spatial coupling blocks.

[0241] Wherein, the expansion factor z satisfies the relation With the number of spatially coupled blocks C fixed, the expansion factor z is also determined.

[0242] As an example, to reduce storage resource consumption during decoding, a larger number of spatially coupled blocks C and a smaller spread factor z can be chosen. This results in smaller storage resource consumption when using sliding window decoding due to the smaller length and larger number of spatially coupled blocks. For example, ... Figure 13 As shown in Figure (a), the number of spatial coupling blocks C is selected as 10, and the expansion factor z is 5.

[0243] As an example, to balance the storage resources consumed during decoding with decoding performance, a moderate number of spatially coupled blocks C and a moderate spread factor z can be chosen. For example, ... Figure 13 As shown in Figure (b), the number of spatial coupling blocks C is selected as 5, and the expansion factor z is 30.

[0244] As an example, to improve decoding performance, a smaller number of spatially coupled blocks C and a larger spread factor z can be chosen. This results in stronger coupling between the spatially coupled blocks, thus improving decoding performance. For example, ... Figure 13 As shown in Figure (c), the number of spatial coupling blocks C is selected as 3, and the expansion factor z is 50.

[0245] Step 1205: The encoder of the first communication device determines the placement position of the information bits, the padding method, the rate matching method, the puncturing method, the placement method of the CRC check bits, and the setting method of the tail bits according to the segmentation scheme of the first code block.

[0246] As an example, the encoder determines that the information bits before encoding the first code block are evenly distributed in each spatial coupling block; determines that the padding bits are evenly distributed in each spatial coupling block; determines that the total check bit puncture bits are evenly distributed in each spatial coupling block; determines that the first n columns (n ​​= 0, 1, 2) of the information bits in each spatial coupling block are puncture bits; determines that the CRC check bits are placed in the last spatial coupling block; and determines that the tail bits are placed after the last spatial coupling block.

[0247] For example, such as Figure 14As shown, taking a spatial coupling block of 4 as an example, it includes information bits, check bits, padding, check bit punching bits, punching bits, CRC check bits, and tail bits.

[0248] The encoder divides the information bits of the first code block into four spatial coupling blocks, each containing 1401 information bits. The length of each information bit 1401 is...

[0249] The encoder distributes the total padding bits evenly across four spatial coupling blocks, resulting in 1402 padding bits in each block. The length of each 1402 padding bits is...

[0250] The encoder distributes the total parity bits into four spatial coupling blocks, with each spatial coupling block containing 1404 parity bits. The length of each 1404 parity bits is... It is located after parity bit 1403.

[0251] The encoder punches the first column bit of the information bit 1401 in each spatial coupling block, which is the punched bit 1405 in each spatial coupling block.

[0252] The encoder places the CRC check bit 1406 between the information bit 1401 and the padding bit 1402 in the fourth spatial coupling block.

[0253] The encoder places the tail bit 1407 after the fourth spatial coupling block.

[0254] Step 1206: The encoder of the first communication device encodes the segmented first code block, then the first communication device obtains the signal through downlink processing and sends the signal to the second communication device. Correspondingly, the second communication device receives the signal.

[0255] The second communication device performs uplink processing on the received signal, and then the decoder of the second communication device receives the SC-LDPC code.

[0256] Step 1207: The decoder of the second communication device determines the placement of information bits, padding method, rate matching method, puncturing method, CRC check bit placement method, and tail bit setting method.

[0257] The specific method corresponds to the implementation method in step 1205, and will not be repeated here.

[0258] Step 1208: The decoder of the second communication device decodes the first code block according to the segmentation method of the first code block.

[0259] The above description primarily focuses on the interaction between communication devices in this application. It is understood that the encoder and decoder, in order to achieve the aforementioned functions, include corresponding structures and / or software modules for executing each function. Those skilled in the art should readily recognize that, based on the units and algorithm steps of the examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0260] Figure 15 The diagram illustrates an encoder chip architecture according to an embodiment of this application, including a computing unit 1501, a storage unit 1502, and a control unit 1503. The computing unit 1501 is responsible for processing the encoder's logical operations, the storage unit 1502 is responsible for storing data generated during the computing process, and the control unit 1503 is responsible for scheduling and controlling the computing unit 1501 and the storage unit 1502.

[0261] The calculation unit 1501 includes: a transport block cyclic redundancy check (TB CRC) unit, a base graph (BG) selection unit, a code block segmentation unit, a code block cyclic redundancy check (CB CRC) unit, an encoding unit, and a code block concatenation unit.

[0262] The code block segmentation unit is used to segment SC-LDPC code blocks based on the code block segmentation method determined in steps 1001 to 1002 of the above embodiments.

[0263] Figure 16 A schematic diagram of a decoder chip architecture provided in an embodiment of this application is shown, including: a computing unit 1601, a storage unit 1602, and a control unit 1603. The computing unit 1601 is responsible for processing the logical operations of the decoder, the storage unit 1602 is responsible for storing data during the computing process, and the control unit 1603 is responsible for scheduling and controlling the computing unit 1601 and the storage unit 1602.

[0264] The calculation unit 1601 includes: a rate matching unit, a hybrid automatic repeat request (HARQ) unit, a decoding unit, a code block cyclic redundancy check (CB CRC) unit, and a transport block cyclic redundancy check (TB CRC) unit.

[0265] The decoding unit is used to execute steps 1101 to 1102 in the above embodiments.

[0266] Figure 17 This diagram illustrates the hardware structure of a communication device according to an embodiment of this application. The hardware structures of the terminal device and network device in this embodiment can be referenced as follows: Figure 17 The structure shown is described. The communication device includes a processor 1701, a communication line 1704, and at least one transceiver. Figure 17 (The illustration is merely exemplary, using transceiver 1703 as an example only).

[0267] The processor 1701 may be a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits used to control the execution of programs according to the present application.

[0268] Communication line 1704 may include a path for transmitting information between the aforementioned components.

[0269] Transceiver 1703 is a device that uses any transceiver class for communicating with other devices or communication networks, such as Ethernet, radio access network (RAN), wireless local area networks (WLAN), etc.

[0270] Optionally, the communication device may also include a memory 1702.

[0271] Memory 1702 may be a read-only memory (ROM) or other type of static storage device capable of storing static information and instructions, random access memory (RAM) or other type of dynamic storage device capable of storing information and instructions, or electrically erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but not limited thereto. Memory 1702 may exist independently and be connected to processor 1701 via communication line 1704. Memory 1702 may also be integrated with processor 1701.

[0272] The memory 1702 stores computer execution instructions for implementing the scheme of this application, and its execution is controlled by the processor 1701. The processor 1701 executes the computer execution instructions stored in the memory 1702, thereby implementing the communication method provided in the following embodiments of this application.

[0273] Optionally, the computer execution instructions in the embodiments of this application may also be referred to as application code, and the embodiments of this application do not specifically limit this.

[0274] In a specific implementation, as one example, the processor 1701 may include one or more CPUs, for example... Figure 17 CPU0 and CPU1 in the CPU.

[0275] In a specific implementation, as one example, the communication device may include multiple processors, for example... Figure 17 Processors 1701 and 1702 are mentioned. Each of these processors can be a single-core (single-CPU) processor or a multi-core (multi-CPU) processor. A processor here can refer to one or more devices, circuits, and / or processing cores used to process data (such as computer program instructions).

[0276] Figure 18 This is a schematic diagram of the structure of chip 180 provided in an embodiment of this application. Chip 180 includes one or more (including two) processors 1810 and communication interfaces 1830.

[0277] Optionally, the chip 180 also includes a memory 1840, which may include read-only memory and random access memory, and provides operation instructions and data to the processor 1810. A portion of the memory 1840 may also include non-volatile random access memory (NVRAM).

[0278] In some implementations, memory 1840 stores elements such as execution modules or data structures, or subsets thereof, or extended sets thereof.

[0279] In this embodiment of the application, the corresponding operation is executed by calling the operation instructions stored in the memory 1840 (the operation instructions can be stored in the operating system).

[0280] One possible implementation is that the terminal and network devices have similar structures, and different devices can use different chips to achieve their respective functions.

[0281] The processor 1810 controls the processing operations of any terminal or network device. The processor 1810 can also be referred to as a central processing unit (CPU).

[0282] Memory 1840 may include read-only memory and random access memory, and provides instructions and data to processor 1810. A portion of memory 1840 may also include NVRAM. For example, in an application, memory 1840, communication interface 1830, and memory 1840 are coupled together via bus system 1820, which may include, in addition to data bus, power bus, control bus, and status signal bus, etc. However, for clarity, in... Figure 18 The general labeled all buses as Bus System 1820.

[0283] In this embodiment, the terminal device or network device includes a hardware layer, an operating system layer running on top of the hardware layer, and an application layer running on top of the operating system layer. The hardware layer includes hardware such as a central processing unit (CPU), a memory management unit (MMU), and memory (also called main memory). The operating system can be any one or more computer operating systems that implement business processing through processes, such as Linux, Unix, Android, iOS, or Windows. The application layer includes applications such as browsers, address books, word processing software, and instant messaging software. Furthermore, this embodiment does not specifically limit the specific structure of the execution entity of the method provided in this embodiment, as long as it can communicate according to the method provided in this embodiment by running a program that records the code of the method provided in this embodiment. For example, the execution entity of the method provided in this embodiment can be a terminal device or a network device, or a functional module in the terminal device or network device that can call and execute a program.

[0284] Furthermore, various aspects or features of this application can be implemented as methods, apparatus, or articles of manufacture using standard programming and / or engineering techniques. The term "article of manufacture" as used herein encompasses a computer program accessible from any computer-readable device, carrier, or medium. For example, computer-readable media may include, but are not limited to: magnetic storage devices (e.g., hard disks, floppy disks, or magnetic tapes), optical discs (e.g., compact discs (CDs), digital versatile discs (DVDs), etc.), smart cards, and flash memory devices (e.g., erasable programmable read-only memory (EPROMs), cards, sticks, or key drives, etc.). Additionally, the various storage media described herein may represent one or more devices and / or other machine-readable media for storing information. The term "machine-readable medium" may include, but is not limited to, wireless channels and various other media capable of storing, containing, and / or carrying instructions and / or data.

[0285] It should be understood that the processor mentioned in the embodiments of this application can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor.

[0286] It should also be understood that the memory mentioned in the embodiments of this application can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDR SDRAM), Enhanced Synchronous DRAM (ESDRAM), Synchlink DRAM (SLDRAM), and Direct Rambus RAM (DR RAM).

[0287] It should be noted that when the processor is a general-purpose processor, DSP, ASIC, FPGA, or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component, the memory (storage module) is integrated into the processor.

[0288] It should be noted that the memories described herein are intended to include, but are not limited to, these and any other suitable types of memories.

[0289] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0290] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0291] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0292] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0293] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0294] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0295] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method for determining the segmentation of spatially coupled LDPC code blocks, characterized in that, The method includes: Determine the maximum length of information bits before encoding the first code block, where the first code block is a code block in an SC-LDPC code; Based on the maximum length of the information bits before encoding the first code block, the correlation between the number of spatially coupled blocks into which the first code block is divided and the expansion factor is determined. The expansion factor is used to determine the length of the information bits of the spatially coupled blocks. The product of the number of spatially coupled blocks and the length of the information bits of the spatially coupled blocks is greater than or equal to the maximum length of the information bits before encoding the first code block.

2. The method according to claim 1, characterized in that, The length of the information bits in the spatial coupling block is determined by the expansion factor and the number of columns of information bits in the spatial coupling block.

3. The method according to claim 1 or 2, characterized in that, The number of spatial coupling blocks is greater than or equal to 1 and less than or equal to a first parameter value, which is determined by the maximum length of the information bits before the first code block is encoded and the number of columns of the information bits in the spatial coupling block.

4. The method according to claim 1 or 2, characterized in that, The expansion factor is an integer, and it is determined by the maximum length of the information bits before the first code block is encoded, the number of columns of information bits in the spatial coupling block, and the number of spatial coupling blocks.

5. The method according to any one of claims 1 to 4, characterized in that, The method further includes: The number of spatial coupling blocks and the expansion factor are determined based on the correlation between the number of spatial coupling blocks and the expansion factor.

6. The method according to claim 5, characterized in that, With a fixed length of information bits in the spatial coupling block, the number of spatial coupling blocks is inversely proportional to the expansion factor.

7. The method according to any one of claims 1 to 6, characterized in that, The method further includes: The length of the information bits in each spatial coupling block is determined based on the maximum length of the information bits before encoding the first code block and the number of spatial coupling blocks. The information bits are placed in each of the spatial coupling blocks.

8. The method according to claim 7, characterized in that, The method further includes: The length of the padding bits of the first code block is determined, and the padding bits are used to fill the information bits so that the length of the bits to be encoded in the first code block is divisible by the spread factor. The padding bit is placed after the information bit of at least one of the spatial coupling blocks.

9. The method according to claim 8, characterized in that, The length of the padding bits of the first code block is determined by the number of spatial coupling blocks, the length of the information bits of the spatial coupling blocks, and the maximum length of the information bits before encoding the first code block.

10. The method according to any one of claims 1 to 9, characterized in that, The method further includes: Determine the length of the parity bit punched in the first code block; The parity bit punched is placed after the parity bit of at least one of the spatial coupling blocks.

11. The method according to claim 10, characterized in that, The length of the parity bit punctured is determined by the spread factor, the number of spatial coupling blocks, the number of columns of the spatial coupling blocks, the number of columns of parity bits in the spatial coupling blocks, and the length of the first code block after encoding.

12. The method according to any one of claims 1 to 11, characterized in that, The method further includes: Determine the position of the punched bit on the information bit in each of the spatial coupling blocks; The punctured bit is set in the information bit of the spatial coupling block according to the position of the punctured bit.

13. The method according to any one of claims 1 to 12, characterized in that, The method further includes: Determine the cyclic redundancy check bits of the first code block; The cyclic redundancy check bit is placed in at least one of the spatial coupling blocks.

14. The method according to any one of claims 1 to 13, characterized in that, The method further includes: Determine the length of the tail bit of the first code block; The tail bit is placed after the last spatial coupling block.

15. A method for determining the segmentation of spatially coupled LDPC code blocks, characterized in that, The method includes: Receive SC-LDPC code, the SC-LDPC code includes a first code block, the first code block includes multiple spatially coupled blocks, the product of the number of spatially coupled blocks and the information bit length of the spatially coupled blocks is greater than or equal to the maximum length of the information bits before the first code block is encoded; The first code block is decoded according to a plurality of the spatial coupling blocks.

16. The method according to claim 15, characterized in that, The length of the information bits of each spatially coupled block is determined by the expansion factor and the number of columns of information bits in each spatially coupled block.

17. The method according to claim 15 or 16, characterized in that, The method further includes: Determine the position of the information bits in each of the spatially coupled blocks in the first code block.

18. The method according to any one of claims 15 to 17, characterized in that, The method further includes: Determine the position of the padding bit in each of the spatially coupled blocks in the first code block.

19. The method according to any one of claims 15 to 18, characterized in that, The method further includes: Determine the position of the parity punch bit in each of the spatially coupled blocks in the first code block.

20. The method according to any one of claims 15 to 19, characterized in that, The method further includes: Determine the position of the punched bit on the information bit in each of the spatially coupled blocks in the first code block.

21. The method according to any one of claims 15 to 20, characterized in that, The method further includes: Determine the position of the cyclic redundancy check bit in each of the spatially coupled blocks in the first code block.

22. The method according to any one of claims 15 to 21, characterized in that, The method further includes: Determine the position of the tail bit in the first code block.

23. A device for determining the segmentation of spatially coupled LDPC code blocks, characterized in that, The apparatus includes a module for performing the method as described in any one of claims 1 to 14; or, a module for performing the method as described in any one of claims 15 to 22.

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