Semiconductor device and manufacturing method thereof
By removing etching byproducts through wet etching and using the first silicon oxide layer as a mask to etch the metal layer, the problems of rounded corners and tilted sidewalls of trenches at nodes with aluminum linewidths less than 0.13 μm were solved, thereby improving the reflectivity and yield of semiconductor devices.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SIEN (QINGDAO) INTEGRATED CIRCUITS CO LTD
- Filing Date
- 2024-10-12
- Publication Date
- 2026-04-17
AI Technical Summary
At nodes with aluminum linewidth less than 0.13μm, insufficient photoresist layer shielding leads to rounded corners and tilted sidewalls on the top of the trenches in the aluminum layer during etching, affecting reflectivity and product yield.
Wet etching process is used to remove byproducts generated by etching, and the metal layer is etched through the first silicon oxide layer as a mask to form the top of the sidewall of the second trench with right angles, avoiding rounding of the top of the trench sidewall and tilting of the sidewall.
This effectively avoids the rounding of the top corners and the tilting of the sidewalls of the trenches in the metal layer, thereby improving the reflectivity of semiconductor devices and the yield of products.
Smart Images
Figure CN121888939A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor integrated circuit manufacturing, and in particular to a semiconductor device and its manufacturing method. Background Technology
[0002] Aluminum has been widely used as an interconnect material for integrated circuits. As integrated circuit manufacturing moves from the micrometer level to the submicrometer level and towards the design of special-function devices, the width and thickness of aluminum wires are required to be narrower and thinner.
[0003] When narrower aluminum wire widths (e.g., <0.3μm) and thinner aluminum wire thicknesses (e.g.) are required... Under these conditions, the thickness of the photoresist layer, which serves as a mask during the etching process, will also be thinner. This results in insufficient masking by the photoresist layer during the etching process to form aluminum lines, leading to inaccurate patterns transferred from the photoresist layer to the aluminum layer. For example, this can cause the top corners of the trench sidewalls formed in the aluminum layer after etching to become rounded.
[0004] Furthermore, at nodes with aluminum linewidths less than 0.13 μm, some processes use a silicon oxynitride (SiON) antireflective layer beneath the photoresist layer as a hard mask for etching the aluminum layer, addressing the issue of insufficient masking by the photoresist layer during etching. In this process, the photoresist layer is used as a mask to perform a single etching operation, penetrating both the SiON and aluminum layers in one pass. However, reaction byproducts generated during SiON etching are difficult to remove. These byproducts adhere to the trench sidewalls and, upon contact with moisture in the air, can cause corrosion defects, affecting product yield. Moreover, excessive byproducts adhering to the trench sidewalls can obstruct the etching of the aluminum layer beneath them, leading to tilted trench sidewalls after etching.
[0005] In reflective devices, the aluminum layer serves as the reflective layer, and the top of the trench sidewalls in the aluminum layer needs to be right-angled, while the trench sidewalls need to be perpendicular to the substrate. For example... Figure 1a As shown, when the top of the sidewall of the groove 13 in the aluminum layer 12 is at a right angle and the sidewall of the groove 13 is perpendicular to the substrate 11, light rays perpendicular to the surface of the substrate 11 are incident on the surface of the aluminum layer 12 and are reflected back perpendicularly by the aluminum layer 12 (such as light ray L1); Figure 1b As shown, when the top corners of the sidewalls of the trench 13 in the aluminum layer 12 are rounded, light rays perpendicular to the surface of the substrate 11 are incident on the rounded corners of the top corners of the sidewalls of the trench 13 and are reflected back at an angle (such as light ray L2); Figure 1c As shown, when the sidewall of the trench 13 in the aluminum layer 12 is tilted, light rays perpendicular to the surface of the substrate 11 will be reflected back at an angle after hitting the sidewall of the trench 13 (such as light ray L3). Therefore, rounding the top corners of the trench sidewall or tilting the trench sidewall will affect the reflectivity of the aluminum layer, resulting in unclear imaging.
[0006] Therefore, how to avoid rounding the top corners of the trench sidewalls and tilting the trench sidewalls in the metal layer, thereby avoiding affecting the reflectivity, is an urgent problem to be solved. Summary of the Invention
[0007] The purpose of this invention is to provide a semiconductor device and a method for manufacturing the same, which can avoid rounding the top corners of the trench sidewalls and tilting the trench sidewalls in the metal layer, thereby avoiding affecting the performance of the semiconductor device.
[0008] To achieve the above objectives, the present invention provides a method for manufacturing a semiconductor device, comprising:
[0009] A substrate is provided on which a metal layer is formed;
[0010] A first silicon oxide layer is formed on the metal layer;
[0011] A patterned photoresist layer is formed on the first silicon oxide layer;
[0012] Using the patterned photoresist layer as a mask, the first silicon oxide layer is etched to form a first trench that exposes the metal layer. The sidewalls of the first trench are attached with etching byproducts.
[0013] Perform a wet etching process to remove the byproducts;
[0014] Using the first silicon oxide layer as a mask, the metal layer exposed by the first trench is etched to form a second trench in the metal layer that exposes the substrate. The top of the sidewall of the second trench is a right angle, and the angle between the sidewall of the second trench and the substrate surrounding the second trench is a right angle.
[0015] Optionally, the top of the sidewall of the first trench is rounded, and the angle between the sidewall of the first trench and the metal layer surrounding the first trench is acute.
[0016] Optionally, before forming the first silicon oxide layer on the metal layer, the method for manufacturing the semiconductor device further includes:
[0017] A silicon nitride layer is formed on the metal layer, and a first silicon oxide layer is formed on the silicon nitride layer; after etching the first silicon oxide layer, the silicon nitride layer is also etched.
[0018] Optionally, before forming the silicon nitride layer on the metal layer, the method for manufacturing the semiconductor device further includes:
[0019] A second silicon oxide layer is formed on the metal layer, and the silicon nitride layer is formed on the second silicon oxide layer; after etching the silicon nitride layer, the second silicon oxide layer is also etched.
[0020] Optionally, during the etching process of forming the first trench that exposes the metal layer, the patterned photoresist layer is also etched away.
[0021] Optionally, before forming the patterned photoresist layer on the first silicon oxide layer, the method for manufacturing the semiconductor device further includes:
[0022] A bottom anti-reflective layer is formed on the first silicon oxide layer;
[0023] Before etching the first silicon oxide layer, the method for manufacturing the semiconductor device further includes:
[0024] Using the patterned photoresist layer as a mask, the bottom anti-reflection layer is etched;
[0025] During the etching process to form the first trench that exposes the metal layer, a portion of the thickness of the bottom anti-reflective layer surrounding the first trench is also etched away.
[0026] Optionally, after etching to form the first trench exposing the metal layer, the method of manufacturing the semiconductor device further includes:
[0027] An ashing process is performed to remove the remaining bottom anti-reflective layer.
[0028] Optionally, during the etching process to form the first trench exposing the metal layer, the flow rate ratio of the etching gas is CF4:CHF3 = 1:1.2 to 1.5.
[0029] Optionally, the metal layer is made of aluminum; during the etching process of the metal layer exposed by the first trench, the flow rate ratio of the etching gas is BCl3:Cl2:CH4 = 1:1.2~1.5:0.05~0.1.
[0030] Optionally, the method for manufacturing the semiconductor device further includes:
[0031] An insulating layer is filled in the first trench and the second trench;
[0032] Remove the first silicon oxide layer and the insulating layer above the bottom surface of the first silicon oxide layer.
[0033] The present invention also provides a semiconductor device manufactured using the semiconductor device manufacturing method described above.
[0034] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:
[0035] 1. The semiconductor device manufacturing method of the present invention includes: providing a substrate on which a metal layer is formed; forming a first silicon oxide layer on the metal layer; forming a patterned photoresist layer on the first silicon oxide layer; using the patterned photoresist layer as a mask, etching the first silicon oxide layer to form a first trench exposing the metal layer, wherein the sidewalls of the first trench are attached with etching byproducts; performing a wet etching process to remove the byproducts; using the first silicon oxide layer as a mask, etching the metal layer exposed by the first trench to form a second trench exposing the substrate in the metal layer, wherein the top of the sidewall of the second trench is a right angle, and the angle between the sidewall of the second trench and the substrate surrounding the second trench is a right angle, thereby avoiding rounding of the top of the trench sidewalls and tilting of the trench sidewalls in the metal layer, thereby avoiding affecting the performance of the semiconductor device.
[0036] 2. The semiconductor device of the present invention, by being manufactured using the semiconductor device manufacturing method, can avoid rounding the top corners of the trench sidewalls in the metal layer and tilting the trench sidewalls, thereby avoiding affecting the performance of the semiconductor device. Attached Figure Description
[0037] Figures 1a to 1c This is a schematic diagram of light being reflected by the aluminum layer;
[0038] Figure 2 This is a flowchart of a method for manufacturing a semiconductor device according to an embodiment of the present invention;
[0039] Figures 3a to 3f yes Figure 2 A schematic diagram of the semiconductor device manufacturing method shown.
[0040] Among them, the appendix Figures 1a to 3f The annotations in the attached figures are explained as follows:
[0041] 11-Substrate; 12-Aluminum layer; 13-Trench; 21-Substrate; 211-Conductive layer; 212-Through hole plug; 22-Metal layer; 23-First silicon oxide layer; 24-Silicon nitride layer; 25-Second silicon oxide layer; 26-Bottom anti-reflective layer; 27-Patterned photoresist layer; 271-Opening; 281-First trench; 282-Second trench; 29-Insulating layer. Detailed Implementation
[0042] To make the objectives, advantages, and features of the present invention clearer, the semiconductor device and its manufacturing method proposed in this invention will be further described in detail below with reference to the accompanying drawings. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.
[0043] One embodiment of the present invention provides a method for manufacturing a semiconductor device, see reference. Figure 2 , Figure 2 This is a flowchart of a method for manufacturing a semiconductor device according to an embodiment of the present invention, the method comprising:
[0044] Step S1: Provide a substrate on which a metal layer is formed;
[0045] Step S2: Form a first silicon oxide layer on the metal layer;
[0046] Step S3: Form a patterned photoresist layer on the first silicon oxide layer;
[0047] Step S4: Using the patterned photoresist layer as a mask, etch the first silicon oxide layer to form a first trench that exposes the metal layer. The sidewalls of the first trench are attached with etching byproducts.
[0048] Step S5: Perform a wet etching process to remove the byproducts;
[0049] Step S6: Using the first silicon oxide layer as a mask, etch the metal layer exposed by the first trench to form a second trench in the metal layer that exposes the substrate. The top of the sidewall of the second trench is a right angle, and the angle between the sidewall of the second trench and the substrate surrounding the second trench is a right angle.
[0050] See below. Figures 3a to 3f The manufacturing method of the semiconductor device provided in this embodiment will be described in more detail. Figures 3a to 3f This is a schematic diagram of a longitudinal cross-section of a semiconductor device.
[0051] Following step S1, as follows Figure 3a As shown, a substrate 21 is provided, on which a metal layer 22 is formed.
[0052] The substrate 21 may include a substrate and an insulating dielectric layer formed on the substrate. A metal interconnect structure may be formed in the insulating dielectric layer. A metal layer 22 is formed on the insulating dielectric layer and is electrically connected to the metal interconnect structure. The metal interconnect structure may include multiple conductive layers 211 and multiple via plugs 212. Adjacent conductive layers 211 are electrically connected to each other through the via plugs 212, and the metal layer 22 is electrically connected to the conductive layers 211 through the via plugs 212.
[0053] The substrate 21 may contain device structures such as transistors and capacitors, which can be electrically connected to the metal layer 22 through the metal interconnect structure.
[0054] The metal layer 22 is used to connect the circuit, so that a voltage can be applied to the device structure in the substrate 21 through the metal layer 22; and the orientation of the liquid crystal can be adjusted by controlling the voltage through the metal layer 22.
[0055] When the semiconductor device is a reflective device, the metal layer 22 can also act as a reflective layer to reflect light.
[0056] The insulating dielectric layer can be made of at least one of the following insulating materials: undoped silicate glass, silicon oxide, silicon nitride, etc.
[0057] The metal interconnect structure and the metal layer 22 can be made of at least one of the following metal materials: aluminum, copper, etc.
[0058] Aluminum is a material with high reflectivity from ultraviolet to infrared light; furthermore, aluminum is easier to etch, making it easier to etch the metal layer 22 into the desired pattern. Therefore, when the semiconductor device is a reflective device, the metal layer 22 is preferably made of aluminum.
[0059] Following step S2, as Figure 3a As shown, a first silicon oxide layer 23 is formed on the metal layer 22.
[0060] Preferably, before forming the first silicon oxide layer 23 on the metal layer 22, the method of manufacturing the semiconductor device further includes: forming a silicon nitride layer 24 on the metal layer 22, wherein the first silicon oxide layer 23 is formed on the silicon nitride layer 24.
[0061] Because silicon nitride has excellent optical properties, such as high transmittance (transmittance of ultraviolet, visible and infrared light can reach more than 90%), low dispersion and excellent thermo-optical stability, when the semiconductor device is a reflective device, the transmittance can be improved by providing the silicon nitride layer 24 on the metal layer 22.
[0062] Preferably, before forming the silicon nitride layer 24 on the metal layer 22, the method for manufacturing the semiconductor device further includes: forming a second silicon oxide layer 25 on the metal layer 22, wherein the silicon nitride layer 24 is formed on the second silicon oxide layer 25. The second silicon oxide layer 25 is used to improve the bonding between the silicon nitride layer 24 and the metal layer 22.
[0063] Following step S3, as follows Figure 3a As shown, a patterned photoresist layer 27 is formed on the first silicon oxide layer 23.
[0064] The patterned photoresist layer 27 has an opening 271 that exposes the first silicon oxide layer 23.
[0065] Preferably, before forming the patterned photoresist layer 27 on the first silicon oxide layer 23, the method of manufacturing the semiconductor device further includes: forming a bottom anti-reflective layer 26 on the first silicon oxide layer 23, the patterned photoresist layer 27 being formed on the bottom anti-reflective layer 26, and the opening 271 exposing the bottom anti-reflective layer 26.
[0066] The patterned photoresist layer 27 is obtained by photolithography on a photoresist layer, and the bottom anti-reflection layer 26 is used to reduce reflection during photolithography, so as to improve the development effect.
[0067] The main component of the bottom anti-reflective layer 26 is cross-linked resin.
[0068] Following step S4, as Figure 3b As shown, the first silicon oxide layer 23 is etched using the patterned photoresist layer 27 as a mask to form a first trench 281 that exposes the metal layer 22. The sidewalls of the first trench 281 are covered with etching byproducts (not shown).
[0069] When the bottom anti-reflective layer 26 is formed between the patterned photoresist layer 27 and the first silicon oxide layer 23, before etching the first silicon oxide layer 23, the semiconductor device manufacturing method further includes: using the patterned photoresist layer 27 as a mask to etch the bottom anti-reflective layer 26.
[0070] When the silicon nitride layer 24 is formed between the first silicon oxide layer 23 and the metal layer 22, the silicon nitride layer 24 is etched after the first silicon oxide layer 23 is etched.
[0071] When a second silicon oxide layer 25 is formed between the silicon nitride layer 24 and the metal layer 22, the second silicon oxide layer 25 is etched after the silicon nitride layer 24 is etched.
[0072] Therefore, using the patterned photoresist layer 27 as a mask, a dry etching process is performed to etch through the bottom anti-reflection layer 26, the first silicon oxide layer 23, the silicon nitride layer 24, and the second silicon oxide layer 25 in one go. The first trench 281 sequentially penetrates the bottom anti-reflection layer 26, the first silicon oxide layer 23, the silicon nitride layer 24, and the second silicon oxide layer 25.
[0073] like Figure 3bAs shown, during the etching process of forming the first trench 281 that exposes the metal layer 22, the patterned photoresist layer 27 is also etched away; during the etching process of forming the first trench 281 that exposes the metal layer 22, a portion of the thickness of the bottom anti-reflective layer 26 surrounding the first trench 281 is also etched away.
[0074] like Figure 3c As shown, after etching to form the first trench 281 that exposes the metal layer 22, the method of manufacturing the semiconductor device further includes performing an ashing process to remove the remaining bottom anti-reflective layer 26.
[0075] Preferably, during the etching process to form the first trench 281 exposing the metal layer 22, the flow rate ratio of the etching gas is CF4:CHF3 = 1:1.2 to 1.5, the high-frequency power is 500W to 700W, the low-frequency power is 200W to 400W, and the temperature is 50°C to 60°C.
[0076] The top of the sidewall of the first trench 281 is rounded, and the angle between the sidewall of the first trench 281 and the metal layer 22 surrounding the first trench 281 is acute. Figure 3b Taking the structure shown as an example, the rounded corner protrudes outward from the top of the sidewall of the first groove 281. The rounded corner is a smooth transition between the sidewall of the first groove 281 and the top surface of the bottom anti-reflective layer 26. That is, the distance from the sidewall of the first groove 281 to the top surface of the bottom anti-reflective layer 26 is an arc.
[0077] During the etching process that forms the first trench 281 exposing the metal layer 22, the patterned photoresist layer 27 is completely removed, leaving the bottom anti-reflective layer 26 unshielded. This results in the bottom anti-reflective layer 26 at the top of the sidewall of the etched first trench 281 being rounded. Furthermore, during the sequential etching of the bottom anti-reflective layer 26, the first silicon oxide layer 23, the silicon nitride layer 24, and the second silicon oxide layer 25 from top to bottom, the generated byproducts cannot be etched away. These byproducts adhere to the sidewall of the already formed portion of the first trench 281, hindering the etching of the underlying film layer. Consequently, the sidewall of the final formed first trench 281 is tilted, meaning the angle between the sidewall of the first trench 281 and the metal layer 22 surrounding the first trench 281 is an acute angle.
[0078] In step S5, a wet etching process is performed to remove the byproducts.
[0079] By adding a step to remove the byproducts after etching to form the first trench 281, it is possible to avoid the byproducts affecting subsequent etching processes.
[0080] According to step S6, as Figure 3d As shown, using the first silicon oxide layer 23 as a mask, the metal layer 22 exposed by the first trench 281 is etched to form a second trench 282 in the metal layer 22 that exposes the substrate 21. The top of the sidewall of the second trench 282 is a right angle, and the angle between the sidewall of the second trench 282 and the substrate 21 surrounding the second trench 282 is a right angle.
[0081] like Figure 3d As shown, since there is no shielding on the first silicon oxide layer 23 during the etching of the metal layer 22 exposed by the first trench 281, the first silicon oxide layer 23 on the top of the sidewall of the first trench 281 is rounded after the second trench 282 is formed.
[0082] The metal layer 22 exposed in the first trench 281 is etched using a dry etching process. If the metal layer 22 is made of aluminum, then during the etching process, the flow rate ratio of the etching gas is BCl3:Cl2:CH4 = 1:1.2~1.5:0.05~0.1, the high-frequency power is 500W~700W, the low-frequency power is 200W~400W, and the temperature is 50℃~60℃.
[0083] The method for manufacturing the semiconductor device further includes:
[0084] like Figure 3e As shown, an insulating layer 29 is filled in the first trench 281 and the second trench 282, and the insulating layer 29 makes the metal layers 22 on both sides of the second trench 282 insulated and isolated; wherein, the insulating layer 29 may also extend to the first silicon oxide layer 23 on the periphery of the first trench 281;
[0085] Remove the first silicon oxide layer 23 and the insulating layer 29 that extends above the bottom surface of the first silicon oxide layer 23. This removal can be performed using a chemical mechanical polishing process.
[0086] The method for manufacturing the semiconductor device further includes etching the silicon nitride layer 24 and the second silicon oxide layer 25 around the first trench 281 and the second trench 282 to expose the metal layer 22, such that the exposed metal layer 22 can be connected to the circuit.
[0087] As can be seen from the above, since the first silicon oxide layer 23 (or the first silicon oxide layer 23, the silicon nitride layer 24, and the second silicon oxide layer 25) on the metal layer 22, which serves as a hard mask, has already been etched through before the metal layer 22 is etched to form the second trench 282, the etching of the hard mask and the etching of the metal layer 22 are performed in two steps. This results in a large number of byproducts generated during the etching of the hard mask being able to adhere only to the sidewalls of the first trench 281 in the hard mask, and not to the sidewalls of the second trench 282 in the metal layer 22. Consequently, the angle between the sidewall of the second trench 282 and the substrate 21 surrounding the second trench 282 is a right angle.
[0088] It should be noted that during the process of etching the metal layer 22 to form the second trench 282, although the entire surface of the first silicon oxide layer 23 and the silicon nitride layer 24 and the second silicon oxide layer 25 on the sidewall of the first trench 281 are also etched, the etching rate of the metal layer 22 is much greater than the etching rate of the first silicon oxide layer 23, the silicon nitride layer 24 and the second silicon oxide layer 25. Therefore, the amount of etching of the first silicon oxide layer 23, the silicon nitride layer 24 and the second silicon oxide layer 25 is very small, resulting in very few by-products generated by etching. Consequently, the angle between the sidewall of the second trench 282 and the substrate 21 surrounding the second trench 282 can be a right angle.
[0089] Furthermore, during the etching of the metal layer 22 to form the second trench 282, since the metal layer 22 is shielded by the first silicon oxide layer 23 (or the first silicon oxide layer 23, the silicon nitride layer 24, and the second silicon oxide layer 25), the top of the sidewall of the second trench 282 can be prevented from being rounded, thereby making the top of the sidewall of the second trench 282 a right angle.
[0090] Therefore, the semiconductor device manufacturing method provided by the present invention can avoid rounding the top corners of the sidewalls of the second trench 282 in the metal layer 22 and tilting the sidewalls of the second trench 282, thereby avoiding affecting the performance of the semiconductor device. For example, when the semiconductor device is a reflective device, it can avoid affecting the reflectivity of the metal layer 22, thereby avoiding unclear imaging.
[0091] In particular, for metal layers 22 with a thickness less than [a certain value], [the specific requirement is that the thickness of the metal layer 22 is ... It is also applicable to semiconductor devices with a width of less than 100nm for the second trench 282.
[0092] In summary, the semiconductor device manufacturing method provided by the present invention includes: providing a substrate on which a metal layer is formed; forming a first silicon oxide layer on the metal layer; forming a patterned photoresist layer on the first silicon oxide layer; using the patterned photoresist layer as a mask, etching the first silicon oxide layer to form a first trench exposing the metal layer, wherein the sidewalls of the first trench are attached with etching byproducts; performing a wet etching process to remove the byproducts; using the first silicon oxide layer as a mask, etching the metal layer exposed by the first trench to form a second trench exposing the substrate in the metal layer, wherein the top of the sidewall of the second trench is a right angle, and the angle between the sidewall of the second trench and the substrate surrounding the second trench is a right angle. The semiconductor device manufacturing method of the present invention can avoid rounding the top of the trench sidewalls and tilting the trench sidewalls in the metal layer, thereby avoiding affecting the performance of the semiconductor device.
[0093] One embodiment of the present invention provides a semiconductor device manufactured using the semiconductor device manufacturing method described above.
[0094] The manufacturing method of the semiconductor device is described above and will not be repeated here.
[0095] Because the semiconductor device is manufactured using the same method, rounding of the top corners of the trench sidewalls and tilting of the trench sidewalls in the metal layer can be avoided, thereby preventing any impact on the performance of the semiconductor device. For example, when the semiconductor device is a reflective device, the reflectivity of the metal layer can be avoided, thus preventing unclear imaging.
[0096] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.
Claims
1. A method of manufacturing a semiconductor device, characterized by, include: A substrate is provided on which a metal layer is formed; A first silicon oxide layer is formed on the metal layer; A patterned photoresist layer is formed on the first silicon oxide layer; Using the patterned photoresist layer as a mask, the first silicon oxide layer is etched to form a first trench that exposes the metal layer. The sidewalls of the first trench are attached with etching byproducts. Perform a wet etching process to remove the byproducts; Using the first silicon oxide layer as a mask, the metal layer exposed by the first trench is etched to form a second trench in the metal layer that exposes the substrate. The top of the sidewall of the second trench is a right angle, and the angle between the sidewall of the second trench and the substrate surrounding the second trench is a right angle.
2. The method of manufacturing a semiconductor device according to Claim 1, wherein The top of the sidewall of the first trench is rounded, and the angle between the sidewall of the first trench and the metal layer surrounding the first trench is acute.
3. The method of manufacturing a semiconductor device according to Claim 1, wherein Before forming the first silicon oxide layer on the metal layer, the method for manufacturing the semiconductor device further includes: A silicon nitride layer is formed on the metal layer, and a first silicon oxide layer is formed on the silicon nitride layer; after etching the first silicon oxide layer, the silicon nitride layer is also etched.
4. The method of manufacturing a semiconductor device according to Claim 3, wherein Before forming the silicon nitride layer on the metal layer, the method for manufacturing the semiconductor device further includes: A second silicon oxide layer is formed on the metal layer, and the silicon nitride layer is formed on the second silicon oxide layer; after etching the silicon nitride layer, the second silicon oxide layer is also etched.
5. The method of manufacturing a semiconductor device according to Claim 1, wherein During the etching process to form the first trench that exposes the metal layer, the patterned photoresist layer is also etched away.
6. The method for manufacturing a semiconductor device as described in claim 5, characterized in that, Before forming the patterned photoresist layer on the first silicon oxide layer, the method for manufacturing the semiconductor device further includes: A bottom anti-reflective layer is formed on the first silicon oxide layer; Before etching the first silicon oxide layer, the method for manufacturing the semiconductor device further includes: Using the patterned photoresist layer as a mask, the bottom anti-reflection layer is etched; During the etching process to form the first trench that exposes the metal layer, a portion of the thickness of the bottom anti-reflective layer surrounding the first trench is also etched away.
7. The method of manufacturing a semiconductor device according to Claim 6, wherein After etching to form the first trench exposing the metal layer, the method of manufacturing the semiconductor device further includes: An ashing process is performed to remove the remaining bottom anti-reflective layer.
8. The method of manufacturing a semiconductor device according to Claim 1, wherein During the etching process to form the first trench exposing the metal layer, the flow rate ratio of the etching gas is CF4:CHF3 = 1:1.2 to 1.
5.
9. The method of manufacturing a semiconductor device according to Claim 1, wherein The metal layer is made of aluminum; during the etching process of the metal layer exposed by the first trench, the flow rate ratio of the etching gas is BCl3:Cl2:CH4 = 1:1.2~1.5:0.05~0.
1.
10. The method of manufacturing a semiconductor device according to Claim 1, wherein The method for manufacturing the semiconductor device further includes: An insulating layer is filled in the first trench and the second trench; Remove the first silicon oxide layer and the insulating layer above the bottom surface of the first silicon oxide layer.
11. A semiconductor device, characterized by comprising: It is manufactured using the manufacturing method of the semiconductor device as described in any one of claims 1 to 10.