Readout circuit for capacitive sensor

By using a capacitor-to-voltage converter, interference detection unit, and filter unit in the readout circuit of the microelectromechanical system (MEMS), a measurement signal with reduced interference is generated, solving the problems of position accuracy and electrical interference in the sensor system and achieving high-precision and low-power sensor performance.

CN121889643APending Publication Date: 2026-04-17ROBERT BOSCH GMBH +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
ROBERT BOSCH GMBH
Filing Date
2024-09-19
Publication Date
2026-04-17

AI Technical Summary

Technical Problem

In existing microelectromechanical systems (MEMS), the performance of sensor systems is affected by factors such as manufacturing tolerances, temperature stability, and long-term stability, resulting in low positional accuracy and difficulty in effectively reducing the impact of electrical interference.

Method used

A readout circuit is employed, which includes a capacitor voltage converter, an interference detection unit, and a filter unit. By performing high-pass filtering, window function weighting, and integration on the sensor signal, a measurement signal with reduced interference is generated, and one interference detection unit can be used for multiple channels.

Benefits of technology

It improves the positional accuracy of the sensor system, reduces the impact of electrical interference, reduces erroneous measurements, lowers power consumption, and enhances the flexibility and accuracy of interference detection.

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Abstract

The invention relates to a readout circuit (100) for a capacitive sensor (120) comprising two capacitances (CS1, CS2), said circuit comprising: a capacitance-to-voltage converter (130) for converting, upon application of a periodic excitation signal (Vexc), two periodic sensor signals (VS1, VS2) associated with said capacitances from the sensor into two amplified voltage signals (Vout1, Vout2); an interference detection unit (140) for detecting an interference in one of the sensor signals; and a filter unit (150) configured to generate a reduced-interference measurement signal (Vred) from an interference detection signal (Vdet) from the interference detection unit and the voltage signal, where the interference detection unit is configured to generate a reduced-interference measurement signal (Vred) when the excitation signal is applied to the sensor. At least one of the sensor signals is evaluated by generating a filtered signal by applying a high-pass filter to the one sensor signal and / or a combination of the sensor signals, forming a non-negative signal from the filtered signal, the method includes receiving a non-negative signal, applying a window function to the non-negative signal to weight a region of the non-negative signal, evaluating the weighted signal to detect interference, and generating and providing the interference detection signal based on the detected interference.
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Description

Technical Field

[0001] This invention relates to the field of capacitive sensors, and to a readout circuit, a sensor system based on the readout circuit, a corresponding MEMS component, and a method for generating interference-reduced measurement signals using the readout circuit and / or the sensor system according to the invention. Background Technology

[0002] The positional accuracy of an actuator in a microelectromechanical system (MEMS) depends on the performance of its corresponding position sensor system. The performance of the sensor system is affected by factors such as manufacturing tolerances, temperature stability and temperature variations, long-term stability, and product lifespan (i.e., the time interval at which the device needs to be recalibrated).

[0003] Document DE 10 2015 204 874 A1 relates to an actuator device for tilting a mirror element.

[0004] Document DE 10 2016 213 026 A1 relates to a sensor device for detecting the tilt angle of a mirror element.

[0005] Each of these two documents describes an optical assembly comprising an actuator device for tilting a mirror element with two tilt degrees of freedom, and a sensor device for detecting the tilt angle of the mirror element. The actuator device includes an actuator electrode structure comprising actuator electrodes in the form of comb electrodes, which directly drive the pivoting of the mirror element. The sensor device includes a sensor electrode structure comprising sensor electrodes, also in the form of comb electrodes. The optical assembly also includes a omnidirectional flexible structure for mounting the mirror element, wherein the flexible structure includes a flexible spring and defines two tilt axes of the mirror element.

[0006] These two documents also describe a sensor electrode structure in this case, comprising a sensor stator electrode attached to a substrate for supporting the mirror element, and a sensor mirror electrode attached to the mirror element. To calculate the tilt angle of the mirror element, the sensor mirror electrode is configured to provide variable shielding of the electric field in the sensor stator electrode region based on the detected tilt angle of the mirror element. In this case, the same voltage is applied to the sensor mirror electrodes. In other words, the sensor mirror electrodes have the same potential, for example, both at ground potential. Summary of the Invention

[0007] The present invention proposes a readout circuit, a sensor system based on the readout circuit, a corresponding MEMS component, and a method for generating interference-reduced measurement signals using the readout circuit and / or the sensor system according to the present invention.

[0008] A first aspect of the invention provides a readout circuit for a capacitive sensor comprising two capacitors, wherein the readout circuit includes a capacitor-to-voltage converter for converting two periodic sensor signals associated with the two capacitors from the sensor into two amplified voltage signals when a periodic excitation signal is applied to the sensor. The periodic excitation signal may be, for example, a sine wave, a triangular wave, a sawtooth wave, or a square wave, or may include these waveforms. The readout circuit also includes an interference detection unit for detecting interference (e.g., irregularities and / or interference pulses) in at least one sensor signal, preferably in both sensor signals, and a filter unit. In this case, the filter unit is configured to generate an interference-reduced measurement signal from the interference detection signal from the interference detection unit and the two voltage signals from the capacitor-to-voltage converter. The interference detection unit thus provides the filter unit with an interference detection signal, wherein the interference detection signal is a signal including information about the detected interference. The interference detection unit and / or the filter unit may, for example, be implemented as analog circuitry in a mixed-signal application-specific integrated circuit (ASIC).

[0009] In this configuration, the interference detection unit is configured to evaluate at least one of two sensor signals by at least the following steps when a periodic excitation signal is applied to the sensor: generating a filtered signal by applying a high-pass filter to at least one of the two sensor signals and / or a combination of the two sensor signals (e.g., averaging); then forming a non-negative signal (a signal whose values ​​are all greater than or equal to zero) from the filtered signal; preferably by forming the absolute value or square of the amplitude of the filtered signal; applying a window function to the non-negative signal to weight the region of the non-negative signal; evaluating the weighted signal (typically using the excitation signal) to detect interference; and finally generating and providing an interference detection signal based on the detected interference. Here, for all measurement points of the sensor signal to be evaluated, the absolute value or square of the amplitude of the filtered signal is formed respectively.

[0010] The readout circuit preferably includes a fully differential operational amplifier, two integrating capacitors, and two switches. Each switch is connected in parallel with one of the two integrating capacitors and connected to one of the capacitors of the sensor. When closed, the integrated capacitor connected in parallel in the readout circuit and the capacitor connected to the sensor are discharged.

[0011] The interference detection unit is preferably configured to detect interference in each sensor signal from the sensor. Therefore, if the capacitive sensor provides two sensor signals, the interference detection unit is preferably configured to detect interference in both sensor signals. Similarly, the interference detection unit is preferably configured to detect interference in at least one sensor signal using one or more additional signals from one or more additional components, i.e., signals from components other than the capacitive sensor. For example, signals from a temperature measurement system, a grounding connection, and / or a component that generates the interference to be detected can be used for this purpose.

[0012] When the excitation signal is a square wave, the interference detection unit is preferably further configured to independently detect interference in a sensor signal for both the high and low levels of the excitation signal (interference detection). This independent detection by the interference detection unit simplifies the implementation process of interference detection in the circuit.

[0013] In this context, a window function is preferred to reduce or eliminate artifacts in the sensor signal caused by the excitation signal. For example, when the excitation signal is a square wave including both rising and falling edges, the window function used for the region between adjacent rising and falling edges can take a non-zero value, while taking a zero value outside these regions, to remove signal overshoot that may occur in the edge regions and affect the evaluation process. Alternatively, it is conceivable that for such excitation signals, the window function used takes a non-zero value in the region between adjacent falling and rising edges, while taking a zero value outside these regions. A combination is also conceivable where the window function takes a zero value in the region near each edge, while taking a non-zero value in other regions.

[0014] When the excitation signal is a square wave and the interference detection unit is configured to detect interference in a sensor signal independently of the high and low levels of the excitation signal, the steps of applying a window function and evaluating the weighted signal can be performed separately for the high and low levels of the excitation signal. Subsequently, the interference detection signal is generated based on the interference detected by evaluating these two weighted signals.

[0015] A second aspect of the invention provides a sensor system including a capacitive sensor, wherein the sensor comprises two capacitors. In this case, the sensor system includes the readout circuit described above.

[0016] In this configuration, the sensor system preferably includes means for generating a periodic excitation signal, a unit for further processing the interference-reduced measurement signal into a further processed output signal, and an analog-to-digital converter for digitizing the further processed output signal. The periodic excitation signal may be, for example, a sine wave, a triangular wave, a sawtooth wave, or a square wave.

[0017] A particularly preferred application area of ​​the sensor system according to the invention is a component based on a microelectromechanical system (MEMS) that includes a displacement device for tilting the component (e.g., a micromirror) about a tilt axis. Here, the sensor system described above can be used as part of a MEMS component to determine the tilt angle of the displacement device. Therefore, a third aspect of the invention proposes a MEMS component including the sensor system described above. In this case, capacitance can be implemented, for example, by means of sensor electrodes in the form of comb electrodes.

[0018] Finally, a fourth aspect of the invention provides a method for generating an interference-reduced measurement signal for a capacitive sensor comprising two capacitors, the method using the readout circuit and / or sensor system as described above. The method includes: applying a periodic excitation signal to the sensor; capturing two periodic sensor signals associated with the two capacitors from the sensor; generating two amplified voltage signals by converting the periodic sensor signals using a capacitor-to-voltage converter; generating a filtered signal by applying a high-pass filter to one of the sensor signals; forming a non-negative signal from the filtered signal (e.g., by forming the absolute value or square of the amplitude of the filtered signal); applying a window function to weight the region of the non-negative signal; finally evaluating the weighted signal to detect interference; generating an interference detection signal based on the detected interference; and generating an interference-reduced measurement signal from the interference detection signal and the two voltage signals from the capacitor-to-voltage converter.

[0019] This invention discloses an easily implemented solution that prevents errors and reduces electrical interference when using capacitive sensors for measurements. In particular, it eliminates the need for separate interference detection units with independent circuitry for each readout channel of one or more capacitive sensors; a single interference detection unit can be used for multiple channels. Therefore, this solution offers a significant advantage in terms of power consumption.

[0020] Another beneficial effect is that the way sensor signals are delivered to the interference detection unit can be flexibly designed and expanded. For example, signals from additional components (i.e., components different from the capacitive sensor) can also be provided to the interference detection unit. Since the signals of these components are also affected by potential interference, the accuracy of interference detection can be further improved. Attached Figure Description

[0021] Embodiments of the present invention will be described in detail with reference to the accompanying drawings and the following description.

[0022] In the diagram: Figure 1 A schematic diagram of the circuitry of the sensor system according to the present invention in a MEMS component is shown; Figure 2 A flowchart illustrating the operation of an exemplary interference detection unit of a sensor system according to the present invention is shown; and Figure 3A and Figure 3B A graph illustrating the method for generating a measurement signal with reduced interference according to the present invention is shown. Detailed Implementation

[0023] In the following description of embodiments of the invention, the same or similar elements are designated by the same reference numerals, and repeated descriptions of these elements are omitted in certain cases. The accompanying drawings are merely schematic illustrations of the subject matter of the invention.

[0024] Figure 1 A schematic diagram of the circuitry of a sensor system 101 according to the present invention in a MEMS component 102 is shown. The sensor system includes two capacitors C. S1 C S2 The MEMS component 102 includes a capacitive sensor 120 and a readout circuit 100. The MEMS component 102 includes a displacement device 103, whose tilt angle can be determined by means of the capacitive sensor 120. This connection is indicated by arrow 104.

[0025] In the readout circuit 100 shown, a capacitor voltage converter 130 is used to apply a periodic excitation signal V to the sensor 120. exc At that time, it will be achieved by using capacitor C S1 C S2 The measured capacitance value is converted into two amplified voltage signals for further processing. These are used to generate the periodic excitation signal V. exc The device 110 (which is a voltage signal) is electrically connected to the sensor 120. The two capacitors C must be determined. S1 and C S2 The capacitance difference between them. The applied periodic excitation signal V. exc For C S1 and C S2 It is charged and then discharged again. The signal V generated in this way S1 V S2 The signal is supplied to a fully differential operational amplifier 170, which converts the difference between the signals into an amplified voltage signal. This capacitive sensor concept enables high resolution even with very small signals. A square wave is preferably chosen as the periodic excitation signal V. exc This refers to the alternation of voltage levels between high and low. A high voltage level (high level) allows measurement of the current capacitance and thus refers to an active measurement step. A low voltage level (low level) refers to a passive measurement step and is preferably, but not necessarily, set to zero volts.

[0026] Using this circuit, the current capacitor C is switched on in two steps. S1 and C S2 Converted to voltage value: In the first step, signal V exc The voltage drops to its low level (passive measurement step), with capacitor C. S1 and C S2 The switches S connected in parallel w1 and S w2 Close, so that C S1 C S2 and two integrating capacitors C i1 and C i2 Discharge. In the second step, V exc Rise to its high level (active measurement step). Simultaneously, S w1 and S w2 Disconnect, capacitor C i1 and C i2 The charge is integrated, and the operational amplifier 170 converts the different charges into voltage values.

[0027] According to the present invention, an interference detection unit 140 is provided and connected in parallel with a capacitor voltage converter 130. The interference detection unit 140 uses an excitation signal V. exc To evaluate capacitance C S1 signal V S1 Regarding interference, the interference detection unit 140 is configured to detect interference when a periodic excitation signal V is applied to the sensor 120. exc At that time, the sensor signal V is evaluated through at least the following steps. S1 First, by analyzing the sensor signal V S1 A high-pass filter is applied to generate the filtered signal. After forming a non-negative signal from the filtered signal and applying a window function to weight the non-negative signal region, an excitation signal V is used. exc The weighted signal is evaluated to detect interference, and finally, an interference detection signal V is generated and provided based on the interference detected in this way. det The output V connected to the interference detection unit 140 and the operational amplifier 170 out1 V out2 The filter unit 150, based on the signal V det (For example, based on the location of the detected interference) Generate a measurement signal V indicating reduced interference. red For example, the interference detection unit 140 determines which measurement result is output as the valid value. This process generates a measurement signal V with reduced interference. red .

[0028] The basic function of the capacitor-to-voltage converter 130 described above is not affected by this process. In this case, the interference detection unit 140 can be used by multiple capacitor-to-voltage converters 130. Figure 1 The circuit shown is purely illustrative and only applies to capacitor C. S1 signal V S1 To achieve interference detection. However, the same detection method can also be used for interference from C. S2 signal V S2 Two signals V S1 V S2 Combinations of these factors (e.g., averaging) can also be used for interference detection using the interference detection unit 140. This applies to additional components affected by the interference to be detected and originating from sources other than the sensor 120 (i.e., not from capacitor C). S1 and C S2 Other signals can also be coupled to the readout circuit 100 and then fed to the interference detection unit 140 to further improve the accuracy of interference detection. Finally, the interference-reduced measurement signal V can be... red The signal is then passed to the appropriate unit 160 for further signal processing. The output signal V, thus further processed, is... proc It can then be digitized via an analog-to-digital converter 180, thus making it available for, for example, digital applications.

[0029] Figure 2 The illustration shows how Figure 1 A flowchart illustrating the operation of an exemplary interference detection unit 140 of the sensor system 101 according to the present invention. (Related) Figure 3A and Figure 3B Showing according to Figure 2 The corresponding signal curves are plotted, wherein all curves include the same time axis as the horizontal axis (x-axis) and the vertical axis (y-axis) representing the voltage values. In this case, the specific voltage and time values ​​should be understood as examples only; they are used solely to illustrate the invention. The units of the plotted voltage and time values ​​are not limited to the following description; for example, voltage values ​​may be in volts and time values ​​may be in seconds. The same units were used when plotting the voltage values ​​in subplots (a) through (g), therefore these voltage values ​​are comparable to each other, taking into account the scaling factors specified for each subplot. Figure 3A and Figure 3B Subgraphs (a) to (c) also show the same signal, i.e., the steps of evaluating the sensor signal by the interference detection unit 140 are initially the same.

[0030] The original sensor signal (e.g., V) used for interference detection by the interference detection unit 140 will be used to detect interference. S1 )exist Figure 3A and Figure 3BThe signals are shown in sub-figure (a) and provided in step 210. This signal includes the excitation signal V used here. exc The periodic voltage shift is caused by the square wave. The spikes on the rising and falling edges are due to the excitation signal V. exc The overshoot and undershoot caused by the corresponding voltage surge are shown as dashed lines in sub-figure (i). Two detectable interferences can be observed in the second active measurement step and the sixth passive measurement step. Figure 3A and Figure 3B The subgraphs in (a) are highlighted with ellipses.

[0031] In step 220, a high-pass filter is applied to the original sensor signal to remove the excitation signal V. exc The components are shown in subfigure (b). The result is shown in subfigure (b). The interference to be detected is still clearly visible, and overshoot and undershoot are still visible after high-pass filtering step 220. In the next step 230, as shown in subfigure (c), the absolute value of the signal amplitude is determined. Alternatively, the squared value of the amplitude can also be used. The purpose of this step 230 is to convert the bipolar signal into a non-negative form. In the next step, i.e., for active measurement step 240a and for passive measurement step 240b, the non-negative signal generated in this way is multiplied by a window function in the time domain, where different window functions are selected between active and passive measurement steps in this case. Interference detection in the case of active measurement step is shown in subfigure (b). Figure 3A In the text, variations of the passive measurement step are shown. Figure 3B In the context of using window functions, the goal is to suppress overshoot and undershoot caused by the excitation voltage. To achieve this, for example, the window function can include very small coefficients at the overshoot and undershoot locations, and very large coefficients for the rest of the signal range. Therefore, the simplest window function could be a rectangular function with a value of "0" within the overshoot and undershoot range and a value of "1" for the rest of the signal. In the active measurement step ( Figure 3A ) and passive measurement steps ( Figure 3B In the diagram, the corresponding signals after applying window functions such as 240a and 240b are displayed in subgraph (d).

[0032] Now, further evaluation of the windowed signal is needed. Figure 2 The steps within the marked areas 245a and 245b). Therefore, integration is performed in the next steps 250a and 250b, and the result of this integration is shown in subplot (e). The corresponding trigger signals indicating when and which signal regions to integrate are shown as solid lines in subplot (i). In the case of the active measurement step ( Figure 3A The integral value is reset at the rising edge of the square wave signal. It can be seen that the rising edge of the trigger signal here is earlier than the rising edge of the excitation signal V. excThe one arrives late. However, the falling edges of both signals are at the same position. For example... Figure 3A As shown in subgraph (e), disturbances in the second active measurement step cause a rapid increase in the integrated signal. For the passive measurement step ( Figure 3B The integral value is reset at the rising edge of each trigger signal, such as... Figure 3B As can be seen in subgraph (i), the disturbance in the sixth passive measurement step also leads to a rapid increase in the integrated signal.

[0033] The rapid increase in the integrated signal provides a reliable characteristic for detecting interference. To identify the rapidly rising edge, in steps 270a and 270b, the value of the integrated signal is continuously compared with a previous value (advance time difference ΔT). The time difference ΔT should be small enough that the operating conditions do not change significantly during this period. To achieve this comparison of the two values, a sample-and-hold operation is applied to the integrated signal at different time points. For the active measurement step ( Figure 3A As shown in subgraph (f), in step 260a, the integral value is sampled at the falling edge of the trigger function from subgraph (i), and in step 270a it is compared with the integral value obtained in step 262a from the excitation signal V as shown in subgraph (g). exc The value is compared to the value sampled at the previous rising edge. If the current value is greater than the previous value, interference is detected. Otherwise, no interference is considered. The positions of the corresponding values ​​are marked with ellipses in subgraph (e). Figure 3A Subplot (h) shows the successful identification of interference in the second active measurement step; this signal is generated based on the signals from subplots (f) and (g). For the passive measurement step ( Figure 3B As shown in subgraph (f), in step 260b, the integral value is sampled at the falling edge of the trigger function from subgraph (i), and in step 270b it is compared with the integral value obtained in step 262b from the excitation signal V as shown in subgraph (g). exc The values ​​sampled at the previous falling edge are compared. Subplot (h) shows the successful identification of interference in the sixth passive measurement step. Figure 3A Similarly, in Figure 3B In subplot (e), the positions of the values ​​used for analysis are also marked by ellipses.

[0034] Finally, in steps 280a and 280b, the interference identification status of each measurement step is checked. If an interference is identified in a measurement step (whether active or passive), the corresponding output signal is not considered a valid value. Otherwise, the value can be stored in the output buffer, and the last valid value is released at the end of the readout cycle. In such a process, it is advantageous to average the multiple valid measurements for each readout cycle, for example, to achieve a better signal-to-noise ratio. The interference detection signal V generated in step 285 in this way... det Finally, this can be provided in step 290 so that the interference-reduced measurement signal V can be generated using filter unit 150. red .

[0035] This invention is not limited to the exemplary embodiments described herein and the aspects emphasized therein. Rather, various modifications are possible within the scope specified in the claims, and these modifications are within the scope of the skill of those skilled in the art.

Claims

1. A device for including two capacitors (C S1 C S2 The readout circuit (100) of the capacitive sensor (120) includes: A capacitor-to-voltage converter (130) is used to apply a periodic excitation signal (V) to the sensor (120). exc When ), the capacitance (C) from the sensor (120) is compared with that from the capacitor (C). S1 C S2 The two periodic sensor signals (V) are associated with each other. S1 V S2 ) is converted into two amplified voltage signals (V out1 V out2 ); Interference detection unit (140) for detecting at least one of the sensor signals (V) S1 V S2 Interference in ) as well as A filter unit (150) is configured to receive an interference detection signal (V) from the interference detection unit (140). det ) and two voltage signals (V) from the capacitor voltage converter (130). out1 V out2 Generate a measurement signal with reduced interference (V) red ), The interference detection unit (140) is configured to apply the periodic excitation signal (V) to the sensor (120). exc When evaluating at least one of the sensor signals (V), the following steps are performed: S1 V S2 ): a. By analyzing the signal (V) from the at least one sensor S1 V S2 ) and / or the sensor signal (V S1 V S2 A combination of high-pass filters is used to generate a (220) filtered signal; b. Form a (230) non-negative signal from the filtered signal; c. Apply a (240a, 240b) window function to the non-negative signal to weight the region of the non-negative signal; d. Evaluate the weighted signals (245a, 245b) to detect interference; and e. Generate (285) and provide (290) the interference detection signal (V) based on the detected interference. det ).

2. The readout circuit (100) according to claim 1, wherein the capacitor voltage converter (130) comprises: Fully differential operational amplifier (170); Two integrating capacitors (C) i1 C i2 );as well as Two switches (S) w1 , S w2 Each switch is associated with the two integrating capacitors (C). i1 C i2 One of them is connected in parallel and connected to the capacitor (C) of the sensor (120). S1 C S2 One of the switches, and when closed, causes the parallel-connected integrating capacitors (C) to... i1 C i2 ) and the capacitance (C) of the connected sensor (120) S1 C S2 Discharge.

3. The readout circuit (100) according to any one of the preceding claims, wherein the interference detection unit (140) is configured to detect each sensor signal (V) from the sensor (120). S1 V S2 Interference in ).

4. The readout circuit (100) according to any one of the preceding claims, wherein the interference detection unit (140) is configured to detect at least one of the sensor signals (V) using one or more additional signals from one or more additional components. S1 V S2 Interference in ).

5. The readout circuit (100) according to any one of the preceding claims, wherein, In the excitation signal (V exc When the excitation signal (V) is a square wave, the interference detection unit (140) is configured to detect the interference in response to the excitation signal (V). exc The high level of the excitation signal (V) and the excitation signal (V) exc The low level of ) allows for the independent detection of one of the sensor signals (V) from each other. S1 V S2 Interference in ).

6. The readout circuit (100) according to claim 5, wherein, In the excitation signal (V exc When the excitation signal (V) is a square wave, steps c and d are for the excitation signal (V) exc The high level of the excitation signal (V) and the excitation signal (V) exc The low levels of the interference detection signal (V) are executed independently of each other, and the interference detection signal (V) det The generation of (285) is based on the interference detected by evaluating two weighted signals (245a, 245b).

7. A sensor system (101) comprising two capacitors (C S1 C S2 The capacitive sensor (120) and the readout circuit (100) according to any one of the preceding claims.

8. The sensor system (101) according to claim 7, wherein the sensor system (101) further comprises methods for generating the periodic excitation signal (V). exc The device (110) for reducing the interference, and the measurement signal (V) for reducing the interference. red ) is further processed into a further processed output signal (V) proc The unit (160) and the unit for further processing the output signal (V) proc Digital analog-to-digital converter (180).

9. The sensor system (101) according to claim 8, wherein the periodic excitation signal (V) exc This includes sine waves, triangle waves, sawtooth waves, or square waves.

10. A MEMS component (102) comprising a displacement device (103) for tilting the component about a tilt axis and a sensor system (101) according to any one of claims 8 to 9 for determining the tilt angle of said displacement device (103).

11. A device for providing a capacitor comprising two capacitors (C S1 C S2 The capacitive sensor (120) generates a measurement signal (V) with reduced interference. red The method, which uses the readout circuit (100) according to any one of claims 1 to 6 and / or the sensor system (101) according to any one of claims 7 to 9, includes the following steps: a. Apply a periodic excitation signal (V) to the sensor (120). exc ); b. Capture the capacitance (C) from the sensor (120). S1 C S2 The two periodic sensor signals (V) are associated with each other. S1 V S2 ); c. The periodic sensor signal (V) is converted by means of a capacitor voltage converter (130). S1 V S2 This generates two amplified voltage signals (V). out1 V out2 ); d. By analyzing one of the sensor signals (V) S1 V S2 A high-pass filter is applied to generate a (220) filtered signal; e. Form a (230) non-negative signal from the filtered signal; f. Apply a (240a, 240b) window function to the non-negative signal to weight the region of the non-negative signal; g. Evaluate the weighted signals (245a, 245b) to detect interference, and generate an interference detection signal (285) based on the detected interference (V). det ); as well as h. From the interference detection signal (V) det ) and two voltage signals (V) from the capacitor voltage converter (130). out1 V out2 Generate the measurement signal (V) with reduced interference. red ).

Citation Information

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