Display device

Abstract

Disclosed is a display device including: a microcontroller including: a core configured to operate in an active mode to perform an operation for determining a touch position of a user, and a first PWM generator configured to generate a PWM signal in the active mode; a touch driver including a second PWM generator configured to generate a PWM signal for determining whether or not a touch of a user occurs based on a high pulse width, a low pulse width, a number of pulses, and initial interval information of the PWM signal generated by the first PWM generator in an idle mode; a timing controller configured to generate a touch synchronization signal provided to the microcontroller and the touch driver; and a plurality of touch electrodes configured to receive a common voltage generated based on the PWM signal and driven in an active mode or an idle mode.

Description

Technical Field

[0001] Embodiments of this disclosure relate to a display device. Background Technology

[0002] With the development of the information society, the demand for simplified display devices for displaying images is increasing, and various types of display devices such as liquid crystal displays and organic light-emitting diode displays are being used.

[0003] The image displayed on the display device can be a still image or a moving image, and in the case of a moving image, it can be of various types such as motion graphics, game images, movies, etc. The display device may include multiple pixels and multiple switching elements for driving the pixels. Summary of the Invention

[0004] Therefore, one object of the embodiments of this disclosure is to overcome the above-mentioned disadvantages of the prior art, and the embodiments of this disclosure can provide a display device that can reduce power consumption and extend the life of the microcontroller.

[0005] The aspects of this disclosure are not limited to those described above, and other aspects and advantages not mentioned above may be clearly understood from the following description and may be more clearly understood from the embodiments set forth herein.

[0006] To achieve the objectives of this disclosure, a display device according to one embodiment of this disclosure may include: a microcontroller including a core configured to operate in an active mode to perform operations for determining a user's touch position and a first PWM generator configured to generate a PWM signal in the active mode; a touch driver including a second PWM generator configured to generate a PWM signal in an idle mode based on high pulse width, low pulse width, pulse number, and initial interval information of the PWM signal generated by the first PWM generator to determine whether a user touch has occurred; a timing controller configured to generate a touch synchronization signal provided to the microcontroller and the touch driver; and a plurality of touch electrodes configured to receive a common voltage generated based on the PWM signal and driven in the active mode or the idle mode.

[0007] In another embodiment, the display device may include: a microcontroller including a first PWM generator configured to generate a PWM signal in an active mode for determining a user's touch position; a touch driver including a second PWM generator configured to generate a PWM signal in an idle mode based on high pulse width, low pulse width, pulse number, and initial interval information of the PWM signal generated by the first PWM generator for determining whether a user touch has occurred; and a plurality of touch electrodes configured to receive a common voltage generated based on the PWM signal to be driven in the active mode or the idle mode.

[0008] Detailed descriptions of other embodiments are provided in the detailed description and accompanying drawings.

[0009] According to embodiments of this disclosure, the display device can reduce power consumption and extend the lifespan of the microcontroller by shutting down the operation of the microcontroller's core, SPI host, SRAM, and first PWM generator in idle mode.

[0010] Furthermore, according to embodiments of this disclosure, the display device can turn off the first PWM generator of the microcontroller by generating a PWM signal based on the PWM signal generated by the first PWM generator in the idle mode of the touch driver.

[0011] In addition to the effects described above, the specific effects of this disclosure will be described together with the following detailed description of how this disclosure is implemented.

[0012] Other systems, methods, features, and advantages will be apparent to those skilled in the art upon examination of the following figures and detailed description. All such additional systems, methods, features, and advantages are intended to be included within this specification, within the scope of this disclosure, and protected by the appended claims. Nothing in this section should be construed as limiting those claims. Further aspects and advantages are discussed below in conjunction with embodiments of this disclosure.

[0013] It should be understood that both the foregoing general description and the following detailed description are exemplary and illustrative, and are intended to provide further explanation of the claimed inventive concept. Attached Figure Description

[0014] The accompanying drawings are included to provide a further understanding of this disclosure and are incorporated in and constitute a part of this application. The drawings illustrate embodiments of the disclosure and, together with the description, serve to explain the principles of the disclosure. In the drawings:

[0015] Figure 1 This is a plan view showing a display device according to one embodiment;

[0016] Figure 2 This is a block diagram illustrating a display device according to one embodiment;

[0017] Figure 3 This is a diagram illustrating a channel multiplexer for a display device according to one embodiment;

[0018] Figure 4 This is a block diagram illustrating the operation of a microcontroller and a touch driver in an active mode in a display device according to one embodiment;

[0019] Figure 5 This is a waveform diagram showing the PWM signal in active mode in a display device according to one embodiment;

[0020] Figure 6 This is a block diagram illustrating the operation of a microcontroller and a touch driver in an idle mode according to one embodiment of a display device;

[0021] Figure 7 This is a waveform diagram illustrating the PWM signal and the operation of the microcontroller and touch driver in idle mode in a display device according to one embodiment;

[0022] Figure 8 This is a block diagram illustrating the operation of a microcontroller and a touch driver in an idle mode in a display device according to another embodiment;

[0023] Figure 9 This is a flowchart illustrating a touch sensing process in a display device according to one embodiment;

[0024] Figure 10 This is a circuit diagram showing the pulse width generation circuit of a second PWM generator in a display device according to one embodiment;

[0025] Figure 11 This is a waveform diagram showing the operation of the pulse width generation circuit of the second PWM generator in a display device according to one embodiment;

[0026] Figure 12 This is a circuit diagram showing the pulse number generation circuit of the second PWM generator in a display device according to one embodiment;

[0027] Figure 13 This is a waveform diagram showing the operation of the pulse number generation circuit of the second PWM generator in the first frame of a display device according to one embodiment;

[0028] Figure 14It is a waveform diagram showing the operation of the pulse number generation circuit of the second PWM generator in the second frame of a display device according to one embodiment;

[0029] Figure 15 This is a circuit diagram showing the pulse generation circuit of a second PWM generator in a display device according to one embodiment;

[0030] Figure 16 This is a waveform diagram showing the operation of the pulse generation circuit of the second PWM generator in a display device according to one embodiment;

[0031] Figure 17 This is a circuit diagram showing the pulse width generation circuit of a second PWM generator in a display device according to another embodiment; and

[0032] Figure 18 This is a waveform diagram showing the operation of the pulse width generation circuit of the second PWM generator in a display device according to another embodiment.

[0033] Throughout the accompanying drawings and detailed description, unless otherwise stated, the same reference numerals shall be construed as referring to the same elements, features, and structures. For clarity, illustration, and convenience, the relative sizes and depictions of these elements may be exaggerated.

[0034] 10: Display device 100: Display panel

[0035] 210: Data driver; 220: Touch driver

[0036] 230: Scan driver; 240: Microcontroller

[0037] 245: First PWM generator; 225: Second PWM generator

[0038] 500: Timer controller; 600: Power supply unit

[0039] 700: Memory; SP: Pixel Detailed Implementation

[0040] Reference will now be made in detail to embodiments of this disclosure, examples of which are illustrated in the accompanying drawings. In the following description, detailed descriptions of well-known functions or configurations relevant to this document will be omitted or may be briefly discussed where it is determined that such detailed descriptions would unnecessarily obscure the essential points of the inventive concept. The described process steps and / or order of operations are exemplary; however, the order of steps and / or operations is not limited to the order set forth herein and may be varied as is known in the art, except for steps and / or operations that must occur in a specific order. The same reference numerals always refer to the same elements. The names of the corresponding elements used in the following explanation may be chosen solely for the convenience of writing the specification and may therefore differ from those used in actual products.

[0041] The advantages and features of this disclosure, and methods of implementing them, will be illustrated by the following exemplary embodiments described with reference to the accompanying drawings. However, this disclosure may be implemented in different forms and should not be construed as limited to the exemplary embodiments set forth herein. These exemplary embodiments are provided, in contrast, to make this disclosure sufficiently thorough and complete to assist those skilled in the art in fully understanding its scope. Furthermore, this disclosure is limited only by the scope of the claims.

[0042] The shapes, sizes, ratios, angles, and quantities disclosed in the accompanying drawings to describe embodiments of this disclosure are merely examples. Therefore, this disclosure is not limited to the details shown. The same reference numerals always refer to the same elements. In the following description, a detailed description of a known function or configuration may be omitted when it is determined that such a description would unnecessarily obscure the focus of this disclosure. When using the terms "comprising," "having," and "including" as described in this specification, another component may be added unless "only" is used. Elements described in the singular are intended to include multiple elements, and vice versa, unless the context clearly indicates otherwise.

[0043] Any implementation described in this article as an "example" is not necessarily to be interpreted as preferred or advantageous over other implementations.

[0044] Additionally, when referring to any size, relative size, etc., it should be assumed that the numerical or corresponding information of the component or feature (e.g., level, range, etc.) includes tolerances or error ranges that may arise from various factors (e.g., process factors, internal or external influences, noise, etc.) even if no relevant description is specified. Furthermore, the term "may" fully encompasses all the meanings of the term "may".

[0045] In the following description, a detailed description will now be given with reference to the accompanying drawings and exemplary embodiments disclosed herein. In this disclosure, when a component (or region, layer, portion, etc.) is referred to as being “on,” “connected,” or “linked” to another component, this means that it can be directly connected / linked to the other component, or that a third component can be arranged between them.

[0046] Preferred embodiments according to the present disclosure will now be described in detail with reference to the accompanying drawings. In the drawings, the same reference numerals may denote the same or similar components.

[0047] These terms are generally used only to distinguish one element from another. It should be understood that the terms "first" and "second" are used herein to describe various components, but these components should not be limited by these terms. The terms above are used only to distinguish one component from another. For example, a first component may be referred to as a second component without departing from the scope of this disclosure, and vice versa. Unless the context clearly specifies otherwise, singular expressions include plural expressions.

[0048] Terms such as “below,” “under,” “above,” and “over” are used to describe the positional relationship between the elements shown in the accompanying drawings. Such terms are relative concepts and are described relative to the directions shown in the drawings. In contrast, when an element is described as being “directly connected” to another element, there is no intermediate element. One or more other elements may also be present unless “closely connected” or “directly” is used when describing positional relationships (e.g., “on top of,” “above,” “below,” “next,” etc.).

[0049] Throughout this disclosure, unless explicitly stated otherwise, each component may be described as a single component or multiple components. Terms such as “comprising” or “including” are used herein and should be understood to indicate the presence of several groups, functions, or steps disclosed in the specification, and should also be understood to mean that more or fewer components, functions, or steps may be utilized. Singular expressions may include plural expressions unless they indicate a meaning explicitly different from the context. When interpreting components, it should be understood that a range of tolerances is included even without a separate explicit description.

[0050] The term “at least one” should be understood to include any and all combinations of one or more associated listed items. For example, “at least one of the first element, the second element, and the third element” means a combination of all three listed elements, a combination of any two of the three elements, and each individual element (the first element, the second element, or the third element).

[0051] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which the example embodiments pertain. It should also be understood that terms such as those defined in common dictionaries should be interpreted as having a meaning consistent with, for example, their meaning in the context of the relevant field, and should not be interpreted in an idealized or overly formal sense unless explicitly defined herein. For example, as one of ordinary skill in the art will understand, the terms “component” or “unit” can be applied to, for example, a single circuit or structure, an integrated circuit, a computational block of a circuit device, or any structure configured to perform the described functions.

[0052] In contrast, these embodiments may be provided to make this disclosure sufficiently thorough and complete to assist those skilled in the art in fully understanding its scope. Furthermore, this disclosure is limited only by the scope of the claims.

[0053] As will be fully understood by those skilled in the art, the features of the various embodiments of this disclosure may be partially or entirely linked or combined with each other, and may be interoperable and technically driven differently from each other. The embodiments of this disclosure may be performed independently of each other, or may be performed together in an interdependent relationship.

[0054] Figure 1 This is a plan view showing a display device according to one embodiment.

[0055] Reference Figure 1 The display device 10 can be applied to portable electronic devices such as mobile phones, smartphones, tablet PCs, mobile communication terminals, e-notebooks, e-readers, portable multimedia players (PMPs), navigation devices, and ultra-mobile PCs (UMPCs). For example, the display device 10 can be applied to display units in televisions, laptops, monitors, billboards, or the Internet of Things (IoT). As another example, the display device 10 can be applied to wearable devices such as smartwatches, smartwatch phones, glasses displays, and head-mounted displays (HMDs).

[0056] The display device 10 may include a display panel 100, a display driving unit 200, a flexible film 250, a source circuit board 300, a flexible cable 310, a control circuit board 400, a timing controller 500, a power supply unit 600, and a memory 700.

[0057] Display panel 100 may include a display area DA and a non-display area NDA. The display area DA may include a plurality of pixels for displaying an image. Each of the plurality of pixels may emit light from a light-emitting area or an aperture area. For example, the display area DA may include pixel circuitry with switching elements, a pixel defining film defining the light-emitting area, and a self-emissive element.

[0058] For example, a self-emissive element may include at least one of an organic light-emitting diode (OLED) containing an organic light-emitting layer, a quantum dot LED containing a quantum dot LED, an inorganic LED containing an inorganic semiconductor, and an ultra-small light-emitting diode (micro LED or nano LED), but the implementation is not limited thereto.

[0059] The display driving unit 200 may include a data driver that provides data voltage and a touch driver that provides touch signals. The display driving unit 200 may be implemented as an integrated circuit in which the data driver and touch driver are integrated. For example, the display driving unit 200 may be attached to a surface of a flexible film 250 in a COF (chip-on-film) manner. The flexible film 250 may include lines electrically connecting the display driving unit 200 and the display panel 100. One side of the flexible film 250 may be electrically connected to a pad portion of the display panel 100, and the other side of the flexible film 250 may be electrically connected to a source circuit board 300.

[0060] The source circuit board 300 can electrically connect the control circuit board 400 and the flexible film 250. The source circuit board 300 can be a printed circuit board including lines that electrically connect the display driving unit 200 and other devices. The source circuit board 300 can be electrically connected to the control circuit board 400 via a flexible cable 310. For example, the flexible cable 310 can be a flexible flat cable (FFC), but is not limited thereto.

[0061] The control circuit board 400 can be a printed circuit board that mounts the timing controller 500, the power supply unit 600, and the memory 700. It is not limited to this. Figure 1 As illustrated, the control circuit board 400 can be used to mount control components and various electrical devices.

[0062] The timing controller 500 can be attached to one side of the control circuit board 400. The timing controller 500 can control the driving timing of the display driving unit 200 by sending digital video data to the display driving unit 200.

[0063] The power supply unit 600 can generate a power supply voltage and supply it to the display panel 100. Here, the power supply voltage may include, but is not limited to, a first driving voltage (EVDD), a second driving voltage (EVSS), an initialization voltage (Vint), a reference voltage (Vref), and a bias voltage (Vbias).

[0064] The memory 700 can store pixel sensing information. For example, the memory 700 can store threshold voltage information of transistors received from the display driving unit 200 and provide the threshold voltage information to the timing controller 500.

[0065] Figure 2This is a block diagram illustrating a display device according to one embodiment.

[0066] Reference Figure 2 The display panel 100 may include a display area DA and a non-display area NDA. The display area DA may include a plurality of pixels SP, scan lines SL and data lines DL connected to the pixels SP. Each of the plurality of pixels SP may be connected to the scan lines SL and data lines DL. Each of the plurality of pixels SP may include a transistor, a light-emitting element, and a capacitor.

[0067] Scan lines SL can extend along a first direction DR1 and can be spaced apart from each other along a second direction DR2 that intersects the first direction DR1. Scan lines SL can sequentially provide scan signals to multiple pixels SP.

[0068] The data lines DL can extend along the second direction DR2 and can be spaced apart from each other along the first direction DR1. The data lines DL can provide data voltage to the pixel SP. The data voltage determines the brightness of the pixel SP.

[0069] The display driver unit 200 may include a data driver 210 and a touch driver 220. The display driver unit 200 may be implemented as an integrated circuit in which the data driver 210 and the touch driver 220 are integrated.

[0070] Data driver 210 can convert digital video data DATA into analog data voltage. Data driver 210 can provide data voltage to data line DL through fan-out line based on data control signal DCS. Data driver 210 can be electrically connected to the data line of display panel 100 through flexible film 250 and pad portion of display panel 100.

[0071] Touch driver 220 can provide a touch drive signal to the touch electrodes of display panel 100 via touch line TL. Touch driver 220 can sense the change in capacitance of the touch electrodes. For example, the touch drive signal can be a PWM signal with a predetermined frequency. Touch driver 220 can determine whether a touch has occurred and calculate touch coordinates based on the change in capacitance of the touch electrodes.

[0072] The scan driver 230 may include multiple transistors and can generate scan signals based on the scan control signal SCS. The scan driver 230 can use a shift register to shift the scan signals and sequentially provide the shifted scan signals to the scan lines SL. The scan signals of the scan driver 230 can selectively provide data voltages to pixels SP, and the selected pixels SP can receive the data voltages via data lines DL. The scan driver 230 can be arranged in a GIP (Gateway In-Panel) configuration on one or both sides of the non-display area NDA.

[0073] The microcontroller 240 can control the touch sensing operation of the touch driver 220. The microcontroller (240) can provide the touch synchronization signal (Tsync) received from the timing controller 500 to the touch driver 220. The microcontroller 240 can send signals to and receive signals from the touch driver 220 based on a predefined interface.

[0074] The timing controller 500 can receive digital video data (DATA) and timing signals from a display driver system or graphics device (not shown). The timing controller 500 can generate a data control signal (DCS) based on the timing signals. The timing controller 500 can provide the digital video data (DATA) and the data control signal (DCS) to the data driver 210 to control the operating timing of the data driver 210. The timing controller 500 generates a scan control signal (SCS) based on the timing signals. The timing controller 500 can provide the scan control signal (SCS) to the scan driver 230 to control the operating timing of the scan driver 230.

[0075] Figure 3 This is a diagram illustrating a channel multiplexer for a display device according to one embodiment.

[0076] Reference Figure 3 The display panel 100 may include multiple touch electrodes TE. The touch driver 220 may provide a common voltage VCOM to the touch electrodes TE via a multiple channel multiplexer CMX. One channel multiplexer CMX may provide the common voltage VCOM to touch electrodes TE arranged in at least one column. Figure 3 In this configuration, a channel multiplexer CMX can provide a common voltage VCOM to the touch electrodes TE arranged in two columns, but the configuration of the channel multiplexer CMX is not limited to this. The channel multiplexer CMX can include a first channel multiplexer to a second n-channel multiplexer (CMX1, CMX2, ... and CMX(2n), where n is a positive integer).

[0077] Touch driver 220 can sense user touches in active and idle modes. In active mode, touch driver 220 can sequentially supply a common voltage VCOM to each of the first channel multiplexer to the second n-channel multiplexer CMX1, CMX2, ..., CMX(2n). Touch driver 220 can determine the user's touch location by identifying the channel multiplexer CMX that senses the user's touch in active mode. In idle mode, touch driver 220 can determine whether a user touch has occurred by combining multiple channel multiplexers CMX into at least one group. Multiple channel multiplexers CMX can be combined into a group by short-circuiting. For example, in idle mode, touch driver 220 can combine the first channel multiplexer to the n-channel multiplexer CMX1, CMX2, ..., CMX(n) while simultaneously supplying the common voltage VCOM to the first channel multiplexer to the n-channel multiplexer CMX1, CMX2, ..., CMX(n). The touch driver 220 can simultaneously supply a common voltage (VCOM) to the n+1 channel multiplexer to the 2n channel multiplexer CMX(n+1), CMX(n+2), and CMX(2n) by merging the n+1 channel multiplexer to the 2n channel multiplexer CMX(n+1), CMX(n+2), and CMX(2n) in idle mode.

[0078] Figure 4 This is a block diagram illustrating the operation of a microcontroller and touch driver in an active mode in a display device according to one embodiment. Figure 5 This is a waveform diagram showing the PWM signal in active mode in a display device according to one embodiment.

[0079] Reference Figure 4 and Figure 5 The microcontroller 240 can control the touch sensing operation of the touch driver 220. The microcontroller 240 may include a core 241, a clock generator 242, an SPI (Serial Peripheral Interface) host 243, an SRAM (Static Random Access Memory) 244, a first PWM generator 245, and an IRQ (Interrupt Request) detection unit 246.

[0080] Core 241 can operate in active mode to perform operations for determining touch position. Core 241 can receive SPI signals with touch data from touch driver 220 via SPI master 243. Core 241 can perform operations based on the touch data to calculate touch coordinates.

[0081] Clock generator 242 can operate in active mode to generate clock signals. Clock generator 242 can provide clock signals to SPI master 243, SRAM 244, first PWM generator 245 and IRQ detection unit 246.

[0082] The SPI master 243 can operate in active mode and perform bidirectional data communication between the microcontroller 240 and peripheral devices using SPI signals. The SRAM 244 can operate in active mode to store touch data included in the SPI signals. The SRAM 244 can provide the stored touch data to the core 241.

[0083] The first PWM generator 245 can operate in active mode to generate PWM signals. The first PWM generator 245 can generate PWM signals based on a touch synchronization signal (Tsync). The first PWM generator 245 can generate PWM signals for each touch frame in active mode and provide them to the touch driver 220 and the touch power supply unit 610.

[0084] The IRQ detection unit 246 can operate in active mode to receive interrupt signals and complete the reception of touch data. For example, the IRQ detection unit 246 can receive an SSN (Slave Select) signal or a MISO (Master In, Slave Out) signal to complete the reception of touch data.

[0085] The timing controller 500 can provide a touch synchronization signal (Tsync) to the microcontroller 240 and the touch driver 220. A low level of the touch synchronization signal (Tsync) corresponds to a touch frame. Touch sensing of the first frame (Frame1) can be performed when the touch synchronization signal (Tsync) is low.

[0086] The touch power supply unit 610 can receive a PWM signal and generate a common voltage (VCOM). The common voltage (VCOM) can have a high-level voltage synchronized with the high level of the PWM signal and a low-level voltage synchronized with the low level of the PWM signal. The touch power supply unit 610 can provide the common voltage (VCOM) to the touch driver 220.

[0087] Touch driver 220 can receive a common voltage (VCOM) from touch power unit 610 and supply it to display panel (100). Touch driver (220) can sequentially supply the common voltage (VCOM) to each of the first channel multiplexer to the second n-channel multiplexer CMX1, CMX2, ..., and CMX (2n) in active mode. Touch driver 220 can determine the user's touch position by identifying the channel multiplexer CMX that senses the user's touch in active mode.

[0088] The touch driver 220 may include a second PWM generator 225. The second PWM generator 225 can be turned off (OFF) in active mode.

[0089] Figure 6 This is a block diagram illustrating the operation of a microcontroller and touch driver in an idle mode according to one embodiment of a display device. Figure 7 This is a waveform diagram illustrating the PWM signal and the operation of the microcontroller and touch driver in idle mode in a display device according to one embodiment. Specifically, Figure 6 The block diagram can correspond to the operations after the second frame (Frame2).

[0090] Reference Figure 6 and Figure 7 The microcontroller 240 can control the touch sensing operation of the touch driver 220. The microcontroller 240 may include a core 241, a clock generator 242, an SPI master 243, an SRAM 244, a first PWM generator 245, and an IRQ detection unit 246.

[0091] Core 241 can be turned off in idle mode. Core 241 can refrain from performing operations for determining touch location in idle mode.

[0092] Clock generator 242 can be operated in idle mode to generate clock signals. Clock generator 242 can provide clock signals to SPI master 243, SRAM 244, first PWM generator 245 and IRQ detection unit 246.

[0093] The SPI master 243 and SRAM 244 can be shut down in idle mode.

[0094] The first PWM generator 245 can be operated to turn on in the first frame (Frame 1) of the idle mode to generate a PWM signal, and can be operated to turn off from the second frame (Frame 2) onwards to not generate a PWM signal.

[0095] The second PWM generator 225 of the touch driver 220 can be turned on starting from the second frame (Frame 2) to generate PWM signals. The second PWM generator 225 of the touch driver 220 can use an internal clock signal (CLK) to count the PWM signals received from the first PWM generator 245. The second PWM generator 225 can count and store the high pulse width, low pulse width, pulse count, and initial interval information of the PWM signal generated in the first frame (Frame 1) in a register. The second PWM generator 225 can generate PWM signals starting from the second frame (Frame 2) based on the stored high pulse width, low pulse width, pulse count, and initial interval information.

[0096] The touch power unit 610 can generate a common voltage (VCOM) based on a PWM signal. The touch power unit 610 can generate the common voltage (VCOM) based on the PWM signal of the first PWM generator 245 in the first frame (Frame 1) of the idle mode, and can generate the common voltage (VCOM) based on the PWM signal of the second PWM generator 225 starting from the second frame (Frame 2) of the idle mode. The common voltage (VCOM) can have a high-level voltage synchronized with the high level of the PWM signal, and can have a low-level voltage synchronized with the low level of the PWM signal. The touch power unit 610 can provide the common voltage (VCOM) to the touch driver 220.

[0097] The IRQ detection unit 246 can be turned off in the first frame (Frame 1) of the idle mode and can be turned on starting from the second frame (Frame 2) of the idle mode. The IRQ detection unit 246 can detect interrupt requests (IRQ detection) starting from the second frame (Frame 2) of the idle mode, receive the interrupt signal, and complete the reception of touch data. For example, the IRQ detection unit 246 can complete the reception of touch data by receiving an SSN (Slave Select) signal or a MISO (Master In, Slave Out) signal.

[0098] The timing controller 500 can provide a touch synchronization signal (Tsync) to the touch driver 220. A low level of the touch synchronization signal (Tsync) can correspond to a touch frame. Touch sensing of the first frame (Frame1) can be performed at the first low level of the touch synchronization signal (Tsync), and touch sensing of the second frame (Frame2) can be performed at the second low level of the touch synchronization signal (Tsync).

[0099] Touch driver 220 can receive a common voltage (VCOM) from touch power unit 610 and supply it to display panel 100. Touch driver 220 can determine whether a user touch has occurred by merging multiple channel multiplexers CMX into at least one group in idle mode. Multiple channel multiplexers CMX can be merged into one group by short-circuiting. For example, touch driver 220 can merge first channel multiplexers to nth channel multiplexers CMX1, CMX2, ... and CMX(n) in idle mode and simultaneously supply the common voltage VCOM to first channel multiplexers to nth channel multiplexers CMX1, CMX2, ... and CMX(n). The touch driver 220 can simultaneously supply a common voltage (VCOM) to the n+1 channel multiplexer to the 2n channel multiplexer CMX(n+1), CMX(n+2), ... and CMX(2n) by merging the n+1 channel multiplexer to the 2n channel multiplexer CMX(n+1), CMX(n+2), ... and CMX(2n) in idle mode.

[0100] The touch driver 220 can set a baseline based on the touch sensing signal of the first frame (Frame 1) and determine whether a user touch has occurred based on the touch sensing signal of the second frame (Frame 2). If the touch sensing signal of the second frame (Frame 2) differs significantly from the baseline, the touch driver 220 can determine whether a user touch has occurred.

[0101] The display device 10 can reduce power consumption and extend the lifespan of the microcontroller 240 by disabling the operation of the core 241, SPI master 243, SRAM 244, and first PWM generator 245 of the microcontroller 240 in idle mode. Furthermore, since a portion of the microcontroller 240 is not operating in idle mode, the operation of the microcontroller 240 can be performed smoothly.

[0102] Figure 8 This is a block diagram illustrating the operation of a microcontroller and touch driver in an idle mode in a display device according to another embodiment. Figure 8 The display device also includes Figure 6 The display device contains multiple touch drivers 220, and the same configuration as described above will be briefly described or omitted.

[0103] Reference Figure 8Touch driver 220 may include first touch drivers to third touch drivers 221, 222, and 223. Each of the first touch drivers to the third touch drivers 221, 222, and 223 may receive a common voltage (VCOM) from touch power unit 610 and supply it to display panel 100. Touch driver 220 may determine whether a user touch has occurred in idle mode by combining multiple channel multiplexers (CMX) into at least one group. Multiple channel multiplexers (CMX) may be combined into one group by short-circuiting.

[0104] The first touch driver 221 may include a second PWM generator 225. The second PWM generator 225 can be activated and generate a PWM signal after the second frame (Frame 2) of the idle mode. The second PWM generator 225 of the first touch driver 221 can use an internal clock signal CLK to count the PWM signal received from the first PWM generator 245. The second PWM generator 225 can count and store the high pulse width, low pulse width, pulse count, and initial interval information of the PWM signal generated in the first frame (Frame 1) in a register. The second PWM generator 225 can generate a PWM signal after the second frame (Frame 2) based on the stored high pulse width, low pulse width, pulse count, and initial interval information.

[0105] The touch power unit 610 can generate a common voltage (VCOM) based on a PWM signal. The touch power unit 610 can generate the common voltage (VCOM) based on the PWM signal of the first PWM generator 245 in the first frame (Frame 1) of the idle mode, and can generate the common voltage (VCOM) based on the PWM signal of the second PWM generator 225 starting from the second frame (Frame 2) of the idle mode. The common voltage (VCOM) can have a high-level voltage synchronized with the high level of the PWM signal, and can have a low-level voltage synchronized with the low level of the PWM signal. The touch power unit 610 can provide the common voltage (VCOM) to the first touch driver through the third touch drivers 221, 222, and 223. Therefore, the common voltage (VCOM) can be generated based on the PWM signal of the second PWM generator 225 of the first touch driver 221, and can be commonly provided to the first touch driver through the third touch drivers 221, 222, and 223.

[0106] Figure 9 This is a flowchart illustrating a touch sensing process in a display device according to one embodiment.

[0107] Reference Figure 9 The touch power unit 610 can provide a common voltage (VCOM) to the touch driver 220 (step S100).

[0108] Touch driver 220 can sense a user's touch in active mode (step S210). When a user's touch occurs (step S220), touch driver 220 can determine the user's touch location (step S230). Touch driver 220 can determine the channel multiplexer CMX that sensed the user's touch in active mode by sequentially providing a common voltage (VCOM) to each of the first channel multiplexer to the second n-channel multiplexer CMX1, CMX2, ... and CMX (2n).

[0109] When the user's touch does not occur (step S220), the microcontroller 240 and the touch driver 220 can be set to idle mode (step S310).

[0110] The first PWM generator 245 of the microcontroller 240 can output a PWM signal by operating in the first frame (Frame 1) of the idle mode (step S330).

[0111] The second PWM generator 225 of the touch driver 220 can use an internal clock signal (CLK) to count the PWM signals received from the first PWM generator 245. The second PWM generator 225 can count the high pulse width, low pulse width, pulse count, and initial interval information of the PWM signal generated in the first frame (Frame 1) and store them in a register (step S330). The touch driver 220 can set a baseline based on the touch sensing signal of the first frame (Frame 1) (step S330).

[0112] The first PWM generator 245 can be turned off and stop generating PWM signals after the second frame (Frame 2) (step S340).

[0113] The second PWM generator 225 of the touch driver 220 can be turned on and generate a PWM signal after the second frame (Frame 2) of the idle mode (step S350). The second PWM generator 225 can generate a PWM signal after the second frame (Frame 2) based on the stored high pulse width, low pulse width, pulse number and initial interval information.

[0114] When the touch frame has not reached the target frame, the touch driver 220 may update the baseline information (step S370) (step S360). Here, the target frame may correspond to the number of frames used to set the baseline. The touch driver 220 may repeat the update until the touch frame reaches the target frame.

[0115] When the touch frame reaches the target frame (step S360), the touch driver 220 can calculate the touch sensitivity (step S380). When a user touches the screen, the touch driver 220 can compare the touch sensing signal with a baseline (step S390). When the touch sensing signal differs significantly from the baseline, the touch driver 220 can determine that a user touch has occurred. The touch driver 220 and the microcontroller 240 can switch to an active mode and determine the user's touch location when a user touches the screen.

[0116] When the touch sensing signal does not differ significantly from the baseline, the touch driver 220 can determine that the user's touch has not occurred. The touch driver 220 can then compare the touch sensing signal with the baseline until the user's touch occurs.

[0117] Figure 10 This is a circuit diagram showing the pulse width generation circuit of a second PWM generator in a display device according to one embodiment. Figure 11 This is a waveform diagram showing the operation of the pulse width generation circuit of the second PWM generator in a display device according to one embodiment.

[0118] Reference Figure 10 and Figure 11 The second PWM generator 225 of the touch driver 220 may include a pulse width generation circuit (PWGC). The PWGC of the second PWM generator 225 can count and store the high pulse width (positive width), low pulse width (negative width), and initial interval information of the PWM signal generated by the first PWM generator 245 in the first frame (Frame 1) in a register. The PWGC may include first to fourth multiplexers MUX1, MUX2, MUX3, and MUX4, a first counter CREG1, and first to third registers REG1, REG2, and REG3.

[0119] The first input terminal of the first multiplexer MUX1 can receive 0 on the rising edge of the PWM signal (PWM rising edge: 0), 0 on the falling edge of the PWM signal (PWM falling edge: 0), 0 on the falling edge of the touch synchronization signal (Tsync) (Tsync falling edge: 0), and 0 when the count value reaches the target width (width CNT == target width: 0). When the condition of the first input terminal is met, the first multiplexer MUX1 can provide the input value of the first input terminal to the first counter CREG1. When the condition of the first input terminal is not met, the second input terminal of the first multiplexer MUX1 can receive the value obtained by adding 1 (+1) or the count to the output value of the first counter CREG1, and output the corresponding count value to the first counter CREG1.

[0120] The first counter CREG1 can receive the output value of the first multiplexer MUX1, the clock signal CLK, and the reset signal RESET. The first counter CREG1 can perform counting based on the clock signal CLK and can store and output the count value (width CNT). The count value (width CNT) of the first counter CREG1 can be provided to each input terminal of the first to fourth multiplexers MUX1, MUX2, MUX3, and MUX4. Therefore, the second PWM generator 225 can use the first counter CREG1 of the pulse width generation circuit PWGC to count the high pulse width (Positive Width), low pulse width (Negative Width), and initial interval information of the PWM signal generated by the first PWM generator 245, and store the corresponding count value (width CNT) in each of the first register REG1, the second register REG2, and the third register REG3.

[0121] The first input terminal of the second multiplexer MUX2 can receive a count value (width CNT) from the rising edge of the PWM signal until the falling edge of the PWM signal. The count value (width CNT) from the rising edge of the PWM signal until the falling edge of the PWM signal can correspond to the high pulse width (positive width) of the PWM signal. The count value (width CNT) can be initialized at the rising edge of the PWM signal (counter initialization), and the first counter (CREG1) can count until the falling edge of the PWM signal occurs. For example, the first counter CREG1 can output a count value (width CNT) increasing by 1 from 0 to P (P is a positive integer). Here, P can correspond to the count value (width CNT) at the falling edge of the PWM signal. Therefore, the first input terminal of the second multiplexer MUX2 can receive a count value (width CNT) corresponding to the high pulse width (positive width) of the PWM signal and provide it to the first register REG1.

[0122] When the conditions of the first input terminal are not met, the second input terminal of the second multiplexer MUX2 can receive the output value of the first register REG1. The second input terminal of the second multiplexer MUX2 can then provide the output value of the first register REG1 back to the first register REG1.

[0123] Therefore, after the falling edge of the first pulse (Pulse1) (PWM falling edge), the first register REG1 can store and output a count value (width CNT) corresponding to the high pulse width (positive width) of the first pulse (Pulse1). After the falling edge of the second pulse (Pulse2) (PWM falling edge), the first register REG1 can store and output a count value (width CNT) corresponding to the high pulse width (positive width) of the second pulse (Pulse2). After the falling edge of the third pulse (Pulse3) (PWM falling edge), the first register REG1 can store and output a count value (width CNT) corresponding to the high pulse width (positive width) of the third pulse (Pulse3). When the first counter CREG1 counts the count value (width CNT) corresponding to the high pulse width (positive width) after the second frame (Frame2), the pulse width generation circuit PWGC can output the falling signal of the PWM signal (generated PWM falling edge).

[0124] The first input terminal of the third multiplexer MUX3 can receive a count value (width CNT) from the occurrence of the falling edge (PWM falling edge) of the PWM signal until the occurrence of the rising edge (PWM rising edge). This count value (width CNT) can correspond to the low pulse width (negative width) of the PWM signal. The count value (width CNT) can be initialized at the occurrence of the falling edge (PWM falling edge) of the PWM signal (counter initialization), and the first counter CREG1 can count until the occurrence of the rising edge (PWM rising edge). For example, the first counter CREG1 can output a count value (width CNT) increasing by 1 from 0 to N (N is a positive integer). Here, N can correspond to the count value (width CNT) at the occurrence of the rising edge (PWM rising edge). Therefore, the first input terminal of the third multiplexer MUX3 can receive the count value (width CNT) corresponding to the low pulse width (negative width) of the PWM signal and provide it to the second register REG2.

[0125] When the conditions of the first input terminal are not met, the second input terminal of the third multiplexer MUX3 can receive the output value of the second register REG2. The second input terminal of the third multiplexer MUX3 can then provide the output value of the second register REG2 back to the second register REG2.

[0126] Therefore, after the rising edge of the second pulse (Pulse2) (PWM rising edge), the second register REG2 can store and output a count value (width CNT) corresponding to the low pulse width (negative width) of the first pulse (Pulse1). The second register REG2 can also store and output a count value (width CNT) corresponding to the low pulse width (negative width) of the first pulse (Pulse1) after the rising edge of the third pulse (Pulse3) (PWM rising edge). The pulse width generation circuit PWGC can output the rising signal of the PWM signal (generated PWM rise) at the moment when the first counter CREG1 counts the count value (width CNT) corresponding to the low pulse width (negative width) after the second frame (Frame2).

[0127] The first input terminal of the fourth multiplexer MUX4 can receive a count value (width CNT) starting from the falling edge (Tsync falling edge) of the touch synchronization signal until the rising edge (PWM rising edge) of the first pulse or the first pulse (Pulse1). This count value (width CNT) can correspond to the initial interval of the PWM signal. The count value (width CNT) can be initialized at the falling edge (Tsync falling edge) of the touch synchronization signal (counter initialization), and the first counter CREG1 can count until the rising edge (PWM rising edge) of the first pulse (Pulse1) occurs. For example, the first counter CREG1 can output a count value (width CNT) increasing from 0 to 1 (where 1 is a positive integer). Here, 1 can correspond to the count value (width CNT) at the occurrence of the rising edge (PWM rising edge) of the first pulse (Pulse1). Therefore, the first input terminal of the fourth multiplexer MUX4 can receive the count value (width CNT) corresponding to the initial interval of the PWM signal and provide it to the third register REG3.

[0128] When the conditions of the first input terminal are not met, the second input terminal of the fourth multiplexer MUX2 can receive the output value of the third register REG3. The second input terminal of the fourth multiplexer MUX2 can again provide the output value of the third register REG3 to the third register REG3.

[0129] Therefore, the third register REG3 can store and output a count value (width CNT) corresponding to the initial interval of the PWM signal after the rising edge of the first pulse (Pulse1) (PWM rising edge). The pulse width generation circuit PWGC can output the rising signal of the PWM signal (generated PWM rise) at the moment when the first counter CREG1 counts the count value (width CNT) corresponding to the initial interval of the PWM signal after the second frame (Frame2).

[0130] Figure 12 This is a circuit diagram showing the pulse number generation circuit of the second PWM generator in a display device according to one embodiment. Figure 13 This is a waveform diagram showing the operation of the pulse number generation circuit of the second PWM generator in the first frame of a display device according to one embodiment. Figure 14 This is a waveform diagram showing the operation of the pulse number generation circuit of the second PWM generator in the second frame of a display device according to one embodiment.

[0131] Reference Figures 12 to 14 The second PWM generator 225 of the touch driver 220 may include a pulse count generation circuit PNGC. The pulse count generation circuit PNGC of the second PWM generator 225 can count the number of pulses (pulse NUM) of the PWM signal generated by the first PWM generator 245 in the first frame (Frame 1) and store it in the fourth register REG4. The pulse width generation circuit PWGC may include a fifth multiplexer MUX5 and a sixth multiplexer MUX6, a second counter CREG2, and the fourth register REG4.

[0132] The first input terminal of the fifth multiplexer MUX5 can receive 0 at the falling edge of the touch synchronization signal (Tsync) (Tsync falling edge: 0), and can receive the value obtained by adding 1 (+1) or adding a count at each rising edge of the PWM signal (PWM rising edge), and can output the corresponding count value to the second counter CREG2.

[0133] The second counter CREG2 can receive the output value of the fifth multiplexer MUX5, the clock signal CLK, and the reset signal RESET. The second counter CREG2 can perform counting based on the clock signal CLK and can store and output the count value (pulse NUM CNT). The count value (width CNT) of the second counter CREG2 can be provided to the input terminal of the sixth multiplexer MUX6. Therefore, the second PWM generator 225 can use the second counter CREG2 of the pulse width generation circuit PWGC to count the number of pulses (pulse NUM) of the PWM signal generated by the first PWM generator 245 and store the corresponding count value (pulse NUM CNT) in the fourth register REG4.

[0134] The first input terminal of the sixth multiplexer MUX6 can receive a count value (pulse NUM CNT) from the appearance of the falling edge (Tsync falling edge) of the touch synchronization signal in the first frame (Frame 1) until the appearance of the rising edge (Tsync rising edge) of the touch synchronization signal. The count value (pulse NUM CNT) from the appearance of the falling edge (Tsync falling edge) of the touch synchronization signal until the appearance of the rising edge (Tsync rising edge) of the touch synchronization signal can correspond to the number of pulses (pulse NUM) of the PWM signal. The count value (pulse NUM CNT) can be initialized at the falling edge (Tsync falling edge) of the touch synchronization signal (counter initialization) and can be incremented by 1 (+1) or counted up at each rising edge (PWM rising edge) of the PWM signal. For example, the second counter CREG2 can output a count value (pulse NUM CNT) increasing by 1 from 0 to K (K is a positive integer). Here, K can correspond to the count value (pulse NUM CNT) when the rising edge (Tsync rising edge) of the touch synchronization signal appears in the first frame (Frame 1). Therefore, the first input terminal of the sixth multiplexer MUX6 can receive the count value (pulse NUM CNT) corresponding to the number of pulses (pulse NUM) of the PWM signal and provide it to the fourth register REG4.

[0135] If the conditions of the first input terminal are not met, the second input terminal of the sixth multiplexer MUX6 can receive the output value of the fourth register REG4. The second input terminal of the sixth multiplexer MUX6 can again provide the output value of the fourth register REG4 to the fourth register REG4.

[0136] exist Figure 13In the first frame (Frame 1), the fourth register REG4 can store and output a count value (pulse NUMCNT) corresponding to the number of pulses (pulse NUM) of the PWM signal after the rising edge (Tsync rising edge) of the touch synchronization signal occurs.

[0137] exist Figure 14 In the second PWM generator 225, the pulse count generation circuit PNGC can generate a PWM enable signal (PWM enable) in the second frame (Frame 2) based on the count value (pulse NUM CNT) stored in the first frame (Frame 1). It can also generate the PWM enable signal (PWM enable) based on the count value (pulse NUM CNT) of the second counter CREG2. The PWM enable signal (PWM enable) can remain high from the occurrence of the falling edge of the touch synchronization signal (Tsync falling edge) in the second frame (Frame 2) until the count value (pulse NUM CNT) reaches a target value (target NUM). Here, the target value (target NUM) can correspond to the number of pulses (pulse NUM) of the PWM signal stored in the fourth register REG4. Combined with... Figure 13 The target value (target NUM) can correspond to K, the second counter CREG2 can count from 0 to K, and the second PWM generator 225 can generate a PWM signal with a pulse number (pulse NUM) of K.

[0138] Figure 15 This is a circuit diagram showing the pulse generation circuit of a second PWM generator in a display device according to one embodiment. Figure 16 This is a waveform diagram showing the operation of the pulse generation circuit of the second PWM generator in a display device according to one embodiment;

[0139] Reference Figure 15 and Figure 16 The second PWM generator 225 of the touch driver 220 may include a pulse generation circuit PGC. The pulse generation circuit PGC can generate a PWM signal based on a high pulse width (positive width), a low pulse width (negative width), an initial interval generated by the pulse width generation circuit PWGC, and the number of pulses (pulse NUM) generated by the pulse quantity generation circuit PNGC. The pulse generation circuit PGC can receive the rising signal (generated PWM rise) and the falling signal (generated PWM fall) of the PWM signal from the pulse width generation circuit PWGC. The pulse generation circuit PGC may include a seventh multiplexer MUX7 and a fifth register REG5.

[0140] Combination Figure 10 and Figure 11The pulse width generator circuit PWGC can output the rising signal of the PWM signal (generated PWM rise) at the moment when the first counter CREG1 counts the count value (width CNT) corresponding to the initial interval of the PWM signal after the second frame (Frame 2). The pulse width generator circuit PWGC can output the rising signal of the PWM signal (generated PWM rise) at the moment when the first counter CREG1 counts the I value corresponding to the initial interval of the PWM signal.

[0141] When the first counter CREG1 counts the value (width CNT) corresponding to the high pulse width (positive width) after the second frame (Frame 2), the pulse width generator circuit PWGC can output a falling signal of the PWM signal (generated PWM fall). The pulse width generator circuit PWGC can output a falling signal of the PWM signal (generated PWM fall) at the moment when the first counter CREG1 counts the P value corresponding to the high pulse width (positive width).

[0142] The pulse width generator circuit PWGC can output a rising PWM signal (generated PWM rise) at the moment when the first counter CREG1 counts the count value (width CNT) corresponding to the low pulse width (negative width) after the second frame (Frame 2). The pulse width generator circuit PWGC can output a rising PWM signal (generated PWM rise) at the moment when the first counter CREG1 counts the N value corresponding to the low pulse width (negative width).

[0143] The seventh MUX7 can receive 0 at the falling edge of the touch synchronization signal (Tsync) (Tsync falling edge: 0), receive 0 at the falling edge of the PWM signal (generated PWM falling), and receive 1 at the rising edge of the PWM signal (generated PWM rising). The seventh MUX7 can output one of the received values ​​0 and 1 to the fifth register REG5.

[0144] The fifth register, REG5, can receive the output value of the seventh MUX7, the clock signal (CLK), and the reset signal (RESET). When the fifth register, REG5, receives a 0 from the seventh MUX7, it can generate a low level of the PWM signal, and when it receives a 1 from the seventh MUX7, it can generate a high level of the PWM signal. The second PWM generator 225 can generate as many high and low levels of the PWM signal output from the fifth register, REG5, as the number of pulses (NUM) of the PWM signal. The generated PWM signal (the generated PWM) can be used to determine whether the user has touched the screen in idle mode.

[0145] Therefore, the display device 10 can reduce power consumption and extend the lifespan of the microcontroller 240 by disabling the operation of the core 241, SPI master 243, SRAM 244, and first PWM generator 245 of the microcontroller 240 in idle mode. Furthermore, since a portion of the microcontroller 240 is not operating in idle mode, the operation of the microcontroller 240 can be performed smoothly.

[0146] Figure 17 This is a circuit diagram showing the pulse width generation circuit of the second PWM generator in a display device according to another embodiment, and Figure 18 This is a waveform diagram showing the operation of the pulse width generation circuit of the second PWM generator in a display device according to another embodiment. Figure 17 The pulse width generation circuit PWGC also includes Figure 10 The average value generator ADD in the pulse width generation circuit PWGC will be briefly described or omitted.

[0147] Reference Figure 17 and 18 The second PWM generator 225 of the touch driver 220 may include a pulse width generation circuit PWGC. The pulse width generation circuit PWGC of the second PWM generator 225 can count and store the high pulse width (positive width), low pulse width (negative width), and initial interval information of the PWM signal generated by the first PWM generator 245 in the first frame (Frame 1) in a register. The pulse width generation circuit PWGC may include a first to a fourth multiplexer and an eighth multiplexer (MUX1, MUX2, MUX3, MUX4, and MUX8), a first counter CREG1, first to third registers REG1, REG2, and REG3, and an average value generator ADD.

[0148] The first input terminal of the eighth multiplexer (MUX8) can be connected to the output terminal of the first register (REG1) to receive the high pulse width (positive width) of the PWM signal. The second input terminal of the eighth multiplexer (MUX8) can be connected to the output terminal of the second register (REG2) to receive the low pulse width (negative width) of the PWM signal. The eighth multiplexer (MUX8) can provide either the high pulse width (positive width) or the low pulse width (negative width) of the PWM signal to the averaging generator (ADD).

[0149] The average value generator ADD calculates the average value of the high pulse width (positive width) of the PWM signal and provides it to the second multiplexer MUX2. The second multiplexer MUX2 can then provide the average value of the high pulse width (positive width) to the first register REG1. The first register REG1 can store and output a count value (width CNT) corresponding to the average value of the high pulse width (positive width).

[0150] The average value generator ADD calculates the average value of the low pulse width (negative width) of the PWM signal and provides it to the third multiplexer MUX3. The third multiplexer MUX3 then provides the average value of the low pulse width (negative width) to the second register REG2. The second register REG2 stores and outputs the count value (width CNT) corresponding to the average value of the low pulse width (negative width).

[0151] The average value generator ADD calculates the average of the high pulse width (positive width) of the previous pulse and the high pulse width (positive width) of the corresponding pulse. For example, the average value generator ADD can calculate the average of the high pulse width (positive width) of the first pulse and the second pulse (Pulse1, Pulse2) and provide it to the second multiplexer MUX2. After the falling edge (PWM falling edge) of the second pulse (Pulse2) occurs, the first register REG1 can store and output a count value (width CNT) corresponding to the average of the high pulse width (positive width) of the first pulse and the second pulse (Pulse1, Pulse2).

[0152] The average value generator ADD calculates the average of the high pulse widths (positive widths) of the first to third pulses (Pulse1, Pulse2, Pulse3) and provides this average value to the second multiplexer MUX2. The first register REG1 stores and outputs a count value (width CNT) corresponding to the average of the high pulse widths (positive widths) of the first to third pulses (Pulse1, Pulse2, and Pulse3) after the falling edge (PWM falling edge) of the third pulse (Pulse3).

[0153] The average value generator ADD calculates the average of the high pulse width (positive width) and the low pulse width (negative width) of the preceding pulse. For example, ADD can calculate the average of the low pulse width (negative width) of the first and second pulses (Pulse1, Pulse2) and provide this average to the third multiplexer MUX3. The second register REG2 can store and output a count value (width CNT) corresponding to the average of the low pulse width (negative width) of the first and second pulses (Pulse1, Pulse2) after the rising edge (PWM rising edge) of the third pulse (Pulse3).

[0154] The display device 10 according to various embodiments of this specification can be described as follows.

[0155] A display device according to various embodiments of the present disclosure may include: a microcontroller including: a core configured to operate in an active mode to perform operations for determining a user's touch position and a first PWM generator configured to generate a PWM signal in an active mode; a touch driver including a second PWM generator configured to generate a PWM signal in an idle mode based on high pulse width, low pulse width, pulse number, and initial interval information of the PWM signal generated by the first PWM generator for determining whether a user touch has occurred; a timing controller configured to generate a touch synchronization signal provided to the microcontroller and the touch driver; and a plurality of touch electrodes configured to receive a common voltage generated based on the PWM signal and driven in an active or idle mode.

[0156] In a display device according to various embodiments, a first PWM generator can operate in the first frame of an idle mode and in the second frame of an idle mode.

[0157] In the display device according to various embodiments, the microcontroller may further include: an SPI master configured to perform bidirectional data communication between peripheral devices using SPI signals; an SRAM configured to store touch data included in the SPI signals; and an IRQ detection unit configured to receive an interrupt signal and complete the reception of touch data.

[0158] In the display device according to various embodiments, the SPI host and SRAM can be turned on in active mode and turned off in idle mode, and the IRQ detection unit can be turned on in both active and idle modes.

[0159] In a display device according to various embodiments, a second PWM generator can count the high pulse width, low pulse width, pulse count, and initial interval information of the PWM signal generated by the first PWM generator during the first frame of the idle mode, and generate a PWM signal based on the count values ​​of the high pulse width, low pulse width, and initial interval information of the PWM signal starting from the second frame.

[0160] In a display device according to various embodiments, a second PWM generator may include: a pulse width generation circuit configured to count the high pulse width, low pulse width, and initial interval information of the PWM signal, and output the rising signal and the falling signal of the PWM signal; a pulse count generation circuit configured to count and store the number of pulses of the PWM signal; and a pulse generation circuit configured to generate the PWM signal based on the rising signal, the falling signal, and the number of pulses of the PWM signal.

[0161] In a display device according to various embodiments, a pulse width generation circuit may include: a first multiplexer configured to receive 0 at the rising edge of a PWM signal, the falling edge of a PWM signal, and the falling edge of a touch synchronization signal, and to output a count value by incrementing the count; a first counter configured to store and output the count value of the first multiplexer; a second multiplexer configured to receive the count value from the occurrence of the rising edge of the PWM signal until the occurrence of the falling edge of the PWM signal; and a first register configured to store and output the PWM signal based on the count value of the second multiplexer. The system includes: a high pulse width corresponding to the count value; a third multiplexer configured to receive count values ​​from the falling edge of the PWM signal until the rising edge of the PWM signal; a second register configured to store and output a count value corresponding to the low pulse width of the PWM signal based on the count value from the third multiplexer; a fourth multiplexer configured to receive count values ​​from the falling edge of the touch synchronization signal until the rising edge of the first pulse; and a third register configured to store and output a count value corresponding to the initial interval of the PWM signal based on the count value from the fourth multiplexer.

[0162] In the display device according to various embodiments, the pulse width generation circuit can output a falling signal of the PWM signal when the first counter counts the count value corresponding to the high pulse width, output a rising signal of the PWM signal when the first counter counts the count value corresponding to the low pulse width, and output a rising signal of the PWM signal when the first counter counts the count value corresponding to the initial interval of the PWM signal.

[0163] In the display device according to various embodiments, the pulse width generation circuit may further include an average value generator configured to calculate the average value of the high pulse width of the PWM signal and provide the average value of the high pulse width to a second multiplexer, and configured to calculate the average value of the low pulse width of the PWM signal and provide the average value of the low pulse width to a third multiplexer.

[0164] In a display device according to various embodiments, a pulse count generation circuit may include: a fifth multiplexer configured to receive 0 at the falling edge of a touch synchronization signal and output a count value by incrementing the count; a second counter configured to store and output the count value of the fifth multiplexer; a sixth multiplexer configured to receive count values ​​from the occurrence of the falling edge of the touch synchronization signal until the occurrence of the rising edge of the touch synchronization signal; and a fourth register configured to store and output a count value corresponding to the number of pulses of the PWM signal based on the count value of the sixth multiplexer.

[0165] In a display device according to various embodiments, a pulse count generation circuit can generate a PWM enable signal that remains high from the time of the falling edge of the touch synchronization signal until the count value of the fifth multiplexer reaches a target value based on the count value stored in the fourth register.

[0166] In a display device according to various embodiments, the pulse generation circuit may include: a seventh multiplexer configured to receive 0 at the falling edge of a touch synchronization signal, receive 0 at the falling edge of a PWM signal, and receive 1 at the rising edge of a PWM signal; and a fifth register configured to generate a low level of the PWM signal when receiving 0 from the seventh multiplexer, and generate a high level of the PWM signal when receiving 1 from the seventh multiplexer.

[0167] In a display device according to various embodiments, a touch driver may include a first touch driver and a second touch driver, and the first touch driver may be configured to generate a PWM signal based on a PWM signal generated by a first PWM generator and includes a PWM generator, and the second touch driver may be configured to receive a common voltage generated based on the PWM signal generated by the first touch driver.

[0168] In a display device according to various embodiments, the touch driver can sequentially provide a common voltage to each of a plurality of channel multiplexers connected to a plurality of touch electrodes in an active mode, and can simultaneously provide a common voltage in an idle mode by merging the plurality of channel multiplexers into a group.

[0169] In another aspect, the display device according to various embodiments may include: a microcontroller including a first PWM generator configured to generate a PWM signal in an active mode for determining a user's touch position; a touch driver including a second PWM generator configured to generate a PWM signal in an idle mode based on high pulse width, low pulse width, pulse number, and initial interval information of the PWM signal generated by the first PWM generator for determining whether a user touch has occurred; and a plurality of touch electrodes configured to receive a common voltage generated based on the PWM signal to be driven in an active or idle mode.

[0170] In the display device according to various embodiments, the first PWM generator can be turned on in the first frame of the idle mode and turned off starting from the second frame of the idle mode.

[0171] In a display device according to various embodiments, a second PWM generator can count the high pulse width, low pulse width, pulse count, and initial interval information of the PWM signal generated by the first PWM generator during the first frame of the idle mode, and generate a PWM signal based on the count values ​​of the high pulse width, low pulse width, and initial interval information of the PWM signal starting from the second frame.

[0172] In a display device according to various embodiments, a second PWM generator may include: a pulse width generation circuit configured to count the high pulse width, low pulse width, and initial interval information of the PWM signal, and output the rising signal and the falling signal of the PWM signal; a pulse count generation circuit configured to count and store the number of pulses of the PWM signal; and a pulse generation circuit configured to generate the PWM signal based on the rising signal, the falling signal, and the number of pulses of the PWM signal.

[0173] In a display device according to various embodiments, a pulse width generation circuit may include: a first multiplexer configured to receive 0 at the rising edge of a PWM signal, the falling edge of a PWM signal, and the falling edge of a touch synchronization signal, and to output a count value by incrementing the count; a first counter configured to store and output the count value of the first multiplexer; a second multiplexer configured to receive the count value from the occurrence of the rising edge of the PWM signal until the occurrence of the falling edge of the PWM signal; and a first register configured to store and output the high pulse of the PWM signal based on the count value of the second multiplexer. The system includes: a count value corresponding to the pulse width; a third multiplexer configured to receive count values ​​from the falling edge of the PWM signal until the rising edge of the PWM signal; a second register configured to store and output a count value corresponding to the low pulse width of the PWM signal based on the count value from the third multiplexer; a fourth multiplexer configured to receive count values ​​from the falling edge of the touch synchronization signal until the rising edge of the first pulse; and a third register configured to store and output a count value corresponding to the initial interval of the PWM signal based on the count value from the fourth multiplexer.

[0174] In a display device according to various embodiments, a pulse count generation circuit may include: a fifth multiplexer configured to receive 0 at the falling edge of a touch synchronization signal and output a count value by incrementing the count; a second counter configured to store and output the count value of the fifth multiplexer; a sixth multiplexer configured to receive count values ​​from the occurrence of the falling edge of the touch synchronization signal until the occurrence of the rising edge of the touch synchronization signal; and a fourth register configured to store and output a count value corresponding to the number of pulses of the PWM signal based on the count value of the sixth multiplexer.

[0175] Although this disclosure has been described with reference to exemplary accompanying drawings, it should be understood that this disclosure is not limited to the embodiments and drawings disclosed in this specification, and those skilled in the art will understand that various modifications are possible without departing from the scope and spirit of this disclosure. Furthermore, although the operational effects of configurations according to this disclosure are not explicitly described in the description of embodiments of this disclosure, it should be understood that predictable effects can also be identified through this configuration.

Claims

1. A display device, the display device comprising: The microcontroller includes a core configured to operate in an active mode to perform operations for determining a user's touch position and a first PWM generator configured to generate a PWM signal in the active mode; A touch driver, the touch driver including a second PWM generator, the second PWM generator being configured in an idle mode to generate a PWM signal based on high pulse width, low pulse width, pulse number and initial interval information of a PWM signal generated by a first PWM generator to determine whether a user touch has occurred; A timing controller configured to generate touch synchronization signals provided to the microcontroller and the touch driver; as well as Multiple touch electrodes are configured to receive a common voltage generated based on the PWM signal and driven in the active mode or the idle mode.

2. The display device according to claim 1, wherein, The first PWM generator operates to be turned on in the first frame of the idle mode and to be turned off in the second frame of the idle mode.

3. The display device according to claim 1, wherein, The microcontroller also includes, An SPI master, configured to perform bidirectional data communication between peripheral devices using SPI signals; SRAM, the SRAM being configured to store touch data included in the SPI signal; as well as An IRQ detection unit is configured to receive an interrupt signal and complete the reception of the touch data.

4. The display device according to claim 3, wherein, The SPI host and the SRAM are enabled in the active mode and disabled in the idle mode, and the IRQ detection unit is enabled in both the active mode and the idle mode.

5. The display device according to claim 1, wherein, The second PWM generator counts the high pulse width, low pulse width, pulse count, and initial interval information of the PWM signal generated by the first PWM generator during the first frame of the idle mode, and generates a PWM signal based on the count values ​​of the high pulse width, low pulse width, and initial interval information of the PWM signal starting from the second frame of the idle mode.

6. The display device according to claim 1, wherein, The second PWM generator includes: A pulse width generation circuit is configured to count the high pulse width, the low pulse width, and the initial interval information of the PWM signal, and output the rising signal and the falling signal of the PWM signal; A pulse count generation circuit, configured to count and store the number of pulses of the PWM signal; and A pulse generation circuit configured to generate the PWM signal based on the rising signal of the PWM signal, the falling signal of the PWM signal, and the number of pulses of the PWM signal.

7. The display device according to claim 6, wherein, The pulse width generating circuit includes: A first multiplexer is configured to receive 0 at the rising edge of the PWM signal, the falling edge of the PWM signal, and the falling edge of the touch synchronization signal, and to output a count value by incrementing the count. A first counter, configured to store and output the count value of the first multiplexer; A second multiplexer is configured to receive a count value from the time the rising edge of the PWM signal occurs until the falling edge of the PWM signal occurs. A first register is configured to store and output a count value corresponding to the high pulse width of the PWM signal based on the count value of the second multiplexer; A third multiplexer is configured to receive a count value from the time the falling edge of the PWM signal occurs until the rising edge of the PWM signal occurs. The second register is configured to store and output a count value corresponding to the low pulse width of the PWM signal based on the count value of the third multiplexer; A fourth multiplexer is configured to receive a count value from the falling edge of the touch synchronization signal until the rising edge of the first pulse of the PWM signal; and The third register stores and outputs a count value corresponding to the initial interval of the PWM signal based on the count value of the fourth multiplexer.

8. The display device according to claim 7, wherein, The pulse width generation circuit outputs a falling signal of the PWM signal when the first counter counts the count value corresponding to the high pulse width, outputs a rising signal of the PWM signal when the first counter counts the count value corresponding to the low pulse width, and outputs a rising signal of the PWM signal when the first counter counts the count value corresponding to the initial interval of the PWM signal.

9. The display device according to claim 7, wherein, The pulse width generation circuit further includes an average value generator, which is configured to calculate the average value of the high pulse width of the PWM signal and provide the average value of the high pulse width to the second multiplexer, and is configured to calculate the average value of the low pulse width of the PWM signal and provide the average value of the low pulse width to the third multiplexer.

10. The display device according to claim 6, wherein, The pulse number generation circuit includes: A fifth multiplexer is configured to receive 0 at the falling edge of the touch synchronization signal and output a count value by incrementing the count; A second counter is configured to store and output the count value of the fifth multiplexer; A sixth multiplexer, configured to receive count values ​​from the occurrence of the falling edge of the touch synchronization signal until the occurrence of the rising edge of the touch synchronization signal; and A fourth register is configured to store and output a count value corresponding to the number of pulses of the PWM signal based on the count value of the sixth multiplexer.

11. The display device according to claim 10, wherein, The pulse count generation circuit generates a PWM enable signal, which remains high from the time the falling edge of the touch synchronization signal occurs until the count value of the fifth multiplexer reaches a target value based on the count value stored in the fourth register.

12. The display device according to claim 6, wherein, The pulse generating circuit includes: A seventh multiplexer is configured to receive 0 on the falling edge of the touch synchronization signal, receive 0 on the falling edge of the PWM signal, and receive 1 on the rising edge of the PWM signal; and The fifth register is configured to generate a low-level PWM signal when a 0 is received from the seventh multiplexer, and to generate a high-level PWM signal when a 1 is received from the seventh multiplexer.

13. The display device according to claim 1, wherein, The touch driver includes a first touch driver and a second touch driver, and The first touch driver is configured to generate a PWM signal based on a PWM signal generated by the first PWM generator, and includes a second PWM generator. The second touch driver is configured to receive a common voltage based on the PWM signal generated by the first touch driver.

14. The display device according to claim 1, wherein, The touch driver provides a common voltage sequentially to each of the multiple channel multiplexers connected to the multiple touch electrodes in the active mode, and provides a common voltage simultaneously by merging the multiple channel multiplexers into a group in the idle mode.

15. A display device, the display device comprising: The microcontroller includes a first PWM generator configured to generate a PWM signal in an active mode for determining the user's touch position; A touch driver, the touch driver including a second PWM generator, the second PWM generator being configured to generate a PWM signal in an idle mode based on high pulse width, low pulse width, pulse number and initial interval information of a PWM signal generated by a first PWM generator to determine whether a user touch has occurred; as well as Multiple touch electrodes are configured to receive a common voltage generated based on the PWM signal to be driven in the active mode or the idle mode.

16. The display device according to claim 15, wherein, The first PWM generator operates to turn on in the first frame of the idle mode and to turn off starting from the second frame of the idle mode.

17. The display device according to claim 15, wherein, The second PWM generator counts the high pulse width, low pulse width, pulse count, and initial interval information of the PWM signal generated by the first PWM generator during the first frame of the idle mode, and generates a PWM signal based on the count values ​​of the high pulse width, low pulse width, and initial interval information of the PWM signal starting from the second frame of the idle mode.

18. The display device according to claim 17, wherein, The second PWM generator includes: A pulse width generation circuit is configured to count the high pulse width, the low pulse width, and the initial interval information of the PWM signal, and output the rising signal and the falling signal of the PWM signal; A pulse count generation circuit, configured to count and store the number of pulses of the PWM signal; and A pulse generation circuit configured to generate the PWM signal based on the rising signal of the PWM signal, the falling signal of the PWM signal, and the number of pulses of the PWM signal.

19. The display device according to claim 18, wherein, The pulse width generating circuit includes: A first multiplexer is configured to receive 0 at the rising edge of the PWM signal, the falling edge of the PWM signal, and the falling edge of the touch synchronization signal, and to output a count value by incrementing the count. A first counter, configured to store and output the count value of the first multiplexer; A second multiplexer is configured to receive a count value from the time the rising edge of the PWM signal occurs until the falling edge of the PWM signal occurs. A first register is configured to store and output a count value corresponding to the high pulse width of the PWM signal based on the count value of the second multiplexer; A third multiplexer is configured to receive a count value from the falling edge of the PWM signal until the rising edge of the PWM signal occurs. The second register is configured to store and output a count value corresponding to the low pulse width of the PWM signal based on the count value of the third multiplexer; A fourth multiplexer is configured to receive count values ​​from the falling edge of the touch synchronization signal until the rising edge of the first pulse; and A third register is configured to store and output a count value corresponding to the initial interval of the PWM signal based on the count value of the fourth multiplexer.

20. The display device according to claim 18, wherein, The pulse number generation circuit includes: A fifth multiplexer is configured to receive 0 at the falling edge of the touch synchronization signal and output a count value by incrementing the count; A second counter is configured to store and output the count value of the fifth multiplexer; A sixth multiplexer, configured to receive count values ​​from the occurrence of the falling edge of the touch synchronization signal until the occurrence of the rising edge of the touch synchronization signal; and The fourth register is configured to store and output a count value corresponding to the number of pulses of the PWM signal based on the count value of the sixth multiplexer.

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