Data management method, system and device, medium and product
By building a centralized platform, we can achieve end-to-end data management during the introduction of new chip products, solving the problems of data dispersion and inefficient cross-departmental collaboration, and improving data management efficiency and engineering efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI GUBO TECH CO LTD
- Filing Date
- 2025-12-30
- Publication Date
- 2026-04-21
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
During the introduction of new chip products, existing technologies suffer from fragmented data, lack of closed-loop traceability, inefficient cross-departmental collaboration, and reliance on manual labor, making it difficult to meet the needs of end-to-end management.
By building a centralized platform, design specification documents and chip identification information are associated and stored, a mapping relationship between test data and design specifications is established, it is determined whether the test data meets the design specifications, review results are generated, and design specifications or test limits are updated, thus achieving closed-loop management of data across the entire chain.
It achieves unified integration and intelligent analysis of data across the entire chain, improves cross-departmental collaboration efficiency, reduces the time cost for engineers in manual alignment and calculation, and ensures data standardization and traceability.
Smart Images
Figure CN121901151A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of data management technology, and in particular to a data management method, system, device, medium and product. Background Technology
[0002] The New Product Introduction (NPI) stage of a chip requires the integration of data from multiple aspects, including design specifications, simulation verification, prototype testing, and mass production testing. This stage is a critical link in the chip's transition from design to mass production, directly impacting R&D efficiency and product quality.
[0003] Currently, the industry largely relies on manual spreadsheets, general databases, or simple project management tools to manage data at each stage. In some scenarios, specific tools are used for separate statistical analysis. Data is scattered across different systems and files, and cross-departmental data sharing and collaboration are achieved through manual communication and email. The correlation between design specifications and test data depends on manual recording, and test limits in the mass production stage require engineers to manually collect and compare data from multiple stages, including benchmark tests and automated test equipment (ATE) tests, before statistical calculations are performed to determine the limits. However, this approach suffers from problems such as data dispersion, lack of closed-loop traceability of specifications and data, inefficient cross-departmental collaboration, and reliance on manual labor, making it difficult to meet the needs of end-to-end management. Summary of the Invention
[0004] This invention provides a data management method, system, device, medium, and product that enables closed-loop management of data across the entire data chain and improves data management efficiency.
[0005] In a first aspect, embodiments of this disclosure provide a data management method, including:
[0006] Obtain the design specification files for each chip, and associate the design specification files with the chip's identification information and store them in a first database. The design specification files include at least a specification file identifier and specification parameter thresholds.
[0007] The test data file of the target chip is obtained and stored in the second database. According to the preset rule configuration file and the design specification file corresponding to the target chip, a mapping relationship between the test data and the design specification is established.
[0008] Determine whether the test data conforms to the corresponding design specifications, generate review results, and store the review results in the first database;
[0009] Update the design specifications or test limits of the target chip based on the review results.
[0010] Secondly, embodiments of this disclosure provide a data management system, including:
[0011] A specification file storage module is used to obtain the design specification files of each chip and associate the design specification files with the chip's identification information and store them in a first database. The design specification files include at least a specification file identifier and specification parameter thresholds.
[0012] The test data mapping module is used to acquire the test data file of the target chip and store the test data file in the second database, and establish a mapping relationship between the test data and the design specifications according to the preset rule configuration file and the design specification file corresponding to the target chip.
[0013] The review result generation module is used to determine whether the test data meets the corresponding design specifications, generate review results, and store the review results in the first database.
[0014] The data rule update module is used to update the design specifications or test limits of the target chip based on the review results.
[0015] Thirdly, embodiments of this disclosure provide an electronic device, including:
[0016] At least one processor; and
[0017] A memory that is communicatively connected to at least one processor; wherein,
[0018] The memory stores a computer program that can be executed by at least one processor, such that the at least one processor can perform a data management method provided in the first aspect embodiment described above.
[0019] Fourthly, embodiments of this disclosure provide a computer-readable storage medium storing computer instructions that, when executed by a processor, implement a data management method provided in the first aspect of the embodiments described above.
[0020] Fifthly, this disclosure provides a computer program product, which includes a computer program that, when executed by a processor, implements a data management method provided in the first aspect of the embodiment.
[0021] The technical solution of this invention involves acquiring design specification files for each chip and associating these files with the chip's identification information, storing them in a first database. The design specification files include at least a specification file identifier and specification parameter thresholds. Next, test data files for the target chip are acquired and stored in a second database. A mapping relationship between test data and design specifications is established based on a preset rule configuration file and the corresponding design specification file for the target chip. The system then determines whether the test data conforms to the corresponding design specifications, generates a review result, and stores the review result in the first database. Finally, the design specifications or test limits of the target chip are updated based on the review result. These technical features achieve closed-loop management of end-to-end data, improving data management efficiency.
[0022] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description
[0023] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0024] Figure 1 This is a flowchart of a data management method provided in an embodiment of the present invention;
[0025] Figure 2 This is a schematic diagram of the structure of a data management system provided in an embodiment of the present invention;
[0026] Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation
[0027] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0028] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0029] In chip development, the NPI (New Product Introduction) stage is a crucial link between design and mass production. This stage requires data from multiple sources, including design specifications, simulation verification, benchmark testing, and ATE (Automatic Equipment) testing. However, data management at each stage (such as design, simulation, benchmark testing, and ATE testing) remains fragmented, typically relying on manual spreadsheets, general databases, or simple project management tools for recording and transmission. This fragmented approach has the following main drawbacks: First, data lacks centralization. Data from different stages is scattered across multiple systems and files, lacking unified storage and organization, making the traceability process from design specifications to test results complex and prone to omissions and gaps.
[0030] Secondly, specification tracking and change logging are weak. Existing tools struggle to systematically record the process of design parameter changes and their impact, resulting in inefficient historical information retrieval and increasing the risk of misinterpretation and operational errors.
[0031] Third, cross-departmental collaboration is inefficient. The lack of an integrated platform prevents different roles (design, testing, quality, project management, etc.) from sharing the latest data and specifications in real time, leading to long communication cycles and directly impacting development progress.
[0032] Fourth, there is a disconnect between quality control and data analysis. Although professional tools can be used to generate statistical results in some stages, these results cannot be directly linked to design specifications, and are difficult to archive automatically or share across departments, resulting in low information utilization.
[0033] Fifth, mass production limit setting relies on manual labor. The current process still requires engineers to manually collect and compare laboratory and mass production data before performing calculations and confirmations. This is not only time-consuming and labor-intensive but also prone to errors and lacks unified standards and traceability.
[0034] Sixth, product data sheets rely entirely on manual labor. Current process manuals are all manually written, and if changes occur during testing or design, they cannot be automatically synchronized to the manual's definitions, easily leading to errors. If the actual product specifications differ from those stated in the manual, there will be significant risks once the product enters the market.
[0035] Therefore, the industry urgently needs a solution that can achieve unified data integration across stages, fine-grained specification tracking and traceability, and support automated limit generation and intelligent analysis, so as to comprehensively improve engineering efficiency and product quality.
[0036] In one embodiment, Figure 1 This is a flowchart of a data management method provided in an embodiment of the present invention. This embodiment is applicable to the situation of performing full-link closed-loop management of chip product data. The method can be executed by a data management system, which can be implemented in hardware and / or software.
[0037] like Figure 1 As shown, the method includes:
[0038] S101. Obtain the design specification files of each chip, and associate the design specification files with the chip identification information and store them in the first database. The design specification files shall include at least the specification file identifier and specification parameter thresholds.
[0039] In this embodiment, the design specification file can be understood as a file that records the core performance requirements of the chip design phase. It includes at least a specification file identifier (a unique code for the design specification within the system, used for precise location) and specification parameter thresholds (upper and lower limits for chip performance indicators, such as minimum / maximum values for parameters like voltage and current). Chip identification information can be understood as information used to distinguish chips, including chip name, chip model, and chip version number, ensuring a precise association between the design specification file and the corresponding chip. The first database is a database (such as MySQL) used to store the design specification files and related information, ensuring a unified data format and structure, and supporting subsequent retrieval and traceability.
[0040] Specifically, the chip's design specification definition information file (such as a Spec definition Excel file) is first imported. The specification file identifier, specification parameter thresholds, and other contents in the file are extracted. Then, the chip's corresponding identification information (name, model, version number) is obtained. The system establishes the relationship between the two and finally stores them in a centralized relational database in a unified format. This completes the standardized entry and centralized management of design specifications, laying the foundation for subsequent association with test data.
[0041] S102. Obtain the test data file of the target chip and store the test data file in the second database. Based on the preset rule configuration file and the design specification file corresponding to the target chip, establish a mapping relationship between the test data and the design specification.
[0042] In this embodiment, the target chip can be understood as a specific chip that requires design specification association, test data collection and analysis, mass production limit setting, and product specification generation during the new chip product introduction phase; it is also the core object of data management. The test data file can be understood as a multi-source heterogeneous format file generated during the chip's design, simulation, laboratory testing, and mass production testing phases, such as comma-separated values (CSV) files and standard test data format (STDF) files, containing the actual test data collected at each stage. The preset rule configuration file can be understood as a standardized mapping file, containing at least the specification file identifier, test data file identifier, test item number, test item name, and test condition (temperature, process angle, voltage) fields, used to define the association rules between test items, test conditions, and design specifications. The test data file identifier is a unique identifier for the test data file, used to distinguish test data files from different sources. The test item number is a unique number for each test item in the test data file, used to accurately correspond to specific test content. The test item name is a textual description of the test item, clearly defining the specific meaning of the test content. Test conditions refer to the environmental and operating parameter settings during the test process, including temperature, process angle, and voltage. The second database can be understood as a database used to store test data files, such as ClickHouse. Essentially, the design specifications and related information stored in the first database are linked to the test data files and related information stored in the second database through specific fields, such as identification information of the same chip product.
[0043] Specifically, the system first acquires the test data files generated by the target chip at each testing stage, supporting manual upload or batch import via File Transfer Protocol (FTP). The acquired test data files are then stored in a second database, and a data import log (import time, method, operator) is recorded. Next, based on the target chip's identification information, the system retrieves the corresponding design specification file from the first database. Using association rules in a preset rule configuration file, the system matches the test items and conditions in the test data files with the design specifications in the design specification file, establishing a mapping relationship between test data, test conditions, and design specifications.
[0044] The preset rule configuration files are shown in the table below:
[0045]
[0046] SPEC_ID represents a unique code for a design specification within the system, used to accurately locate the corresponding design specification. In the table, "D-00232" is the unique code for a specific design specification.
[0047] FILE indicates the filename of the file containing the corresponding test data, specifying the source file of the test data. The file in the table is "SpecDemoSTDF_[25,-40,125]_[FF,SS,TT].stdf", which is the STDF format test data file, a standard in the semiconductor industry.
[0048] TEST_NUMBER / TESTNAME indicates that the specified TEST_NUMBER or TESTNAME in the file is used to establish a correspondence with the corresponding SPEC. TEST_NUMBER is the number of the specific test item in the test data file, used to accurately match the test data in the file. In the table, "[10004,10005,10006]" means associating the three test items numbered 10004, 10005, and 10006 in the file. TEST_NAME is the text description of the test item (optional field, can be used in conjunction with TEST_NUMBER). In the table, this field is empty, and test items are associated only through TEST_NUMBER.
[0049] TEMP is the corresponding temperature condition for testing. It supports batch definition of multiple conditions using the simplified syntax of "@ + column abbreviation + number". In the table, "[25C,-40C,125C]@f1" means batch association of three temperature conditions: 25℃, -40℃, and 125℃ (@f1 is the batch definition identifier).
[0050] CORNER is the test corresponding process corner condition. The process corner is the combination of deviations in process parameters during chip manufacturing. In the table, "[FF,SS,TT]@f2" indicates that the three process corner conditions FF, SS, and TT are associated in batch (@f2 is the batch definition identifier).
[0051] VCC is the corresponding supply voltage condition for testing. In the table, "[2.8V,3.3V,3.8V]@tn1" indicates that the three supply voltage conditions of 2.8V, 3.3V, and 3.8V are associated in batch (@tn1 is the batch definition identifier).
[0052] The preset rule configuration file supports representing multiple lines of content at once using @ + column abbreviation + number, which greatly simplifies the difficulty and workload of writing Mapping files. This file format can clearly define the specific correspondence between design specifications and test items.
[0053] By combining the above fields, a unique mapping relationship is established between design specifications (SPEC_ID), test data files (FILE), test items (TEST_NUMBER / TEST_NAME), and test conditions (TEMP / CORNER / VCC). This allows scattered test data to be accurately associated with the corresponding design specifications, providing a unified association rule for subsequent functions such as data review, intelligent analysis, and mass production limit generation.
[0054] S103. Determine whether the test data meets the corresponding design specifications, generate review results, and store the review results in the first database.
[0055] In this embodiment, the review result can be understood as a comprehensive judgment document of the test data, which is composed of basic judgment results and multi-dimensional analysis reports. The basic judgment results include qualified and unqualified, and the analysis report covers measurement error risk identification, parameter offset analysis, comparison results of specifications and test limits, parameter optimization suggestions, etc.
[0056] Specifically, based on the threshold parameters in the design specification document, the system first compares the test data with the thresholds to output a basic pass / fail judgment result. Then, the system's built-in statistical analysis tools perform multi-dimensional analysis on the test data, generating an analysis report containing various analytical contents. The basic judgment result and the analysis report are integrated into a complete review result, linked to the corresponding design specification document, and stored in the first database. When a request to view the review result is received, it can be retrieved from the first database and downloaded to the local disk for user viewing. The review result can be linked based on the target chip's identification information with the design specification document stored in the first database and the test data file stored in the second database, supporting traceability queries by time, product line, and project dimensions.
[0057] S104. Update the design specifications or test limits of the target chip based on the review results.
[0058] In this embodiment, the test limit can be understood as the numerical boundary (including upper and lower limits) set in the chip testing process to determine whether the test data is qualified. It is set based on factors such as design specifications, test equipment capabilities, and process fluctuations, and is a direct operational standard for test data review.
[0059] Specifically, after the system generates review results, relevant personnel can analyze and discuss them. If the test data is unqualified or there is room for optimization, adjustments can be made to the design specifications (such as optimizing specification parameter thresholds) or to the test limits (such as correcting the upper and lower test limits). The system also receives update requests from relevant personnel to update the design specifications or test limits of the target chip. The updated design specifications are synchronized to the first database, or the updated test limits are synchronized to the second database, and linked with the test data and review results of the corresponding chip to form a closed-loop management system, ensuring the real-time performance and accuracy of the standards.
[0060] This invention provides a data management method comprising: acquiring design specification files for each chip and associating the design specification files with chip identification information and storing them in a first database; the design specification files at least include a specification file identifier and specification parameter thresholds; acquiring test data files for the target chip and storing them in a second database; establishing a mapping relationship between test data and design specifications based on a preset rule configuration file and the corresponding design specification file for the target chip; determining whether the test data conforms to the corresponding design specifications, generating review results, and storing the review results in the first database; and updating the design specifications or test limits of the target chip based on the review results. This technical solution belongs to the field of semiconductor process and product lifecycle data and workflow management technology, specifically involving a unified management and intelligent analysis method for end-to-end data in the New Product Introduction (NPI) stage. This method integrates data from design, simulation, laboratory testing, and mass production testing through a centralized platform, and implements functions such as recording, specification association, traceability, and automatic analysis at key NPI nodes. Meanwhile, the system can automatically generate mass production limit recommendations based on algorithms, ensuring data consistency and traceability in complex development processes, significantly improving cross-departmental collaboration efficiency, and reducing engineers' time costs for manual alignment and calculation.
[0061] Optionally, the test data file of the target chip is acquired and stored in a second database. Based on a preset rule configuration file and the design specification file corresponding to the target chip, a mapping relationship between the test data and the design specifications is established, including:
[0062] S1021. Obtain the test data file generated by the target chip in the target stage, store the test data file in the second database, and record the import log information. The import log information includes the import time, import method and operator. The target stage includes the design stage, simulation stage, laboratory testing stage and mass production testing stage. The test data file is a multi-source heterogeneous format file corresponding to different target stages.
[0063] In this embodiment, the target stage refers to the stage in the chip's development from design to mass production where test data is generated. Specifically, it includes the design stage, simulation stage, laboratory testing stage (i.e., benchmark testing stage), and mass production testing stage (ATE testing stage). This is the core source scenario for test data, covering the entire NPI (New Product Introduction) stage of the chip. Test data files exhibit multi-source heterogeneity due to different source stages, with formats including comma-separated value files (CSV) and standard test data format files (STDF). Import log information can be understood as a log recording the test data file import process, including import time (the specific time the data was uploaded to the database), import method (manual upload or batch import via FTP, etc.), and operator (the personnel performing the data import operation). This is used for full-process data traceability, ensuring that data changes are traceable.
[0064] Specifically, based on the chip's NPI (New Product Introduction) development progress, test data files generated at each stage of the target chip's design, simulation, laboratory testing, and mass production testing are collected. Batch import is supported via manual upload or FTP server access, covering multi-source heterogeneous format files from different stages, laying the data foundation for subsequent mapping with design specifications. The imported target chip's test data files are associated with the target chip's identification information and stored in a second database. Simultaneously, log information such as import time, import method, and operator is automatically recorded during the data import process, completing standardized entry and traceable storage of test data, supporting subsequent queries by time, product line, project, and other dimensions.
[0065] S1022. Determine the target design specification file corresponding to the target chip, and extract the specification file identifier, specification parameter thresholds and test conditions from the target design specification file.
[0066] In this embodiment, the target design specification file is a unique design specification file corresponding to the target chip. It is a basis document that records the core performance requirements of the target chip and can be accurately located through chip identification information. It includes key specifications such as chip electrical characteristics and absolute maximum ratings. The specification file identifier is a unique code for the target design specification file, used to accurately locate the file; the specification parameter thresholds are the upper and lower limits of chip performance indicators (such as Min / Max / Typ values); the test conditions are the key parameter settings during the test process, including temperature (TEMP), process corner (CORNER), voltage (VCC), etc.
[0067] Specifically, based on the identification information of the target chip (chip name, model, version number), the corresponding target design specification file is retrieved and determined from the first database. Core information such as specification file identifier, specification parameter thresholds, and test conditions are extracted from the file to provide basic data support for establishing an accurate mapping with the test data.
[0068] S1023. Based on the association rules in the preset rule configuration file, match the test items and test conditions in the test data file with the design specifications in the design specification file to establish a mapping relationship between test data, test conditions and design specifications.
[0069] In this embodiment, a preset rule configuration file is retrieved, and based on the association rules (including batch definition rules) defined in the file, the specific test items (located by test item number or test item name) and test conditions in the test data file are matched one by one with the corresponding design specifications in the target design specification file to verify their consistency. Finally, a mapping relationship between test data, test conditions, and design specifications is established to achieve the association and alignment between test data and design specifications.
[0070] Optionally, determine whether the test data conforms to the corresponding design specifications, generate review results, and store the review results in the first database, including:
[0071] S1031. Based on the specification parameter thresholds in the design specification document, compare the matching relationship between the test data and the specification parameter thresholds, and output the judgment result, which includes qualified and unqualified.
[0072] In this embodiment, the judgment result can be understood as a conclusion drawn from the comparison between the test data and the specification parameter threshold. It includes only two categories: qualified (test data is within the specification parameter threshold range) and unqualified (test data exceeds the specification parameter threshold range). It is the basic verification result of the test data.
[0073] Specifically, the threshold parameters of the design specifications are extracted, and the test data after establishing the mapping relationship are compared with the threshold one by one to determine whether each test data is within the range specified by the threshold. Then, the corresponding qualified or unqualified judgment result is output to complete the basic qualification verification of the test data and provide a basis for subsequent multi-dimensional analysis.
[0074] S1032. Based on statistical analysis tools, perform multi-dimensional analysis on the test data to generate an analysis report that includes measurement error risk identification, parameter offset analysis, comparison results between specifications and test limits, and parameter optimization suggestions.
[0075] In this embodiment, the statistical analysis tool is a built-in data analysis tool of the system, including histograms, scatter plots, box plots, XY plots, etc., supporting custom configuration operations such as Trellisby (split charts by dimension) and Colorby (coloring by condition) to meet the data analysis needs of multiple scenarios. The analysis report is a file generated based on the statistical analysis results, including measurement error risk identification (verifying the reliability of each stage of testing through Die to Die correlation analysis), parameter offset analysis (comparing the shift of measured values under different time / temperature conditions, i.e., reliability analysis), specification and test limit comparison results (verifying the consistency between the actual lower and lower limits of the test program and the upper and lower limits of the design specifications), and parameter optimization suggestions (marking the Mean±nSigma control line through Char analysis, and generating the optimization direction of the upper and lower limits of the design specifications by combining the target CPK or nSigma boundary).
[0076] Specifically, the system's built-in statistical analysis tools are used to perform multi-dimensional analysis of the test data: Die-to-Die correlation analysis is used to identify measurement error risks, parameter deviations are compared under different time / temperature / process angle conditions, the consistency between the actual lower and lower limits of the test data and the design specification thresholds is verified, and a Char analysis report is generated by combining statistical models and parameter optimization suggestions are proposed. These analyses are integrated into a complete analysis report to provide data support for subsequent review and decision-making.
[0077] S1033. Integrate the judgment results and analysis reports into review results, associate the review results with the corresponding design specification documents and chip identification information, and store them in the first database, supporting traceability and query by time, product line, and project dimensions.
[0078] In this embodiment, the review results can intuitively display the limit compliance status of each test item, including qualified and unqualified, which is the key basis for subsequent updates to design specifications, test limits and generation of mass production recommended values.
[0079] Understandably, the review results also include a design specification overview. This overview uses a unified management table to centrally display the core information of a single product model's design specifications (Spec), covering indicators such as anomaly rates and coverage at each stage, including design, simulation, bench testing, and ATE (Automatic Test Equipment), enabling intuitive control over the entire product specification lifecycle. The same table links and displays statistical values of the Spec at each stage with corresponding test data. Automated review processes determine whether the test data meets Spec requirements, ensuring that each Spec has a clear verification conclusion (pass / fail) at each testing stage. This achieves precise matching and closed-loop verification, ensuring aligned management of Spec and test data.
[0080] Specifically, the pass / fail judgment results are first integrated with multi-dimensional analysis reports to form a complete review result, clearly showing whether each test item meets the design specifications. Simultaneously, a unified table aligns the specifications with the statistical values of test data at each stage, clarifying the verification conclusion of each specification at each testing stage through automated review. Then, the review result is associated with the target chip's identification information and design specification file and stored in a primary database. When a request to view the review result is received, it can be retrieved from the primary database and downloaded to the local disk for user viewing. The system supports traceable queries of review results by time, product line, and project dimensions. Furthermore, it generates a specification overview through a unified management table, intuitively presenting indicators such as anomaly rates and coverage rates at each stage, ensuring that review information can be retrieved at any time and shared across departments, while simultaneously achieving closed-loop management of specifications and test data.
[0081] Optionally, the method further includes:
[0082] S105. Based on the mapping relationship between test data and design specifications, generate recommended mass production limit values for the target chip under the corresponding test conditions, and fill the recommended mass production limit values into the review results.
[0083] In this embodiment, the recommended mass production limits are generated based on the mapping relationship between test data and design specifications, combined with preset algorithms (such as the superposition of mean ± n standard deviations and parameter drift) and statistical models (such as 3Sigma and 6Sigma). These recommended test limits are applicable to the mass production stage of the target chip, ensuring the standardization and consistency of mass production testing. The corresponding test conditions refer to the test environment and operating parameters referenced when generating the recommended mass production limits, including temperature, process angle, voltage, and other conditions corresponding to the test data.
[0084] Specifically, based on the mapping relationship between test data and design specifications, the system utilizes built-in preset algorithms (such as...). Using the sum of Drift and statistical models, the system automatically calculates the recommended mass production limit values for the target chip under corresponding test conditions, fills the generated review results with these recommended values, enriches the practical value of the review results, and provides a standardized and traceable reference for setting limits in the mass production stage, replacing the traditional manual setting method.
[0085] For example, first, the statistical benchmark range is calculated. Based on a large amount of engineering test data (Bench + ATE data), the Mean and Sigma of a certain test item are first determined, and then... Determine the theoretical statistical range of the test item to ensure coverage of a preset proportion of qualified products (e.g., 99.73% confidence interval for 3Sigma). Then, overlay parameter drift compensation. The system automatically analyzes parameter drift (offset) under different test stages, time points, and environmental conditions, incorporates this offset into the limit calculation, and compensates for systematic data offsets in actual working conditions to avoid misjudgments or omissions caused by drift.
[0086] S106. Based on the review results, generate a product specification document for the target chip and store the product specification document in the first database.
[0087] In this embodiment, the product specification document, also known as the product datasheet, is a formal document that records the final performance indicators, specifications, and usage requirements of the target chip. It covers core information such as electrical characteristics, recommended operating conditions, and absolute maximum ratings, and is used to guide subsequent mass production and market applications.
[0088] Specifically, the system extracts core content such as confirmed design specifications and recommended mass production limits from the review results. It then interfaces with external systems (such as Content Management Systems (CMS) and Enterprise Resource Planning (ERP) systems via a POST-type Hypertext Transfer Protocol (HTTP) interface to automatically generate a product specification document (MSD) for the target chip. If design or testing changes occur, the system automatically updates the MSD content, ensuring that external systems always have the latest correct version, eliminating the need for manual verification. After generating the MSD, it associates the target chip's identification information and design specification files, storing it in a primary database. When a request to view the MSD is received, it can be retrieved from the primary database and downloaded to the user's local disk for viewing.
[0089] Optionally, the method further includes:
[0090] S107. Obtain the current data management request and determine the management authority of the operator corresponding to the current data management request, and execute the current data management request based on the management authority, and generate an operation log of the data management operation associated with the current data management request.
[0091] Current data management requests include at least the following: creating design specification files, modifying design specification files, deleting design specification files, querying design specification files, uploading test data files, modifying test data files, deleting test data files, querying test data files, and viewing review results.
[0092] In this embodiment, the current data management request is an operation request related to data management initiated by the operator to the system. This includes at least requests for adding, deleting, modifying, and querying design specification documents and test data files, as well as requests to view review results, covering the entire data lifecycle. Management permissions can be understood as the scope of permitted operations based on the operator's role. Roles include administrators, design engineers, test engineers, mass production test engineers, quality engineers, project managers, etc. Different roles correspond to different operation permissions, ensuring information security and operational standards. The operation log can be understood as a log recording the execution process and results of the current data management request. It is directly associated with the data management request and includes information such as operation time, operation content, operator, and status before and after changes, used for operation traceability and auditing.
[0093] Specifically, the system first obtains the current data management request initiated by the operator, identifies the operator's role, and determines their corresponding management permissions (e.g., design engineers can only change specifications, and test engineers can only upload test data). Based on the management permissions, it determines whether to allow the execution of the request. If allowed, the corresponding operation is completed. After the operation is executed, the system automatically generates an operation log associated with the request, fully recording the operation process. When design specifications are changed, a notification is sent to the relevant responsible person to ensure that data management operations are traceable and auditable, and to ensure the security and efficiency of cross-departmental collaboration.
[0094] This invention provides a data management method. The system, through a flexible mapping mechanism, unifies multi-source heterogeneous data (such as CSV and STDF files) generated during design, simulation, benchmark testing, and ATE testing into a database management system. It supports batch import, rapid querying, and full-process version control, ensuring data consistency and traceability in terms of time sequence, format, and content. This achieves unified mapping and centralized management of multi-stage data. Each design specification is uniquely identified and precisely mapped to test items and conditions. The system automatically records all specification changes and their impact, enabling users to quickly retrieve specification status and corresponding test data at any point in time. This significantly reduces communication and execution risks caused by specification changes and ensures closed-loop traceability of design specifications and test data. An embedded role and permission mechanism supports efficient collaboration among multiple roles such as design, testing, quality, and project management on the same platform. Different roles can perform data operations and approvals based on their permissions, ensuring information security while breaking down data silos across departments, improving project progress transparency, and achieving cross-departmental collaboration and access control. The system integrates various statistical tools such as histograms, scatter plots, box plots, and correlation analysis, enabling automated analysis of data across different stages, quickly identifying design and testing discrepancies, and supporting automatic report generation (CSV, PPT, PDF, etc.) to directly support R&D decisions and quality improvement. It also features built-in intelligent analysis and report generation functions; and a built-in configurable algorithm that automatically calculates parameter drift across temperature, process angle, and operating voltage conditions after data import. Based on statistical models (such as 3Sigma and 6Sigma), this method generates recommended mass production limits. Compared with traditional manual methods, this method significantly improves efficiency and accuracy, achieves standardization and traceability of limit settings, and enables automated mass production limit setting. The platform supports integration with other systems that require data through HTTP interfaces, automatically synchronizing datasheet information. This ensures that in the event of testing or design changes, the datasheet obtained from the system is always the latest and correct version, achieving automated product datasheet generation. This effectively addresses the shortcomings of existing technologies and improves project management efficiency and product quality.
[0095] In one embodiment, Figure 2 This is a schematic diagram of the structure of a data management system provided in an embodiment of the present invention. Figure 2 As shown, the system includes:
[0096] The specification file storage module 21 is used to obtain the design specification files of each chip and associate the design specification files with the chip's identification information and store them in the first database. The design specification files include at least a specification file identifier and specification parameter thresholds.
[0097] The test data mapping module 22 is used to acquire the test data file of the target chip and store the test data file in the second database, and establish a mapping relationship between test data and design specifications according to the preset rule configuration file and the design specification file corresponding to the target chip.
[0098] The review result generation module 23 is used to determine whether the test data meets the corresponding design specifications, generate review results, and store the review results in the first database.
[0099] The data rule update module 24 is used to update the design specifications or test limits of the target chip based on the review results.
[0100] The data management system used in this technical solution enables closed-loop management of data across the entire data chain, thereby improving data management efficiency.
[0101] Optional, test data mapping module 22, specifically used for:
[0102] The test data file generated by the target chip in the target stage is obtained, the test data file is stored in the second database, and import log information is recorded. The import log information includes import time, import method and operator. The target stage includes design stage, simulation stage, laboratory testing stage and mass production testing stage. The test data file is a multi-source heterogeneous format file corresponding to different target stages.
[0103] Determine the target design specification file corresponding to the target chip, and extract the specification file identifier, specification parameter thresholds, and test conditions from the target design specification file;
[0104] Based on the association rules in the preset rule configuration file, the test items and test conditions in the test data file are matched with the design specifications in the design specification file to establish a mapping relationship between test data, test conditions and design specifications.
[0105] Optional, the review result generation module 23 is specifically used for:
[0106] Based on the specification parameter thresholds in the design specification document, the matching relationship between the test data and the specification parameter thresholds is compared, and the judgment result is output, which includes qualified and unqualified.
[0107] Based on statistical analysis tools, the test data is analyzed in multiple dimensions to generate an analysis report that includes measurement error risk identification, parameter offset analysis, comparison results between specifications and test limits, and parameter optimization suggestions.
[0108] The judgment result and the analysis report are integrated into a review result. The review result is associated with the corresponding design specification documents and chip identification information and stored in the first database, supporting traceability and query by time, product line, and project dimensions.
[0109] Optionally, the system further includes:
[0110] The mass production limit determination module is used to generate a recommended mass production limit value for the target chip under the corresponding test conditions based on the mapping relationship between the test data and the design specifications, and to fill the recommended mass production limit value into the review result;
[0111] The specification generation module is used to generate a product specification document for the target chip based on the review results and store the product specification document in the first database.
[0112] Optionally, the system further includes a management request and response module, specifically used for:
[0113] Obtain the current data management request and determine the management authority of the operator corresponding to the current data management request, and execute the current data management request based on the management authority. The current management request includes at least creating a design specification file, modifying a design specification file, deleting a design specification file, querying a design specification file, uploading a test data file, modifying a test data file, deleting a test data file, querying a test data file, and viewing review results.
[0114] Generate an operation log for the data management operation associated with the current data management request.
[0115] Optionally, the chip identification information includes the chip name, chip model, and chip version number; the preset rule configuration file includes at least the specification file identifier, test data file identifier, test item number, test item name, and test condition field.
[0116] The data management system provided in this embodiment of the invention can execute the data management method provided in any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.
[0117] In one embodiment, Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. For example... Figure 3The diagram illustrates a schematic representation of an electronic device 10 that can be used to implement embodiments of the present invention. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.
[0118] like Figure 3 As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer program stored in the ROM 12 or loaded into the RAM 13 from storage unit 18. The RAM 13 can also store various programs and data required for the operation of the electronic device 10. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.
[0119] Multiple components in electronic device 10 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of displays, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 10 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.
[0120] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, digital signal processors (DSPs), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as data management methods.
[0121] In some embodiments, the data management method may be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on electronic device 10 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the data management method described above may be performed. Alternatively, in other embodiments, processor 11 may be configured to perform the data management method by any other suitable means (e.g., by means of firmware).
[0122] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.
[0123] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.
[0124] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.
[0125] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).
[0126] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as a data server), or computing systems that include middleware components (e.g., an application server), or computing systems that include frontend components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., a communication network). Examples of communication networks include local area networks (LANs), wide area networks (WANs), and the Internet.
[0127] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.
[0128] This invention also provides a computer program product, including a computer program that, when executed by a processor, can implement the data management method provided in any embodiment of this application.
[0129] In the implementation of the computer program product, computer program code for performing the operations of this application can be written in one or more programming languages or a combination thereof. Programming languages include object-oriented programming languages such as Java, Smalltalk, and C++, as well as conventional procedural programming languages such as C or similar languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).
[0130] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.
[0131] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.
Claims
1. A data management method, characterized in that, include: Obtain the design specification files for each chip, and associate the design specification files with the chip's identification information and store them in a first database. The design specification files include at least a specification file identifier and specification parameter thresholds. The test data file of the target chip is obtained and stored in the second database. According to the preset rule configuration file and the design specification file corresponding to the target chip, a mapping relationship between the test data and the design specification is established. Determine whether the test data conforms to the corresponding design specifications, generate review results, and store the review results in the first database; Update the design specifications or test limits of the target chip based on the review results.
2. The method according to claim 1, characterized in that, The process of acquiring the test data file of the target chip and storing the test data file in the second database, and establishing a mapping relationship between the test data and the design specifications according to the preset rule configuration file and the design specification file corresponding to the target chip, includes: The test data file generated by the target chip in the target stage is obtained, the test data file is stored in the second database, and import log information is recorded. The import log information includes import time, import method and operator. The target stage includes design stage, simulation stage, laboratory testing stage and mass production testing stage. The test data file is a multi-source heterogeneous format file corresponding to different target stages. Determine the target design specification file corresponding to the target chip, and extract the specification file identifier, specification parameter thresholds, and test conditions from the target design specification file; Based on the association rules in the preset rule configuration file, the test items and test conditions in the test data file are matched with the design specifications in the design specification file to establish a mapping relationship between test data, test conditions and design specifications.
3. The method according to claim 1, characterized in that, The step of determining whether the test data conforms to the corresponding design specifications, generating a review result, and storing the review result in the first database includes: Based on the specification parameter thresholds in the design specification document, the matching relationship between the test data and the specification parameter thresholds is compared, and the judgment result is output, which includes qualified and unqualified. Based on statistical analysis tools, the test data is analyzed in multiple dimensions to generate an analysis report that includes measurement error risk identification, parameter offset analysis, comparison results between specifications and test limits, and parameter optimization suggestions. The judgment result and the analysis report are integrated into a review result. The review result is associated with the corresponding design specification documents and chip identification information and stored in the first database, supporting traceability and query by time, product line, and project dimensions.
4. The method according to claim 1, characterized in that, Also includes: Based on the mapping relationship between the test data and the design specifications, a recommended mass production limit value for the target chip under the corresponding test conditions is generated, and the recommended mass production limit value is filled into the review result. Based on the review results, a product specification document for the target chip is generated and stored in the first database.
5. The method according to claim 1, characterized in that, Also includes: Obtain the current data management request and determine the management authority of the operator corresponding to the current data management request, and execute the current data management request based on the management authority. The current management request includes at least creating a design specification file, modifying a design specification file, deleting a design specification file, querying a design specification file, uploading a test data file, modifying a test data file, deleting a test data file, querying a test data file, and viewing review results. Generate an operation log for the data management operation associated with the current data management request.
6. The method according to claim 1, characterized in that, The chip's identification information includes the chip name, chip model, and chip version number; the preset rule configuration file includes at least the specification file identifier, test data file identifier, test item number, test item name, and test condition field.
7. A data management system, characterized in that, include: A specification file storage module is used to obtain the design specification files of each chip and associate the design specification files with the chip's identification information and store them in a first database. The design specification files include at least a specification file identifier and specification parameter thresholds. The test data mapping module is used to acquire the test data file of the target chip and store the test data file in the second database, and establish a mapping relationship between the test data and the design specifications according to the preset rule configuration file and the design specification file corresponding to the target chip. The review result generation module is used to determine whether the test data meets the corresponding design specifications, generate review results, and store the review results in the first database. The data rule update module is used to update the design specifications or test limits of the target chip based on the review results.
8. An electronic device, characterized in that, include: At least one processor; as well as A memory communicatively connected to the at least one processor; wherein, The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform a data management method according to any one of claims 1-6.
9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that cause a processor to execute and implement a data management method according to any one of claims 1-6.
10. A computer program product, characterized in that, The computer program product includes a computer program that, when executed by a processor, implements a data management method according to any one of claims 1-6.