Superconducting quantum chip and method for constructing quantum logic gate based on same

Abstract

The invention provides a superconducting quantum chip, which comprises a superconducting quantum bit, a coplanar waveguide transmission line, an XY control line, a Z control line, a reading resonant cavity and a microwave transmission line, and is characterized in that the coplanar waveguide transmission line is used for connecting the superconducting quantum bit to an interconnected waveguide; the XY control line is used for exciting superconducting quantum bits; the Z control line is used for performing frequency bias operation on the superconducting quantum bits; the microwave transmission line is used for carrying out superconducting quantum ratio characteristic dispersion reading; the reading resonant cavity is used for reading the state of the superconducting quantum bit received by the chip; wherein the superconducting quantum bit is configured to be coupled with a plurality of standing wave modes in the interconnected waveguide, and the superconducting quantum bit is configured to be in a large detuning state with any standing wave mode in the interconnected waveguide. According to the invention, the design of any coupler does not need to be introduced, and only the two quantum bits need to resonate at specific energy levels at an idle point and a working point and are kept in a large detuning state with any standing wave mode.

Description

Technical Field

[0001] This invention relates to quantum network technology based on superconducting quantum circuit systems, specifically, technologies such as superconducting quantum chip remote interconnection technology, remote quantum logic gates, and distributed quantum computing; more specifically, it relates to a superconducting quantum chip and a method for constructing quantum logic gates based on it. Background Technology

[0002] In the field of superconducting quantum networks, a crucial application is the ultimate goal of achieving distributed quantum computing across chips. To accomplish gate-based distributed quantum computing tasks, it is necessary to develop basic cross-chip quantum circuits; in other words, to implement long-range quantum logic gates across chips.

[0003] Under the existing experimental techniques, only two studies have realized and characterized long-range quantum logic gates, both of which are based on quantum teleportation. One is the quantum teleportation controlled-NOT gate based on transmon qubits described in reference [1], and the other is the quantum teleportation controlled-NOT gate based on binomial state Bose encoding described in reference [2]. The tomographic fidelity of both quantum processes is around 70%. This is because long-range quantum gates based on quantum teleportation require a pair of long-range entangled Bell states, and after consuming entanglement resources, a measurement + feedforward method is used to perform a single-bit gate on the two bits based on the measurement results. Measurement + feedforward often takes a long time, and the measurement itself also has errors, which greatly affects the final gate fidelity.

[0004] In subsequent studies, some researchers have proposed other schemes. For example, in reference [3], a scheme to realize a remote quantum logic gate by using a controlled phase gate between a photon and a qubit in a resonant cavity was proposed. This scheme relies on the flying photon emitted by the qubit, and the flying photon needs to travel back and forth in the waveguide. Therefore, the waveguide must be bidirectional. This requires that the waveguide be long enough and that unidirectional devices cannot be inserted in the waveguide. This makes it impossible to open the detection window from the middle of the waveguide, which makes it difficult to calibrate the experiment. Another example is that in reference [4], multiple modes in the waveguide were proposed to drive the qubit on one side of the point-to-point quantum network to make a remote cross-resonance gate between two qubits. The advantage of this scheme is that the cross-resonance gate can be used between two qubits that are greatly detuned and cannot be tuned. However, reference [5] mentioned that such a control method itself will be accompanied by other side effects, which need to be calibrated and eliminated later. Moreover, the equivalent cross-resonance term coefficient is small and the gate execution time is long.

[0005] In summary, existing quantum logic gate schemes either suffer from low fidelity due to execution time, have high requirements for waveguides leading to experimental difficulties, or have side effects that are difficult to eliminate and have long execution times.

[0006] It should be noted that the background information provided is only for illustrating relevant information about the present invention to aid in understanding the technical solutions of the present invention, and does not imply that the relevant information is necessarily prior art. In the absence of evidence indicating that the relevant information was disclosed before the filing date of this invention, the relevant information should not be considered prior art.

[0007] References:

[0008] Reference [1] Qiu J, et al. 2023arXiv preprint arXiv:2302.08756;

[0009] Reference [2] Chou KS, et al. 2018 Nature, 561(7723):368-373.

[0010] Reference [3] GF,et al.2022Physical Review Applied,17(5):054038.;

[0011] Literature [4] Ohfuchi M, et al. 2024Quantum Science and Technology, 9(3):035014.;

[0012] Reference [5] Tripathi V, et al. 2019 Physical Review A, 100(1): 012301.

[0013] Reference [6] Majer J, et al. Nature 449, 443–447. Summary of the Invention

[0014] Therefore, the purpose of this invention is to overcome the shortcomings of the prior art and provide a new method for constructing quantum logic gates based on superconducting quantum logic.

[0015] The objective of this invention is achieved through the following technical solution:

[0016] According to a first aspect of the present invention, a superconducting quantum chip is provided, comprising: a superconducting quantum bit, a coplanar waveguide transmission line, an XY control line, a Z control line, a readout resonant cavity, and a microwave transmission line, wherein the coplanar waveguide transmission line is used to connect the superconducting quantum bit to an interconnected waveguide; the XY control line is used to excite the superconducting quantum bit; the Z control line is used to perform a frequency bias operation on the superconducting quantum bit; the microwave transmission line is used to perform superconducting quantum ratio dispersion readout; and the readout resonant cavity is used to read the state of the superconducting quantum bit received by the chip; wherein the superconducting quantum bit is configured to couple with multiple standing wave modes in the interconnected waveguide, and the superconducting quantum bit is configured to maintain a large detuning state with any standing wave mode in the interconnected waveguide.

[0017] Among them, the coupling strength between the superconducting quantum bit and the standing wave mode in the interconnected waveguide is proportional to the number of standing wave modes:

[0018]

[0019] Where g represents the coupling between the superconducting quantum chip and the interconnected waveguide, N represents the number of standing wave modes of the interconnected waveguide, and ∝ represents proportionality.

[0020] Preferably, the superconducting quantum bit is configured to satisfy the following condition to maintain a large detuning state with any standing wave mode in the interconnected waveguide:

[0021] |ω q -ω m ≥20g m

[0022] |ω q -ω m+1 ≥20g m+1

[0023] Where, ω q ω represents the angular frequency of a superconducting quantum bit. m ω represents the angular frequency of the m-th standing wave mode in the interconnected waveguide. m+1 ω represents the angular frequency of the (m+1)th standing wave mode in the interconnected waveguide. q In ω m and ω m+1 Between, g m G represents the coupling strength between a superconducting quantum bit and the m-th standing wave mode in an interconnected waveguide. m+1 The coupling strength between a superconducting quantum bit and the (m+1)th order standing wave mode in an interconnected waveguide.

[0024] Preferably, the superconducting quantum bit is a quantum bit formed using a superconducting Josephson junction, and the frequency can be adjusted by adding different magnetic fluxes in the Josephson junction loop.

[0025] Preferably, the superconducting quantum chip includes multiple superconducting qubits and multiple coplanar waveguide transmission lines for interconnection, with each superconducting qubit corresponding to one or more coplanar waveguide transmission lines for interconnection.

[0026] According to a second aspect of the present invention, a method for constructing a quantum logic gate based on a superconducting quantum chip is provided. This method employs two superconducting quantum chips as described in the first aspect of the present invention and an interconnecting waveguide to perform the quantum logic gate function. The two superconducting quantum chips are a first chip and a second chip. The method includes: selecting a first chip, a second chip, and an interconnecting waveguide according to corresponding preset constraints based on quantum logic gate requirements; connecting the first chip and the second chip via the interconnecting waveguide; wherein the frequencies of the first qubit in the first chip and the second qubit in the second chip are both between the frequencies of the same pair of adjacent standing wave modes in the interconnecting waveguide; and adjusting the qubit frequencies of the first chip or the first and second chips from an idle point to a modulated operating point according to the quantum logic gate construction requirements, so that the superconducting qubits in the first chip and the superconducting qubits in the second chip undergo required energy level resonance and exchange based on a virtual Raman process to perform the quantum logic gate function.

[0027] The equivalent coupling coefficient of the virtual Raman process is:

[0028]

[0029] Where g1 is the coupling strength between the first qubit and multiple standing wave modes with similar frequencies in the interconnect waveguide, g2 is the coupling strength between the second qubit and multiple standing wave modes with similar frequencies in the interconnect waveguide, and Δ FSR This represents the angular frequency spacing of the standing wave modes in the interconnected waveguide.

[0030] Preferably, the preset constraints are:

[0031]

[0032] in,

[0033]

[0034] g1=g2=g eff

[0035] g ge-eg =g eff

[0036] Where, ω q1 ω is the angular frequency of the first qubit at its idle point, α1 is the anharmonicity of the first qubit, and ω q2 The angular frequency of the second quantum bit at the idle point, g ee-gf express The coupling strength between the two energy levels, g ge-eg express The coupling strength between the two energy levels, ω m ω represents the angular frequency of the m-th standing wave mode in the interconnected waveguide. m+1 ω represents the angular frequency of the (m+1)th standing wave mode in the interconnected waveguide. q1 and ω q2 All in ω m and ω m+1 between.

[0037] Preferably, when constructing a controlled Z-gate, the following steps are performed:

[0038] The frequency of the first qubit is reduced from the idle point to the operating point to satisfy the following condition:

[0039] ω' q1 +α1=ω q2

[0040] Where, ω' q1 This represents the angular frequency of the first qubit at the operating point;

[0041] The two energy levels, |f00g> and |e00e>, resonate and undergo a complete exchange, allowing |e00e> to accumulate a dynamic phase π;

[0042] The frequency of the first quantum bit is adjusted back to the idle point.

[0043] Preferably, when constructing the iSWAP gate, the following steps are performed:

[0044] The frequencies of both the first and second qubits are adjusted from the idle point to the operating point to satisfy the following condition:

[0045] ω' q1 =ω' q2

[0046] Where, ω' q1 ω' represents the angular frequency of the first qubit at the operating point. q2 This indicates the angular frequency of the second qubit at the operating point;

[0047] The energy levels |e00g> and |g00e> resonate and undergo a complete half-cycle of exchange.

[0048] Compared with existing technologies, the advantages of this invention are as follows: This invention realizes a long-range quantum logic gate design based on virtual Raman processes that does not require the introduction of any couplers. During gate execution, it is only necessary to ensure that the two qubits resonate at specific energy levels at their idle and operating points, and that both remain in a highly detuned state with arbitrary standing wave modes. This results in a two-qubit quantum logic gate that does not require measurement and feedback, utilizing the indirect interaction between qubits through multiple waveguide standing wave modes. Furthermore, the gate execution speed is fast, thus achieving higher fidelity. This method is theoretically feasible, and the control method is simple and executable, representing a viable scheme for long-range quantum logic gates between qubits, laying the foundation for the ultimate realization of distributed quantum computing across chips. Attached Figure Description

[0049] The embodiments of the present invention will be further described below with reference to the accompanying drawings, wherein:

[0050] Figure 1 This is a schematic diagram of the functional structure of a superconducting quantum chip according to an embodiment of the present invention;

[0051] Figure 2 This is a schematic diagram of a physical example of a superconducting quantum chip according to an embodiment of the present invention;

[0052] Figure 3 This is a schematic diagram of the lumped equivalent circuit corresponding to an example of a superconducting quantum chip according to an embodiment of the present invention;

[0053] Figure 4 This is a schematic diagram of an energy level generated by an indirect coupling based on a virtual Raman process according to an embodiment of the present invention;

[0054] Figure 5 A quantum circuit diagram of a CNOT gate based on a controlled phase gate according to an embodiment of the present invention;

[0055] Figure 6 for Figure 5 Schematic diagram of the controlled phase gate in the diagram;

[0056] Figure 7 for Figure 5 A schematic diagram of the Hadamard door in the image;

[0057] Figure 8 A quantum circuit diagram of a CNOT gate based on an iSWAP gate according to an embodiment of the present invention;

[0058] Figure 9 This is a schematic diagram of a controlled Z-gate energy level according to an embodiment of the present invention;

[0059] Figure 10 This is a schematic diagram of the iSWAP gate energy level according to an embodiment of the present invention. Detailed Implementation

[0060] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the invention.

[0061] As mentioned in the background section, existing quantum logic gate schemes either suffer from low fidelity due to execution time, have high requirements for waveguides leading to experimental difficulties, or have side effects that are difficult to eliminate and have long execution times.

[0062] Through research, the inventors discovered that in existing quantum networks based on superconducting quantum circuits, the methods used to realize quantum logic gates between independently packaged long-range qubits generally rely on quantum teleportation. This approach consumes entanglement resources and depends on a measurement-feedback method, making it difficult to achieve very high gate fidelity; the fidelity measured in existing work is around 70%. Existing theoretical schemes that have not been experimentally realized also present various experimental difficulties: For example, if a photon-qubit controlled phase gate is used to realize a controlled phase gate between long-range qubits, then unidirectional devices in the waveguide must be removed, and the photon emission, scattering, and reception processes must be separated in the time domain. Furthermore, the lack of an intermediate channel detection window inevitably creates difficulties in calibrating experimental parameters. If multiple standing wave modes in the waveguide are used to induce indirect qubit-qubit interactions for cross-resonance gates, this control method itself introduces other side effects that require subsequent calibration to eliminate, and the resulting cross-resonance term coefficient is small, leading to a long gate execution time. In view of this, the present invention provides a scheme for realizing a remote quantum logic gate by using a qubit-qubit virtual Raman process induced by multiple standing wave modes in a waveguide. It directly utilizes the standing wave modes in the waveguide, and only requires two qubits to resonate and maintain a large detuned state with any standing wave mode, without the need for a coupler or a transmission resonant cavity.

[0063] To better understand this invention, the principle of the virtual Raman process is first introduced below. As described in reference [6], the virtual Raman process refers to the quantum dynamics process caused by indirect coupling through the exchange of virtual photons generated by an intermediate system when one system is not directly coupled to another. When two qubits are not directly coupled, the coherent exchange of specific energy level states between qubits is caused by indirect coupling through multiple standing wave modes (multimode resonant cavities) in the waveguide. Based on the virtual Raman process, the superconducting quantum chip in this invention does not require the design of any coupler and transmission resonant cavity, and does not require the qubits to resonate with any standing wave mode in the waveguide. During the gate execution process, it is only necessary to make the specific energy levels of the two qubits resonate at the idle point and the working point and keep them in a large detuned state with any standing wave mode. In this way, a two-qubit quantum logic gate that does not require measurement and feedback and utilizes the indirect interaction between qubits through multiple waveguide standing wave modes can be obtained. The gate execution speed is fast and the fidelity is higher. The proposed scheme has a simple and executable control method, and is a feasible scheme for quantum logic gates between remote qubits, laying the foundation for the eventual realization of distributed quantum computing across chips.

[0064] To better understand the present invention, the present invention will be described in detail below with reference to the accompanying drawings and embodiments.

[0065] In this invention, angular frequency is used directly in some places for convenience. It should be understood that for those skilled in the art, neither angular frequency nor frequency affects their understanding of the solution of this invention.

[0066] First, let's introduce the superconducting quantum chip of this solution. As mentioned earlier, the superconducting quantum chip of this invention, designed based on the virtual Raman process, eliminates the need for couplers and transmission resonant cavities, directly coupling the qubits to the waveguide, thus simplifying the chip design. According to one embodiment of the invention, as... Figure 1 As shown, the superconducting quantum chip of the present invention includes six basic functional units: a superconducting quantum bit 101, a coplanar waveguide transmission line 102, an XY control line 103, a Z control line 104, a readout resonant cavity 105, and a microwave transmission line 106. The coplanar waveguide transmission line 102 connects the superconducting quantum bit 101 to an interconnected waveguide; the XY control line 103 excites the superconducting quantum bit 101; the Z control line 104 performs frequency biasing on the superconducting quantum bit 101; the microwave transmission line 106 performs dispersion readout of the superconducting quantum bit 101; and the readout resonant cavity 105 reads the state of the superconducting quantum bit received by the chip. The superconducting quantum bit is configured to couple with multiple standing wave modes in the interconnected waveguide, and the superconducting quantum bit is configured to maintain a large detuning state with any standing wave mode in the interconnected waveguide.

[0067] The superconducting quantum bit 101 is coupled to the readout resonant cavity 105 (coupling method is not limited), and has a weak capacitive coupling with the XY control line 103. The Josephson junction loop of the superconducting quantum bit 101 has a weak mutual inductance with the Z control line 104. The readout resonant cavity 105 is coupled to the microwave transmission line 106 used for superconducting quantum ratio dispersion readout (coupling method is not limited). The superconducting quantum bit 101 is coupled to the coplanar waveguide transmission line 102 used to connect to the interconnect waveguide (coupling method is not limited). The XY control line 103 and the Z control line 104 are each connected to the microwave transmission line inside the dilution refrigerator at one point via bonding, PCB, or microwave connector; the microwave transmission line 106 used for superconducting quantum ratio dispersion readout is connected to the microwave transmission line inside the dilution refrigerator at two points via bonding, PCB, and microwave connector; the coplanar waveguide transmission line 102 used to connect to the interconnect waveguide is connected to the interconnect waveguide connecting the transmitter and receiver at one point. Since the connection method between the superconducting quantum chip and the internal structure of the dilution refrigerator is a technology known to those skilled in the art, it will not be described in detail in the embodiments of this invention.

[0068] To more intuitively understand the superconducting quantum chip structure of this invention, the following will be combined with... Figure 2 Physical illustration and Figure 3 The lumped equivalent circuit diagram will be used for further explanation.

[0069] Figure 2 The diagram shows a physical example of the superconducting quantum chip of the present invention. In this example, the superconducting quantum bits utilize an Xmon-type grounded transmon superconducting quantum bit design, and the readout resonant cavity employs a quarter-wavelength coplanar waveguide resonant cavity design. Specifically, 201 represents the capacitor plate of the Xmon-type grounded transmon superconducting quantum bit; 202 represents the coplanar waveguide transmission line coupled to the Xmon-type grounded transmon superconducting quantum bit via interdigital capacitance for connecting the interconnect waveguide; 203 represents the XY control line capacitively coupled to the Xmon-type grounded transmon superconducting quantum bit; 204 represents the Z control line with mutual inductance to the Josephson junction loop of the Xmon-type grounded transmon superconducting quantum bit; 205 represents the Josephson junction loop of the Xmon-type grounded transmon superconducting quantum bit; 206 represents the quarter-wavelength coplanar waveguide readout resonant cavity; and 207 represents the microwave transmission line used for superconducting quantum bit discrete readout. According to one embodiment of the present invention, capacitance is used to achieve coupling between the superconducting quantum bit and the interconnect waveguide. Figure 3 As shown Figure 2The lumped equivalent circuit of the example, where 208 represents the coupling capacitance between the Xmon-type grounded transmon superconducting quantum bit and the coplanar waveguide transmission line 202 used to connect the interconnect waveguides, and the superconducting quantum bit and the interconnect waveguide can be coupled through capacitor 208; 209 represents the coupling capacitance between the capacitor plate 201 of the Xmon-type grounded transmon superconducting quantum bit and the XY control line 203; 210 represents the coupling capacitance between the capacitor plate 201 of the Xmon-type grounded transmon superconducting quantum bit and the signal ground; 211 represents the Josephson junction loop of the Xmon-type grounded transmon superconducting quantum bit. 205 represents the mutual inductance between the Z control line 204 and the grounded transmon superconducting quantum bit; 212 represents the Josephson junction loop of the Xmon-type grounded transmon superconducting quantum bit, i.e., 205 in the physical diagram, which is a symmetrical junction in the example; 213 represents the coupling capacitance between the capacitor plate 201 of the Xmon-type grounded transmon superconducting quantum bit and the quarter-wavelength coplanar waveguide readout resonant cavity 206; 214 represents the equivalent lumped LC circuit of the quarter-wavelength coplanar waveguide readout resonant cavity 206; 215 and 216 represent the coupling capacitance between the quarter-wavelength coplanar waveguide readout resonant cavity 206 and the microwave transmission line 207 used for superconducting quantum bit discrete readout. The specific parameters in the example can be summarized as follows: there is capacitive coupling 213 between the superconducting quantum bit capacitor plate 201 and the readout resonant cavity 206; capacitive coupling 208 between the superconducting quantum bit capacitor plate 201 and the transmission line 202; capacitive coupling 215 and 216 between the readout resonant cavity 206 and the transmission line 207; and the Josephson junction of the transmon superconducting quantum bit is a symmetrical junction, that is, there are two Josephson junctions with the same parameters forming a loop.

[0070] It should be noted that, due to the design characteristics of this invention, the type of superconducting qubits in the superconducting quantum chip based on this invention is not limited. Any qubit formed using a superconducting Josephson junction loop, where the frequency can be adjusted by adding different magnetic fluxes to the Josephson junction loop, is acceptable. The specific configuration, size, and parameters of the Josephson junction in the superconducting qubit Josephson junction loop are not limited. In particular, for transmon-type superconducting qubits, there are no restrictions on symmetric or asymmetric Josephson junction loops. In the superconducting qubit configuration, there are no restrictions on floating or grounded types.

[0071] The shape and size of the superconducting quantum bits and readout resonant cavity in the superconducting quantum chip based on the present invention are not limited, and the size and length of all transmission lines that ultimately connect to the microwave circuitry inside the dilution refrigerator are not limited. The relative frequencies of the superconducting quantum bits and readout resonant cavity can be high or low, and the frequency arrangement is not restricted.

[0072] The type of readout resonant cavity in the superconducting quantum chip based on the present invention is not limited. It can be a quarter-wavelength type, a half-wavelength short-circuit type, a half-wavelength open-circuit type coplanar waveguide resonant cavity, or a three-dimensional resonant cavity or other microwave resonators. Whether or not an external Purcell filter is added to the readout resonant cavity is not limited, and the type of Purcell filter is not limited.

[0073] The microwave transmission line in the superconducting quantum chip based on the present invention does not necessarily need to be connected to the microwave transmission line inside the dilution refrigerator in two places. It is also possible to use one connection to read the quantum state of the superconducting quantum bit by reading the dispersion of the resonant cavity through reflection readout. The number of connection points is not limited.

[0074] According to one embodiment of the present invention, the superconducting quantum chip of the present invention includes, but is not limited to, a superconducting quantum bit. The superconducting quantum bits may or may not be coupled, and may or may not have couplers. The coupling method is not limited, and the number of coplanar waveguide transmission lines coupled to each superconducting quantum bit for connecting to the interconnect waveguide is not limited.

[0075] The materials and substrates for preparing the superconducting quantum chip of the present invention are not limited. The materials can be Al, Nb, Ta, etc., and the substrates can be sapphire, silicon, etc.

[0076] The fabrication process of the superconducting quantum chip according to the present invention can be based on either two-dimensional planar technology or flip-chip bonding technology. That is, the superconducting quantum bits, resonant cavity, and other components can be coplanar (i.e., coexisting on the same substrate), or they can be non-coplanar (i.e., not on the same substrate). For example, the superconducting quantum bits can be on one substrate A, and the readout resonant cavity on another substrate B. Substrates A and B are face-to-face but close together without contact, ensuring coupling between them. The ground planes on the two substrates are connected by indium pillars. The XY control lines and Z control lines can be designed separately, combined into one line, or connected from the same output port to the microwave circuitry inside the dilution refrigerator, splitting into two paths on the chip. No limitations are set in the embodiments of the present invention.

[0077] The superconducting quantum bit of this invention is directly coupled to the waveguide, eliminating the need for superconducting gate-controlled quantum bits (Gmon) and transmission resonant cavities. This simplifies the sample design and improves the sample yield. Such a chip design is simple to implement and can be directly expanded into architectures with two-chip multi-channel interconnection and multi-chip multi-channel interconnection. It has significant application value for future large-scale superconducting quantum chip interconnection, especially within a single dilution refrigerator.

[0078] This invention utilizes the virtual Raman process of multiple standing wave modes in a waveguide as an intermediate system, and designs corresponding control methods and transmission protocols. Coherent exchange can be achieved as long as specific energy levels of the qubit resonate. When adjusting the qubit frequency, it is crucial to avoid energy level crossings between the qubit and the standing wave mode. Therefore, this invention maintains a highly detuned state between the qubit and any standing wave mode to prevent energy level exchange. Specifically, a highly detuned state means that the frequency of the superconducting qubit on the superconducting quantum chip is highly detuned to the frequency of any standing wave mode in the waveguide. This ensures approximately no energy exchange between any standing wave mode in the waveguide and the superconducting qubit (in reality, energy exchange is less than a certain threshold), the condition for which is |ω... q -ω n ≥20g m (For example, the design can consider energy exchange to be less than or equal to 1%, with the specific threshold designed according to usage requirements), where ω q The angular frequency (ω) of a quantum bit qi / 2π corresponds to the frequency. Angular frequency and frequency are only different in units, which does not affect understanding. Therefore, this embodiment of the invention mainly uses angular frequency for description. ω n Let g be the angular frequency of the nth-order mode in the waveguide. m Let be the coupling strength between the nth-order standing wave mode and the superconducting quantum bit. In practice, it is sufficient to ensure that the two standing wave modes with frequencies closest to the quantum bit satisfy the condition. Assuming the superconducting quantum bit's angular frequency is between the angular frequencies of the m-th and (m+1)-th standing wave modes, i.e., the two standing wave modes closest to the superconducting quantum bit's frequency are the m-th and (m+1)-th standing wave modes, then the large detuning condition can be obtained as follows:

[0079] |ω q -ω m ≥20g m

[0080] |ω q -ω m+1 ≥20g m+1

[0081] As long as the superconducting quantum bit and any standing wave mode are kept in a highly detuned state, energy level crossover can be avoided.

[0082] In the design of the superconducting quantum chip in this invention, the superconducting qubits are coupled with multiple standing wave modes in the waveguide, and the coupling strength between each superconducting qubit and a standing wave mode in the waveguide is [value missing]. Where represents the coupling between the superconducting quantum bit and the standing wave mode in the waveguide, and N is the number of standing wave modes. When N>>1, N-2≈N-1≈N≈N+1≈N+2, which is an easy condition to satisfy because the fundamental frequency of the waveguide is very low, generally around 100MHz.

[0083] It should be noted that this invention utilizes a virtual Raman process to realize a qubit-qubit long-range quantum logic gate through virtual photon exchange using multiple standing wave modes in a waveguide (quantum channel). While there is no direct coupling between the qubits of two quantum network nodes, indirect coupling is induced because they are directly coupled to the standing wave modes in the waveguide. This indirect coupling allows coherent exchange between specific energy levels of the qubits as long as they resonate. It is important to note that this virtual Raman process differs from the case where a single-mode cavity acts as an intermediate system. Since there are multiple standing wave modes in the waveguide, this process is a virtual Raman process caused by a multi-mode cavity acting as an intermediate system. When the standing wave modes in the interconnected waveguides are sufficiently dispersed and the quality factor is sufficiently high, directly coupling the qubits to the waveguides can also ensure that the relaxation time T1 of the qubits is not limited by the multimode Purcell effect caused by multiple standing wave modes in the interconnected waveguides. This invention utilizes the virtual Raman process between qubits to realize a long-range two-qubit quantum logic gate through the exchange between specific energy levels. Therefore, when adjusting the qubit frequency from the idle point to the operating point, it is crucial to avoid the crossing of the operating energy level with the standing wave mode energy level, and even to avoid near resonance of these levels, maintaining a large detuning state at all times. This is because such crossing would cause the qubit's population (energy) to leak into the standing wave mode, leading to a decrease in the fidelity of the quantum logic gate. Therefore, the solution in this invention requires controlling the waveguide length to control the free spectral range of the waveguide, and also carefully controlling the coupling strength between the qubit and the waveguide standing wave mode. This ensures that gate operation can be completed while maintaining a large detuning with all waveguide modes, and that the obtained equivalent coupling strength between energy levels is strong enough to accelerate gate execution. This is the key to the entire design.

[0084] The two qubits used to execute a long-range quantum logic gate (referred to as the first qubit and the second qubit) are not directly coupled, but they are both coupled to multiple standing wave modes in the waveguide, and the frequencies of the two qubits are between the frequencies of the same pair of adjacent standing wave modes in the interconnected waveguide. As mentioned earlier, the coupling strength of each qubit is proportional to the number of standing wave modes. N is the number of modes. When N >> 1, N-2 ≈ N-1 ≈ N ≈ N+1 ≈ N+2. This condition is easy to satisfy because the fundamental frequency of the waveguide is very low, generally in the hundreds of MHz range. Figure 4The diagram illustrates the energy levels of two qubits performing quantum gates and their coupling coefficients. In this embodiment, the coupling between the first qubit and its closest standing wave modes is defined as g1, and the coupling between the second qubit and its closest standing wave modes is defined as g2. The free spectral range of the waveguide, i.e., the frequency interval of the standing wave modes, is defined as Δ. FSR Then, by using the virtual photon exchange of multiple standing wave modes, the equivalent coupling of the virtual Raman process can be obtained as follows:

[0085] Before introducing specific quantum gate execution schemes, let's first explain the principles of controlled Z-gates and iSWAP gates.

[0086] I. The Principle of Controlled Z-Gates

[0087] Controlled-phase gates are a common type of two-qubit quantum logic gate. They have attracted widespread attention because they can be added to single-qubit quantum gates to form equivalent controlled-NOT gates (CNOT gates), such as... Figure 5 The quantum circuit shown can generate CNOT gates, where, Figure 6 The portion shown is the controlled phase gate. Figure 7 The section shown is the Hadamard door.

[0088] Controlled phase gates typically utilize the energy levels between higher energy levels of qubits. Coherent exchange or adiabatic processes are used to realize controlled phase gates for both non-adiabatic and adiabatic systems. Two coupled transmon-type qubit systems have a typical Hamiltonian operator:

[0089]

[0090] Where ω1 is the angular frequency of qubit 1, ω2 is the angular frequency of qubit 2, and α1 and α2 are the anharmonicities of qubits 1 and 2, respectively. and These are the annihilation operators for qubits 1 and 2, respectively. and are the excitation operators for qubit 1 and 2, respectively, and J is the coupling strength between the two qubits.

[0091] For CZ gates, we truncate the Hilbert space to the subspace {|gg>,|ge>,|eg>,|ee>,|gf>,|fg>}. First, we analyze the implementation principle of non-adiabatic CZ gates. Upon resonance, the corresponding Hamiltonian operator can be obtained as follows:

[0092]

[0093] Among them, E gg E ge Eeg E ee E gf E fg For the corresponding energy level, where,

[0094]

[0095] The corresponding time evolution operator for

[0096]

[0097] In the context of using virtual Raman processes for CZ gates, two long-range qubits... The equivalent interaction between them is:

[0098]

[0099] The corresponding time evolution operator is:

[0100]

[0101] When g ee-gf When τ = π, by truncating the computational subspace {|gg>,|fe>,|eg>,|ee>} to the qubit, we can obtain the time evolution operator:

[0102]

[0103] This is the CZ gate operation we need.

[0104] For adiabatic CZ gates, we utilize the adiabatic process to slowly and time-dependently modulate the frequency of the qubits, and finally revert to the initial frequency, so that the three energy levels |ge>, |eg>, |ee> accumulate geometric phase. This geometric phase is related to the "path" of frequency modulation. Let these three geometric phases be θ. ge (l),θ eg (l),θ ee (l), where,

[0105]

[0106] ω ij [l(0)]=ω ij [l(τ)]

[0107] The evolution operator can then be obtained as:

[0108]

[0109] We just need to let;

[0110] θ ee(l)-θ eg (l)-θ ge (l)=π

[0111] This allows us to further use R for two bits. z Door or virtual Z-Door VR z Eliminate the extra phase θ of each bit ge (l) and θ eg (l), thus obtaining the CZ gate operation we need:

[0112]

[0113] II. The principle of iSWAP gate

[0114] The iSWAP gate is a two-qubit quantum logic gate that can be directly formed by utilizing the transverse interaction between two qubits, and it can also be formed through methods such as... Figure 8 The quantum circuit shown is used to implement a controlled NOT gate (CNOT gate).

[0115] To understand the implementation principle of the iSWAP gate, we only need to consider the Hamiltonian operator after the qubit is truncated to a second energy level:

[0116]

[0117] If two qubits resonate with ω1 = ω2, then the matrix form of the Hamiltonian operator for the two qubits is:

[0118]

[0119] in,

[0120]

[0121] The time evolution operator is:

[0122]

[0123] In the context of using virtual Raman processes for CZ gates, two long-range qubits... The equivalent interaction between them is:

[0124]

[0125] The corresponding time evolution operator is:

[0126]

[0127] Then when g ge-eg When τ = π / 2, the time evolution operator is:

[0128]

[0129] This is exactly the iSWAP operation we need.

[0130] As can be seen from the above principles, a quantum logic gate can be realized by tuning the qubits to resonance to achieve specific energy level resonance and coherent exchange as required.

[0131] Both the operating and idle points of the execution gate require resonance between the two qubits, and a highly detuned state with respect to all standing wave modes. Let the qubit frequencies of the two quantum network nodes be ω. q1 ω q2 (where ω is at the idle point) q1 >ω q2 Let the anharmonicity of the two qubits be α1 and α2. Then, considering the controlled Z-gate, at the operating point ω... q1 +α1=ω q2 At idle points, the large detuning condition ω between bits must be satisfied. q1 +α1-ω q2 >20g ee-gr ,in for The coupling strength between the two energy levels. When the large detuning condition is met, the population exchange between the two energy levels does not exceed 1%, which basically satisfies the requirements of a high-fidelity gate operation. Continuing to consider that the energy levels of the qubit need to maintain large detuning from any standing wave mode during the modulation process, to simplify the problem, according to an embodiment of the present invention, only the standing wave frequencies in the two waveguides closest to the frequencies of the two qubits are considered, denoted as ωi. m ω m+1 , has ω m+1 >ω q1 >ω q2 >ω m ω m+1 -ω m =Δ FSR Therefore, all requirements must be met during the regulation process. When considering iSWAP gates, is there an ω at the operating point? q1 =ω q2 At the idle point, the large detuning condition ω must be satisfied. q1 -ω q2 >20g ge-eg ,in for The coupling strength between the two energy levels. Similarly, considering that the energy levels of a qubit need to be largely detuned from any standing wave mode during modulation, then ω... m+1 -20g2>ω q1 >ω q2 >ωm +20g1.

[0132] In summary, the parameter constraints for selecting superconducting quantum chips for executing quantum logic gates are as follows:

[0133]

[0134] In fact, if constraints ① and ② are satisfied, then constraints ③ and ④ must also be satisfied. Therefore, we only need to consider the constraints when performing a controlled phase gate, which are more stringent. Let g... eff Taking / 2π=1MHz as an example, assuming g1=g2=g, α1 / 2π=α2 / 2π=200MHz, then we can obtain Δ that satisfies the condition. FSR / 2π~1GHz, corresponding to a common aluminum coaxial cable waveguide length of approximately 0.12m, g / 2π~15.8MHz. If we only consider constraints ③ and ④ of the iSWAP gate, we can obtain Δ that satisfies the conditions. FSR For frequencies ranging from 2π to 420MHz, the commonly used aluminum coaxial cable waveguide length is approximately 0.29m, corresponding to a frequency range of g / 2π to 10.3MHz. This waveguide length is sufficient for experimentally realizing the interconnection of qubits between two quantum chips packaged in different sample boxes. Of course, if we relax the requirement for large detuning frequency differences, we can obtain even lower Δ... FSR / 2π, a longer waveguide length.

[0135] When implementing a controlled Z-gate using a virtual Raman process caused by multiple standing wave modes in a waveguide, to simplify the problem, in this embodiment of the invention, only the two standing wave modes in the waveguide with frequencies closest to the two qubits are considered, denoted as ωi and ωj respectively. m ω m+1 ω m+1 -ω m =Δ FSR Let the frequencies of the qubits of the two quantum network nodes be ω. q1 ω q2 (where ω is at the idle point) m+1 >ω q1 >ω q2 >ω m Let the anharmonicity of the two qubits be α1 and α2. Then, in the double excitation space, energy levels need to be considered, with energies from high to low as |e01g>, |g01e>, |f00g>, |e00e>, |e10g>, |g10e> (each energy level in order is: qubit 1 (frequency ω)). q1 / 2π), standing wave mode m (frequency ω) m / 2π), standing wave mode m+1 (frequency ω) m+1 / 2π), 2 qubits (frequency ω)q2 The six energy levels are / 2π). Figure 9 The diagram illustrates the energy levels for a controlled Z-gate implemented using a virtual Raman process induced by multiple standing wave modes in a waveguide. Before the gate operation, the two qubits are at an idle point, at which point, due to ω... q1 >ω q2 The energy of |f00g> is higher than that of |e00e>. If a non-adiabatic controlled phase gate is executed, ω is generally used. q1 Adjust to ω′ q1 Make ω′ q1 +α1=ω q2 This frequency point is called the operating point, which causes |f00g> and |e00e> to resonate, allowing these two energy levels to undergo a complete exchange. This allows |e00e> to accumulate a dynamic phase π, and then the qubit frequency is adjusted back to the idle point. If an adiabatic controlled phase gate is executed, ω is typically slowly... q1 Adjust to ω′ q1 Make ω′ q1 +α1=ω q2 Near the point of rest, the qubit is slowly moved back to the idle point, allowing |e00e> to accumulate a geometric phase π during the evolution. During this evolution, because the qubit is biased away from the idle point, the qubit itself also accumulates a dynamic phase. This dynamic phase can be identified using the Ramsey interferometry method, allowing each qubit to individually accumulate its own phase, which can then be eliminated using an additional single-qubit phase gate or a virtual Z-gate.

[0136] When implementing the iSWAP gate using the virtual Raman process caused by multiple standing wave modes in the waveguide, as in previous embodiments, to simplify the problem, this embodiment of the invention only considers the two standing wave modes in the waveguide with frequencies closest to the two qubits, denoted as ω. m ω m+1 ω m+1 -ω m =Δ FSR Let the frequencies of the qubits of the two quantum network nodes be ω. q1 ω q2 (where ω is at the idle point) m+1 >ω q1 >ω q2 >ω m Let the anharmonicity of the two qubits be α1 and α2. Then, in a single excitation space, energy levels need to be considered, with energies from high to low as |g01g>, |e00g>, |g00e>, |g10g> (each energy level in order is: qubit 1 (frequency ω)). q1 / 2π), standing wave mode m (frequency ω) m / 2π), standing wave mode m+1 (frequency ω)m+1 / 2π), 2 qubits (frequency ω) q2 The four energy levels are / 2π). Figure 10 The diagram illustrates the energy levels of the iSWAP gate, which utilizes a virtual Raman process induced by multiple standing wave modes in a waveguide. Before the gate operation, the two qubits are at an idle point, at which point, due to ω... q1 >ω q2 If the energy of |e00g> is higher than that of |g00e>, then when executing the iSWAP gate, it is only necessary to tune the two qubits to resonant ω′. q1 =ω′ q2 This frequency point is called the operating point, which causes |e00g> and |g00e> to resonate, allowing these two energy levels to complete a full half-cycle of exchange, thus realizing the iSWAP gate. Similarly, in the above evolution process, because the qubit is biased away from the idle point, the bit itself will also accumulate a dynamic phase. This dynamic phase can be identified by Ramsey interferometry, which identifies the phase accumulated by each bit individually, and then eliminated using an additional single-bit phase gate or a virtual Z-gate.

[0137] This invention realizes a long-range quantum logic gate design based on virtual Raman processes that does not require the introduction of any couplers. During gate execution, it is only necessary to ensure that the two qubits resonate at specific energy levels at their idle and operating points, and that both remain in a highly detuned state with arbitrary standing wave modes. This results in a two-qubit quantum logic gate that does not require measurement or feedback, utilizing the indirect interaction between qubits through multiple waveguide standing wave modes. Furthermore, the gate execution speed is fast, thus achieving higher fidelity. This method is theoretically feasible, and the control method is simple and executable, representing a viable scheme for long-range inter-qubit quantum logic gates, laying the foundation for the ultimate realization of distributed quantum computing across chips.

[0138] It should be noted that although the steps are described in a specific order above, it does not mean that the steps must be executed in the above specific order. In fact, some of these steps can be executed concurrently or even in a different order, as long as the required function can be achieved.

[0139] The various embodiments of the present invention have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or technical improvements to the embodiments in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A superconducting quantum chip, characterized in that, include: Superconducting quantum bits, coplanar waveguide transmission lines, XY control lines, Z control lines, readout resonant cavities, and microwave transmission lines, among which... The coplanar waveguide transmission line is used to connect superconducting qubits to interconnect waveguides; The XY control lines are used to excite superconducting qubits; The Z control line is used to perform frequency biasing operations on the superconducting quantum bits; The microwave transmission line is used for superconducting quantum ratio feature readout. The readout resonant cavity is used to read the state of the superconducting quantum bits received by the chip; The superconducting quantum bit is configured to couple with multiple standing wave modes in the interconnected waveguide, and the superconducting quantum bit is configured to maintain a large detuning state with any standing wave mode in the interconnected waveguide.

2. The superconducting quantum chip according to claim 1, characterized in that, The coupling strength between superconducting qubits and standing wave modes in interconnected waveguides is proportional to the number of standing wave modes: Where g represents the coupling between the superconducting quantum chip and the interconnected waveguide, N represents the number of standing wave modes of the interconnected waveguide, and ∝ represents proportionality.

3. The superconducting quantum chip according to claim 1, characterized in that, The superconducting quantum bit is configured to satisfy the following condition to maintain a large detuning state with any standing wave mode in the interconnected waveguide: |oh q -oh m |≥20g m |oh q -oh m+1 |≥20g m+1 Where, ω q ω represents the angular frequency of a superconducting quantum bit. m ω represents the angular frequency of the m-th standing wave mode in the interconnected waveguide. m+1 ω represents the angular frequency of the (m+1)th standing wave mode in the interconnected waveguide. q In ω m and ω m+1 Between, g m G represents the coupling strength between a superconducting quantum bit and the m-th standing wave mode in an interconnected waveguide. m+1 The coupling strength between a superconducting quantum bit and the (m+1)th order standing wave mode in an interconnected waveguide.

4. The superconducting quantum chip according to claim 1, characterized in that, The superconducting qubit is a qubit formed using a superconducting Josephson junction, and its frequency can be adjusted by adding different magnetic fluxes to the Josephson junction loop.

5. The superconducting quantum chip according to claim 1, characterized in that, The superconducting quantum chip includes multiple superconducting qubits and multiple coplanar waveguide transmission lines for interconnection, with each superconducting qubit corresponding to one or more coplanar waveguide transmission lines for interconnection.

6. A method for constructing quantum logic gates based on superconducting quantum chips, comprising two superconducting quantum chips as described in any one of claims 1-5 and interconnected waveguides to execute quantum logic gate functions, wherein, The two superconducting quantum chips are a first chip and a second chip, characterized in that the method includes: According to the requirements of quantum logic gates, a first chip, a second chip, and an interconnecting waveguide are selected according to the corresponding preset constraints. The first chip and the second chip are connected through the interconnecting waveguide. The frequencies of the first qubit in the first chip and the second qubit in the second chip are both between the frequencies of the same pair of adjacent standing wave modes in the interconnecting waveguide. According to the requirements for constructing quantum logic gates, the frequency of the qubits of the first chip or the first chip and the second chip is adjusted from the idle point to the operating point so that the superconducting qubits in the first chip and the superconducting qubits in the second chip can resonate and exchange energy levels according to the requirements based on the virtual Raman process to perform the quantum logic gate function.

7. The method according to claim 6, characterized in that, The equivalent coupling coefficient of the virtual Raman process is: Where g1 is the coupling strength between the first qubit and multiple standing wave modes with similar frequencies in the interconnect waveguide, g2 is the coupling strength between the second qubit and multiple standing wave modes with similar frequencies in the interconnect waveguide, and Δ FSR This represents the angular frequency spacing of the standing wave modes in the interconnected waveguide.

8. The method according to claim 7, characterized in that, The preset constraints are: in, g1=g2=g eff g ge-eg =g eff Where, ω q1 ω is the angular frequency of the first qubit at its idle point, α1 is the anharmonicity of the first qubit, and ω q2 The angular frequency of the second quantum bit at the idle point, g ee-gf express The coupling strength between the two energy levels, g ge-eg express The coupling strength between the two energy levels, ω m ω represents the angular frequency of the m-th standing wave mode in the interconnected waveguide. m+1 ω represents the angular frequency of the (m+1)th standing wave mode in the interconnected waveguide. q1 and ω q2 All in ω m and ω m+1 between.

9. The method according to claim 8, characterized in that, When constructing a controlled Z-gate, perform the following steps: The frequency of the first qubit is reduced from the idle point to the operating point to satisfy the following condition: oh q1 +α1=ω q2 Where, ω' q1 This represents the angular frequency of the first qubit at the operating point; The two energy levels, |fOOg> and |e00e>, resonate and undergo a complete exchange, allowing |e00e> to accumulate a dynamic phase π; The frequency of the first quantum bit is adjusted back to the idle point.

10. The method according to claim 8, characterized in that, When constructing the iSWAP gate, perform the following steps: The frequencies of both the first and second qubits are adjusted from the idle point to the operating point to satisfy the following condition: oh q1 =oh' q2 Where, ω' q1 ω' represents the angular frequency of the first qubit at the operating point. q2 This indicates the angular frequency of the second qubit at the operating point; The two energy levels, |e00g> and |g00e>, resonate and undergo a complete half-cycle of exchange.

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