Light receiving element, optical device, and electronic apparatus

Abstract

The invention relates to a light receiving element, an optical device, and an electronic apparatus. The light receiving element includes: a photon response multiplication unit including a charge multiplication region capable of multiplying charges generated in response to incidence of photons; a first resistance section connected at one end to one end of the photon response multiplier section and having a resistance value greater than a resistance value of the photon response multiplier section; a second resistance portion connected at one end to the other end of the first resistance portion; and a connection point to which the other end of the first resistance section, the one end of the second resistance section, and a readout unit configured to read out an output from the photon response multiplier are connected, in which a first capacitance is present at the one end of the photon response multiplier, and a second capacitance is present at the other end of the photon response multiplier. A second capacitor exists at the other end of the first resistor part, and the capacitance of the second capacitor is larger than that of the first capacitor.

Description

[0001] This application is a divisional application of patent application No. 202180011232.5, filed on February 19, 2021, entitled "Optical Receiving Element, Optical Device and Electronic Device". Technical Field

[0002] This invention relates to light receiving elements, optical devices, and electronic devices. Background Technology

[0003] As one of the optical elements constructed to convert received light into an electrical signal and output that electrical signal, avalanche multiplication single-photon avalanche diode (hereinafter referred to as SPAD) is known. Avalanche multiplication refers to the phenomenon where electrons and holes generated by incident photons are accelerated by a high electric field, and new electrons and holes are subsequently generated. Because a group of electrons and holes increases many times and a large current flows, SPADs using this technology have the advantage of being able to detect weak light.

[0004] List of cited references

[0005] Non-patent literature

[0006] Non-patent literature 1: APPLIED OPTICS, Vol. 35, No. 12, 20 April 1996 Summary of the Invention

[0007] The technical problem to be solved by the present invention

[0008] During SPAD operation, a reverse bias voltage of, for example, tens of V is applied between the cathode and anode of the SPAD. Therefore, the cathode potential change caused by the large current generated by the SPAD can be significant. Since the change in cathode potential is read by the readout circuit, the input voltage of the readout circuit also changes significantly. In this case, it is necessary to suppress this change to be below the withstand voltage of the readout circuit. Furthermore, in SPADs, power consumption tends to increase due to the large current flow caused by avalanche amplification.

[0009] To reduce power consumption and lower the input voltage of the readout circuit than the withstand voltage, a resistor divider can be used (Non-Patent Document 1). However, the time constant, determined by the resistance value of the resistors used in the resistor divider and by the parasitic capacitance of the SPAD's cathode and the input parasitic capacitance of the readout circuit, increases, potentially lengthening the SPAD's recharge time. The recharge time is the so-called dead time, during which the SPAD cannot detect photons. In other words, even though the input voltage of the readout circuit can be lowered than the withstand voltage and power consumption can be reduced using a resistor divider, the drawback of a longer dead time remains.

[0010] Therefore, the present invention proposes a light receiving element, optical device, and electronic device that can reduce power consumption or dead time while reducing the input voltage of the readout circuit.

[0011] Technical solutions to solve technical problems

[0012] According to the present invention, a light receiving element is provided, comprising: a photon response multiplier including a charge multiplication region capable of multiplying the charge generated in response to the incident photon; a first resistor connected at one end to one end of the photon response multiplier and having a resistance value greater than that of the photon response multiplier; a second resistor connected at one end to the other end of the first resistor; and a readout unit connected to the other end of the first resistor and reading out from the photon response multiplier via the first resistor.

[0013] Furthermore, according to the present invention, an optical device is provided, comprising a plurality of light-receiving elements arranged in a matrix, wherein each of the plurality of light-receiving elements comprises: a photon response multiplier, which includes a charge multiplication region capable of multiplying the charge generated in response to the incident photon; a first resistor, which is connected at one end to one end of the photon response multiplier and has a resistance value greater than that of the photon response multiplier; a second resistor, which is connected at one end to the other end of the first resistor; and a connection point, wherein the other end of the first resistor, the first end of the second resistor, and a readout unit that reads out from the photon response multiplier are connected to the connection point.

[0014] Furthermore, according to the present invention, an electronic device is provided, comprising an optical system and an optical device, wherein a plurality of light-receiving elements are arranged in a matrix in the optical device, wherein each of the plurality of light-receiving elements comprises: a photon response multiplier, comprising a charge multiplication region capable of multiplying the charge generated in response to the incident photon that has passed through the optical system; a first resistor, which is connected at one end to one end of the photon response multiplier and has a resistance value greater than that of the photon response multiplier; a second resistor, which is connected at one end to the other end of the first resistor; and a connection point, wherein the other end of the first resistor, the first end of the second resistor, and a readout unit that reads out from the photon response multiplier are connected to the connection point. Attached Figure Description

[0015] Figure 1 This is a block diagram illustrating a schematic example of the construction of an electronic device that applies an optical device according to the prior art.

[0016] Figure 2 This is a block diagram illustrating a schematic construction example of an optical device according to the prior art.

[0017] Figure 3A This is a block diagram illustrating an example of a schematic construction of pixels in an optical device according to the prior art.

[0018] Figure 3B This is a block diagram illustrating another example of a schematic construction of pixels in an optical device according to the prior art.

[0019] Figure 3C It is a schematic diagram illustrating the change in cathode potential when a photon is incident on the photodiode of a pixel in an optical device according to the prior art.

[0020] Figure 3D This is a schematic diagram illustrating the voltage-current characteristics of the photodiode of a pixel in an optical device according to the prior art.

[0021] Figure 4A This is a block diagram illustrating a schematic construction example of an optical device according to a first embodiment.

[0022] Figure 4B This is a block diagram illustrating a schematic configuration example of the pixels of a pixel array unit of an optical device according to a first embodiment.

[0023] Figure 5A This is a schematic diagram illustrating the change in cathode voltage when a photon is incident on a single-photon avalanche diode in a pixel of a pixel array unit included in the optical device according to the first embodiment.

[0024] Figure 5B This is a diagram illustrating the operation of pixels in an optical device according to a first embodiment.

[0025] Figure 5C This is used to illustrate the pixel successor of the optical device according to the first embodiment. Figure 5B The diagram shows the subsequent operations.

[0026] Figure 5D This is used to illustrate the pixel successor of the optical device according to the first embodiment. Figure 5C The diagram shows the subsequent operations.

[0027] Figure 5E This is used to illustrate the pixel successor of the optical device according to the first embodiment. Figure 5D The diagram shows the subsequent operations.

[0028] Figure 6A This is a diagram illustrating a construction example of pixels according to a conventional example.

[0029] Figure 6B This is a diagram illustrating a construction example of pixels according to a conventional example.

[0030] Figure 7A This is a block diagram illustrating a specific example 1 of the shielding resistor section of a pixel in an optical device according to a first embodiment.

[0031] Figure 7B This is a block diagram illustrating a specific example 2 of the shielding resistor section of a pixel in an optical device according to the first embodiment.

[0032] Figure 8A This is a block diagram illustrating a specific example 1 of the quench resistor part of a pixel in an optical device according to a first embodiment.

[0033] Figure 8B This is a block diagram illustrating a specific example 2 of the quenching resistance section of a pixel in an optical device according to the first embodiment.

[0034] Figure 8C It is used to explain the basis Figure 8B The graph shows the operation of the pixel in a specific example 2 of the quenching resistance section.

[0035] Figure 9A This is a block diagram illustrating a specific example 1 of the readout circuit of a pixel in an optical device according to a first embodiment.

[0036] Figure 9B This is a diagram illustrating the operation of the readout circuit of the pixel in the optical device according to the first embodiment.

[0037] Figure 9C This is a block diagram illustrating a specific example 2 of the readout circuit for a pixel of an optical device according to the first embodiment.

[0038] Figure 10A This is a block diagram illustrating a schematic configuration example of the pixels of an optical device according to a second embodiment.

[0039] Figure 10B It is a graph used to illustrate the operation of the pixels of the optical device according to the second embodiment.

[0040] Figure 10C This is a block diagram illustrating a specific example 3 of the shielding resistor section of a pixel in an optical device according to the second embodiment.

[0041] Figure 11 This is a block diagram illustrating a schematic configuration example of the pixels of an optical device according to a third embodiment.

[0042] Figure 12 This is a block diagram illustrating an example of a stacked structure of an optical device according to a fourth embodiment.

[0043] Figure 13 This is a block diagram illustrating a schematic configuration example of the pixels of an optical device according to a fourth embodiment.

[0044] Figure 14 This is a vertical cross-sectional view showing an example of the cross-sectional structure of the surface perpendicular to the light incident surface of the optical device according to the fourth embodiment.

[0045] Figure 15 It shows Figure 14 A horizontal cross-sectional view of an example of the cross-sectional structure of surface AA.

[0046] Figure 16 This is a schematic diagram showing pixels included in an optical device according to a comparative example.

[0047] Figure 17A This is a block diagram showing a modified example 1 of the pixels of the optical device according to the fourth embodiment.

[0048] Figure 17B This is a block diagram illustrating a modified example 2 of the pixels of the optical device according to the fourth embodiment.

[0049] Figure 17C This is a block diagram showing a modified example 3 of the pixels of the optical device according to the fourth embodiment.

[0050] Figure 17D This is a block diagram showing a modified example 4 of the pixels of the optical device according to the fourth embodiment.

[0051] Figure 17E This is a block diagram showing a modified example 5 of the pixels of the optical device according to the fourth embodiment.

[0052] Figure 18A This is a block diagram illustrating a modified example 6 of the pixels of the optical device according to the fourth embodiment.

[0053] Figure 18B This is a block diagram showing a modified example 7 of the pixels of the optical device according to the fourth embodiment.

[0054] Figure 19A This is a block diagram illustrating a modified example 8 of the pixels of the optical device according to the fourth embodiment.

[0055] Figure 19B This is a block diagram illustrating a modified example 9 of the pixels of the optical device according to the fourth embodiment.

[0056] Figure 19C This is a block diagram showing a modified example 10 of the pixels of the optical device according to the fourth embodiment.

[0057] Figure 20This is a schematic diagram showing a camera device as an electronic device to which an optical device can be applied according to an embodiment of the present invention.

[0058] Figure 21 This is a block diagram illustrating a construction example of a ranging device that is an electronic device to which an optical device according to an embodiment of the present invention can be applied.

[0059] Figure 22 This is a block diagram illustrating a schematic configuration example of the pixels of a pixel array unit in the optical device of an electronic device for ranging that uses the present technology.

[0060] Figure 23 This diagram schematically illustrates ranging using the direct time-of-flight (ToF) method in a ranging device that is an electronic device employing this technology.

[0061] Figure 24 This is a diagram illustrating an example of a histogram based on light reception time generated in a ranging device that is an electronic device using this technology.

[0062] Figure 25 This is a block diagram illustrating an example of a schematic construction of an in vivo information acquisition system.

[0063] Figure 26 This is a diagram illustrating an example of a schematic construction of an endoscopic surgical system.

[0064] Figure 27 This is a block diagram illustrating an example of the functional construction of a camera and a CCU.

[0065] Figure 28 This is a block diagram illustrating an example of a schematic construction of a vehicle control system.

[0066] Figure 29 This diagram illustrates the installation locations of the vehicle exterior information detection unit and the camera unit. Detailed Implementation

[0067] In the following, embodiments of the present invention will be described in detail based on the accompanying drawings. Note that in the various embodiments described below, the same reference numerals denote the same parts, and repeated descriptions will be omitted.

[0068] To facilitate understanding of the embodiments of the present invention, prior art related to the embodiments of the present invention will be described before describing the embodiments of the present invention.

[0069] Figure 1 This is a block diagram illustrating a schematic example of the construction of an electronic device employing an optical device according to the prior art. For example... Figure 1 As shown, the electronic device 1 includes, for example, a camera lens 30, an optical device 10, a storage unit 40, and a processor 50.

[0070] The imaging lens 30 is an example of an optical system that converges incident light and forms an image on the light-receiving surface of the optical device 10. The light-receiving surface may be a surface in the optical device 10 in which pixels are arranged in a matrix. The optical device 10 performs photoelectric conversion on the incident light to generate image data. Furthermore, the optical device 10 performs predetermined signal processing on the generated image data, such as noise removal and white balance adjustment.

[0071] The storage unit 40 includes, for example, flash memory, dynamic random access memory (DRAM) or static random access memory (SRAM), and records image data input from the optical device 10.

[0072] The processor 50 is configured using, for example, a central processing unit (CPU), and may include an application processor that executes an operating system and various application software, a graphics processing unit (GPU), and a baseband processor. The processor 50 performs various processing operations on image data input from the optical device 10 or image data read from the storage unit 40 as needed, performs display to the user, and sends the image data to the outside via a predetermined network.

[0073] Figure 2 This is a block diagram illustrating a schematic structural example of the optical device 10 described above. As shown, the optical device 10 includes a pixel array unit 11, a timing control circuit 15, a driving circuit 12, and an output circuit 13.

[0074] The pixel array unit 11 includes a plurality of pixels 20 arranged in a matrix. For each of the plurality of pixels 20, a pixel driving line LD (vertical direction in the figure) is connected to each column, and an output signal line LS (horizontal direction in the figure) is connected to each row. One end of the pixel driving line LD is connected to the output terminal of the driving circuit 12 corresponding to each column, and one end of the output signal line LS is connected to the input terminal of the output circuit 13 corresponding to each row.

[0075] The driving circuit 12 includes a shift register and an address decoder, and simultaneously drives all or column-by-column pixels 20 of the pixel array unit 11. The driving circuit 12 applies a selection control voltage to the pixel driving line LD corresponding to the column to be read, thereby selecting the pixels 20 to be used for photon incident detection on a column-by-column basis. Signals (called detection signals) output from each pixel 20 of the column selectively scanned by the driving circuit 12 are input to the output circuit 13 via output signal lines LS. The output circuit 13 outputs the detection signals input from each pixel 20 as pixel signals to the storage unit 40 or the processor 50.

[0076] The timing control circuit 15 includes a timing generator that generates various timing signals, and controls the drive circuit 12 and the output circuit 13 based on the various timing signals generated by the timing generator.

[0077] Figure 3A This is a block diagram illustrating an example of the schematic construction of pixel 20 in pixel array unit 11. As shown, pixel 20 includes a photodiode 21 and a quench resistor 22. In this pixel 20, the photodiode 21 is a single-photon avalanche diode (hereinafter referred to as SPAD 21). In SPAD 21, even if only one photon is incident, a large current is generated through avalanche multiplication, and this current is output as an electrical signal. The operation of SPAD 21 will be described later.

[0078] In the example shown, the anode of SPAD 21 is connected to a predetermined power supply, and the cathode of SPAD 21 is connected to one end of the quench resistor 22. The other end of the quench resistor 22 is grounded. Therefore, as described later, a reverse bias voltage VDDL can be applied between SPAD 21. Furthermore, a cathode parasitic capacitance CK is generated on the cathode side of SPAD 21 as a parasitic capacitance. The cathode parasitic capacitance CK corresponds to the combined capacitance of the SPAD 21 capacitance, the capacitance generated between the quench resistor 22 and the surrounding insulating layer, the capacitance generated by the wiring connecting SPAD 21 and the quench resistor 22, and the capacitance of elements included in the readout circuit 23, such as an inverter.

[0079] Reference Figure 3B The readout circuit 23 is connected to the connection point between the SPAD 21 and the quench resistor 22 of the pixel 20. The readout circuit 23 may include, for example, an inverter circuit, and, as described later, reads the potential (i.e., cathode potential) change at the connection point between the SPAD 21 and the quench resistor 22.

[0080] Furthermore, in pixel 20, the subsequent circuit 24 is connected to the output of the readout circuit 23. The subsequent circuit 24 may include, for example, a digital counter circuit, by which pixel 20 can be used as a photon counter element. In this case, image data can be generated based on an output signal corresponding to the number of photons detected in each pixel 20. That is, the optical device 10 can be used as a camera sensor.

[0081] Furthermore, the subsequent circuit 24 may include a time-to-digital converter (TDC) circuit instead of a digital counter circuit. The TDC circuit can generate a digital signal representing the time difference between a predetermined reference signal having a predetermined reference frequency and a detection signal based on that reference signal. For example, if the subsequent circuit 24 includes a TDC circuit, the optical device 10 can be used as a ranging element employing the time-of-flight (ToF) method.

[0082] Next, we will refer to Figure 3C and Figure 3D Instructions for operating SPAD 21. Figure 3C This is a schematic diagram showing the change in the cathode potential VK of SPAD 21 when a photon is incident on SPAD 21. Figure 3D This is a schematic diagram illustrating the voltage-current characteristics of the SPAD21. Figure 3D In the diagram, the horizontal axis represents the voltage applied between the anode and cathode of SPAD 21. This applied voltage is determined by V. An -V Ca This indicates that the anode potential of SPAD 21 is V. An And the cathode potential is V Ca Furthermore, in Figure 3D In the diagram, the vertical axis represents the current I flowing through SPAD 21 in the positive direction (from anode to cathode). An .

[0083] like Figure 3D As shown, when a forward bias voltage is applied to SPAD 21, the current I... An It flows in the positive direction and its current value increases with the increase of the applied voltage. On the other hand, when a reverse bias voltage is applied to SPAD 21, when the voltage is low, the current I increases due to the rectification effect of SPAD 21. An No flow. However, when the reverse bias voltage becomes equal to or below the breakdown voltage -Vbd, avalanche multiplication occurs, and a large current I... An The flow occurs in the opposite direction. Here, the region between the breakdown voltage (-Vbd) and the voltage (-Vbd-Ve) that is lower than the breakdown voltage (also known as overvoltage Ve) is called the Geiger region. In the Geiger region, the gain due to avalanche multiplication is theoretically infinite. By applying a reverse bias voltage, for example, tens of V, to the terminals of SPAD 21, SPAD 21 can operate in the Geiger region.

[0084] Here, when a predetermined voltage corresponding to the Geiger region is applied between the anode of SPAD 21 and the ground terminal of the quench resistor 22 from a predetermined power source, when a photon (which can be a single photon) is incident on SPAD 21 ( Figure 3C At point t0, photons generate electron-hole pairs, which are accelerated by a high electric field generated by a reverse bias voltage, and these electron-hole pairs are generated sequentially. That is, avalanche multiplication occurs. Therefore, a larger current flows in the opposite direction.

[0085] This current also flows through quench resistor 22, thus causing a voltage drop across quench resistor 22. Therefore, the applied voltage to SPAD 21 decreases. Here, avalanche multiplication stops (time t1) when the absolute value of the voltage applied between the cathode and anode of SPAD 21 becomes lower than the breakdown voltage (absolute value |Vbd|). The phenomenon of avalanche multiplication stopping is called quenching.

[0086] Subsequently, current is supplied to SPAD 21 through quench resistor 22, and SPAD 21 is charged. This charging is called recharging. Recharging is achieved by the cathode parasitic capacitance CK ( Figure 3A and Figure 3B The time constant is determined by [the time constant] and occurs within a specific time period (time t1 to time t2). When recharging is complete (time t2), the voltage applied to SPAD 21 returns to the voltage corresponding to the Geiger region, and SPAD 21 can operate again in that region. As described above, when photons are incident on SPAD 21, such as Figure 3C As shown, the cathode potential VK of SPAD 21 changes in a pulse shape. This change is read out by the readout circuit 23, thereby detecting photons. Note that since SPAD 21 cannot detect photons during the recharge period, this period is called the dead time.

[0087] (First Implementation Plan)

[0088] [Construction of the optical device according to the first embodiment]

[0089] Next, an example of the construction of the optical device according to the first embodiment of the present invention will be described. Figure 4A This is a block diagram illustrating a schematic construction example of an optical device according to a first embodiment. As shown, the optical device 100 includes a pixel array unit PAR, a column circuit 310, a row scanning circuit 320, and an interface circuit 330.

[0090] The pixel array unit PAR includes multiple pixels (light receiving elements) 200 arranged in a matrix. For each column of pixels 200, bit lines BL0, BL1, ... and BL are connected. S (Unless otherwise specified, these will be referred to as bit lines BL below), connecting word lines WL0, WL1, ... and WL in each row. N(Unless otherwise specified, it will be referred to as word line WL below). One end of bit line BL is connected to the output terminal of column circuit 310 corresponding to each column, and one end of word line WL is connected to the input terminal of row scan circuit 320 corresponding to each row. Note that, for ease of explanation, in the figure, the vertical direction is referred to as the column direction, and the horizontal direction is referred to as the row direction.

[0091] The row scanning circuit 320 simultaneously drives all or column-by-column pixels of the pixel array unit PAR. The row scanning circuit 320 applies a selection control voltage to the word line WL corresponding to the column to be read, thereby selecting the pixels 200 to be used for photon incident detection column-by-column. Signals (called detection signals) output from each pixel 200 of the column selectively scanned by the row scanning circuit 320 are input to the column circuit 310 via each bit line BL. The column circuit 310 generates digital signals by digitally converting the detection signals. The generated digital signals are output to the outside via the interface circuit 330. Note that the column circuit 310 and the row scanning circuit 320 are controlled by timing signals from a timing control circuit (not shown).

[0092] [The structure of the pixels of the optical device according to the first embodiment]

[0093] Figure 4B This is a block diagram illustrating a schematic configuration example of a pixel 200 of the pixel array unit PAR of the optical device 100 according to this embodiment. As shown, the pixel 200 includes a photodiode 210, a shielding resistor 211, and a quenching resistor 212. In this embodiment, the photodiode 210 is a SPAD and will be referred to as SPAD 210 below. The SPAD 210 multiplies the charge generated by photoelectric conversion in response to the incident photon through avalanche multiplication (also known as avalanche amplification) to generate a large current, and outputs this current as an electrical signal. However, the photodiode 210 is not limited to a SPAD and may be a silicon photomultiplier tube.

[0094] One end of the shielding resistor 211 is connected to the cathode of the SPAD 210, and the other end of the shielding resistor 211 is connected to one end of the quenching resistor 212. That is, in the pixel 200, a series circuit is formed in which the SPAD 210, the shielding resistor 211 and the quenching resistor 212 are connected in series.

[0095] The shielding resistor section 211 and the quenching resistor section 212 can be formed of, for example, high-resistivity polycrystalline silicon. Alternatively, the shielding resistor section 211 and the quenching resistor section 212 can be formed as metal resistors. Examples of materials used for metal resistors include so-called cermet materials such as TaSiO2 and NbSiO2. Here, the resistance value of the shielding resistor section 211 is represented by Rsh, and the resistance value between the cathode and anode of the SPAD 210 is R... ON When R is satisfied ON The relationship <Rsh>. That is, the shielding resistor section 211 is formed to have a resistance value greater than the resistance value between the cathode and anode of SPAD 210. The effect caused by this relationship will be explained later.

[0096] Furthermore, when the resistance value of the quenching resistor 212 is represented by Rq, the relationship Rsh < Rq is satisfied. That is, the shielding resistor 211 and the quenching resistor 212 are configured such that the resistance value Rq of the quenching resistor 212 is greater than the resistance value Rsh of the shielding resistor 211. The effect caused by this relationship will be explained later.

[0097] In addition, such as Figure 4B As shown, a parasitic capacitance C1 is generated on the cathode side of SPAD 210. The parasitic capacitance C1 corresponds to a combined capacitance including the capacitance of SPAD 210 itself and the capacitance generated by the wiring connecting SPAD 210 and shielding resistor 211. Furthermore, a parasitic capacitance C2 is generated between shielding resistor 211 and quenching resistor 212. The parasitic capacitance C2 corresponds to a combined capacitance including the capacitance generated between shielding resistor 211 and the surrounding insulating layer, the capacitance generated between quenching resistor 212 and the surrounding insulating layer, the capacitance generated by the wiring connecting shielding resistor 211 and quenching resistor 212, and the capacitance of elements included in the readout circuit 230, such as an inverter. Note that, since there are many circuit elements such as shielding resistor 211, quenching resistor 212 and readout circuit 230 (explained later) around parasitic capacitor C2 compared to the area around parasitic capacitor C1, the capacitance (value) of parasitic capacitor C2 tends to be greater than the capacitance (value) of parasitic capacitor C1.

[0098] One end of the readout circuit 230 is connected to the connection point between the shielding resistor 211 and the quenching resistor 212. The readout circuit 230 may include, for example, an inverter circuit. As described later, the readout circuit 230 reads the potential change at the connection point between the shielding resistor 211 and the quenching resistor 212.

[0099] Furthermore, in pixel 200, a digital counter circuit 240 is connected to the output of the readout circuit 230. The digital counter circuit 240 counts the number of potential changes at the connection point between the shielding resistor 211 and the quenching resistor 212 (i.e., the number of photons incident on the SPAD 210) read by the readout circuit 230, and outputs an output signal corresponding to the counted number. When the signal is transmitted from the line scan circuit 320 via word line WL... Figure 4A When a selection signal is input to pixel 200, an output signal is output from digital counter circuit 240 to column circuit 310 via bit line BL. By converting the output signal into brightness, optical device 100 can be used as an imaging element.

[0100] Note that the TDC circuit can replace the digital counter circuit connected to the subsequent stage of the readout circuit 230. Using this configuration, ranging can be performed using the direct ToF method based on the output from the readout circuit 230 and the difference between the light emission timing and the light reception timing.

[0101] In addition, the optical device 100 can also be used as a ranging unit for ranging using the indirect ToF method. In the indirect ToF method, the light receiving unit receives light of each phase according to the emission of a predetermined light source unit, and calculates distance information based on the light receiving signals of each phase output by the light receiving unit through the light receiving of each phase.

[0102] like Figure 4B As shown, a series circuit including SPAD 210, shielding resistor 211, and quenching resistor 212 is connected to a predetermined power supply. The anode of SPAD 210 is maintained at potential VDDL, and the other end of quenching resistor 212 (the end opposite to the end connected to shielding resistor 211) is maintained at potential VDDH. That is, a voltage corresponding to potential VDDH-potential VDDL is applied to the series circuit including SPAD 210, shielding resistor 211, and quenching resistor 212. Here, since potential VDDH is higher than potential VDDL, SPAD 210 is subjected to a reverse bias voltage. During the operation of pixel 200, this applied voltage is set to a predetermined voltage corresponding to the aforementioned Geiger region.

[0103] [Operation of pixels in the optical device according to the first embodiment]

[0104] Next, we will refer to Figures 5A to 5E Explain the operation of pixel 200. In Figures 5B to 5E In, with Figure 4B Similarly, pixel 200 is schematically shown, but the digital counter circuit 240 (or TDC circuit), word line WL, and bit line BL are omitted.

[0105] First, a predetermined voltage is applied to the series circuit consisting of SPAD 210, shielding resistor 211, and quenching resistor 212 using a predetermined power supply. That is, a (reverse bias) voltage corresponding to the Geiger region is applied to SPAD 210. When a photon is incident on SPAD 210 in this state ( Figure 5A At time t0), avalanche multiplication occurs, and a large current flows from the cathode to the anode of the SPAD 210. Here, in Figure 5B In the diagram, when the thin arrow schematically represents the current I2 flowing from parasitic capacitor C2 and the thick line schematically represents the current I1 flowing from parasitic capacitor C1, the large current flowing from the cathode to the anode of SPAD 210 is mainly supplied from parasitic capacitor C1. This is because a resistance R with a higher resistance than that between the cathode and anode of SPAD 210 is provided between parasitic capacitor C2 and SPAD 210. ON The shielding resistor 211 has a large resistance value Rsh. In other words, while the charge accumulated in the parasitic capacitance C1 easily moves to the SPAD 210, the charge accumulated in the parasitic capacitance C2 is hindered by the shielding resistor 211 and hardly moves to the SPAD 210. Therefore, during avalanche multiplication, current is mainly supplied to the SPAD 210 from the parasitic capacitance C1.

[0106] During avalanche multiplication, such as Figure 5A As shown in the time period t0~t1, due to the large current generated by avalanche multiplication, the cathode potential VK1 of SPAD 210 decreases. When the voltage applied between SPAD 210 becomes lower than the breakdown voltage as the cathode potential VK1 decreases, quenching occurs. Figure 5A (Time t1). Furthermore, at this time, the charge accumulated in the parasitic capacitance C1 has been discharged, and as... Figure 5C As shown, the supply of current I1 from parasitic capacitance C1 to SPAD 210 also stops.

[0107] Note that, as Figure 5A As shown, during the avalanche multiplication period (t0~t1), the potential VK2 between the shielding resistor 211 and the quenching resistor 212 does not drop as much as the potential VK1. This is because, as mentioned above, almost no current flows out of the parasitic capacitance C2.

[0108] Quenching occurs, and charge redistribution begins between parasitic capacitances C1 and C2. Figure 5A (Time t1). That is, as... Figure 5DAs shown, the charge remaining in parasitic capacitor C2 moves to parasitic capacitor C1 through shielding resistor 211. Here, since the resistance value Rq of quenching resistor 212 is greater than the resistance value Rsh of shielding resistor 211, the current I3 flowing through quenching resistor 212 only slightly contributes to charge redistribution. Therefore, charge redistribution mainly occurs between parasitic capacitor C2 and parasitic capacitor C1. When the voltage between parasitic capacitors C1 and C2 becomes equal (when potential VK1 and potential VK2 become equal), the redistribution ends (time t2).

[0109] When redistribution ends, recharging begins. That is, since the current I2 from the parasitic capacitance C2 does not flow, therefore... Figure 5E As shown, SPAD 210 is recharged by a current I3 flowing through the quenching resistor section 212. Here, there is no charge loss in the charge redistribution between parasitic capacitances C2 and C1, so the amount of charge required for recharging is equal to C1ΔVK1 consumed by avalanche multiplication. That is, an amount of charge equal to C1ΔVK1 is supplied to SPAD 210 through current I3. When recharging is completed (time t3), SPAD 210 becomes capable of detecting photons again.

[0110] [Operational effect of pixels in the optical device according to the first embodiment]

[0111] Next, the effects produced by the operation of the pixels 200 of the optical device according to the first embodiment will be explained in comparison with conventional examples. Figure 6A This diagram illustrates a construction example of a pixel according to a conventional example, and this construction example is substantially the same as the construction disclosed in Non-Patent Document 1. As shown in the figure, in the pixel of the conventional example, the avalanche photodiode PD1 and the resistor R... L and resistor R S Series connection. Additionally, the inverter IVT is connected to resistor R. L and resistor R S The connection point between them. In this construction, resistor R S One end (with in resistor R) S and resistor R L The opposite end of the connection point is grounded, and a reverse bias voltage (e.g., several tens of V) is applied to the avalanche photodiode PD1. When a photon is incident on the avalanche photodiode PD1 and avalanche multiplication occurs, as... Figure 6A As shown by curve CL1, a voltage drop occurs in the avalanche photodiode PD1. On the other hand, with this voltage drop, the voltage across resistor R... L and resistor R S The voltage at the connection point between them, that is, the voltage V applied to the input terminal of the inverter IVT. IVTIt also decreased ( Figure 6A (Curve CL2).

[0112] Here, when the voltage drop of the avalanche photodiode PD1 due to avalanche multiplication is Vd, the resistor R... L The resistance value is RQ1, and RQ2 represents the resistance R. S When the resistance value is , the voltage V IVT It is expressed by the following formula.

[0113] V IVT = Vd × {1 / (1 + RQ1 / RQ2)}

[0114] That is, the voltage V applied to the input terminal of the inverter IVT is determined by the ratio of resistor values ​​RQ1 and RQ2, RQ1 / RQ2. IVT It has a lower voltage drop Vd than the avalanche photodiode PD1. Specifically, the voltage V... IVT The voltage drop decreases as the ratio of RQ1 / RQ2 increases. For example, the voltage applied to the avalanche photodiode PD1 typically reaches tens of V, so the voltage drop Vd during avalanche amplification may exceed the withstand voltage of the inverter IVT. However, by appropriately adjusting the resistor R... L The resistance value RQ1 and resistor R S The ratio between the resistance values ​​RQ2 can make the voltage V IVT It has a lower withstand voltage than the inverter IVT and can protect the inverter IVT.

[0115] However, in actual circuits, such as Figure 6B As shown, a cathode parasitic capacitance C01 is generated at the cathode terminal of the avalanche photodiode PD1, and an input parasitic capacitance C02 is generated at the input terminal of the inverter IVT. Here, when the resistor R is increased to increase the ratio RQ1 / RQ2... L When the resistance value is RQ1, the time constant determined by the resistance value RQ1, the cathode parasitic capacitance C01, and the input parasitic capacitance C02 increases. Therefore, the recharge time becomes longer, and the dead time also becomes longer.

[0116] On the other hand, in the first embodiment of the present invention, in Figures 5B to 5E During the series of operations shown, including avalanche multiplication, quenching, redistribution, and recharging, the cathode potential VK1 of SPAD 210 decreases by ΔVK1, and the potential VK2 at the other end of the shielding resistor section 211 (the end opposite to the end connected to SPAD 210) decreases by ΔVK2. Here, when the capacitance (value) of parasitic capacitance C1 is CC1 and the capacitance (value) of parasitic capacitance C2 is CC2, ΔVK2 is expressed by the following formula.

[0117] ΔVK2 = ΔVK1 × {1 / (1 + CC2 / CC1)}

[0118] That is, due to the capacitance ratio CC2 / CC1, the voltage ΔVK2 generated at the other end of the shielding resistor 211 during a series of operations is lower than the voltage ΔVK1 generated between the SPADs 210. The voltage ΔVK2 at the other end of the shielding resistor 211 is the input voltage of the readout circuit 230, and is lower than the voltage ΔVK1 generated between the SPADs 210. This allows the readout circuit 230 to be protected. In other words, it can be said that the readout circuit 230 is protected by the ratio CC2 / CC1 of the capacitance (value) CC2 of the parasitic capacitor C2 and the capacitance (value) CC1 of the parasitic capacitor C1.

[0119] In addition, as referenced Figure 5B As mentioned above, the resistance value Rsh of the shielding resistor 211 is greater than the resistance value R between the cathode and anode of the SPAD 210. ON Therefore, during the avalanche multiplication of the SPAD 210, only a slight current I2 flows from the parasitic capacitance C2, and the main current I1 flows from the parasitic capacitance C1. Furthermore, due to the following relationship...

[0120] The capacitance (value) of parasitic capacitance C1 is less than the capacitance (value) of parasitic capacitance C2, and

[0121] Resistance value R ON < Resistance value Rsh,

[0122] Therefore, based on the capacitance (value) CC1 and the resistance value R... ON The time constant determined is smaller than that determined by the capacitance (value) CC2 and the resistance value Rsh. Because current I1 is supplied to SPAD 210 from the parasitic capacitance C1 through a circuit with a smaller time constant, the time period during which avalanche multiplication occurs can be shortened. Therefore, the time from when a photon is incident on SPAD 210 until it can be detected again (the dead time in a generalized sense) can be shortened.

[0123] Furthermore, during avalanche amplification, current I1 mainly flows out from parasitic capacitance C1, and only a slight current I2 flows out from parasitic capacitance C2, thus reducing the outflowing current. Therefore, compared to the case where current I2 also flows out from parasitic capacitance C2, power consumption can be reduced.

[0124] Furthermore, quenching occurs, and charge redistribution occurs from parasitic capacitance C2 to parasitic capacitance C1. Only after this redistribution is complete does the current I3 flowing through the quenching resistor 212 contribute to recharging. Therefore, the time required for recharging via current I3 is shortened, and the dead time is reduced. Moreover, since charge is redistributed from parasitic capacitance C2 to parasitic capacitance C1, the current I3 required for recharging is reduced. That is, power consumption is reduced.

[0125] As described above, in the pixel 200 of the optical device according to this embodiment, the input voltage of the readout circuit 230 can be reduced to below the withstand voltage of the readout circuit 230 by using the ratio CC2 / CC1 of the capacitance (value) CC2 of parasitic capacitance C2 to the capacitance (value) CC1 of parasitic capacitance C1. Furthermore, since a resistance value R between the cathode of SPAD 210 and the input terminal of the readout circuit 230 is provided, which is greater than the resistance value between the cathode and anode of SPAD 210... ON The shielding resistor 211, with its large resistance value Rsh, exhibits effects such as reduced dead time and power consumption. Furthermore, since the resistance value Rq of the quenching resistor 212 is greater than the resistance value Rsh of the shielding resistor 211, recharging begins with current I3 after the charge redistribution from parasitic capacitance C2 to parasitic capacitance C1 is complete. That is, the power required for recharging can be reduced, and power consumption can be further reduced.

[0126] [Specific example of shielding resistor section]

[0127] Next, we will refer to Figure 7A and Figure 7B A specific example illustrating the shielding resistor section 211 is shown. (Note: The last part, "omitted," is likely an error and can be omitted.) Figure 4B The digital counter circuit 240 (or TDC circuit) shown includes word line WL and bit line BL.

[0128] Figure 7A This is a block diagram illustrating a specific example 1 of the shielding resistor section 211 of the pixel 200 of the optical device 100 according to the first embodiment. As shown, the shielding resistor section 211 can be implemented by a resistor element 211A. The resistor element 211A can be formed, for example, by a high-resistance polysilicon or a metal resistor. The high-resistance polysilicon or metal resistor is formed during wiring formation using known semiconductor manufacturing processes such as thin film formation, photolithography, or etching.

[0129] In addition, such as Figure 7BAs shown, in specific example 2, the shielding resistor section 211 may include, for example, a P-channel metal-oxide-semiconductor (MOS) transistor 211B. In this case, a bias voltage generating unit 250 is provided to apply a bias voltage to the gate of the MOS transistor 211B. For example, the bias voltage is generated by the row scan circuit 320 ( Figure 4A The voltage applied from the bias voltage generation unit 250 to the gate of the MOS transistor 211B is adjusted by the instruction signal, thereby adjusting the resistance value between the source and drain of the MOS transistor 211B, i.e., the resistance value Rsh of the shielding resistor 211. Through this adjustment, the resistance value R of the SPAD 210 can be appropriately adjusted. ON The R value between the shielding resistor 211 and the shielding resistor 211 is R ON The relationship between <Rsh>. Therefore, dead time can be reliably shortened and power consumption reduced.

[0130] Note that, although in Figure 7B The diagram shows a single MOS transistor 211B, but the overall resistance value Rsh of the shielding resistor section 211 can be adjusted by arranging multiple MOS transistors 211B in series and applying a gate voltage to each of them. Furthermore, Figure 7A and Figure 7B Pixel 200 in the first embodiment is shown, but this specific example 1 can also be applied to pixel 200B in the third embodiment.

[0131] Furthermore, during the avalanche multiplication of SPAD 210, the resistance between the source and drain of MOS transistor 211B is increased to suppress the outflow of current I2 from parasitic capacitance C2 and reduce power consumption. On the other hand, as quenching occurs, the resistance between the source and drain of MOS transistor 211B is decreased, thereby promoting charge redistribution and shortening the dead time.

[0132] [Specific examples of quenching resistance]

[0133] Next, a specific example of the quenching resistance section 212 will be explained. Figure 8A This is a block diagram illustrating a specific example 1 of the quenching resistance section of the pixel 200 of the optical device according to the first embodiment.

[0134] like Figure 8A As shown, the quenching resistor section 212 can have a constant current source 212A. Since the constant current source 212A has a large internal resistance, it is easy to satisfy the relationship Rsh < Rq between the resistance value Rq of the quenching resistor section 212 and the resistance value Rsh of the shielding resistor section 211. Therefore, during avalanche amplification or during charge redistribution between parasitic capacitance C2 and parasitic capacitance C1, the current from the quenching resistor section 212 can be reduced (corresponding to...). Figure 5BThis reduces the contribution of the current I3 (equal to the current I3) and also reduces power consumption. Furthermore, the current during recharging (corresponding to current I3) can be maintained at a predetermined value by a constant current source 212A. Therefore, by appropriately adjusting the recharging current, recharging can be performed efficiently.

[0135] Next, a specific example 2 of the quenching resistance section 212 will be described. In pixel 200C of specific example 2, as Figure 8B As shown, an active recharge circuit 212B is provided to replace the quenching resistor section 212 of the pixel 200 in the first embodiment. However, the active recharge circuit 212B can also be applied to pixels 200A and 200B.

[0136] The active recharge circuit 212B includes a switch 212S and a control unit 212C that controls the switch 212S to be on / off (ON / OFF). Under the control of the control unit 212C, the switch 212S electrically connects and disconnects a predetermined power supply (VDDH) from the shielding resistor 211. One end of the control unit 212C is connected to the output terminal of the readout circuit 230. Therefore, the control unit 212C detects the output voltage of the readout circuit 230. Specifically, when a drop in the pulsed output voltage from the output circuit 230 is detected, the control unit 212C outputs an on signal to the switch 212S to turn on the switch 212S after a predetermined delay time. Furthermore, after a predetermined time period has elapsed after outputting the on signal, the control unit 212C outputs an off signal to the switch 212S to turn off the switch 212S.

[0137] The active recharge circuit 212B constructed as described above operates as follows. Figure 8C As shown, when avalanche amplification occurs at time t0 due to photon incident, the cathode potential VK1 decreases. When quenching occurs and charge redistribution begins from parasitic capacitance C2 to parasitic capacitance C1, the cathode potential VK1 rises again. That is, the cathode potential VK1 changes in a negative pulse shape. On the other hand, during avalanche amplification (time period t0~t1) and redistribution (time period t1~t2), the potential VK2 at the connection point between the shielding resistor 211 and the active recharge circuit 212B decreases. This potential change is detected by the readout circuit 230. Here, when the potential VK2 drops below a predetermined first threshold potential, the readout circuit 230 outputs an output voltage, and when the potential VK2 drops below a predetermined second threshold potential V... th When the voltage drops below a certain threshold, the readout circuit 230 stops outputting the voltage. That is, the readout circuit 230 stops outputting the voltage when the potential VK2 changes from the first threshold potential to the second threshold potential V. th During the time period t, a pulsed output voltage is output. When a drop in the output voltage of the readout circuit 230 is detected (time t),... DThe control unit 212C, after a predetermined delay time (time period t), D After t3, an on signal is output to switch 212S. Therefore, switch 212S is turned on (time t3), and current is supplied to SPAD 210 from a predetermined power supply through shielding resistor 211.

[0138] In the active recharge circuit 212B, as described above, the switch 212S is turned off until the potential VK2 becomes lower than the second threshold potential V. th (Until the pulsed output signal from the readout circuit 230 decreases). Therefore, during the time period from the moment the photon is incident until the pulsed output signal from the readout circuit 230 decreases, the supply of current from the power supply to the shielding resistor 211 is stopped (corresponding to...). Figure 5B The current I3 is equal to the current. Therefore, during avalanche amplification, current flows from parasitic capacitance C1, and during charge redistribution, current flows from parasitic capacitance C2 to parasitic capacitance C1. Since switch 212S is open, no current flows through shielding resistor 211, thus reliably reducing power consumption.

[0139] Furthermore, when a drop in the pulsed output signal from the readout circuit 230 is detected and a predetermined delay time has elapsed, switch 212S is turned on (time t3). Therefore, current is supplied from the power supply to the shielding resistor 211, promoting recharging. Thus, the dead time can be shortened. Here, if the timing of turning on switch 212S coincides with the time point from the end of charge redistribution from parasitic capacitor C2 to parasitic capacitor C1, the dead time can be shortened more appropriately. Note that a constant current source can be used instead of a power supply. Therefore, after switch 212S is turned on, the current value of the flowing current can be appropriately adjusted, thus allowing recharging to end in a short time.

[0140] Note that at time t3, when switch 212S is turned on and current is supplied from the power supply to shielding resistor 211, potential VK2 quickly returns to the potential before photon incidence, and simultaneously... Figure 8C As shown, the cathode potential VK1 of SPAD 210 recovers to the potential before photon incidence with a delay compared to the potential VK2. This is because the resistance value of the shielding resistor 211 increases the time constant of the potential VK1.

[0141] [Specific example of a readout circuit]

[0142] Next, a specific example of the readout circuit 230 will be described. Figure 9A This is a block diagram illustrating a specific example 1 of the readout circuit of the pixel 200 of the optical device according to the first embodiment.

[0143] like Figure 9AAs shown, the readout circuit 230 may include an inverter 230A. The input terminal of the inverter 230A is connected to the connection point between the shielding resistor section 211 and the quenching resistor section 212. Furthermore, the inverter 230A is powered through predetermined wiring.

[0144] like Figure 9B As shown, the inverter 230A operates as follows: when the potential VK2 at the connection point between the shielding resistor section 211 and the quenching resistor section 212 becomes lower than a predetermined threshold V... th When the voltage Vout becomes high, and when the potential VK2 exceeds the predetermined threshold V... th When this occurs, the output voltage Vout becomes low. Therefore, even when the potential VK2 changes in a V-shape, this change can be output as a rectangular wave pulse. By using an inverter 230A as a readout circuit 230, the change in potential VK2 at the connection point between the shielding resistor section 211 and the quenching resistor section 212 can be read.

[0145] Furthermore, in a specific example 2 of the readout circuit, such as Figure 9C As shown, the readout circuit 230 includes a P-channel MOS transistor 230B and a current source 230C. Therefore, during a time period when the potential VK2 is equal to or less than a predetermined voltage, the MOS transistor 230B is turned on and outputs a predetermined pulse-shaped output voltage Vout corresponding to that time period. Therefore, with... Figure 9A Like the inverter 230A, it can read the change in potential VK2.

[0146] (Second Implementation Plan)

[0147] Next, we will refer to Figure 10A and Figure 7B An optical device according to a second embodiment of the present invention will be described. Figure 10A This is a block diagram illustrating a schematic construction example of pixel 200A of the optical device according to the second embodiment. Although in Figure 10A The digital counter circuit 240 (or TDC circuit), word line WL, and bit line BL are omitted, but apart from the shown structure, pixel 200A is similar to pixel 200 of the optical device 100 according to the first embodiment. Furthermore, the optical device according to this embodiment may have the same structure as the optical device 100 according to the first embodiment, and similar to the optical device 100, it can be used in electronic device 1 (…). Figure 1 Replace the optical device 10 in the middle.

[0148] Reference Figure 10AOne end of the shielding resistor 211 is connected to the anode of the SPAD 210A, and one end of the quenching resistor 212 is connected to the other end of the shielding resistor 211. That is, in pixel 200A of this embodiment, unlike pixel 200 of the first embodiment in which the shielding resistor 211 and the quenching resistor 212 are connected in series on the cathode side of the SPAD 210A, the shielding resistor 211 and the quenching resistor 212 are connected in series on the anode side of the SPAD 210A. On the other hand, pixel 200A is similar to pixel 200 in that the resistance value R of the SPAD 210A is... ON The resistance value Rsh of the shielding resistor 211 satisfies R ON The resistance values ​​of the shielding resistor 211 and the quenching resistor 212 satisfy the relationship Rsh < Rq.

[0149] As shown in the figure, a parasitic capacitance C1 is generated between the anode of SPAD 210A and the shielding resistor 211. The parasitic capacitance C1 corresponds to a combined capacitance including the capacitance of SPAD 210A and the capacitance generated by the wiring connecting SPAD 210A and the shielding resistor 211. Furthermore, a parasitic capacitance C2 is generated between the shielding resistor 211 and the quenching resistor 212. The parasitic capacitance C2 corresponds to a combined capacitance including the capacitance generated by the shielding resistor 211, the capacitance generated by the quenching resistor 212, the capacitance generated by the wiring connecting the shielding resistor 211 and the quenching resistor 212, and the capacitance of components included in the readout circuit 230, such as an inverter. Furthermore, the input terminal of the readout circuit 230 is connected to the connection point between the shielding resistor 211 and the quenching resistor 212.

[0150] The cathode of SPAD 210A is connected to the high-potential terminal of a predetermined power supply, and the other end of the quenching resistor 212 (the end opposite to the connection point between the quenching resistor 212 and the shielding resistor 211) is connected to the low-potential terminal of the predetermined power supply. During operation, a predetermined reverse bias voltage (potential VDDH - potential VDDL) corresponding to the Geiger region is applied between SPAD 210A via the predetermined power supply.

[0151] The operation of SPAD 210A in this implementation scheme will be described next. Figure 10B This is a schematic diagram showing the change between the anode potential VA1 of SPAD 210A and the potential VA2 at the connection point (input terminal of readout circuit 230) between shielding resistor 211 and quenching resistor 212 when a photon is incident on SPAD 210A of pixel 200A.

[0152] When a predetermined voltage corresponding to the Geiger region is applied to SPAD 210A from a predetermined power source, when a photon is incident on SPAD 210A (time t0), avalanche multiplication occurs in SPAD 210A, and a large current flows from the cathode to the anode. Therefore, as Figure 10B As shown, during the time period t0 to t1, the anode potential VA1 of SPAD 210A (relative to potential VDDL) increases.

[0153] At this time, because the resistance value Rsh of the shielding resistor 211 is greater than the resistance value R of the SPAD 210A... ON Therefore, the current I1 mainly flows from the parasitic capacitance C1 to the SPAD 210A. Since only a slight current I2 flows out from the parasitic capacitance C2, the current flowing to the SPAD 210A can be reduced during avalanche amplification. Therefore, power consumption can be reduced.

[0154] Furthermore, since the capacitance (value) CC1 of parasitic capacitance C1 is smaller than the capacitance (value) CC2 of parasitic capacitance C2, and the resistance R between the cathode and anode of SPAD210A is... ON The resistance value Rsh is less than that of the shielding resistor 211, therefore the capacitance (value) CC1 and the resistance value R... ON The time constant determined is smaller than that determined by the capacitance (value) CC2 and the resistance value Rsh. Since the current I1 from the parasitic capacitance C1 is supplied to the SPAD 210A through a circuit with a smaller time constant, the time period during which avalanche multiplication occurs can be shortened. Therefore, the time from when a photon is incident on the SPAD 210A until the photon can be detected again (the dead time in a generalized sense) can be shortened.

[0155] Furthermore, as the anode potential VA1 of SPAD 210A increases during avalanche amplification, the potential VA2 at the connection point between the shielding resistor section 211 and the quenching resistor section 212 also increases. Here, when ΔVA1 represents the increase of potential VA1, ΔVA2 represents the increase of potential VA2, CC1 represents the capacitance (value) of parasitic capacitance C1, and CC2 represents the capacitance (value) of parasitic capacitance C2, it is expressed as follows:

[0156] ΔVA2 = ΔVA1 × {1 / (1 + CC2 / CC1)}

[0157] That is, the voltage (ΔVA2) applied to the input terminal of the readout circuit 230 is lower than ΔVA1. Therefore, the input voltage (ΔVA2) can be kept below the withstand voltage of the readout circuit 230, and the readout circuit 230 can be protected.

[0158] When the voltage (absolute value) applied to the SPAD 210A becomes less than the breakdown voltage (absolute value) as the anode potential VA1 increases, quenching occurs (time t1). Quenching occurs, and charge redistribution starts between the parasitic capacitor C2 and the parasitic capacitor C1 (time t1). That is, the charge remaining in the parasitic capacitor C2 moves to the parasitic capacitor C1 through the shielding resistor portion 211. Here, since the resistance value Rq of the quenching resistor portion 212 is greater than the resistance value Rsh of the shielding resistor portion 211, the current I3 flowing through the quenching resistor portion 212 only slightly contributes to the charge redistribution. Therefore, the charge redistribution mainly occurs between the parasitic capacitor C1 and the parasitic capacitor C2. When the voltages between the parasitic capacitor C1 and the parasitic capacitor C2 become equal, the redistribution ends (time t2).

[0159] When the redistribution ends, recharging starts. That is, when the charge redistribution ends, no current flows out from the parasitic capacitor C2, so the SPAD 210A is recharged by the current I3 flowing through the quenching resistor portion 212. When the recharging ends (time t3), the SPAD 210A becomes capable of detecting photons again.

[0160] As described above, with the pixel 200A of the optical device according to the second embodiment, even when the shielding resistor portion 211 and the quenching resistor portion 212 are arranged on the anode side of the SPAD 210A, the resistance value R ON between the cathode and the anode of the SPAD 210A and the resistance value Rsh of the shielding resistor portion 211 also satisfy the relationship of R ON <Rsh, the resistance value Rsh of the shielding resistor portion 211 and the resistance value Rq of the quenching resistor portion 212 also satisfy the relationship of Rsh < Rq, and in addition, the capacitance (value) CC1 of the parasitic capacitor C1 and the capacitance (value) CC2 of the parasitic capacitor C2 satisfy the relationship of CC1 < CC2. Therefore, it exhibits an effect similar to that of the pixel 200 of the optical device according to the first embodiment.

[0161] In addition, as Figure 10C shown, in the pixel 200A of the optical device according to the second embodiment, the shielding resistor portion 211 may include, for example, an N-channel MOS transistor 211C. In this case, a bias voltage generation unit 250 for applying a bias voltage to the gate of the MOS transistor 211C is provided. Even when the MOS transistor 211C is used as the shielding resistor portion 211 in the pixel 200A, it exhibits an effect similar to the case of using the P-channel MOS transistor 211B ( Figure 7B ) in the pixel 200 of the optical device according to the first embodiment. In addition, also in this case, multiple MOS transistors 211C can be used.

[0162] Note, refer to Figures 8A to 8C Specific examples and references for the quenching resistance section are explained. Figures 9A to 9C The specific example of the readout circuit described can also be appropriately applied to the second implementation scheme.

[0163] (Third Implementation Plan)

[0164] Next, we will refer to Figure 11 An optical device according to a third embodiment of the present invention is described. As shown in the figure, pixel 200 ( ) is compared with the optical device according to the first embodiment. Figure 4B Similarly, in the pixel 200B of the optical device according to this embodiment, a SPAD 210, a shielding resistor 211, a quenching resistor 212, and a readout circuit 230 are arranged. The pixel 200B is similar to the pixel 200 in that the resistance value R of the SPAD 210 is... ON There is an R value between the shielding resistor 211 and the shielding resistor 211. ON The relationship between Rsh and Rq exists, and there is a relationship between Rsh < Rq between the resistance value Rsh of the shielding resistor 211 and the resistance value Rq of the quenching resistor 212. Note that although in Figure 11 The middle part is omitted Figure 4B The digital counter circuit 240 (or TDC circuit), word line WL, and bit line BL shown are included, but pixel 200B can be constructed similarly to pixel 200 and pixel 200A described above. Furthermore, the optical device according to this embodiment can have the same construction as the optical device 100 according to the first embodiment, and similar to the optical device 100, it can be used in electronic device 1 (… Figure 1 Replace the optical device 10 in the middle.

[0165] On the other hand, the pixel 200B of this embodiment is provided with variable capacitor elements VC1 and VC2. Specifically, the variable capacitor element VC1 is provided such that one end is grounded and the other end is connected to the cathode of SPAD 210. In addition, the variable capacitor element VC2 is provided such that one end is grounded and the other end is connected to the wiring connecting the shielding resistor 211 and the quenching resistor 212. That is, the variable capacitor element VC1 is provided to replace the parasitic capacitance C1 of the pixel 200 of the optical device according to the first embodiment, and the variable capacitor element VC2 is provided to replace the parasitic capacitance C2.

[0166] Each of the variable capacitor elements VC1 and VC2 can be formed, for example, by a MOS transistor. In this case, a bias voltage generating unit is provided to apply a gate voltage to the gate of the MOS transistor. For example, the capacitance of the variable capacitor elements VC1 and VC2 can be adjusted by adjusting the gate voltage applied from the bias voltage generating unit to the gate electrode of the MOS transistor under the control of the row scan circuit 320.

[0167] Furthermore, each of the variable capacitor elements VC1 and VC2 can be formed from multiple MOS transistors. In this case, a bias voltage generating unit is provided to apply a gate voltage to the gate of each MOS transistor. Using this configuration, for example, the capacitance of the variable capacitor elements VC1 and VC2 can be adjusted by adjusting the number of MOS transistors to which the gate voltage is applied under the control of the row scan circuit 320. Note that the variable capacitor elements VC1 and VC2 can be formed from complementary metal-oxide-semiconductor (CMOS) transistors.

[0168] Similarly, in pixel 200B of the optical device according to this embodiment, as with pixel 200 of the optical device according to the first embodiment, the resistance value R of SPAD 210 is... ON There is an R value between the shielding resistor 211 and the shielding resistor 211. ON The relationship between Rsh and Rq is such that the resistance value of shielding resistor 211 is Rsh < Rq. Therefore, if the capacitance of variable capacitor element VC1 and variable capacitor element VC2 is adjusted to increase the capacitance of the latter, pixel 200B will exhibit the same effect as pixel 200.

[0169] Furthermore, in the pixel 200B of the optical device according to this embodiment, variable capacitor elements VC1 and VC2 are provided, and their respective capacitances can be adjusted. Therefore, the amount of charge accumulated in the variable capacitor elements VC1 and VC2 can also be adjusted. Thus, the amount of current flowing from the variable capacitor element VC1 to the SPAD 210 during avalanche multiplication and the amount of charge moving from the variable capacitor element VC2 to the variable capacitor element VC1 during charge redistribution after quenching can be adjusted. Therefore, dead time can be reliably shortened and power consumption reduced.

[0170] Note, refer to Figure 7A and Figure 7B Specific examples and references for the shielding resistor section are provided. Figures 8A to 8C Specific examples and references for the quenching resistance section are provided. Figures 9A to 9C The specific example of the readout circuit described can also be appropriately applied to the third implementation scheme.

[0171] (Fourth Implementation Plan)

[0172] Next, we will refer to Figures 12 to 16 An optical device according to a fourth embodiment of the present invention will be described. Figure 12 This is a schematic diagram illustrating an example of a stacked structure of an optical device according to a fourth embodiment. Figure 12As shown, the optical device 100 includes a first substrate 71 and a second substrate 72 bonded to the first substrate 71.

[0173] The first substrate 71 includes, for example, pixel array units PAR in which pixels 200 are arranged in a matrix (see reference). Figure 4A ).like Figure 13 As shown, a SPAD 210, a wiring layer 120, and a connection pad 125 are formed for each pixel on the first substrate 71. As described later, the wiring layer 120 includes a shielding resistor 211. One end of the shielding resistor 211 is connected to the cathode of the SPAD 210. The other end of the shielding resistor 211 is connected to the connection pad 125 via a predetermined wiring. Before the first substrate 71 and the second substrate 72 are bonded, the connection pad 125 is bonded to one surface of the first substrate 71. Figure 12 The upper surface (in the vertical direction) is exposed. For example, the connection pad 125 is formed of copper (Cu).

[0174] Note that SPAD 210 is disposed on the lower surface side of the first substrate 71. That is, Figure 12 The lower surface of the first substrate 71 is the light incident surface, and photons are incident on the SPAD 210 from the lower side in the figure.

[0175] like Figure 13 As shown, the second substrate 72 includes a readout circuit 230, a quench resistor section 212, and a wiring layer 130 for each pixel. The readout circuit 230 and the quench resistor section 212 are connected to the connection pad 135 via the wiring layer 130. Before the first substrate 71 and the second substrate 72 are bonded, the connection pad 135 is connected to one surface of the second substrate 72. Figure 12 The lower surface of the substrate is exposed. For example, the connection pad 135 is formed of Cu. Note that a substrate 72 can be provided on the second substrate 72. Figure 4B The digital counter circuit 240 (or TDC circuit), column circuit 310, row scanning circuit 320, and interface circuit 330 shown are described. Figure 4A ).

[0176] Here, as Figure 13As shown on the right, the number of wiring layers 130 formed in the second substrate 72 tends to be greater than the number of wiring layers 120 formed in the first substrate 71. This is because, since the readout circuit 230, digital counter circuit 240 (or TDC circuit), word line WL, and bit line BL are formed in the second substrate 72, the number of circuit elements and wiring formed in the second substrate 72 is greater than the number of circuit elements and wiring formed in the first substrate 71. Therefore, the parasitic capacitance C2 generated between the connection pad 135 and the quenching resistor 212 in the second substrate 72 is greater than the parasitic capacitance C1 on the cathode side of the SPAD 210 in the first substrate 71. Furthermore, the bonding portion 260 (i.e., the bonding between the connection pad 125 and the connection pad 135) also generates parasitic capacitance, but since the bonding with the parasitic capacitance C1 is blocked by the shielding resistor 211, this parasitic capacitance is included in the parasitic capacitance C2. Therefore, the ratio of the capacitance (value) CC1 of parasitic capacitor C1 to the capacitance (value) CC2 of parasitic capacitor C2, CC2 / CC1, increases, and the input voltage of the readout circuit 230 can be further reduced.

[0177] Reference Figures 12 to 14 A bonding portion 260 is formed to join the connection pads 125 of the first substrate 71 and the connection pads 135 of the second substrate 72 (so-called Cu-Cu bonding). Therefore, the SPAD 210 formed in the first substrate 71 and the readout circuit 230 formed in the second substrate 72 are electrically connected. In addition, the first substrate 71 and the second substrate 72 are mechanically bonded by the bonding portion 260.

[0178] However, the first substrate 71 and the second substrate 72 can also be electrically connected and mechanically joined by using metal bumps to join the connecting pads 125 and 135 (so-called bump joining). Furthermore, to join the first substrate 71 and the second substrate 72, for example, a so-called direct joining can be used, in which the joining surfaces of the substrates are planarized and the substrates are joined to each other by inter-electro-force.

[0179] Furthermore, for example, the first substrate 71 and the second substrate 72 can be electrically connected via a junction such as a through-silicon via (TSV) penetrating the semiconductor substrate. For connections using TSVs, for example, a so-called dual TSV system in which the TSV disposed on the first substrate 71 and the TSV disposed from the first substrate 71 to the second substrate 72 are connected on the outer surface of the chip; and a so-called shared TSV system in which the two TSVs are connected via the TSV penetrating from the first substrate 71 to the second substrate 72, etc.

[0180] Next, the specific structure of the optical device according to the fourth embodiment will be described. Figure 14This is a vertical cross-sectional view showing an example of the cross-sectional structure of the surface perpendicular to the light incident surface of the optical device according to the fourth embodiment. Figure 15 It shows Figure 14 A horizontal cross-sectional view of an example of the cross-sectional structure of surface AA. Note that... Figure 14 The focus is on the cross-sectional structure of SPAD 210.

[0181] like Figure 14 As shown, the SPAD 210 of pixel 200 is, for example, disposed on the semiconductor substrate 101 constituting the first substrate 71. In the semiconductor substrate 101, for example, when light is incident from the light incident surface (… Figure 12 When viewed from the lower surface of the component, the component isolator 110 divides it into multiple component regions (for example, refer to the lower surface of the component). Figure 15 SPAD 210 is disposed in each component region defined by component isolation section 110. Note that component isolation section 110 may include anode electrode 122 and insulating film 109 in the first trench, which will be described later.

[0182] Each SPAD 210 includes a photoelectric conversion region 102, a P-type semiconductor region 104, an N-type semiconductor region 103, a P+ type semiconductor region 105, an N+ type semiconductor region 106, a cathode contact 107, and an anode contact 108.

[0183] The photoelectric conversion region 102 is, for example, an N-type trap region or a region containing a low concentration of donors, and performs photoelectric conversion on the incident light to generate electron-hole pairs (hereinafter referred to as charges).

[0184] The P-type semiconductor region 104 is, for example, a region containing a P-type acceptor, and as... Figure 14 and Figure 15 As shown, it is disposed in the region surrounding the photoelectric conversion region 102. The P-type semiconductor region 104 forms an electric field for guiding the charge generated in the photoelectric conversion region 102 to the N-type semiconductor region 103 by applying a reverse bias voltage to the anode contact 108, which will be described later.

[0185] The N-type semiconductor region 103 is, for example, a region containing donors with a higher concentration than the photoelectric conversion region 102. Figure 14 and Figure 15 As shown, an N-type semiconductor region 103 is arranged in the central portion of the photoelectric conversion region 102, receiving the charge generated in the photoelectric conversion region 102 and guiding the charge to the P+ type semiconductor region 105. Note that the N-type semiconductor region 103 is not a necessary component and can be omitted.

[0186] P+ type semiconductor region 105 is, for example, a region containing acceptors with a higher concentration than P- type semiconductor region 104, and a portion thereof is in contact with P- type semiconductor region 104. Similarly, N+ type semiconductor region 106 is, for example, a region containing donors with a higher concentration than N- type semiconductor region 103, and is in contact with P+ type semiconductor region 105.

[0187] P+ type semiconductor region 105 and N+ type semiconductor region 106 form a PN junction and are used as an amplification region to accelerate the incoming charge to generate avalanche current.

[0188] The cathode contact 107 is, for example, a region containing donors with a higher concentration than the N+ semiconductor region 106, and is located in the region in contact with the N+ semiconductor region 106.

[0189] The anode contact 108 is, for example, a region containing acceptors with a higher concentration than the P+ type semiconductor region 105. The anode contact 108 is disposed in a region that contacts the outer periphery of the P-type semiconductor region 104. The width of the anode contact 108 can be, for example, about 40 nm (nanometers). Therefore, by making the anode contact 108 contact the entire outer periphery of the P-type semiconductor region 104, a uniform electric field can be formed in the photoelectric conversion region 102.

[0190] In addition, such as Figure 14 and Figure 15 As shown, the anode contact 108 is disposed on the bottom surface of a trench (hereinafter referred to as the first trench) arranged in a matrix along the element isolation portion 110 on the front surface (lower surface in the figure) side of the semiconductor substrate 101. With this structure, as described later, the formation position of the anode contact 108 is offset in the height direction relative to the formation positions of the cathode contact 107 and the N+ type semiconductor region 106.

[0191] An insulating film 109 covers the front surface (lower surface in the figure) side of the semiconductor substrate 101. The thickness of the insulating film 109 in the first trench (thickness in the substrate width direction) depends on the voltage value of the reverse bias voltage applied between the anode and cathode, but can be, for example, about 150 nm.

[0192] The insulating film 109 is provided with openings for exposing the cathode contact 107 and the anode contact 108 on the surface of the semiconductor substrate 101, and a cathode electrode 121 in contact with the cathode contact 107 and an anode electrode 122 in contact with the anode contact 108 are provided in each opening.

[0193] The element isolation portion 110 defining each SPAD 210 is disposed in a trench (hereinafter referred to as the second trench) extending from the front surface to the rear surface of the semiconductor substrate 101. The second trench is connected to the first trench on the front surface side of the semiconductor substrate 101. The inner diameter of the second trench is narrower than that of the first trench, and an anode contact 108 is formed in the stepped portion formed through the second trench.

[0194] Each component isolation portion 110 includes an insulating film 112 covering the inner surface of the second trench and a light-shielding film 111 filling the interior of the second trench. The thickness of the insulating film 112 (thickness in the substrate width direction) depends on the voltage value of the reverse bias voltage applied between the anode and cathode, but can be, for example, about 10 nm to 20 nm. Furthermore, the thickness of the light-shielding film 111 (thickness in the substrate width direction) depends on the material used in the light-shielding film 111, but can be, for example, about 150 nm.

[0195] Here, by using a conductive material with light-shielding properties for both the light-shielding film 111 and the anode electrode 122, the light-shielding film 111 and the anode electrode 122 can be formed in the same process. Furthermore, by using the same conductive material for the cathode electrode 121 as for the light-shielding film 111 and the anode electrode 122, the light-shielding film 111, the anode electrode 122, and the cathode electrode 121 can be formed in the same process.

[0196] As a conductive material with this light-shielding property, tungsten (W) can be used, for example. However, the material is not limited to tungsten (W) and can be varied as long as it is a conductive material with properties such as aluminum (Al), aluminum alloys, or copper (Cu) that reflects or absorbs visible light or the light required by the various components.

[0197] However, the light-shielding film 111 in the second trench is not limited to a conductive material, and for example, a high refractive index material having a higher refractive index than the semiconductor substrate 101 or a low refractive index material having a lower refractive index than the semiconductor substrate 101 can be used.

[0198] Furthermore, since the material used for the cathode electrode 121 does not need to be light-shielding, a conductive material such as copper (Cu) can be used instead of a light-shielding conductive material.

[0199] Note that in this embodiment, a so-called front full trench isolation (FFTI) type device isolation portion 110 in which the second trench extends through the semiconductor substrate 101 from the front surface side is exemplified, but it is not limited to this, and a full trench isolation (FTI) type device isolation portion in which the second trench extends through the semiconductor substrate 101 from the rear surface and / or the front surface side, or a deep trench isolation (DTI) type or reverse deep trench isolation (RDTI) type device isolation portion in which the second trench extends from the front surface or rear surface of the semiconductor substrate 101 to the middle is also used.

[0200] In the case of an FTI-type second trench that extends through the semiconductor substrate 101 from the rear surface side, the material of the light-shielding film 111 can be embedded into the second trench from the rear surface side of the semiconductor substrate 101.

[0201] The upper portions of the cathode electrode 121 and the anode electrode 122 protrude from the surface of the insulating film 109 (the lower surface in the figure). For example, the wiring layer 120 is disposed on the surface of the insulating film 109 (the lower surface in the figure).

[0202] The wiring layer 120 includes an interlayer insulating film 123 and wiring 124 disposed within the interlayer insulating film 123. The wiring 124 contacts, for example, a cathode electrode 121 protruding from the surface of the insulating film 109 (the lower surface in the figure). Furthermore, the wiring 124 contacts a bonding pad 125 via a predetermined through-hole or the like. Here, the wiring 124 may include a shielding resistor section 211 (…). Figure 13 Specifically, part or all of the wiring 124 may be formed of high-resistance polysilicon or metal resistors, etc. In this case, the wiring 124 is formed such that the resistance value Rsh of the shielding resistor 211 is greater than the resistance value R of the SPAD 210. ON .

[0203] Note that, although in Figure 14 The details are omitted, but wiring that contacts the anode electrode 122 is also provided in the wiring layer 120. This wiring is connected to a predetermined wiring layer (not shown), and this wiring layer is connected to the optical device 100 (…). Figure 4A The connection pad (not shown) is located in the peripheral edge of the optical device 100. By connecting this connection pad to the low-potential terminal of a predetermined power supply, the anode electrode 122 can be maintained at a negative potential during operation of the optical device 100.

[0204] The wiring layer 130 of the second substrate 72 is bonded to the lower surface of the wiring layer 120. As described above, this bonding is achieved, for example, by a Cu-Cu bond between the connection pad 125 and the connection pad 135. The wiring layer 130 includes an interlayer insulating film 131 and wirings 132 disposed in the interlayer insulating film 131. The wirings 132 are electrically connected to circuit elements 142 formed on the semiconductor substrate 141. The circuit elements 142 include a readout circuit 230. Therefore, the cathode electrode 121 of the semiconductor substrate 101 is connected via wirings 124, connection pads 125, connection pads 135, and wirings 132 to... Figure 13 The readout circuit 230 is shown.

[0205] In addition, wiring 133 is also connected to connection pad 135. Wiring 133 may include a quenching resistor section 212 ( Figure 13 Specifically, part or all of the wiring 133 is formed of high-resistance polysilicon or metal resistors, thereby forming a quenching resistor section 212. In this case, the wiring 133 is formed such that the resistance value Rq of the quenching resistor section 212 is greater than the resistance value Rsh of the shielding resistor section 211. Furthermore, the wiring 133 is connected to a predetermined wiring layer (not shown), and this wiring layer is connected to a connection pad (not shown) provided in the peripheral edge of the optical device 100. This connection pad is connected to the high-potential terminal of the aforementioned power supply. Therefore, during operation of the optical device 100, a (reverse bias) voltage corresponding to the Geiger region can be applied to the quenching resistor section 212, the shielding resistor section 211, and the SPAD 210.

[0206] Furthermore, a pinning layer 113 and a planarization film 114 are provided on the rear surface (upper surface in the figure) of the semiconductor substrate 101. Additionally, a color filter 115 and an on-chip lens 116 for each pixel 200 are provided on the planarization film 114. Note that although a color filter 115 and an on-chip lens 116 are provided in this embodiment, a configuration without a color filter and / or on-chip lens is also possible depending on the intended use and purpose of the optical device 100.

[0207] The pinning layer 113 is, for example, a fixed-charge film comprising a hafnium oxide (HfO2) film or an aluminum oxide (Al2O3) film containing a predetermined concentration of acceptors. The planarization film 114 is, for example, an insulating film formed of an insulating material such as silicon oxide (SiO2) or silicon nitride (SiN), and is used to planarize the surface on which the upper color filter 115 and the on-chip lens 116 are formed.

[0208] In the structure described above, when a (reverse bias) voltage corresponding to the Geiger region is applied between the cathode contact 107 and the anode contact 108, an electric field is formed by the potential difference between the P-type semiconductor region 104 and the N+ type semiconductor region 106 to guide the charge generated in the photoelectric conversion region 102 to the N-type semiconductor region 103. Furthermore, a strong electric field is formed in the PN junction region between the P+ type semiconductor region 105 and the N+ type semiconductor region 106, generating an avalanche current by accelerating the incoming charge. Therefore, the SPAD 210 is allowed to operate as an avalanche photodiode.

[0209] Next, the effect of the optical device according to this embodiment will be explained by comparing it with a comparative example. Figure 16 This is a schematic diagram illustrating the construction of pixels included in the optical device according to the comparative example. (Refer to...) Figure 16 In the pixel 20A of the optical device according to the comparative example, the SPAD 21 is connected to resistors R connected in series with each other via a joint 260. L and resistor R S Similar to the joint 260 in the fourth embodiment of the present invention, the joint 260 is formed by connection pads 125 and 135. Furthermore, the readout circuit 230 is connected to resistor R. L and resistor R S The connection points between them. Here, SPAD 21 and connection pad 125 are formed in the first substrate 710, and connection pad 135 and resistor R are connected. L and resistor R S It is formed in the second substrate 720.

[0210] In the junction 260, for example, two connection pads 135 and 125 are joined by a Cu-Cu joint, and a parasitic capacitance C1b is generated by this joint. Therefore, when a reverse bias voltage corresponding to the Geiger region is applied to the SPAD 21, if a photon is incident on the SPAD 21 and avalanche amplification occurs, current flows from both the parasitic capacitances C1a and C1b to the SPAD 21.

[0211] On the other hand, in the pixel 200 of the optical device according to the fourth embodiment, such as Figure 13 As shown, a shielding resistor 211 is provided between SPAD 210 and the connecting pad 135. The shielding resistor 211 has a resistance value R greater than that of SPAD 210. ON The large resistance value Rsh, therefore, comes from the parasitic capacitance generated by the joint 260 (in Figure 13Among them, the current (including that in parasitic capacitance C2) is obstructed, and the current mainly flows from parasitic capacitance C1 to SPAD 210. Compared with the case where the current flows from both parasitic capacitance C1a and parasitic capacitance C1b to SPAD 21 in the above comparative example, in the case where the current flows from parasitic capacitance C1 to SPAD 210, the amount of current can be less, so that the power consumption can be reduced. In addition, since the time constant determined by the resistance value R of SPAD 210 ON and parasitic capacitance C1 is smaller than the time constant determined by the resistance value Rsh of the shielding resistance portion 211 and parasitic capacitance C2, when the current from parasitic capacitance C2 does not contribute, the period in which avalanche amplification occurs can be shortened.

[0212] In addition, in the optical device according to the fourth embodiment, SPAD 210 and the readout circuit 230 are arranged vertically. Therefore, compared with the case where SPAD 210 and the readout circuit 230 are juxtaposed, the pixel area observed from the light incident direction can be reduced. Therefore, the pixel density can be increased.

[0213] [Variation of the Fourth Embodiment]

[0214] Hereinafter, reference will be made to Figures 17A to 17E to describe the variation of the fourth embodiment. These variations are common to the fourth embodiment in that the first substrate 71 and the second substrate 72 are joined by the joining portion 260, and are different from the fourth embodiment in that a plurality of SPADs 210 are electrically connected to one readout circuit 230.

[0215] [Variation 1]

[0216] Figure 17A is a block diagram showing Variation 1 of the pixel of the optical device according to the fourth embodiment. Referring to Figure 17A , the first substrate 71 is provided with a plurality of connection pads 125. The upper surfaces of the plurality of connection pads 125 are flush with the upper surface of the first substrate 71. In addition, inside the first substrate 71, SPAD 210 and the shielding resistance portion 211 are connected in series to each of the plurality of connection pads 125. Here, as in the embodiments described so far, the resistance value R of SPAD 210 ON and the resistance value Rsh of the shielding resistance portion 211 have the relationship of R ON < Rsh.

[0217] On the other hand, the second substrate 72 is provided with a plurality of connection pads 135. The lower surfaces of the plurality of connection pads 135 are flush with the lower surface of the second substrate 72. Furthermore, the plurality of connection pads 135 are connected in parallel to each other, and the plurality of connection pads 135 connected in parallel are connected to the quenching resistor section 212 and the readout circuit 230. Here, the resistance value Rq of the quenching resistor section 212 and the resistance value Rsh of the shielding resistor section 211 of the first substrate 71 have the relationship Rsh < Rq.

[0218] Furthermore, the plurality of connection pads 135 on the second substrate 72 are Cu-Cu bonded to the corresponding connection pads 125 on the first substrate 71. Thus, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0219] Using this configuration, a readout circuit 230 detects changes in the cathode potential of each SPAD 210 via a shielding resistor 211 and a junction 260 provided for each SPAD 210. In other words, multiple SPADs 210 share a single readout circuit 230. Furthermore, since one readout circuit 230 is formed in one pixel, in this modified example, it can be said that multiple SPADs 210 are provided in one pixel. By providing multiple SPADs 210 for each pixel, photon detection for each pixel can be reliably performed.

[0220] Furthermore, similar to the above implementation schemes (including specific examples and variations), the resistance value R of SPAD 210 is... ON There is an R value between the shielding resistor 211 and the shielding resistor 211. ON The resistance value Rq of the quenching resistor 212 and the resistance value Rsh of the shielding resistor 211 of the first substrate 71 are related by the relationship Rsh < Rq. Therefore, this modified example also exhibits effects such as reduced dead time and reduced power consumption.

[0221] [Variation Example 2]

[0222] Figure 17B This is a block diagram illustrating a modified example 2 of the pixels of the optical device according to the fourth embodiment. (Refer to...) Figure 17B Multiple SPADs 210 are connected in parallel on the first substrate 71, and the multiple SPADs 210 connected in parallel are connected to a shielding resistor section 211. That is, multiple SPADs 210 are connected in parallel to the shielding resistor section 211. In addition, the shielding resistor section 211 is connected to the connection pad 125. The upper surface of the connection pad 125 is flush with the upper surface of the first substrate 71. Here, the resistance value R of each SPAD 210 is... ON The resistance value Rsh of the shielding resistor 211 has R ON<Rsh relationship.

[0223] On the other hand, a connection pad 135 is provided in the second substrate 72. The lower surface of the connection pad 135 is flush with the lower surface of the second substrate 72. Furthermore, the quenching resistor section 212 and the readout circuit 230 are connected to the connection pad 135. The resistance value Rq of the quenching resistor section 212 and the resistance value Rsh of the shielding resistor section 211 of the first substrate 71 have a relationship of Rsh < Rq.

[0224] Furthermore, the connection pad 135 is Cu-Cu bonded to the connection pad 125 of the first substrate 71. Therefore, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0225] Using this configuration, a readout circuit 230 detects changes in the cathode potential of each SPAD 210 via a set of shielding resistors 211 and a junction 260. Modification 2 is similar to Modification 1 in that multiple SPADs 210 share a single readout circuit 230. Furthermore, since one readout circuit 230 is formed in one pixel, in this modification, it can be said that multiple SPADs 210 can be provided in one pixel. By providing multiple SPADs 210 for each pixel, photon detection for each pixel can be reliably performed.

[0226] Furthermore, similar to the above implementation schemes (including specific examples and variations), the resistance value R of each SPAD 210 is... ON There is an R value between the shielding resistor 211 and the shielding resistor 211. ON The resistance value Rq of the quenching resistor 212 and the resistance value Rsh of the shielding resistor 211 of the first substrate 71 are related by the relationship Rsh < Rq. Therefore, this modified example also exhibits effects such as reduced dead time and reduced power consumption.

[0227] [Variation Example 3]

[0228] Figure 17C This is a block diagram illustrating a modified example 3 of the pixels of the optical device according to the fourth embodiment. (Refer to...) Figure 17C In the first substrate 71, multiple pairs of SPADs 210 and shielding resistors 211 connected in series are connected in parallel to the connection pads 125. The connection pads 125 are formed such that their upper surface is flush with the upper surface of the first substrate 71. Here, the resistance value R of the SPAD 210 is... ON The resistance value Rsh of the shielding resistor 211 connected in series with the SPAD 210 has R ON <Rsh relationship.

[0229] A connection pad 135 is formed in the second substrate 72, such that its lower surface is flush with the lower surface of the second substrate 72. Furthermore, a quench resistor section 212 and a readout circuit 230 are connected to the connection pad 135. The resistance value Rq of the quench resistor section 212 and the resistance value Rsh of the shielding resistor section 211 of the first substrate 71 have a relationship of Rsh < Rq.

[0230] The connection pad 135 is Cu-Cu bonded to the connection pad 125 of the first substrate 71. Therefore, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0231] In Modification 3, a readout circuit 230 detects changes in the cathode potential of each SPAD 210 via a set of shielding resistors 211 and a junction 260. Modification 3 is similar to Modification 1 in that multiple SPADs 210 share a single readout circuit 230. Furthermore, since one readout circuit 230 is formed in one pixel, in this modification, it can be said that multiple SPADs 210 can be provided in one pixel. By providing multiple SPADs 210 for each pixel, photon detection for each pixel can be reliably performed.

[0232] Furthermore, similar to the above implementation schemes (including specific examples and variations), the resistance value R of each SPAD 210 is... ON There is an R value between the shielding resistor 211 and the shielding resistor 211. ON The resistance value Rq of the quenching resistor 212 and the resistance value Rsh of the shielding resistor 211 of the first substrate 71 are related by the relationship Rsh < Rq. Therefore, this modified example also exhibits effects such as reduced dead time and reduced power consumption.

[0233] [Variation Example 4]

[0234] Figure 17D This is a block diagram illustrating a modified example 4 of the pixels of the optical device according to the fourth embodiment. (Refer to...) Figure 17D ,and Figure 17BSimilar to Modification 2, multiple SPADs 210 are connected in parallel on the first substrate 71, and the multiple SPADs 210 connected in parallel are connected to a shielding resistor section 211. However, in Modification 4, assuming that the multiple SPADs 210 and shielding resistor sections 211 connected in this way are grouped together, multiple groups of multiple SPADs 210 and shielding resistor sections 211 are provided. The shielding resistor section 211 of each group is connected to a connection pad 125 at the end opposite to the connection portion of the SPAD 210. The connection pad 125 is formed such that its upper surface is flush with the upper surface of the first substrate 71. Also in Modification 4, the resistance value R of the SPAD 210 is... ON The resistance value Rsh of the shielding resistor 211 connected in series with the SPAD 210 has R ON <Rsh relationship.

[0235] A connection pad 135 is formed in the second substrate 72, such that its lower surface is flush with the lower surface of the second substrate 72. Furthermore, a quench resistor section 212 and a readout circuit 230 are connected to the connection pad 135. The resistance value Rq of the quench resistor section 212 and the resistance values ​​Rsh of each shielding resistor section 211 of the first substrate 71 have a relationship of Rsh < Rq.

[0236] The connection pad 135 is Cu-Cu bonded to the connection pad 125 of the first substrate 71. Therefore, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0237] Similarly, in Modification 4, a readout circuit 230 detects changes in the cathode potential of each SPAD 210. Modification 4 is similar to Modification 1 in that multiple SPADs 210 share a single readout circuit 230. Furthermore, since one readout circuit 230 is formed in each pixel, multiple SPADs 210 are also provided in each pixel in this modification. By providing multiple SPADs 210 for each pixel, photon detection for each pixel can be reliably performed.

[0238] Furthermore, similar to the above implementation schemes (including specific examples and variations), the resistance value R of SPAD 210 is... ON There exists an R value between the shielding resistor 211 connected to the SPAD 210 and the resistance Rsh. ON The resistance value Rq of the quenching resistor 212 and the resistance value Rsh of each shielding resistor 211 of the first substrate 71 are related by the relationship Rsh < Rq. Therefore, this modified example also exhibits effects such as reduced dead time and reduced power consumption.

[0239] [Variation Example 5]

[0240] Figure 17E This is a block diagram illustrating a modified example 5 of the pixels of the optical device according to the fourth embodiment. (Refer to...) Figure 17E ,and Figure 17D Similar to Modification 4, in the first substrate 71, a plurality of SPADs 210 are connected in parallel, and the parallel-connected SPADs 210 are connected to a shielding resistor section 211. Furthermore, assuming that the plurality of SPADs 210 and shielding resistor sections 211 connected in this manner are grouped together, the similarity to Modification 4 is that multiple groups are provided. However, in Modification 5, a plurality of connection pads 125 are provided, and the shielding resistor section 211 of each group is connected to the corresponding connection pad 125. The connection pads 125 are formed such that their upper surface is flush with the upper surface of the first substrate 71. Furthermore, also in Modification 5, the resistance value R of the SPADs 210 is... ON There exists an R value between the shielding resistor 211 connected to the SPAD 210 and the resistance Rsh. ON <Rsh relationship.

[0241] The connection pad 135 is Cu-Cu bonded to the connection pad 125 of the first substrate 71. Therefore, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0242] Similarly, in Modification 5, a readout circuit 230 detects changes in the cathode potential of each SPAD 210. Modification 5 is similar to Modification 1 in that multiple SPADs 210 share a single readout circuit 230. Furthermore, since one readout circuit 230 is formed in each pixel, multiple SPADs 210 are also provided in each pixel in this modification. By providing multiple SPADs 210 for each pixel, photon detection for each pixel can be reliably performed.

[0243] Furthermore, similar to the above implementation schemes (including specific examples and variations), the resistance value R of SPAD 210 is... ON There exists an R value between the shielding resistor 211 connected to the SPAD 210 and the resistance Rsh. ON The resistance value Rq of the quenching resistor 212 and the resistance value Rsh of each shielding resistor 211 of the first substrate 71 are related by the relationship Rsh < Rq. Therefore, this modified example also exhibits effects such as reduced dead time and reduced power consumption.

[0244] [Variation Example 6]

[0245] Next, we will refer to Figure 18A and Figure 18BExplain variations 6 and 7 of the fourth implementation scheme. Figure 18A This is a block diagram illustrating a modified example 6 of the pixels of the optical device according to the fourth embodiment. (Refer to...) Figure 18A In the first substrate 71, the cathode of SPAD 210 is connected to one end of the shielding resistor 211, and the other end of the shielding resistor 211 is connected to the bonding pad 125. Similarly, in Modification 6, the resistance value R of SPAD 210... ON There exists an R value between the shielding resistor 211 connected to the SPAD 210 and the resistance Rsh. ON <Rsh relationship.

[0246] Furthermore, in Modification 6, unlike the fourth embodiment (and its modifications 1 to 5), the quenching resistance portion 212 is formed in the first substrate 71 instead of the second substrate 72. For example, by... Figure 14 A predetermined wiring is provided in the region between the wiring 124 and the connecting pad 125 of the first substrate 71 to form such a quenching resistor section 212. This wiring may partially or entirely comprise a polysilicon resistor or a metal resistor. Furthermore, this wiring is electrically connected at one end to the wiring 124 where the shielding resistor section 211 is provided (e.g., a predetermined via, etc.), and at the other end to a predetermined pad on the peripheral edge of the first substrate 71. By electrically connecting this pad to a high-potential terminal of a predetermined power supply, a reverse bias voltage can be applied between the quenching resistor section 212 and the anode of the SPAD 210. Furthermore, even when the quenching resistor section 212 is formed in the first substrate 71, the quenching resistor section 212 is formed such that the resistance value Rq of the quenching resistor section 212 and the resistance value Rsh of the shielding resistor section 211 satisfy the relationship Rsh < Rq.

[0247] Even with the configuration described above, during avalanche amplification, the current from the parasitic capacitor C2 is impeded by the shielding resistor 211 and flows only slightly. Furthermore, due to the obstruction from the quenching resistor 212 and the shielding resistor 211, the current flowing to the SPAD 210 through the quenching resistor 212 is also very small. That is, during avalanche amplification, the current mainly flows from the parasitic capacitor C1 to the SPAD 210. Moreover, after quenching occurs, charge moves from the parasitic capacitor C2 to the parasitic capacitor C1, and after the voltage between the parasitic capacitors C1 and C2 becomes equal, current is supplied through the quenching resistor 212, and recharging occurs. In other words, similarly, in Modification 6, operations such as avalanche amplification, quenching, charge redistribution, and recharging are performed as in the first to fourth embodiments (including the modifications). Therefore, Modification 6 also exhibits effects such as reduced dead time and reduced power consumption.

[0248] [Variation Example 7]

[0249] Figure 18B This is a block diagram illustrating a modified example 7 of the pixels of the optical device according to the fourth embodiment. (Refer to...) Figure 18B Similarly, in Modification 7, as in Modification 6, the quenching resistor section 212 is provided in the first substrate 71. However, in Modification 7, one end of the quenching resistor section 212 is connected to the connection point between the cathode and the shielding resistor section 211 of the SPAD 210.

[0250] For example, through Figure 14 A predetermined wiring is provided in the region between the wiring 124 of the first substrate 71 and the cathode electrode 121 to form a quenching resistor section 212. This wiring may partially or entirely comprise a polysilicon resistor or a metal resistor. Furthermore, this wiring is electrically connected at one end to the cathode electrode 121 and at the other end to a predetermined pad on the peripheral edge of the first substrate 71. By electrically connecting this pad to a high-potential terminal of a predetermined power supply and electrically connecting the anode and low-potential terminal of the SPAD 210, a reverse bias voltage can be applied between the quenching resistor section 212 and the anode of the SPAD 210. Furthermore, even when the quenching resistor section 212 is formed in the first substrate 71, the quenching resistor section 212 is formed such that the resistance value Rq of the quenching resistor section 212 and the resistance value Rsh of the shielding resistor section 211 satisfy the relationship Rsh < Rq.

[0251] In addition, the resistance value R of SPAD 210 ON There exists an R value between the shielding resistor 211 connected to the SPAD 210 and the resistance Rsh. ON <Rsh relationship.

[0252] Even with the configuration described above, during avalanche amplification, current primarily flows from parasitic capacitance C1 to SPAD 210, and the current from parasitic capacitance C2 is hindered by shielding resistor 211 and quenching resistor 212, flowing only slightly. Furthermore, after quenching, charge moves from parasitic capacitance C2 to parasitic capacitance C1, and after the voltage between parasitic capacitances C1 and C2 becomes equal, current is supplied through quenching resistor 212 for recharging. That is, similarly in Modification 7, operations such as avalanche amplification, quenching, charge redistribution, and recharging are performed as in the first to fourth embodiments (including the modifications). Therefore, Modification 7 also exhibits effects such as reduced dead time and reduced power consumption.

[0253] Even with the configuration described above, during avalanche amplification, the current from the parasitic capacitor C2 is impeded by the shielding resistor 211 and flows only slightly. Furthermore, due to the obstruction by the quenching resistor 212, the current flowing to the SPAD 210 through the quenching resistor 212 is also very small. That is, during avalanche amplification, the current mainly flows from the parasitic capacitor C1 to the SPAD 210. Moreover, after quenching occurs, charge moves from the parasitic capacitor C2 to the parasitic capacitor C1, and after the voltage between the parasitic capacitors C1 and C2 becomes equal, current is supplied through the quenching resistor 212, and recharging occurs. In other words, similarly, in Modification 7, operations such as avalanche amplification, quenching, charge redistribution, and recharging are performed as in the first to fourth embodiments (including the modifications). Therefore, Modification 7 also exhibits effects such as reduced dead time and reduced power consumption.

[0254] [Variation Example 8]

[0255] Next, we will refer to Figures 19A to 19C Other variations of the fourth implementation scheme, examples 8 to 10, are illustrated. Figure 19A As shown, the pixel of Modified Example 8 includes a first substrate 71, a second substrate 72A, and a third substrate 73. Similar to the first substrate 71 of the fourth embodiment, the first substrate 71 includes a SPAD 210 and a shielding resistor 211 connected in series therewith. A readout circuit 230 is disposed in the second substrate 72A. A quenching resistor 212 is disposed in the third substrate 73.

[0256] The second substrate 72A is in Figure 19A The lower surface also includes a connecting pad 135. In this modified example, the lower surface of the connecting pad 135 is flush with the lower surface of the second substrate 72A. Furthermore, the second substrate 72A has a surface opposite to the lower surface (…). Figure 19A The upper surface of the substrate 72A includes a connection pad 135A. In this modified example, the upper surface of the connection pad 135A is flush with the upper surface of the second substrate 72A. The connection pads 135 and 135A are connected by a predetermined wiring, which is also connected to the readout circuit 230. The second substrate 72A may be, for example, a silicon substrate, and the readout circuit 230 may include transistors, wiring, and other circuit elements formed on the silicon substrate. Furthermore, the connection pads 135 and 135A may be connected by, for example, vias or wiring.

[0257] The third substrate 73 is in Figure 19A The lower surface includes a connection pad 136. In this modified example, the lower surface of the connection pad 136 is flush with the lower surface of the third substrate 73. The connection pad 136 is connected to the quenching resistor section 212 via, for example, through-holes or wiring.

[0258] Here, the connection pad 125 of the first substrate 71 is bonded to the connection pad 135 of the second substrate 72A via, for example, Cu-Cu bonding, thereby forming a bonding portion 260. Then, the shielding resistor portion 211 of the first substrate 71 and the readout circuit 230 of the second substrate 72A are electrically connected via the bonding portion 260. In addition, the first substrate 71 and the second substrate 72A are mechanically bonded via the bonding portion 260.

[0259] The connection pad 135A of the second substrate 72A is bonded to the connection pad 136 of the third substrate 73 via, for example, a Cu-Cu bond, thereby forming a bonding portion 260A. Then, the readout circuit 230 of the second substrate 72A and the quenching resistor portion 212 of the third substrate 73 are electrically connected via the bonding portion 260A. Furthermore, the second substrate 72A and the third substrate 73 are mechanically bonded via the bonding portion 260A. Additionally, the quenching resistor portion 212 is electrically connected to the shielding resistor portion 211 of the first substrate 71 via the bonding portions 260 and 260A.

[0260] The difference between Modified Example 8, which has the above-described structure, and the fourth embodiment is that the quenching resistor 212 and the readout circuit 230 are formed in different substrates and connected by the bonding portion 260A. However, this embodiment is similar to the fourth embodiment in that the shielding resistor 211 has a resistance value R greater than that of SPAD 210. ON The large resistance value Rsh, and the quenching resistor section 212 has a resistance value Rq that is larger than the resistance value Rsh of the shielding resistor section 211.

[0261] Furthermore, a parasitic capacitance C2 is generated between the connection pad 135 and the readout circuit 230, and a parasitic capacitance C1 is generated at the cathode of the SPAD 210. The parasitic capacitance C2 is a combined capacitance generated by the junction 260, the wiring connecting the connection pad 135 and the connection pad 135A, and the readout circuit 230. Since a large number of connection pads, wiring, and circuit elements are formed on the second substrate 72A, the capacitance of the parasitic capacitance C2 tends to be larger than the capacitance of the parasitic capacitance C1.

[0262] Therefore, similarly to the fourth embodiment, in Modification 8, the dead time can be shortened and power consumption reduced while lowering the input voltage of the readout circuit 230.

[0263] [Variation Example 9]

[0264] Figure 19BThis is a block diagram showing a modified example 9 of the pixel of the optical device according to the fourth embodiment. As shown, the pixel of modified example 9 includes a first substrate 71A, a second substrate 72B, and a third substrate 73A. A SPAD 210 is disposed in the first substrate 71, a shielding resistor 211 is disposed in the second substrate 72A, and a quenching resistor 212 and a readout circuit 230 are disposed in the third substrate 73A.

[0265] The first substrate 71A is in Figure 19B The upper surface also includes a connection pad 125. In this modified example, the upper surface of the connection pad 125 is flush with the upper surface of the first substrate 71A. The connection pad 125 is connected to the cathode of the SPAD 210.

[0266] The second substrate 72B is in Figure 19B The lower surface of the substrate 72B includes a connection pad 135. In this modified example, the lower surface of the connection pad 135 is flush with the lower surface of the second substrate 72B. The connection pad 135 is connected to the shielding resistor 211 via, for example, a through-hole or wiring. Furthermore, the second substrate 72B includes a connection pad 135A on its upper surface (the surface opposite to the lower surface). In this modified example, the upper surface of the connection pad 135A is flush with the upper surface of the second substrate 72B.

[0267] The third substrate 73A is in Figure 19B The lower surface includes a connection pad 136. In this modified example, the lower surface of the connection pad 136 is flush with the lower surface of the third substrate 73A. The connection pad 136 is connected to the quenching resistor section 212 and the readout circuit 230 via, for example, through-holes or wiring.

[0268] Here, the connection pad 125 of the first substrate 71A is bonded to the connection pad 135 of the second substrate 72B via, for example, a Cu-Cu bond, thereby forming a bonding portion 260. Then, the SPAD 210 of the first substrate 71A and the shielding resistor portion 211 of the second substrate 72B are electrically connected via the bonding portion 260. In addition, the first substrate 71A and the second substrate 72B are mechanically bonded via the bonding portion 260.

[0269] The connection pad 135A of the second substrate 72B is bonded to the connection pad 136 of the third substrate 73A via, for example, a Cu-Cu bonding, thereby forming a bonding portion 260A. Then, the shielding resistor portion 211 of the second substrate 72B and the quenching resistor portion 212 and readout circuit 230 of the third substrate 73A are electrically connected via the bonding portion 260A. Furthermore, the second substrate 72B and the third substrate 73A are mechanically bonded via the bonding portion 260A.

[0270] In Modification 9, which has the above-described structure, SPAD 210, shielding resistor 211, and readout circuit 230 are formed on different substrates, and SPAD 210 and shielding resistor 211 are electrically connected via bonding portion 260, and shielding resistor 211 is electrically connected to quenching resistor 212 and readout circuit 230 via bonding portion 260A. Here, this embodiment is similar to the fourth embodiment in that the shielding resistor 211 has a resistance value R greater than that of SPAD 210. ON The large resistance value Rsh, and the quenching resistor section 212 has a resistance value Rq that is larger than the resistance value Rsh of the shielding resistor section 211.

[0271] Furthermore, when comparing the parasitic capacitance C1 generated at the end of the shielding resistor 211 that is electrically connected to the SPAD 210 with the parasitic capacitance C2 generated at the opposite end, the capacitance of the parasitic capacitance C2 becomes greater than the capacitance of the parasitic capacitance C1. This is because the parasitic capacitance C2 includes the capacitance generated by the shielding resistor 211, the capacitance generated by the wiring connecting the shielding resistor 211 and the connecting pad 135A, the capacitance generated by the junction 260A, and the capacitance generated by the wiring connecting the connecting pad 136, the quenching resistor 212, and the readout circuit 230, while the parasitic capacitance C1 only includes the capacitance generated by the SPAD 210, the capacitance generated by the wiring connecting the SPAD 210 and the connecting pad 125, and the capacitance generated by the junction 260A.

[0272] Therefore, since the capacitance of parasitic capacitance C1 is less than the capacitance of parasitic capacitance C2, the resistance value R... ON The relationship between the resistance value Rsh and the resistance value Rsh < the resistance value Rq means that the same effect as the above-described implementation scheme (including the modification) is also observed in Modification 9.

[0273] [Variation Example 10]

[0274] Figure 19C This is a block diagram illustrating a modified example 10 of the pixel of the optical device according to the fourth embodiment. As shown, the pixel of modified example 10 includes a first substrate 71, a second substrate 72C, and a third substrate 73B. A SPAD 210 and a shielding resistor 211 are disposed in the first substrate 71, a quenching resistor 212 is disposed in the second substrate 72C, and a readout circuit 230 is disposed in the third substrate 73B. The first substrate 71 of this modified example has the same structure as the first substrate 71 of the fourth embodiment and its modified example 8.

[0275] The second substrate 72C is in Figure 19CThe lower surface of the substrate includes a connection pad 135. In this modified example, the lower surface of the connection pad 135 is flush with the lower surface of the second substrate 72C. Furthermore, the second substrate 72C includes a connection pad 135A on its upper surface (the surface opposite to the lower surface). In this modified example, the upper surface of the connection pad 135A is flush with the upper surface of the second substrate 72C. The connection pads 135 and 135A are connected to each other via, for example, through-holes or wiring. Furthermore, the connection pads 135 and 135A are electrically connected to the quenching resistor section 212.

[0276] The third substrate 73B is in Figure 19C The lower surface includes a connection pad 136. In this modified example, the lower surface of the connection pad 136 is flush with the lower surface of the third substrate 73B. The connection pad 136 is connected to the readout circuit 230 via, for example, a via or wiring.

[0277] Here, the connection pad 125 of the first substrate 71 is bonded to the connection pad 135 of the second substrate 72C via, for example, a Cu-Cu bond, thereby forming a bonding portion 260. Then, the shielding resistor portion 211 of the first substrate 71 and the quenching resistor portion 212 of the second substrate 72C are electrically connected via the bonding portion 260. In addition, the first substrate 71 and the second substrate 72C are mechanically bonded via the bonding portion 260.

[0278] The connection pad 135A of the second substrate 72C is bonded to the connection pad 136 of the third substrate 73B via, for example, a Cu-Cu bonding, thereby forming a bonding portion 260A. Then, the quenching resistor portion 212 of the second substrate 72C and the readout circuit 230 of the third substrate 73B are electrically connected via the bonding portion 260A. Furthermore, the second substrate 72C and the third substrate 73B are mechanically bonded via the bonding portion 260A.

[0279] In Modification 10 with the above-described structure, SPAD 210, quench resistor 212, and readout circuit 230 are formed on different substrates. Shielding resistor 211 and quench resistor 212 are electrically connected via bonding portion 260, and quench resistor 212 and readout circuit 230 are electrically connected via bonding portion 260A. Here, this embodiment is similar to the fourth embodiment in that the shielding resistor 211 has a resistance value R greater than that of SPAD 210. ON The large resistance value Rsh, and the quenching resistor section 212 has a resistance value Rq that is larger than the resistance value Rsh of the shielding resistor section 211.

[0280] Furthermore, a parasitic capacitance C2 is generated between the connection pad 135 and the readout circuit 230, and a parasitic capacitance C1 is generated at the cathode of the SPAD 210. The parasitic capacitance C2 can include not only the capacitance generated by the junction 260, the capacitance generated by the wiring connecting the connection pad 135 and the connection pad 135A, and the capacitance generated by the quenching resistor 212, but also the capacitance generated by the junction 260A and the capacitance generated by the readout circuit 230. On the other hand, the parasitic capacitance C1 only includes the capacitance generated by the SPAD 210 and the capacitance generated by the wiring connecting the SPAD 210 and the shielding resistor 211. Therefore, the parasitic capacitance C2 is greater than the parasitic capacitance C1.

[0281] Therefore, similarly to the fourth embodiment, in Modification 10, the dead time can be shortened and power consumption reduced while lowering the input voltage of the readout circuit 230.

[0282] Note that in variations 8 to 10 of the fourth embodiment, the bonding of the connection pads by Cu-Cu bonding has been illustrated; however, the connection pads can also be connected to each other by metal pads. Furthermore, refer to… Figure 7A and Figure 7B Specific examples and references for the shielding resistor section are provided. Figures 8A to 8C Specific examples and references for the quenching resistance section are provided. Figures 9A to 9C The specific example of the readout circuit described can also be appropriately applied to the fourth implementation scheme (including variations).

[0283] <Application Example 1>

[0284] For example, the optical device described above according to embodiments of the present invention can be applied to various electronic devices such as camera devices (such as digital cameras or digital video cameras), mobile phones with camera functions, or other devices with camera functions.

[0285] Figure 20 This is a block diagram illustrating a construction example of a camera device as an electronic device applying this technology. Figure 20 The camera device 201 shown includes an optical system 202, a shutter device 203, an optical device 100, a drive circuit 205, a signal processing circuit 206, a monitor 207, and a memory 208, and can capture still images and moving images.

[0286] The optical system 202 includes one or more lenses that guide light (incident light) from the subject to the optical device 100 and form an image on the light-receiving surface of the optical device 100.

[0287] The shutter device 203 is arranged between the optical system 202 and the optical device 100, and controls the light irradiation time and the light blocking time of the optical device 100 according to the control of the drive circuit 205.

[0288] The drive circuit 205 outputs drive signals to control the transmission operation of the optical device 100 and the shutter operation of the shutter device 203, so as to drive the optical device 100 and the shutter device 203.

[0289] The optical device 100 includes a light-receiving element (pixel) according to the various embodiments described above (including variations). For applications involving camera equipment, the optical device 100 includes a digital counter circuit 240 at the output of the readout circuit 230. Figure 4B Under the control of the drive circuit 205, the optical device 100 counts the number of photons for each pixel via the digital counter circuit 240 based on the light formed on the light-receiving surface by the optical system 202 and the shutter device 203 during a predetermined exposure time period. The count value is converted into a brightness signal, and then, under the control of the drive circuit 205, it is transmitted from the line scan circuit 320 (…). Figure 4A The word line WL selection signal supplied to each pixel transmits the luminance signal to the column circuit 310 via the bit line BL. The column circuit 310 converts the luminance signal from each pixel into a digital signal and outputs the converted digital signal to the signal processing circuit 206 via the interface circuit 330.

[0290] The signal processing circuit 206 performs various signal processing operations on the digital signal output from the optical device 100. The image (image data) obtained by the signal processing circuit 206 is supplied to and displayed on the monitor 207, or supplied to and stored (recorded) in the memory 208.

[0291] In the imaging device 201 constructed as described above, since the optical device 100 includes light-receiving elements according to the various embodiments (including modifications) described above, the imaging device 201 can also exhibit the effects of reduced dead time and reduced power consumption. Note that color filters can be provided on the light-receiving surface of the optical device 100. In the color filters, a red filter that transmits light in the red wavelength region, a green filter that transmits light in the green wavelength region, and a blue filter that transmits light in the blue wavelength region are formed corresponding to the light-receiving elements (pixels) of the optical device 100. For example, a Bayer filter is exemplified as a color filter. By using such color filters, the imaging device 201 can be constructed as an imaging device capable of acquiring color images.

[0292] <Application Example 2>

[0293] Next, as an electronic device applying this technology, a ranging device that performs ranging using the direct ToF method will be described. Figure 21 This is a block diagram illustrating a construction example of a ranging device 600, which is an electronic device applying the present technology. As shown, the ranging device 600 includes an optical device 100A, a light source unit 602, a storage unit 603, a control unit 604, and an optical system 605.

[0294] The light source unit 602 may, for example, be a vertical-cavity surface-emitting laser (VCSEL) array that emits laser light as a surface light source. However, the invention is not limited to this, and the light source unit 602 may be a laser diode array in which laser diodes are arranged in a line. In this case, the laser diode array is supported by a predetermined driving unit (not shown) and is scanned in a direction perpendicular to the arrangement direction of the laser diodes. Furthermore, the light source unit 602 may be a single laser diode. In this case, the single laser diode is supported by a predetermined driving unit (not shown) and is scanned in both the horizontal and vertical directions.

[0295] exist Figure 22 In the example, optical device 100A includes a pixel (light receiving element) 200 according to the first embodiment. However, optical device 100A may include pixels (light receiving elements) according to other embodiments (including variations). In the case of application to a ranging device, such as Figure 22 As shown, the optical device 100A includes a TDC circuit 241, a generation unit 242, and a signal processing unit 243 connected in series with the output terminal of the readout circuit 230 to replace the aforementioned digital counter circuit 240. Figure 4B The functions of the TDC circuit 241, the generation unit 242, and the signal processing unit 243 will be explained later.

[0296] The signal processing unit 243 performs predetermined computational processing based on the data from the histogram (described later) generated by the generation unit 242, and calculates, for example, distance information. For instance, the signal processing unit 243 creates a curve approximation of the histogram based on the data from the histogram generated by the generation unit 242. The signal processing unit 243 can detect the peak value of the curve approximated by the histogram and obtain the distance D based on the detected peak value.

[0297] Storage unit 603 ( Figure 21 This includes, for example, flash memory, DRAM, or SRAM, and stores data input from the optical device 100A.

[0298] The control unit 604 controls all operations of the ranging device 600. For example, the control unit 604 supplies a predetermined reference signal with a predetermined frequency to the optical device 100A and the light source unit 602. For example, the light source unit 602 emits pulsed light based on the reference signal supplied from the control unit 604. For example, the optical device 100A obtains the time difference between the light emission timing and the light reception timing based on the aforementioned reference signal and the output signal output from the readout circuit 230. Furthermore, for example, the control unit 604 sets the ranging mode of the optical device 100A in response to external commands.

[0299] The optical system 605 guides externally incident light to the light receiving surface of the optical device 100A.

[0300] Next, refer to Figure 23 As an example of distance measurement using the ranging device 600, we will use the case of measuring the distance D from the ranging device 600 to the measuring object 303 to illustrate distance measurement using the direct ToF method. The time when the light source unit 602 emits light is defined as the emission time t0, and the time when the optical device 100A receives the reflected light obtained by the light emitted from the light source unit 602 by the measuring object 303 is defined as the light reception time t1. At this time, the distance D between the ranging device 600 and the measuring object 303 can be calculated by the following formula (1).

[0301] D = (c / 2) × (t1 - t0) ... (1)

[0302] Here, the constant c is the speed of light (2.9979 × 10⁻⁶). 8 [m / sec]).

[0303] Incidentally, in the optical device 100A, when light (photons) is incident on the pixel 200, even if the light is light other than reflected light from the measuring object 303 (e.g., ambient light), an output signal is output from the readout circuit 230, and the light reception timing is calculated by the TDC circuit 241 as described later. That is, it is impossible to distinguish between the light reception timing t1 calculated based on reflected light from the measuring object 303 and the light reception timing calculated based on light other than reflected light.

[0304] Therefore, in the ranging device 600, light is repeatedly emitted from the light source unit 602 (e.g., hundreds to tens of thousands of times), and a histogram is created that relates to the difference between the emission timing and the light reception timing. Figure 24This is a diagram illustrating an example of a histogram created in this manner. As shown, the number (frequency) 301 of the light reception timing is shown for each of the intervals #0, #1, #2, ..., #(N-2), and #(N-1) with a predetermined unit time d. Here, interval #0 is the range of time d starting from the emission timing t0, and interval #1 is the range of time d starting from the point in time d after the emission timing t0 has elapsed. Note that in the diagram, from the emission timing t0 to t... ep The time period corresponds to the exposure time of the optical device 100A.

[0305] Reference Figure 24 As shown by curve 312, compared to the range 311 indicated by the dashed line, there exists an interval (hereinafter referred to as interval 312) where the number of light reception times is significantly higher than that of adjacent intervals. While randomly receiving ambient light, light emitted from the light source unit 602 and reflected by the measuring object 303 is received after traveling a distance of 2×D, thus, although including errors, occurs over a certain period of time. Therefore, the light reception time t1 corresponding to the reflected light from the measuring object 303 is considered to be included in interval 312. Therefore, for example, as shown, the end time point of the interval recording the largest number of light reception times in interval 312 can be set as the light reception time t1 based on the reflected light from the measuring object 303. The invention is not limited to this, and the start time point or the central time point of the interval recording the largest number of light reception times can also be set as the light reception time t1. Furthermore, within interval 312, an approximation curve of the number of light emission times can be obtained, and the light emission time t1 can be obtained based on its peak value.

[0306] As described above, the light reception timing t1 of the reflected light from the measuring object 303 can be obtained, and the distance D to the measuring object 303 can be calculated by expression (1).

[0307] In the case of ranging performed by the direct ToF method in the optical device 100A, the light reception timing is obtained by the TDC circuit 241. That is, the TDC circuit 241 generates a time difference signal representing the time difference between the reference signal input from the control unit 604 and the output signal from the readout circuit 230. The reference signal from the control unit 604 is also input to the light source unit 602, and the light source unit 602 emits pulsed light based on the reference signal. Therefore, based on the time difference signal generated in the TDC circuit 241, the light reception timing can be obtained with reference to the emission timing t0 of the pulsed light emitted by the light source unit 602.

[0308] The process of light emission by the light source unit 602 based on the reference signal and light reception by the SPAD 210 is repeated, and each time the generation unit 242 generates a histogram related to the difference between the light emission timing and the light reception timing obtained by the TDC circuit 241. Based on the histogram created by the generation unit 242, the signal processing unit 243 determines the light reception timing t1 and calculates the distance D.

[0309] Similarly, in the ranging device 600 constructed as described above, since the optical device 100A includes a light receiving element according to the various embodiments (including variations) described above, the ranging device 600 is also able to exhibit the effects of reduced dead time and reduced power consumption.

[0310] <Application Example 3>

[0311] The technology according to the present invention (the technology) can be applied to various products. For example, the technology according to the present invention can be applied to endoscopic surgical systems.

[0312] Figure 25 This is a block diagram illustrating an example of a schematic construction of a patient information acquisition system using a capsule endoscope, to which the technology (the present technology) can be applied.

[0313] The in vivo information acquisition system 10001 includes a capsule endoscope 10100 and an external control device 10200.

[0314] During the examination, the patient swallows a capsule endoscope 10100. The capsule endoscope 10100 has a camera function and a wireless communication function, and while moving inside organs such as the stomach and intestines by peristaltic movements until they are naturally expelled by the patient, it sequentially takes images of the inside of the organs (hereinafter referred to as in vivo images) at predetermined intervals, and sequentially wirelessly transmits information about the in vivo images to an external control device 10200 outside the body.

[0315] The external control device 10200 controls the operation of the in vivo information acquisition system 10001 as a whole. In addition, the external control device 10200 receives information about the in vivo image sent from the capsule endoscope 10100 and generates image data for displaying the in vivo image on a display device (not shown) based on the received information about the in vivo image.

[0316] In the in vivo information acquisition system 10001, in this way, in vivo images obtained by photographing the state inside the patient's body can be acquired at any time from the time the capsule endoscope 10100 is swallowed until it is expelled.

[0317] The construction and function of the capsule endoscope 10100 and the external control device 10200 will be described in more detail.

[0318] The capsule endoscope 10100 includes a capsule-shaped housing 10101, and houses a light source unit 10111, a camera unit 10112, an image processing unit 10113, a wireless communication unit 10114, a power supply unit 10115, a power supply unit 10116, and a control unit 10117 within the housing 10101.

[0319] For example, the light source unit 10111 includes a light source such as a light-emitting diode (LED) and illuminates the field of view of the camera unit 10112 with light.

[0320] The imaging unit 10112 includes an imaging element and an optical system. The optical system includes multiple lenses positioned in front of the imaging element. Reflected light (hereinafter referred to as observation light) that illuminates body tissue, the target of observation, is converged by the optical system and incident on the imaging element. In the imaging unit 10112, the observation light incident on the imaging element undergoes photoelectric conversion, generating an image signal corresponding to the observation light. The image signal generated by the imaging unit 10112 is provided to the image processing unit 10113.

[0321] The image processing unit 10113 includes a processor such as a central processing unit (CPU) or a graphics processing unit (GPU), and performs various signal processing on the image signals generated by the camera unit 10112. The image processing unit 10113 provides the signal-processed image signals as RAW data to the wireless communication unit 10114.

[0322] The wireless communication unit 10114 performs predetermined processing, such as modulation processing, on the image signal that has already been processed by the image processing unit 10113, and transmits the image signal to the external control device 10200 via the antenna 10114A. Furthermore, the wireless communication unit 10114 receives control signals related to the drive control of the capsule endoscope 10100 from the external control device 10200 via the antenna 10114A. The wireless communication unit 10114 provides the control signals received from the external control device 10200 to the control unit 10117.

[0323] The power supply unit 10115 includes an antenna coil for receiving power, a power regeneration circuit for regenerating power from the current generated in the antenna coil, and a boost circuit. Power is generated in the power supply unit 10115 using a so-called contactless charging principle.

[0324] The power supply unit 10116 includes a secondary battery and stores the power generated by the power supply unit 10115. Figure 25In order to avoid complicating the drawings, the illustrations such as arrows indicating the destination of the power supplied from the power supply unit 10116 are omitted. However, the power stored in the power supply unit 10116 is supplied to the light source unit 10111, the camera unit 10112, the image processing unit 10113, the wireless communication unit 10114, and the control unit 10117, and can be used to drive these units.

[0325] The control unit 10117 includes a processor such as a CPU and appropriately controls the driving of the light source unit 10111, the camera unit 10112, the image processing unit 10113, the wireless communication unit 10114, and the power supply unit 10115 according to the control signals sent from the external control device 10200.

[0326] The external control device 10200 includes a processor such as a CPU or GPU, or a microcomputer or control board on which a processor and storage elements such as memory are mounted in a hybrid manner. The external control device 10200 controls the operation of the capsule endoscope 10100 by sending control signals to the control unit 10117 of the capsule endoscope 10100 via antenna 10200A. In the capsule endoscope 10100, for example, the control signals from the external control device 10200 can change the illumination conditions of the light source unit 10111 on the observed target. Furthermore, the control signals from the external control device 10200 can change the imaging conditions (e.g., the frame rate and exposure value of the imaging unit 10112). Additionally, the control signals from the external control device 10200 can change the processing content of the image processing unit 10113 and the conditions for the wireless communication unit 10114 to transmit image signals (e.g., the transmission interval and the number of images transmitted).

[0327] Furthermore, the external control device 10200 performs various image processing operations on the image signals transmitted from the capsule endoscope 10100 and generates image data for displaying the captured internal images on a display device. As image processing, various signal processing operations can be performed, such as development processing (de-mosaic processing), image quality improvement processing (bandwidth enhancement processing, super-resolution processing, noise reduction (NR) processing, and / or camera shake correction processing, etc.) and / or magnification processing (electronic zoom processing). The external control device 10200 controls the drive of the display device to display the captured internal images based on the generated image data. Alternatively, the external control device 10200 can record the generated image data in a recording device (not shown) or print it out via a printing device (not shown).

[0328] Examples of in vivo information acquisition systems to which the technology according to the present invention can be applied have been described above. The technology according to the present invention can be applied to the imaging unit 10112 in the above-described configuration. Specifically, the optical device according to the various embodiments described above can be used as the imaging unit 10112. According to the optical device described above, the dead time of SPAD 210 (or 210A) can be shortened. Therefore, if the optical device is used as the imaging unit 10112, the imaging interval of the capsule endoscope 10100 can be appropriately set. That is, when imaging is performed through the capsule endoscope 10100, the possibility of SPAD 210 (or 210A) being in the dead time can be reduced. Furthermore, since the power consumption of SPAD 210 can be reduced, the optical device 100 and the like can operate reliably from the time the patient swallows the capsule endoscope 10100 until it is naturally expelled.

[0329] Note that although a patient information acquisition system using a capsule endoscope has been described herein, the technology according to the invention can be applied, for example, to endoscopic surgical systems. The application of the technology of the invention to endoscopic surgical systems will be described below.

[0330] <Application Example 4>

[0331] Figure 26 This is a diagram illustrating an example of a schematic construction of an endoscopic surgical system to which the technology (the technology) according to the present invention can be applied.

[0332] exist Figure 26 The image shows a surgeon (physician) 11131 performing surgery on a patient 11132 on a bed 11133 using an endoscopic surgery system 11000. As shown, the endoscopic surgery system 11000 includes an endoscope 11100, other surgical instruments 11110 such as a pneumoperitoneum tube 11111 and an energy device 11112, a support arm device 11120 supporting the endoscope 11100, and a trolley 11200 on which various devices for endoscopic surgery are mounted.

[0333] Endoscope 11100 includes a tube 11101 and a camera 11102 connected to the proximal end of the tube 11101. The tube 11101 has a region extending a predetermined length from its distal end that will be inserted into a body cavity of a patient 11132. In the example shown, endoscope 11100 is depicted as a rigid endoscope including a rigid tube 11101. However, endoscope 11100 may also additionally include a flexible endoscope having a flexible tube.

[0334] The endoscope tube 11101 has an opening at its distal end for inserting an objective lens. A light source device 11203 is connected to the endoscope 11100 such that light generated by the light source device 11203 is guided through a light guide extending inside the endoscope tube 11101 to the distal end of the tube and illuminates the target within the body cavity of the patient 11132 via the objective lens. Note that the endoscope 11100 can be a forward-looking endoscope, or it can be a slant-looking endoscope or a lateral-looking endoscope.

[0335] An optical system and an image sensor are housed inside the camera 11102, such that reflected light (observation light) from the observed target is focused onto the image sensor by the optical system. The image sensor performs photoelectric conversion on the observation light to generate an electrical signal corresponding to the observation light, that is, an image signal corresponding to the observed image. This image signal is sent as RAW data to the camera control unit (CCU) 11201.

[0336] The CCU 11201 includes a central processing unit (CPU) or a graphics processing unit (GPU), and controls the operation of the endoscope 11100 and the display device 11202 as a whole. In addition, the CCU 11201 receives image signals from the camera 11102 and performs various image processing on the image signals for displaying an image based on the image signals, such as developing processing (de-mosaic processing).

[0337] Under the control of CCU 11201, display device 11202 displays an image based on an image signal that has been image processed by CCU 11201.

[0338] For example, the light source device 11203 includes a light source such as a light-emitting diode (LED) and supplies illumination light to the endoscope 11100 when imaging the surgical site.

[0339] Input device 11204 is an input interface for endoscopic surgical system 11000. Users can input various information or commands into endoscopic surgical system 11000 through input device 11204. For example, users can input commands to change the imaging conditions of endoscope 11100 (type of illumination light, magnification, or focal length, etc.).

[0340] The treatment tool control device 11205 controls the drive of the energy device 11112 used for cauterizing or cutting tissue, or sealing blood vessels, etc. To ensure the field of vision of the endoscope 11100 and to ensure the surgeon's working space, the pneumoperitoneum device 11206 delivers gas into the patient's body cavity 11132 through the pneumoperitoneum tube 11111 to inflate the cavity. The recorder 11207 is a device capable of recording various information related to the surgery. The printer 11208 is a device capable of printing various information related to the surgery in various forms such as text, images, or graphics.

[0341] Note that the light source device 11203, which supplies illumination light to the endoscope 11100 during imaging of the surgical site, may include a white light source, such as an LED, a laser light source, or a combination thereof. When the white light source includes a combination of red, green, and blue (RGB) laser light sources, the light source device 11203 can perform white balance adjustment of the captured image because the output intensity and timing of each color (each wavelength) can be controlled with high precision. Furthermore, in this case, if the laser beams from each of the RGB laser light sources are time-division multiplexed onto the target, and the driving of the imaging element of the camera 11102 is controlled synchronously with the illumination timing, then images corresponding to each of the R, G, and B elements can also be captured in a time-division multiplex manner. According to this method, color images can be obtained even without setting a color filter for the imaging element.

[0342] Furthermore, the light source device 11203 can be controlled so that the intensity of the light to be output varies at various predetermined times. By controlling the driving of the camera element of the camera 11102 in sync with the time sequence of light intensity changes to acquire and synthesize images in a time-division manner, high dynamic range images without underexposed shadows and overexposed highlights can be produced.

[0343] Furthermore, the light source device 11203 can be configured to supply light of a predetermined wavelength band prepared for special light observation. In special light observation, for example, by utilizing the wavelength dependence of light absorption in body tissue to illuminate a narrow band of light compared to the illumination light used in ordinary observation (i.e., white light), narrow band observation can be performed to image predetermined tissues such as blood vessels in the mucosal surface with high contrast. Alternatively, in special light observation, fluorescence observation can be performed to obtain an image from fluorescence generated by irradiating with excitation light. In fluorescence observation, fluorescence from body tissue can be observed by irradiating the body tissue with excitation light (autofluorescence observation), or a fluorescence image can be obtained by locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the body tissue with excitation light corresponding to the fluorescence wavelength of the reagent. The light source device 11203 can be configured to supply such narrow band light and / or excitation light suitable for special light observation as described above.

[0344] Figure 27 It shows Figure 26 A block diagram illustrating an example of the functional configuration of the camera 11102 and CCU 11201.

[0345] Camera 11102 includes a lens unit 11401, an image capture unit 11402, a drive unit 11403, a communication unit 11404, and a camera control unit 11405. CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. Camera 11102 and CCU 11201 are communicatively connected to each other via a transmission cable 11400.

[0346] Lens unit 11401 is an optical system disposed at the connection position with lens barrel 11101. Observation light obtained from the distal end of lens barrel 11101 is guided to camera 11102 and introduced into lens unit 11401. Lens unit 11401 includes a combination of multiple lenses, including zoom lenses and focusing lenses.

[0347] The camera unit 11402 includes camera elements. The number of camera elements included in the camera unit 11402 can be one (single-plate type) or multiple (multi-plate type). For example, in the case where the camera unit 11402 is configured as a multi-plate type camera unit, image signals corresponding to R, G, and B are generated by the camera elements, and the image signals can be synthesized to obtain a color image. The camera unit 11402 can also be configured to have a pair of camera elements to acquire right-eye image signals and left-eye image signals respectively prepared for three-dimensional (3D) display. If 3D display is performed, the surgeon 11131 can more accurately understand the depth of living tissue in the surgical site. Note that in the case where the camera unit 11402 is configured as a stereoscopic camera unit, multiple lens units 11401 are provided corresponding to each camera element.

[0348] Furthermore, the camera unit 11402 need not be mounted on the camera 11102. For example, the camera unit 11402 can be mounted inside the lens barrel 11101, immediately behind the objective lens.

[0349] The drive unit 11403 includes an actuator, and under the control of the camera control unit 11405, moves the zoom lens and focusing lens of the lens unit 11401 a predetermined distance along the optical axis. Therefore, the magnification and focus of the image captured by the imaging unit 11402 can be appropriately adjusted.

[0350] The communication unit 11404 includes communication means for transmitting various information to and receiving various information from the CCU 11201. The communication unit 11404 transmits the image signal acquired from the camera unit 11402 as RAW data to the CCU 11201 via the transmission cable 11400.

[0351] Furthermore, the communication unit 11404 receives control signals from the CCU 11201 for controlling the drive of the camera 11102, and supplies the control signals to the camera control unit 11405. The control signals include, for example, information related to shooting conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value during shooting, and / or information specifying the magnification and focus of the captured image.

[0352] Note that imaging conditions such as frame rate, exposure value, magnification, or focus can be specified by the user or automatically set by the control unit 11413 of CCU 11201 based on the acquired image signal. In the latter case, automatic exposure (AE), automatic focus (AF), and automatic white balance (AWB) functions are incorporated into the endoscope 11100.

[0353] The camera control unit 11405 controls the driving of the camera 11102 based on the control signals received from the CCU 11201 via the communication unit 11404.

[0354] The communication unit 11411 includes a communication device for transmitting various information to and receiving various information from the camera 11102. The communication unit 11411 receives image signals transmitted to it from the camera 11102 via a transmission cable 11400.

[0355] In addition, the communication unit 11411 sends control signals for controlling the camera 11102 to the camera 11102. The image signals and control signals can be transmitted via electrical communication or optical communication, etc.

[0356] The image processing unit 11412 performs various image processing operations on the image signal in RAW data form sent to it from the camera 11102.

[0357] The control unit 11413 performs various controls related to the endoscope 11100 capturing images of the surgical site, etc., and displaying the images obtained by capturing images of the surgical site, etc. For example, the control unit 11413 generates control signals for controlling the drive of the camera 11102.

[0358] Furthermore, the control unit 11413 causes the display device 11202 to display an image captured by photographing the surgical site, etc., based on the image signal that has already been processed by the image processing unit 11412. Therefore, the control unit 11413 can use various image recognition technologies to identify various objects in the captured image. For example, the control unit 11413 can identify surgical tools such as forceps, specific living areas, bleeding, and haze when using the energy device 11112 by detecting the shape and color of the edges of objects included in the captured image. When the control unit 11413 causes the display device 11202 to display the captured image, the control unit 11413 can use the recognition results to display various surgical support information in a way that overlaps with the image of the surgical site. When the surgical support information is displayed in an overlapping manner and presented to the surgeon 11131, the workload of the surgeon 11131 can be reduced, and the surgeon 11131 can perform the surgery with confidence.

[0359] The transmission cable 11400 connecting the camera 11102 and the CCU 11201 is an electrical signal cable for electrical signal communication, an optical fiber for optical communication, or a composite cable for both electrical and optical communication.

[0360] Here, although in the example shown, communication is carried out via wired communication using transmission cable 11400, communication between camera 11102 and CCU 11201 can also be carried out via wireless communication.

[0361] Examples of endoscopic surgical systems to which the technology according to the present invention can be applied have been described above. The technology according to the present invention can be applied to the imaging unit 11402 of the camera 11102 in the above-described configuration. Specifically, the optical device according to the various embodiments described above can be used as the imaging unit 11402. According to the optical device described above, dead time can be shortened and power can be saved. Therefore, endoscopic surgical systems using optical devices also exhibit similar effects.

[0362] <Application Example 5>

[0363] The technology according to the present invention (the technology) can be applied to a variety of products. For example, the technology according to the present invention can be implemented as a device (or system) installed on any type of mobile body such as automobiles, electric vehicles, hybrid vehicles, motorcycles, bicycles, personal mobile devices, airplanes, drones, ships, and robots.

[0364] Figure 28 This is a block diagram illustrating a schematic construction example of a vehicle control system, which is an example of a mobile body control system to which the technology according to the present invention can be applied.

[0365] The vehicle control system 12000 includes multiple electronic control units interconnected via a communication network 12001. Figure 28 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. Furthermore, as part of the functional configuration of the integrated control unit 12050, a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface (I / F) 12053 are shown.

[0366] The drive system control unit 12010 controls the operation of devices related to the vehicle's drive system according to various programs. For example, the drive system control unit 12010 is used as a control device for devices such as an internal combustion engine or drive motor for generating drive force for the vehicle, a drive force transmission mechanism for transmitting drive force to the wheels, a steering mechanism for adjusting the vehicle's steering angle, and a braking device for generating vehicle braking force.

[0367] The body system control unit 12020 controls the operation of various devices installed on the vehicle body according to various programs. For example, the body system control unit 12020 is used as a control device for keyless entry systems, smart key systems, power windows, or various lights such as headlights, reversing lights, brake lights, turn signals, or fog lights. In this case, radio waves or signals from various switches sent from a keyless entry device can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signal inputs and controls the vehicle's door locks, power windows, or lights, etc.

[0368] The exterior information detection unit 12030 detects information about the exterior of the vehicle, including the vehicle control system 12000. For example, the exterior information detection unit 12030 is connected to the camera unit 12031. The exterior information detection unit 12030 causes the camera unit 12031 to capture images of the exterior of the vehicle and receives the captured images. Based on the received images, the exterior information detection unit 12030 can perform detection processing of objects such as people, vehicles, obstacles, signs, or characters on the road surface, or detection processing of the distance to such objects.

[0369] The camera unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The camera unit 12031 can output the electrical signal as an image or as ranging information. Furthermore, the light received by the camera unit 12031 can be visible light or invisible light such as infrared light.

[0370] The in-vehicle information detection unit 12040 detects information about the interior of the vehicle. The in-vehicle information detection unit 12040 is connected, for example, to a driver state detection unit 12041 that detects the driver's state. The driver state detection unit 12041 includes, for example, a camera that captures images of the driver. Based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's level of fatigue or concentration, or determine whether the driver is dozing off.

[0371] The microcomputer 12051 can calculate control target values ​​for the drive force generating device, steering mechanism, or braking device based on information about the vehicle's interior or exterior obtained by the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform coordinated control aimed at realizing functions of advanced driver assistance systems (ADAS), including collision avoidance or impact mitigation, distance-based following, speed maintenance, collision warning, or lane departure warning.

[0372] Furthermore, by controlling the drive force generating device, steering mechanism, or braking device based on information about the exterior or interior of the vehicle obtained by the exterior information detection unit 12030 or the interior information detection unit 12040, the microcomputer 12051 can perform coordinated control aimed at achieving autonomous driving, etc., which enables the vehicle to drive autonomously without relying on the driver's operation.

[0373] Furthermore, based on information about the vehicle's exterior obtained by the exterior information detection unit 12030, the microcomputer 12051 can output control commands to the body system control unit 12020. For example, the microcomputer 12051 can, for instance, control the headlights to switch from high beam to low beam to prevent glare, based on the position of the vehicle ahead or oncoming vehicle detected by the exterior information detection unit 12030.

[0374] The audio-visual output unit 12052 sends an output signal of at least one of audio and visual signals to an output device capable of visually or audibly notifying passengers of the vehicle or external to the vehicle. Figure 28 In the example, an audio speaker 12061, a display unit 12062, and a dashboard 12063 are shown as output devices. The display unit 12062 may include, for example, at least one of an in-vehicle display and a head-up display.

[0375] Figure 29 This is a diagram showing an example of the mounting position of the camera unit 12031.

[0376] exist Figure 29 In the middle, the camera unit 12031 includes camera units 12101, 12102, 12103, 12104 and 12105.

[0377] Cameras 12101, 12102, 12103, 12104, and 12105 are installed, for example, on the front nose, side mirrors, rear bumper, and rear door of vehicle 12100, as well as on the upper part of the interior windshield. Camera 12101 on the front nose and camera 12105 on the upper part of the interior windshield primarily acquire images of the front of vehicle 12100. Cameras 12102 and 12103 on the side mirrors primarily acquire images of the sides of vehicle 12100. Camera 12104 on the rear bumper or rear door primarily acquires images of the rear of vehicle 12100. Camera 12105 on the upper part of the interior windshield is mainly used to detect vehicles, pedestrians, obstacles, traffic lights, traffic signs, or lanes ahead.

[0378] Incidentally, Figure 29An example of the camera range of camera units 12101 to 12104 is shown. Camera range 12111 represents the camera range of camera unit 12101 located at the front nose. Camera ranges 12112 and 12113 represent the camera ranges of camera units 12102 and 12103 located at the side mirrors, respectively. Camera range 12114 represents the camera range of camera unit 12104 located at the rear bumper or rear door. For example, by overlaying the image data captured by camera units 12101 to 12104, a bird's-eye view of the vehicle 12100 viewed from above can be obtained.

[0379] At least one of the camera units 12101 to 12104 may have the function of acquiring distance information. For example, at least one of the camera units 12101 to 12104 may be a stereo camera composed of multiple imaging elements, or may be an imaging element having pixels for phase difference detection.

[0380] For example, based on distance information acquired from camera units 12101 to 12104, microcomputer 12051 can calculate the distance to each three-dimensional object within the camera range 12111 to 12114 and the time change of said distance (relative speed to vehicle 12100), thereby specifically identifying the nearest three-dimensional object as the vehicle ahead: this three-dimensional object is on the driving path of vehicle 12100 and is traveling at a predetermined speed (e.g., equal to or greater than 0 km / h) in approximately the same direction as vehicle 12100. Furthermore, microcomputer 12051 can preset the vehicle-to-the-front distance and perform automatic braking control (including follow-stop control) or automatic acceleration control (including follow-start control), etc. Therefore, cooperative control such as autonomous driving, which aims to enable the vehicle to drive autonomously without relying on driver operation, is possible.

[0381] For example, based on distance information acquired from camera units 12101 to 12104, microcomputer 12501 can classify three-dimensional object data about three-dimensional objects into three-dimensional object data for two-wheeled vehicles, standard vehicles, large vehicles, pedestrians, and other three-dimensional objects such as utility poles, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic obstacle avoidance. For example, microcomputer 12051 classifies obstacles around vehicle 12100 into obstacles that the driver of vehicle 12100 can visually recognize and obstacles that the driver of vehicle 12100 cannot visually recognize. Then, microcomputer 12051 determines the collision risk to indicate the risk of collision with each obstacle. If the collision risk is equal to or higher than a set value and therefore there is a possibility of collision, microcomputer 12051 outputs a warning to the driver via audio speaker 12061 or display unit 12062, and performs forced deceleration or evasive steering through drive system control unit 12010. Microcomputer 12051 can thus assist driving to avoid collision.

[0382] At least one of the camera units 12101 to 12104 can be an infrared camera that detects infrared light. The microcomputer 12051 can identify a pedestrian, for example, by determining whether a pedestrian exists in the images captured by the camera units 12101 to 12104. This pedestrian identification is performed, for example, by: extracting feature points from the images captured by the camera units 12101 to 12104 (which are infrared cameras); and performing pattern matching processing on a series of feature points representing the outline of an object to determine whether it is a pedestrian. If the microcomputer 12051 determines that a pedestrian exists in the images captured by the camera units 12101 to 12104 and thus identifies the pedestrian, the audio-visual output unit 12052 controls the display unit 12062 to display a square outline for emphasis superimposed on the identified pedestrian. Furthermore, the audio-visual output unit 12052 can also control the display unit 12062 to display an icon or similar symbol representing a pedestrian at a desired location.

[0383] Examples of vehicle control systems to which the technology according to the present invention can be applied have been described above. The technology according to the present invention can be applied to camera units 12101 to 12104 in the above-described configuration. Specifically, the imaging elements according to the various embodiments described above (including modifications) can be applied to camera units 12101 to 12104. For example, by applying the technology according to the present invention to camera units 12101 to 12104, pedestrians can be identified even at night or in dark places based on the low light from pedestrians. Furthermore, the power consumption reduction effect of the technology according to the present invention is particularly useful in vehicles that include a drive motor as a drive force generating device for generating vehicle driving force.

[0384] Note that the above description illustrates various effects exhibited by the light-receiving element, the optical device including the light-receiving element, and the electronic device including the optical device according to embodiments of the present invention; however, these effects do not limit the present invention. Furthermore, it is not necessary to exhibit all of these various effects. In addition, the light-receiving element, optical device, and electronic device of the present invention may exhibit additional effects not described herein.

[0385] Note that this technology can have the following structure. (1)

[0387] A light receiving element, comprising:

[0388] A photon response multiplier includes a charge multiplication region capable of multiplying the charge generated in response to the incident photon;

[0389] A first resistive section is connected at one end to one end of the photon response multiplier section and has a resistance value that is larger than that of the photon response multiplier section.

[0390] A second resistor section, which is connected at one end to the other end of the first resistor section; and

[0391] The connection point is where the other end of the first resistor, one end of the second resistor, and the readout unit that reads out the output from the photon response multiplier are connected. (2)

[0393] According to the optical receiving element described in (1), the second resistor has a resistance value that is greater than the resistance value of the first resistor. (3)

[0395] According to the optical receiving element described in (1) or (2), wherein,

[0396] A first capacitor exists at one end of the photon response multiplication unit, and

[0397] A second capacitor is present at the other end of the first resistor. (4)

[0399] According to the optical receiving element described in (3), each of the first capacitor and the second capacitor is composed of a variable capacitor element. (5)

[0401] According to the optical receiving element of (4), the variable capacitor element includes one or more transistors. (6)

[0403] According to the light receiving element of (5), the one or more transistors are metal-oxide-semiconductor transistors. (7)

[0405] The light receiving element according to any one of (1) to (6), wherein,

[0406] The second resistor section includes:

[0407] A switch is disposed between the readout unit and a power supply electrically connected to the other end of the second resistor; and

[0408] The control unit detects the output of the readout unit and controls the switch based on the detection result. (8)

[0410] The light receiving element according to any one of (1) to (6), wherein the second resistive part is a constant current source. (9)

[0412] The light receiving element according to any one of (1) to (8), wherein the photon response multiplier includes a single-photon avalanche diode. (10)

[0414] According to the light receiving element described in (9), one end of the photon response multiplier is the cathode or anode of the single-photon avalanche diode. (11)

[0416] The light receiving element according to any one of (1) to (8), wherein the photon response multiplier includes a silicon photomultiplier tube. (12)

[0418] The light receiving element according to any one of (1) to (11), wherein the first resistive part is a polysilicon resistive part or a metal resistive part. (13)

[0420] The light receiving element according to any one of (1) to (12), wherein the first resistive portion is formed by one or more transistors. (14)

[0422] According to the light receiving element of (13), the one or more transistors are metal-oxide-semiconductor transistors. (15)

[0424] The light receiving element according to (14) further includes a voltage generating unit that applies a voltage for applying a gate voltage to the gate of the metal oxide semiconductor transistor. (16)

[0426] The optical receiving element according to any one of (1) to (15) further includes:

[0427] A first substrate, which includes a first connecting portion on one surface; and

[0428] The second substrate includes a second connecting portion corresponding to the first connecting portion on one surface, and is electrically and mechanically bonded to the first substrate by the engagement of the first connecting portion and the second connecting portion, wherein...

[0429] The photon response multiplier is disposed in the first substrate, and

[0430] The readout unit is disposed in the second substrate. (17)

[0432] According to the optical receiving element described in (16), wherein,

[0433] The first connecting portion and the second connecting portion contain copper, and

[0434] The first connecting portion and the second connecting portion are joined together by using copper to form the surfaces of the first connecting portion and the second connecting portion in close contact with each other. (18)

[0436] According to the light receiving element of (16), the first connecting portion and the second connecting portion are joined by metal bumps. (19)

[0438] The optical receiving element according to any one of (1) to (15) further includes:

[0439] A first substrate, which includes a first connection portion on one surface;

[0440] A second substrate includes a second connecting portion corresponding to the first connecting portion on one surface and a third connecting portion on a surface opposite to the first surface. The second substrate is electrically and mechanically bonded to the first substrate through the engagement of the first connecting portion and the second connecting portion.

[0441] The third substrate includes a fourth connecting portion corresponding to the third connecting portion on one surface, and is electrically and mechanically bonded to the second substrate by the engagement of the third connecting portion and the fourth connecting portion, wherein...

[0442] The photon response multiplier is disposed in the first substrate. (20)

[0444] According to the optical receiving element described in (16) or (19), wherein,

[0445] The first substrate is provided with a plurality of the aforementioned photon response multipliers, and

[0446] The plurality of photon response multipliers are electrically connected to one of the readout units. (twenty one)

[0448] The optical receiving element according to any one of (1) to (20) wherein a counting unit for counting the number of outputs of signals from the readout unit is connected to the output terminal of the readout unit. (twenty two)

[0450] The optical receiving element according to any one of (1) to (20) wherein a time-to-digital converter is connected to the output of the readout unit, the time-to-digital converter generating a digital signal representing the time difference between a reference signal having a predetermined frequency and another signal generated based on the reference signal. (twenty three)

[0452] An optical device includes a plurality of light-receiving elements arranged in a matrix, wherein each of the plurality of light-receiving elements comprises:

[0453] A photon response multiplier includes a charge multiplication region capable of multiplying the charge generated in response to the incident photon;

[0454] A first resistive section is connected at one end to one end of the photon response multiplier section and has a resistance value that is larger than that of the photon response multiplier section.

[0455] A second resistor section, which is connected at one end to the other end of the first resistor section; and

[0456] The connection point is where the other end of the first resistor, one end of the second resistor, and the readout unit that reads out the output from the photon response multiplier are connected. (twenty four)

[0458] An electronic device, comprising:

[0459] Optical systems; and

[0460] An optical device in which multiple light-receiving elements are arranged in a matrix, wherein each of the multiple light-receiving elements comprises:

[0461] A photon response multiplier includes a charge multiplication region capable of multiplying the charge generated in response to the incident photon that has passed through the optical system.

[0462] A first resistive section is connected at one end to one end of the photon response multiplier section and has a resistance value that is larger than that of the photon response multiplier section.

[0463] A second resistor section, which is connected at one end to the other end of the first resistor section; and

[0464] The connection point is where the other end of the first resistor, one end of the second resistor, and the readout unit that reads out the output from the photon response multiplier are connected. (25)

[0466] An electronic device, comprising:

[0467] Optical system;

[0468] A light-emitting unit configured to emit light based on a reference signal having a predetermined frequency; and

[0469] An optical device in which multiple light-receiving elements are arranged in a matrix, wherein each of the multiple light-receiving elements comprises:

[0470] A photon response multiplier includes a charge multiplication region capable of multiplying the charge generated in response to the incident photon that has passed through the optical system.

[0471] A first resistive section is connected at one end to one end of the photon response multiplier section and has a resistance value that is larger than that of the photon response multiplier section.

[0472] The second resistor is connected at one end to the other end of the first resistor;

[0473] The connection point is where the other end of the first resistor, one end of the second resistor, and the readout unit that reads out from the photon response multiplier are connected; and

[0474] A time-to-digital converter that generates a digital signal representing the time difference between the reference signal and the output read from the photon response multiplier by the readout unit via the first resistor section.

[0475] List of reference numerals

[0476] 1 electronic device

[0477] 10 Optical Devices

[0478] 11-pixel array unit

[0479] 12 drive circuits

[0480] 13 Output Circuit

[0481] 15. Timing control circuit

[0482] 20, 200, 200A, 200B pixels

[0483] 21. Photodiode (SPAD)

[0484] 22 Quenching Resistor

[0485] 23 Readout Circuit

[0486] 30 camera lens

[0487] 40, 603 memory units

[0488] 50 processors

[0489] 71 First substrate

[0490] 72 Second substrate

[0491] LS output signal line

[0492] LD pixel drive line

[0493] 100 optical devices

[0494] 101 Semiconductor Substrate

[0495] 102 photoelectric conversion area

[0496] 103N-type semiconductor region

[0497] 104P type semiconductor region

[0498] 105P+ type semiconductor region

[0499] 106N+ type semiconductor region

[0500] 107 cathode contact

[0501] 108 anode contact

[0502] 109 insulating film

[0503] 110 Component Isolation Section

[0504] 111 light-shielding film

[0505] 113 pinned layers

[0506] 114 planarization film

[0507] 115 color filter

[0508] 116 lenses

[0509] 120 and 130 wiring layers

[0510] 121 Cathode Electrode

[0511] 122 anode electrode

[0512] 125, 135, 135A, 136 connection pads

[0513] 210, 210A Single-Photon Avalanche Diode (SPAD)

[0514] 211 Shielding Resistor Section

[0515] 211A Resistor

[0516] 211BP channel MOS transistor

[0517] 211CN channel MOS transistor

[0518] 212 Quenching Resistance Section

[0519] 212A constant current source

[0520] 212B Active Recharge Circuit

[0521] 212S switch

[0522] 212C control unit

[0523] 230 readout circuit

[0524] 230A Inverter

[0525] 240 digital counter circuit

[0526] 241TDC circuit

[0527] 242 generation unit

[0528] 243 Signal Processing Unit

[0529] 250 bias voltage generation unit

[0530] 260 joint

[0531] 310-column circuit

[0532] 320-line scanning circuit

[0533] 330 interface circuit

[0534] 600 range measuring device

[0535] 602 Light Source Unit

[0536] 604 Control Unit

[0537] 605 Optical System

[0538] PAR pixel array unit

[0539] BL0, BL1, ..., BL S BL bit line

[0540] WL0, WL1, ...WL N WL line

[0541] Parasitic capacitances C1 and C2

[0542] R L R S resistor

[0543] IVT inverter

[0544] C01 Cathode Parasitic Capacitance

[0545] C02 Input Parasitic Capacitance

[0546] VC1 and VC2 variable capacitors

[0547] 201 camera equipment

[0548] 202 Optical System

[0549] 203 shutter mechanism

[0550] 205 driver circuit

[0551] 206 signal processing circuit

[0552] 207 monitor

[0553] 208 memory

Claims

1. A light receiving element, comprising: A photon response multiplier includes a charge multiplication region capable of multiplying the charge generated in response to the incident photon; A first resistive section is connected at one end to one end of the photon response multiplier section and has a resistance value that is larger than that of the photon response multiplier section. The second resistor is connected at one end to the other end of the first resistor; and A connection point is formed whereby the other end of the first resistor, one end of the second resistor, and a readout unit configured to read out the output from the photon response multiplier are connected to the connection point. A first capacitor is present at one end of the photon response multiplication part. A second capacitor exists at the other end of the first resistive section, and The capacitance of the second capacitor is greater than that of the first capacitor.

2. The optical receiving element according to claim 1, wherein, The second resistor has a resistance value that is greater than that of the first resistor.

3. The optical receiving element according to claim 1, wherein, Each of the first capacitor and the second capacitor is configured as a variable capacitor element.

4. The optical receiving element according to claim 3, wherein, The variable capacitor element includes one or more transistors.

5. The optical receiving element according to any one of claims 1 to 4, wherein, The second resistor section includes: A switch is disposed between the readout unit and a power supply electrically connected to the other end of the second resistor; and The control unit detects the output of the readout unit and controls the switch based on the detection result.

6. The optical receiving element according to any one of claims 1 to 4, wherein, The second resistor is a constant current source.

7. The optical receiving element according to any one of claims 1 to 4, wherein, The photon response multiplier includes a single-photon avalanche diode.

8. The optical receiving element according to claim 7, wherein, One end of the photon response multiplier is the cathode or anode of the single-photon avalanche diode.

9. The optical receiving element according to any one of claims 1 to 4, wherein, The photon response multiplier includes a silicon photomultiplier tube.

10. The optical receiving element according to any one of claims 1 to 4, wherein, The first resistor section is a polysilicon resistor section or a metal resistor section.

11. The optical receiving element according to any one of claims 1 to 4, wherein, The first resistor section includes one or more transistors.

12. The optical receiving element according to any one of claims 1 to 4, further comprising: A first substrate, which includes a first connection portion on one surface; and The second substrate includes a second connecting portion corresponding to the first connecting portion on one surface, and is electrically and mechanically bonded to the first substrate by the engagement of the first connecting portion and the second connecting portion, wherein... The photon response multiplier is disposed in the first substrate, and The readout unit is disposed in the second substrate.

13. The optical receiving element according to claim 12, wherein, The first connecting portion and the second connecting portion contain copper, and The first connecting portion and the second connecting portion are joined together by their surfaces, which contain copper, being in close contact with each other.

14. The optical receiving element according to claim 12, wherein, The first connecting portion and the second connecting portion are joined by metal bumps.

15. The optical receiving element according to any one of claims 1 to 4, further comprising: A first substrate, which includes a first connection portion on one surface; The second substrate includes a second connecting portion on one surface corresponding to the first connecting portion, and a third connecting portion on a surface opposite to the first surface. The second substrate is electrically and mechanically bonded to the first substrate by the engagement of the first connecting portion and the second connecting portion. and A third substrate includes a fourth connecting portion corresponding to the third connecting portion on one surface, and is electrically and mechanically bonded to the second substrate by the engagement of the third connecting portion and the fourth connecting portion, wherein... The photon response multiplier is disposed in the first substrate.

16. The optical receiving element according to any one of claims 1 to 4, wherein, A counting unit is connected to the output of the readout unit, and the counting unit is configured to count the number of times the signal from the readout unit is output.

17. The optical receiving element according to any one of claims 1 to 4, wherein, A time-to-digital converter is connected to the output of the readout unit and is configured to generate a digital signal representing the time difference between a reference signal having a predetermined frequency and another signal generated based on the reference signal.

18. An optical device comprising a plurality of light-receiving elements arranged in a matrix, wherein, The plurality of optical receiving elements are optical receiving elements as described in any one of claims 1 to 17.

19. An electronic device comprising: Optical system; and An optical device in which multiple light-receiving elements are arranged in a matrix, wherein photons transmitted through the optical system are incident on the multiple light-receiving elements, wherein... The plurality of optical receiving elements are optical receiving elements as described in any one of claims 1 to 17.

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