P-type DEMOS device preparation method and system

Abstract

The invention relates to the technical field of semiconductor device preparation, in particular to a P-type DEMOS device preparation method and system. In order to form an ion concentration gradient change region boundary far away from a local silicon oxide structure boundary in each direction and completely eliminate a voltage-withstanding weak point formed when the device is doped with high-concentration ions, multiple times of ion implantation are carried out on a P-type drift region with the same incidence oblique angle and different device directions; that is, the device is rotated after each ion implantation so as to change the direction of the device relative to the ion incident source. Finally, the boundaries of the ion concentration gradient change regions of the local silicon oxide in all directions are all away from the boundary of the local silicon oxide structure, namely, the ion doping concentration change boundary is pushed from the right lower side of the local silicon oxide structure to the outer side, so that the voltage-withstanding weak points of the boundary of the local silicon oxide structure are completely eliminated, the voltage-withstanding performance and the stability of the device are improved, and the reliability of the device is improved. And meanwhile, the ion doping concentration of the P-type drift region is improved, and the turn-on voltage of the device is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device fabrication technology, and in particular to a method and system for fabricating a P-type DEMOS device. Background Technology

[0002] High-side switch (HSS) semiconductor devices are typically fabricated using a BCD (Bipolar-CMOS-DMOS) process that integrates discrete metal-oxide-semiconductor field-effect transistors (MOSFETs). These devices are fabricated on an N-type substrate using a high-density N-type epitaxial layer structure. The substrate resistivity of these devices is approximately 0.001 ohm / cm, and the epitaxial layer resistivity is approximately 0.15 ohm / cm.

[0003] In MOSFET transistor devices, shielded gate trench (SGT) VDOMS (Vertical Double-diffused Metal Oxide Semiconductor) typically employs a high-concentration ion doping process to achieve a faster turn-on voltage.

[0004] However, for P-DEMOS (P-type Drain Extended Metal Oxide Semiconductor) devices, high-concentration ion doping of the P-type drift region to achieve a faster turn-on voltage often compromises the device's breakdown voltage, leading to performance degradation. This is because the localized oxidation of silicon (LOCOS) structure in P-DEMOS acts as a barrier during high-concentration ion doping, creating a significant ion concentration gradient region below its boundary. This region's boundary coincides with the interface between LOCOS and the polysilicon gate, resulting in electric field concentration at this location when voltage is applied, making it a weak point in the device's breakdown voltage. The combined effect of these two factors makes P-DEMOS devices prone to voltage breakdown at this location, compromising the device's breakdown voltage performance and stability. Summary of the Invention

[0005] The present invention aims to provide a method and system for fabricating P-type DEMOS devices to solve the problem of weak breakdown voltage of P-type DEMOS after high concentration ion doping, thereby improving the breakdown voltage and stability of P-type DEMOS while increasing the turn-on voltage.

[0006] To achieve the above objectives, the first aspect of the present invention provides a method for fabricating a P-type DEMOS device, comprising the following steps: A substrate is provided, and an N-type epitaxial layer is grown on the substrate; A deep P-well layer is formed in the N-type epitaxial layer, thereby growing a local silicon oxide structure on the surface of the N-type epitaxial layer, and then forming an N-well region and a P-well region in the N-type epitaxial layer; A P-type drift region is formed in the N-type epitaxial layer, and the P-type drift region is located below the local silicon oxide structure; With a preset incident angle and preset device direction, the P-type drift region is implanted with ions multiple times until the ion concentration in the P-type drift region meets a preset concentration threshold, thereby forming the boundary of the ion concentration gradient change region in the P-type drift region, and making the boundary of the ion concentration gradient change region far away from the projection area directly below the local silicon oxide structure. A gate oxide layer is formed on the surface of the N-well region, and then a gate polysilicon layer is formed on the surface of the N-type epitaxial layer and the local silicon oxide structure. An N-type injection region and a first P-type injection region are formed in the N-well region; A second P-type injection region is formed in the P-well region.

[0007] To avoid the formation of a significant ion concentration gradient region boundary below the boundary of the local silicon oxide structure during high-concentration ion implantation in the P-type drift region, the aforementioned P-type DEMOS device fabrication method changes the ion implantation incident angle from the traditional vertical normal incidence to a preset oblique angle incidence. When ions are incident on the P-type drift region at an oblique angle, the blocking region of the local silicon oxide structure changes from directly below it to obliquely below it, causing the end of the local silicon oxide away from the incident source to form the boundary of the ion concentration gradient region. This boundary is far from the boundary of the local silicon oxide structure, thereby eliminating the voltage breakdown weakness of the local silicon oxide structure at this end.

[0008] Compared to traditional processes, the above-mentioned P-type DEMOS device fabrication method can increase the ion doping concentration in the P-type drift region, improve the turn-on voltage of the P-type DEMOS, and significantly reduce the number of weak points in the breakdown voltage, thereby improving the breakdown voltage performance and stability of the P-type DEMOS.

[0009] Further, the step of performing multiple ion implantations on the P-type drift region at a preset incident angle and preset device direction until the ion concentration in the P-type drift region meets a preset concentration threshold, thereby forming a boundary of an ion concentration gradient change region in the P-type drift region, and ensuring that the boundary of the ion concentration gradient change region is far from the projection region directly below the local silicon oxide structure, includes: The dose of a single ion implantation is determined based on a preset concentration threshold and a preset number of implantations. The ion implantation energy is determined based on the depth of the P-type drift region and the preset incident angle. Based on the single ion implantation dose, the ion implantation energy, the preset incident angle, and the preset device direction, the P-type drift region is subjected to several ion implantations until the number of ion implantations meets the preset number of implantations. After each ion implantation, the device orientation is updated based on a preset rotation angle.

[0010] In this implementation, to create ion concentration gradient change regions away from the local silicon oxide structure boundary in all directions and completely eliminate the device's breakdown voltage weakness, the present invention performs multiple ion implantations on the P-type drift region with the same incident angle but different device orientations. That is, after each ion implantation, the device is rotated to change its orientation relative to the ion incident source. Ultimately, the boundaries of the ion concentration gradient change regions in all directions of the local silicon oxide are far from the local silicon oxide structure boundary; that is, the ion doping concentration change boundaries are pushed outward from directly below the local silicon oxide structure, completely eliminating the breakdown voltage weakness at the local silicon oxide structure boundary. This further improves the breakdown voltage performance and stability of the P-type DEMOS, while simultaneously increasing the ion doping concentration in the P-type drift region and raising the turn-on voltage of the P-type DEMOS.

[0011] In addition, in order to maintain the ion doping concentration after multiple ion implantations and keep it the same as the ion implantation concentration in the traditional process, this implementation method determines the single ion implantation dose based on a preset concentration threshold and a preset number of implantations. This ensures that after several ion implantations are completed with a preset number of implantations, the ion doping concentration in the P-type drift region can meet the standard of the preset concentration threshold, thereby improving the turn-on voltage and electrical performance of the P-type DEMOS.

[0012] Meanwhile, considering that higher emission kinetic energy is required to achieve the same implantation depth as perpendicular incidence when ions are incident at a preset angle into the P-type drift region, this implementation method determines the ion implantation energy based on the depth of the P-type drift region and the preset incident angle to ensure that the implantation depth of tilted ions meets the depth of the P-type drift region, thereby improving the turn-on voltage and electrical performance of the P-type DEMOS.

[0013] Further, forming a deep P-well layer in the N-type epitaxial layer includes: Photolithography is performed on the N-type epitaxial layer to define a deep P-well layer pattern in the N-type epitaxial layer; Ion implantation is performed on the N-type epitaxial layer based on the deep P-well layer pattern to form a deep P-well layer in the N-type epitaxial layer.

[0014] In this implementation, the depth and doping concentration of the deep P-well layer can be precisely controlled through photolithography and ion implantation processes, thereby improving the overall withstand voltage and reliability.

[0015] Further, the growth of a local silicon oxide structure on the surface of the N-type epitaxial layer includes: Photolithography is performed on the N-type epitaxial layer to form an active region in the N-type epitaxial layer; The active region is etched to form local trenches, and then silicon oxide is grown on the local trenches to form a local silicon oxide structure.

[0016] In this implementation, active regions and local trenches are formed through photolithography and etching processes, and a high-quality silicon oxide layer is grown through thermal oxidation, achieving local field oxide isolation (LOCOS), reducing capacitive coupling and crosstalk between devices, and facilitating subsequent structure deposition and photolithography operations.

[0017] Further, the formation of N-well and P-well regions in the N-type epitaxial layer includes: Photolithography is performed on the N-type epitaxial layer to define a first well region in the N-type epitaxial layer; P-type ion implantation is performed on the first well region to form a P-well region; Photolithography is performed on the N-type epitaxial layer to define a second well region in the N-type epitaxial layer; The second well region is implanted with N-type ions to form an N-well region.

[0018] In this implementation, the doping regions and spatial distribution of the N-well and P-well regions are precisely controlled through step-by-step photolithography and ion implantation processes.

[0019] Further, the step of forming a gate oxide layer on the surface of the N-well region, and then forming a gate polysilicon layer on the surface of the N-type epitaxial layer and the local silicon oxide structure, includes: A first oxide layer is deposited on the surface of the N-type epitaxial layer and the local silicon oxide structure; The first oxide layer is etched to form a gate oxide layer on the surface of the N-well region; A first polycrystalline silicon layer is deposited on the surface of the N-type epitaxial layer and the localized silicon oxide structure; The first polysilicon layer is etched to form gate polysilicon on the surface of the N-type epitaxial layer and the local silicon oxide structure.

[0020] In this implementation, a uniform and high-quality gate oxide layer and polysilicon gate are formed through deposition and etching processes, which ensures precise control and integrity of the transistor gate structure, thereby optimizing the device threshold voltage stability, transconductance and switching characteristics, and improving the device reliability and electrical performance.

[0021] Further, forming an N-type injection region and a first P-type injection region in the N-well region includes: The N-well region is photolithographically etched to define the N-type injection region pattern; N-type ion implantation is performed based on the N-type implantation region pattern to form an N-type implantation region in the N-well region; The N-well region is photolithographically etched to define the pattern of the first P-type implantation region; P-type ion implantation is performed based on the first P-type implantation region pattern, thereby forming the first P-type implantation region in the N-well region.

[0022] In this implementation, N-type and P-type implantation regions are precisely formed through photolithography and ion implantation processes, defining the body and source regions of the transistor, optimizing the doping concentration and junction depth, thereby reducing contact resistance, junction leakage current and short-channel effect, and improving the device's current drive capability, switching speed and overall circuit performance.

[0023] Further, forming a second P-type injection region in the P-well region includes: The P-well region is photolithographically etched to define the second P-type implantation region pattern; P-type ion implantation is performed based on the second P-type implantation region pattern, thereby forming a second P-type implantation region in the P-well region.

[0024] In this implementation, a second P-type implantation region is formed in the P-well region through photolithography and ion implantation processes, which defines the drain region of the transistor, thereby enhancing the device's matching and stability.

[0025] A second aspect of the present invention provides a P-type DEMOS device fabrication system, comprising: An epitaxial layer forming module is used to provide a substrate and grow an N-type epitaxial layer on the substrate; A deep P-well layer forming module is used to form a deep P-well layer in the N-type epitaxial layer; A localized silicon oxide forming module is used to grow a localized silicon oxide structure on the surface of the N-type epitaxial layer; A well region forming module is used to form N-well regions and P-well regions in the N-type epitaxial layer; A P-type drift region forming module is used to form a P-type drift region in the N-type epitaxial layer, wherein the P-type drift region is located below the local silicon oxide structure; An ion doping module is used to perform multiple ion implantations on the P-type drift region at a preset incident angle and a preset device direction until the ion concentration in the P-type drift region meets a preset concentration threshold, thereby forming a boundary of an ion concentration gradient change region in the P-type drift region, and making the boundary of the ion concentration gradient change region far away from the projection region directly below the local silicon oxide structure. A gate forming module is used to form a gate oxide layer on the surface of the N-well region, and then form gate polysilicon on the surface of the N-type epitaxial layer and the local silicon oxide structure. The N-well region injection module is used to form an N-type injection region and a first P-type injection region in the N-well region; The P-well injection module is used to form a second P-type injection region in the P-well region.

[0026] Further, the step of performing multiple ion implantations on the P-type drift region at a preset incident angle and preset device direction until the ion concentration in the P-type drift region meets a preset concentration threshold, thereby forming a boundary of an ion concentration gradient change region in the P-type drift region, and ensuring that the boundary of the ion concentration gradient change region is far from the projection region directly below the local silicon oxide structure, includes: The dose of a single ion implantation is determined based on a preset concentration threshold and a preset number of implantations. The ion implantation energy is determined based on the depth of the P-type drift region and the preset incident angle. Based on the single ion implantation dose, the ion implantation energy, the preset incident angle, and the preset device direction, the P-type drift region is subjected to several ion implantations until the number of ion implantations meets the preset number of implantations. After each ion implantation, the device orientation is updated based on a preset rotation angle. Attached Figure Description

[0027] Figure 1 This invention provides a method for fabricating a P-type DEMOS device. Figure 2 This is a schematic diagram of a weak point in the withstand voltage of an existing P-type DEMOS device provided by the present invention; Figure 3 This is a schematic diagram of another weak point in the withstand voltage of an existing P-type DEMOS device provided by the present invention; Figure 4 This is a TCAD simulation diagram of a weak point in the withstand voltage of an existing P-type DEMOS device provided by the present invention; Figure 5 a to Figure 5d is a schematic diagram of ion implantation into the P-type drift region provided in an embodiment of the present invention. Figure 6 a to Figure 6 d is a schematic diagram of another method for ion implantation into the P-type drift region provided in an embodiment of the present invention; Figure 7 This is a TCAD simulation diagram of the P-type DEMOS device prepared according to an embodiment of the present invention; Figures 8 to 13 This is a schematic diagram illustrating the structural changes in the fabrication process of a P-type DEMOS device provided in an embodiment of the present invention; Figure 14 This is a schematic diagram of a P-type DEMOS device fabrication system provided in an embodiment of the present invention; Wherein: 1. Substrate; 11. N-type epitaxial layer; 2. Deep P-well layer; 3. Local silicon oxide structure; 4. N-well region; 5. P-well region; 6. P-type drift region; 7. Gate oxide layer; 8. Gate polysilicon; 9. N-type implantation region; 101. First P-type implantation region; 102. Second P-type implantation region. Detailed Implementation

[0028] The present invention will now be described in detail with reference to the accompanying drawings and embodiments. It should be noted that the following detailed descriptions are exemplary and intended to provide further detailed explanation of the invention. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used herein in the specification is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms "comprising" and "having," and any variations thereof, in the specification, claims, and foregoing drawings, are intended to cover non-exclusive inclusion. The terms "first," "second," etc., in the specification, claims, or foregoing drawings are used to distinguish different objects, not to describe a particular order.

[0029] It should be understood that although the steps in the flowcharts of the accompanying figures are shown sequentially as indicated by the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the accompanying figures may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times, and their execution order is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the sub-steps or stages of other steps.

[0030] Before describing this application in detail with reference to the accompanying drawings and embodiments, the terms and application scenarios involved in this application will first be explained.

[0031] Please refer to Figure 2 and Figure 3 , Figure 2 and Figure 3 These are schematic diagrams illustrating the voltage withstand weaknesses of existing P-type DEMOS devices provided by this invention. In these diagrams, N-SUB and N-type sub are N-type substrates, N-EPI is an N-type epitaxial layer, DPW is a deep P-well layer, NW is an N-well, PDRFT and PDRIFT are P-type drift regions, LOCOS is a localized silicon oxide structure, POLY is the gate polysilicon, N+ is a high-concentration N-type implantation region, and P+ is a high-concentration P-type implantation region. When the P-type drift region of a P-type DEMOS device is doped with a high concentration of ions, when incident particles are injected vertically into the P-type drift region from directly above, a boundary between a low-concentration ion region and a high-concentration ion region (circled in the diagram) is formed below the LOCOS boundary due to the obstruction of LOCOS. This location is also the boundary between LOCOS and the gate polysilicon. The combination of these two factors makes this a voltage weak point when voltage is applied, leading to voltage breakdown and impairing the device's voltage withstand performance.

[0032] For further verification of the above content, please refer to... Figure 4 The TCAD simulation diagram shown is as follows: N-EPI is the N-type epitaxial layer, DPW is the deep P-well layer, NW is the N-well, PW is the P-well, and P-DRIFT is the P-type drift region. Figure 4 The circle in the middle and Figure 2 The circled area represents the same location in a P-type DEMOS device. (From...) Figure 4 As can be seen, the large red area in the circle indicates that the breakdown voltage is low and the withstand voltage performance is insufficient.

[0033] To solve the above technical problems, refer to Figure 1 The first aspect of this invention provides a method for fabricating a P-type DEMOS device, comprising the following steps: S1. Provide a substrate and grow an N-type epitaxial layer on the substrate; S2. A deep P-well layer is formed in the N-type epitaxial layer, thereby growing a local silicon oxide structure on the surface of the N-type epitaxial layer, and then forming an N-well region and a P-well region in the N-type epitaxial layer. S3. A P-type drift region is formed in the N-type epitaxial layer, and the P-type drift region is located below the local silicon oxide structure; S4. Perform multiple ion implantations on the P-type drift region with a preset incident angle and preset device direction until the ion concentration in the P-type drift region meets a preset concentration threshold, thereby forming a boundary of the ion concentration gradient change region in the P-type drift region, and making the boundary of the ion concentration gradient change region far away from the projection area directly below the local silicon oxide structure. S5. A gate oxide layer is formed on the surface of the N-well region, and then a gate polysilicon is formed on the surface of the N-type epitaxial layer and the local silicon oxide structure. S6. An N-type injection region and a first P-type injection region are formed in the N-well region; S7. A second P-type injection region is formed in the P-well region.

[0034] To avoid the formation of a significant ion concentration gradient region boundary below the boundary of the local silicon oxide structure during high-concentration ion implantation in the P-type drift region, the aforementioned P-type DEMOS device fabrication method changes the ion implantation incident angle from the traditional vertical normal incidence to a preset oblique angle incidence. When ions are incident on the P-type drift region at an oblique angle, the blocking region of the local silicon oxide structure changes from directly below it to obliquely below it, causing the end of the local silicon oxide away from the incident source to form the boundary of the ion concentration gradient region. This boundary is far from the boundary of the local silicon oxide structure, thereby eliminating the voltage breakdown weakness of the local silicon oxide structure at this end.

[0035] Compared to traditional processes, the above-mentioned P-type DEMOS device fabrication method can increase the ion doping concentration in the P-type drift region, improve the turn-on voltage of the P-type DEMOS, and significantly reduce the number of weak points in the breakdown voltage, thereby improving the breakdown voltage performance and stability of the P-type DEMOS.

[0036] Furthermore, please refer to the following: Figure 5 a to Figure 5 d, and Figure 6 a to Figure 6 d, wherein multiple ion implantations are performed on the P-type drift region at a preset incident angle and a preset device direction until the ion concentration in the P-type drift region meets a preset concentration threshold, thereby forming a boundary of an ion concentration gradient change region in the P-type drift region, and ensuring that the boundary of the ion concentration gradient change region is far from the projection region directly below the local silicon oxide structure, including: The dose of a single ion implantation is determined based on a preset concentration threshold and a preset number of implantations. The ion implantation energy is determined based on the depth of the P-type drift region and the preset incident angle. Based on the single ion implantation dose, the ion implantation energy, the preset incident angle, and the preset device direction, the P-type drift region is subjected to several ion implantations until the number of ion implantations meets the preset number of implantations. After each ion implantation, the device orientation is updated based on a preset rotation angle.

[0037] In this implementation, to create ion concentration gradient change regions away from the local silicon oxide structure boundary in all directions and completely eliminate the device's breakdown voltage weakness, the present invention performs multiple ion implantations on the P-type drift region with the same incident angle but different device orientations. That is, after each ion implantation, the device is rotated to change its orientation relative to the ion incident source. Ultimately, the boundaries of the ion concentration gradient change regions in all directions of the local silicon oxide are far from the local silicon oxide structure boundary; that is, the ion doping concentration change boundaries are pushed outward from directly below the local silicon oxide structure, completely eliminating the breakdown voltage weakness at the local silicon oxide structure boundary. This further improves the breakdown voltage performance and stability of the P-type DEMOS, while simultaneously increasing the ion doping concentration in the P-type drift region and raising the turn-on voltage of the P-type DEMOS.

[0038] In addition, in order to maintain the ion doping concentration after multiple ion implantations and keep it the same as the ion implantation concentration in the traditional process, this implementation method determines the single ion implantation dose based on a preset concentration threshold and a preset number of implantations. This ensures that after several ion implantations are completed with a preset number of implantations, the ion doping concentration in the P-type drift region can meet the standard of the preset concentration threshold, thereby improving the turn-on voltage and electrical performance of the P-type DEMOS.

[0039] Meanwhile, considering that higher emission kinetic energy is required to achieve the same implantation depth as perpendicular incidence when ions are incident at a preset angle into the P-type drift region, this implementation method determines the ion implantation energy based on the depth of the P-type drift region and the preset incident angle to ensure that the implantation depth of tilted ions meets the depth of the P-type drift region, thereby improving the turn-on voltage and electrical performance of the P-type DEMOS.

[0040] like Figure 5 As shown in Figure a, in a specific embodiment, in order to avoid the overlap of the boundary of LOCOS (Local Silicon Oxide Structure) and the junction of the low-concentration ion region and the high-concentration ion region, the ion implantation angle of PDRFT (P-type drift region) is first changed from the traditional vertical normal injection to an inclined 45-degree injection.

[0041] like Figure 5 a to Figure 5As shown in d, in order to form ion concentration gradient change regions far away from the local silicon oxide structure boundary in all directions, this embodiment sets the number of implantations to four, the preset rotation angle to 90 degrees, the single ion implantation dose to one-quarter of the total dose, and increases the energy of the single ion implantation so that ion implantation is performed at a tilted 45-degree incident angle in all four directions.

[0042] In such Figure 5 In the first ion implantation shown in Figure a, with the cross-section of the device as a reference, the ion source is implanted from the upper right of the device. Due to the obstruction of LOCOS, ions are implanted normally in the dashed box to the right of LOCOS, while the ion concentration implanted in the dashed box to the left of LOCOS is lower than that on the right, forming a low-concentration ion region with a boundary far away from LOCOS.

[0043] In such Figure 5 In the second ion implantation shown in b, the position and incident angle of the ion source in the ground coordinate system remain unchanged. Rotating the device 90 degrees clockwise results in... Figure 5 Using the same device cross-section as a reference frame Figure 5 In diagram b, ions are shown to be injected from 45° directly behind the device, an angle that failed to [achieve the desired effect]. Figure 5 This is reflected in b. At this point, the injected ion concentrations in the left and right dashed boxes of LOCOS are equal.

[0044] In such Figure 5 In the third ion implantation shown in c, the position and incident angle of the ion source in the ground coordinate system remain unchanged. The device is rotated 90 degrees clockwise again, resulting in... Figure 5 Using the same device cross-section as a reference frame Figure 5 In diagram c, ions are shown to be injected from the left side of the device. Due to the obstruction of LOCOS, ions are injected normally within the dashed box to the left of LOCOS, while the ion concentration injected within the dashed box to the right of LOCOS is lower than that on the left, forming a low-concentration ion region with its boundary far from LOCOS.

[0045] In such Figure 5 In the fourth ion implantation shown in d, the position and incident angle of the ion source in the ground coordinate system remain unchanged. The device is rotated 90 degrees clockwise and counterclockwise again, resulting in... Figure 5 Using the same device cross-section as a reference frame Figure 5 In diagram d, ions are shown to be injected from 45° directly in front of the device; this angle failed to [achieve the desired effect]. Figure 5 This is reflected in d. At this point, the ion concentrations injected into the left and right dashed boxes of LOCOS are equal.

[0046] After the four-step ion implantation process described above, the ion concentration is lowest in the vertical projection region directly below the LOCOS, and slightly lower in the dashed box regions on both sides of the LOCOS, approximately 3 / 4 lower than the normal ion concentration. The remaining areas of the P-type drift region have normal ion concentrations. This creates a gradual ion concentration gradient in the P-type drift region, increasing from directly below the LOCOS towards both sides, avoiding the abrupt changes in ion concentration at the LOCOS boundary that occur with traditional ion implantation, thus eliminating the voltage weakness at the LOCOS boundary.

[0047] To further illustrate the above process, please refer to [link / reference needed]. Figure 6 a to Figure 6 As shown in d, where, Figure 6 'a' indicates the first ion implantation, where 'wafer notch' refers to the wafer notch. Figure 6 b indicates the second ion implantation, compared to Figure 6 The wafer was rotated 90 degrees counterclockwise. Figure 6 c indicates the third ion implantation, compared to Figure 6 The b-wafer was rotated 90 degrees counterclockwise. Figure 6 d indicates the fourth ion implantation, compared to Figure 6 The c-wafer was rotated 90 degrees counterclockwise. After the above four steps of ion implantation, a gradual ion concentration gradient was formed in the P-type drift region, with the ion concentration gradually increasing from directly below LOCOS to both sides. This avoids the abrupt changes in high and low ion concentrations at the LOCOS boundary caused by traditional ion implantation, thus eliminating the voltage weak point at the LOCOS boundary.

[0048] To illustrate the technical effects achieved by the above embodiments, please continue to refer to... Figure 7 The TCAD simulation diagram shown indicates that N-EPI is the N-type epitaxial layer, DPW is the deep P-well layer, NW is the N-well, PW is the P-well, and P-DRIFT is the P-type drift region. Figure 7 As shown, after completing the above four ion implantations, Figure 7 The TCAD simulation of the boundary location of LOCOS, indicated by the middle circle, is light-colored, demonstrating its lighter appearance compared to... Figure 4 The conventional P-type DEMOS device shown here has a higher breakdown voltage, eliminating the voltage weakness of conventional P-type DEMOS devices after high-concentration ion doping, improving the breakdown voltage performance and stability of P-type DEMOS, and increasing the ion doping concentration of the P-type drift region, thereby increasing the turn-on voltage of P-type DEMOS.

[0049] Figures 8 to 13 This is a schematic diagram showing the structural changes in the fabrication process of the P-type DEMOS device provided in an embodiment of the present invention.

[0050] Please refer to Figure 8 After providing a substrate 1 and growing an N-type epitaxial layer 11 on the substrate 1, the further step of forming a deep P-well layer 2 in the N-type epitaxial layer 11 includes: Photolithography is performed on the N-type epitaxial layer 11 to define a deep P-well layer pattern in the N-type epitaxial layer 11; Ion implantation is performed on the N-type epitaxial layer 11 based on the deep P-well layer pattern, thereby forming a deep P-well layer 2 in the N-type epitaxial layer 11.

[0051] In this implementation, the depth and doping concentration of the deep P-well layer 2 can be precisely controlled through photolithography and ion implantation processes, thereby improving the overall withstand voltage and reliability.

[0052] Please refer to Figure 9 Furthermore, the growth of a local silicon oxide structure 3 on the surface of the N-type epitaxial layer 11 includes: Photolithography is performed on the N-type epitaxial layer 11 to form an active region in the N-type epitaxial layer 11; The active region is etched to form a local trench, and then silicon oxide is grown on the local trench to form a local silicon oxide structure 3.

[0053] In this implementation, active regions and local trenches are formed through photolithography and etching processes, and a high-quality silicon oxide layer is grown through thermal oxidation, achieving local field oxide isolation (LOCOS), reducing capacitive coupling and crosstalk between devices, and facilitating subsequent structure deposition and photolithography operations.

[0054] Please refer to Figure 10 In the figure, N-EPI represents the N-type epitaxial layer 11. Further, the formation of the N-well region 4 and the P-well region 5 in the N-type epitaxial layer 11 includes: Photolithography is performed on the N-type epitaxial layer 11 to define a first well region in the N-type epitaxial layer 11; P-type ion implantation is performed on the first well region to form P-well region 5; Photolithography is performed on the N-type epitaxial layer 11 to define a second well region in the N-type epitaxial layer 11; The second well region is implanted with N-type ions to form N-well region 4.

[0055] In this implementation, the doping regions and spatial distribution of the N-well and P-well regions 5 are precisely controlled through step-by-step photolithography and ion implantation processes.

[0056] Please refer to Figure 11In the figure, N-EPI represents the N-type epitaxial layer 11. Further, a P-type drift region 6 is formed in the N-type epitaxial layer 11, located below the local silicon oxide structure 3. Multiple ion implantations are performed on the P-type drift region 6 with a preset incident angle and preset device direction until the ion concentration in the P-type drift region 6 meets a preset concentration threshold, thereby forming a boundary of an ion concentration gradient change region in the P-type drift region 6, and ensuring that the boundary of the ion concentration gradient change region is far from the projected area directly below the local silicon oxide structure 3.

[0057] Please refer to Figure 12 In the figure, N-EPI represents the N-type epitaxial layer 11. Further, the formation of a gate oxide layer 7 on the surface of the N-well region 4, and subsequently the formation of a gate polysilicon 8 on the surfaces of the N-type epitaxial layer 11 and the local silicon oxide structure 3, includes: A first oxide layer is deposited on the surfaces of the N-type epitaxial layer 11 and the localized silicon oxide structure 3; The first oxide layer is etched to form a gate oxide layer 7 on the surface of the N-well region 4. A first polysilicon layer is deposited on the surfaces of the N-type epitaxial layer 11 and the localized silicon oxide structure 3; The first polysilicon layer is etched to form a gate polysilicon 8 on the surface of the N-type epitaxial layer 11 and the local silicon oxide structure 3.

[0058] In this implementation, a uniform and high-quality gate oxide layer 7 and a polysilicon gate are formed through deposition and etching processes, ensuring precise control and integrity of the transistor gate structure, thereby optimizing the device threshold voltage stability, transconductance and switching characteristics, and improving the device reliability and electrical performance.

[0059] Please refer to Figure 13 In the figure, N-EPI represents the N-type epitaxial layer 11, and N-Well represents the N-well region 4. Further, the formation of the N-type implantation region 9 and the first P-type implantation region 101 in the N-well region 4 includes: The N-well region 4 is photolithographically etched to define the N-type injection region pattern; N-type ion implantation is performed based on the N-type implantation region pattern to form an N-type implantation region 9 in the N-well region 4; The N-well region 4 is photolithographically etched to define the first P-type implantation region pattern; P-type ion implantation is performed based on the first P-type implantation region pattern, thereby forming a first P-type implantation region 101 in the N-well region 4.

[0060] Photolithography is performed on the P-well region 5 to define the second P-type injection region pattern; P-type ion implantation is performed based on the second P-type implantation region pattern, thereby forming a second P-type implantation region 102 in the P-trap region 5.

[0061] In this implementation, N-type and P-type implantation regions are precisely formed through photolithography and ion implantation processes, defining the body region and source region of the transistor. A second P-type implantation region 102 is formed in the P-well region 5 through photolithography and ion implantation processes, defining the drain region of the transistor. This optimizes the doping concentration and junction depth, thereby reducing contact resistance, junction leakage current and short-channel effect, and improving the device current drive capability, switching speed and overall circuit performance.

[0062] Please refer to Figure 14 A second aspect of the present invention provides a P-type DEMOS device fabrication system, comprising: Epitaxial layer forming module 100 is used to provide substrate 1 and grow N-type epitaxial layer 11 on substrate 1; A deep P-well layer 2 forming module 200 is used to form a deep P-well layer 2 in the N-type epitaxial layer 11; A localized silicon oxide forming module 300 is used to grow a localized silicon oxide structure 3 on the surface of the N-type epitaxial layer 11. A well region forming module 400 is used to form an N-well region 4 and a P-well region 5 in the N-type epitaxial layer 11; P-type drift region 6 forming module 500 is used to form P-type drift region 6 in the N-type epitaxial layer 11, wherein the P-type drift region 6 is located below the local silicon oxide structure 3; The ion doping module 600 is used to perform multiple ion implantations on the P-type drift region 6 at a preset incident angle and a preset device direction until the ion concentration of the P-type drift region 6 meets a preset concentration threshold, thereby forming the boundary of the ion concentration gradient change region in the P-type drift region 6, and making the boundary of the ion concentration gradient change region far away from the projection area directly below the local silicon oxide structure 3. A gate forming module 700 is used to form a gate oxide layer 7 on the surface of the N-well region 4, and then form a gate polysilicon 8 on the surface of the N-type epitaxial layer 11 and the local silicon oxide structure 3. N-well region 4 injection module 800 is used to form an N-type injection region 9 and a first P-type injection region 101 in the N-well region 4; P-well region 5 injection module 900 is used to form a second P-type injection region 102 in the P-well region 5.

[0063] Further, the step of performing multiple ion implantations on the P-type drift region 6 at a preset incident angle and preset device direction until the ion concentration in the P-type drift region 6 meets a preset concentration threshold, thereby forming a boundary of an ion concentration gradient change region in the P-type drift region 6, and ensuring that the boundary of the ion concentration gradient change region is far from the projection region directly below the local silicon oxide structure 3, includes: The dose of a single ion implantation is determined based on a preset concentration threshold and a preset number of implantations. The ion implantation energy is determined based on the depth of the P-type drift region 6 and the preset incident angle. Based on the single ion implantation dose, the ion implantation energy, the preset incident angle, and the preset device direction, the P-type drift region 6 is subjected to several ion implantations until the number of ion implantations meets the preset number of implantations. After each ion implantation, the device orientation is updated based on a preset rotation angle.

[0064] The method and system for fabricating a P-type DEMOS device provided by the present invention have at least the following advantages compared with the prior art: To create ion concentration gradient regions that are far removed from the boundary of the local silicon oxide structure 3 in all directions and completely eliminate the voltage withstand weakness of the device, this invention performs multiple ion implantations on the P-type drift region 6 with the same incident angle but different device orientations. Specifically, after each ion implantation, the device is rotated to change its orientation relative to the ion source. Ultimately, the boundaries of the ion concentration gradient regions in all directions of the local silicon oxide are far removed from the boundary of the local silicon oxide structure 3. A gradually increasing ion concentration gradient is formed in the P-type drift region 6 from directly below the LOCOS boundary, avoiding the abrupt changes in ion concentration at the LOCOS boundary caused by traditional ion implantation. This eliminates the voltage withstand weakness at the LOCOS boundary, further improving the voltage withstand performance and stability of the P-type DEMOS. Simultaneously, it increases the ion doping concentration of the P-type drift region 6, thereby increasing the turn-on voltage of the P-type DEMOS.

[0065] The term "embodiment" as used herein means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described; however, any combination of these technical features that does not contradict each other should be considered within the scope of this specification.

[0066] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various improvements and substitutions without departing from the concept of this application, and these improvements and substitutions should also be considered within the scope of protection of this invention. Therefore, the scope of protection of this application should be determined by the appended claims.

Claims

1. A method for fabricating a P-type DEMOS device, characterized in that, include: A substrate is provided, and an N-type epitaxial layer is grown on the substrate; A deep P-well layer is formed in the N-type epitaxial layer, thereby growing a local silicon oxide structure on the surface of the N-type epitaxial layer, and then forming an N-well region and a P-well region in the N-type epitaxial layer; A P-type drift region is formed in the N-type epitaxial layer, and the P-type drift region is located below the local silicon oxide structure; With a preset incident angle and preset device direction, the P-type drift region is implanted with ions multiple times until the ion concentration in the P-type drift region meets a preset concentration threshold, thereby forming a boundary of the ion concentration gradient change region in the P-type drift region, and making the boundary of the ion concentration gradient change region far away from the projection area directly below the local silicon oxide structure. A gate oxide layer is formed on the surface of the N-well region, and then a gate polysilicon layer is formed on the surface of the N-type epitaxial layer and the local silicon oxide structure. An N-type injection region and a first P-type injection region are formed in the N-well region; A second P-type injection region is formed in the P-well region.

2. The method for fabricating a P-type DEMOS device according to claim 1, characterized in that, The step of performing multiple ion implantations on the P-type drift region at a preset incident angle and preset device direction until the ion concentration in the P-type drift region meets a preset concentration threshold, thereby forming a boundary of an ion concentration gradient change region in the P-type drift region, and ensuring that the boundary of the ion concentration gradient change region is far away from the projection region directly below the local silicon oxide structure, includes: The dose of a single ion implantation is determined based on a preset concentration threshold and a preset number of implantations. The ion implantation energy is determined based on the depth of the P-type drift region and the preset incident angle. Based on the single ion implantation dose, the ion implantation energy, the preset incident angle, and the preset device direction, the P-type drift region is subjected to several ion implantations until the number of ion implantations meets the preset number of implantations. After each ion implantation, the device orientation is updated based on a preset rotation angle.

3. The method for fabricating a P-type DEMOS device according to claim 1, characterized in that, The formation of a deep P-well layer in the N-type epitaxial layer includes: Photolithography is performed on the N-type epitaxial layer to define a deep P-well layer pattern in the N-type epitaxial layer; Ion implantation is performed on the N-type epitaxial layer based on the deep P-well layer pattern to form a deep P-well layer in the N-type epitaxial layer.

4. The method for fabricating a P-type DEMOS device according to claim 1, characterized in that, The process of growing a localized silicon oxide structure on the surface of the N-type epitaxial layer includes: Photolithography is performed on the N-type epitaxial layer to form an active region in the N-type epitaxial layer; The active region is etched to form local trenches, and then silicon oxide is grown on the local trenches to form a local silicon oxide structure.

5. The method for fabricating a P-type DEMOS device according to claim 1, characterized in that, The formation of N-well and P-well regions in the N-type epitaxial layer includes: Photolithography is performed on the N-type epitaxial layer to define a first well region in the N-type epitaxial layer; P-type ion implantation is performed on the first well region to form a P-well region; Photolithography is performed on the N-type epitaxial layer to define a second well region in the N-type epitaxial layer; The second well region is implanted with N-type ions to form an N-well region.

6. The method for fabricating a P-type DEMOS device according to claim 1, characterized in that, The process of forming a gate oxide layer on the surface of the N-well region, and then forming a gate polysilicon layer on the surface of the N-type epitaxial layer and the local silicon oxide structure, includes: A first oxide layer is deposited on the surface of the N-type epitaxial layer and the local silicon oxide structure; The first oxide layer is etched to form a gate oxide layer on the surface of the N-well region; A first polycrystalline silicon layer is deposited on the surface of the N-type epitaxial layer and the localized silicon oxide structure; The first polysilicon layer is etched to form gate polysilicon on the surface of the N-type epitaxial layer and the local silicon oxide structure.

7. The method for fabricating a P-type DEMOS device according to claim 1, characterized in that, The formation of an N-type injection region and a first P-type injection region in the N-well region includes: The N-well region is photolithographically etched to define the N-type injection region pattern; N-type ion implantation is performed based on the N-type implantation region pattern to form an N-type implantation region in the N-well region; The N-well region is photolithographically etched to define the pattern of the first P-type implantation region; P-type ion implantation is performed based on the first P-type implantation region pattern, thereby forming the first P-type implantation region in the N-well region.

8. The method for fabricating a P-type DEMOS device according to claim 1, characterized in that, The formation of a second P-type injection region in the P-well region includes: Photolithography is performed on the P-well region to define the second P-type injection region pattern; P-type ion implantation is performed based on the second P-type implantation region pattern, thereby forming a second P-type implantation region in the P-well region.

9. A P-type DEMOS device fabrication system, characterized in that, include: An epitaxial layer forming module is used to provide a substrate and grow an N-type epitaxial layer on the substrate; A deep P-well layer forming module is used to form a deep P-well layer in the N-type epitaxial layer; A localized silicon oxide forming module is used to grow a localized silicon oxide structure on the surface of the N-type epitaxial layer; A well region forming module is used to form N-well regions and P-well regions in the N-type epitaxial layer; A P-type drift region forming module is used to form a P-type drift region in the N-type epitaxial layer, wherein the P-type drift region is located below the local silicon oxide structure; An ion doping module is used to perform multiple ion implantations on the P-type drift region at a preset incident angle and a preset device direction until the ion concentration in the P-type drift region meets a preset concentration threshold, thereby forming a boundary of an ion concentration gradient change region in the P-type drift region, and making the boundary of the ion concentration gradient change region far away from the projection region directly below the local silicon oxide structure. A gate forming module is used to form a gate oxide layer on the surface of the N-well region, and then form gate polysilicon on the surface of the N-type epitaxial layer and the local silicon oxide structure. The N-well region injection module is used to form an N-type injection region and a first P-type injection region in the N-well region; The P-well injection module is used to form a second P-type injection region in the P-well region.

10. The P-type DEMOS device fabrication system according to claim 9, characterized in that, The step of performing multiple ion implantations on the P-type drift region at a preset incident angle and preset device direction until the ion concentration in the P-type drift region meets a preset concentration threshold, thereby forming a boundary of an ion concentration gradient change region in the P-type drift region, and ensuring that the boundary of the ion concentration gradient change region is far away from the projection region directly below the local silicon oxide structure, includes: The dose of a single ion implantation is determined based on a preset concentration threshold and a preset number of implantations. The ion implantation energy is determined based on the depth of the P-type drift region and the preset incident angle. Based on the single ion implantation dose, the ion implantation energy, the preset incident angle, and the preset device direction, the P-type drift region is subjected to several ion implantations until the number of ion implantations meets the preset number of implantations. After each ion implantation, the device orientation is updated based on a preset rotation angle.

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