Fault diagnosis method and device, vehicle and computer readable storage medium

Abstract

The invention provides a fault diagnosis method and device, a vehicle and a computer readable storage medium, and relates to the technical field of high-voltage interlocking, and the method comprises the steps: obtaining a detection signal of a high-voltage interlocking loop; the detection signal is diagnosed through a preset multi-mode state machine, the multi-mode state machine is configured to be switched among a normal diagnosis state, a suspected interference diagnosis state and a fault confirmation diagnosis state, and the multi-mode state machine is only in one diagnosis state at any moment; and according to a diagnosis result of the multi-mode state machine, judging that the current state of the high-voltage interlocking loop is a real fault, instantaneous interference or normal connection. Acquisition, diagnosis and confirmation processes in the method are all realized through software, discrete components such as resistors and capacitors required by an RC filter circuit in related technologies do not need to be arranged, cost and space occupation caused by the components are effectively eliminated, and miniaturization and high-integration design of products can be realized.

Description

Technical Field

[0001] This application relates to the field of high-voltage interlocking technology, and more specifically, to a fault diagnosis method, apparatus, vehicle, and computer-readable storage medium. Background Technology

[0002] To monitor the operational status of high-voltage electrical systems in real time, vehicles typically incorporate a High Voltage Interlock Loop (HVIL) system. This system includes multiple high-voltage connectors and corresponding low-voltage detection connectors. Currently, HVIL system detection is usually achieved by the main control chip reading the voltage level signal of the HVIL circuit through a signal acquisition circuit. However, the electrical environment of electric vehicles is extremely complex, with significant electromagnetic interference. This interference can cause brief low-level pulses on the signal lines, leading the main control chip to mistakenly interpret the HVIL circuit as open, triggering false alarms, or even causing unexpected power outages or breakdowns, severely impacting vehicle reliability and user experience.

[0003] Therefore, related technologies typically employ hardware RC filter circuits to achieve anti-interference detection. However, this method is a hardware-based approach, which increases the number of components and thus manufacturing costs. Furthermore, these components occupy space on the printed circuit board (PCB). Summary of the Invention

[0004] This application provides a fault diagnosis method, device, vehicle, and computer-readable storage medium, aiming to solve the problem that the hardware processing method used in the related art for anti-interference detection of high-voltage interlock detection circuits results in a large number of components, high manufacturing cost, and a large PCB space occupation.

[0005] Firstly, a fault diagnosis method is provided, applied to a high-voltage interlock circuit with multiple low-voltage detection connectors. The method includes: acquiring the detection signal of the high-voltage interlock circuit; diagnosing the detection signal through a preset multi-mode state machine, wherein the multi-mode state machine is configured to switch between a normal diagnosis state, a suspected interference diagnosis state, and a fault confirmation diagnosis state, and is in only one diagnosis state at any given time; and determining, based on the diagnosis result of the multi-mode state machine, whether the current state of the high-voltage interlock circuit is a real fault, a transient interference, or a normal connection.

[0006] In the above technical solution, the acquisition, diagnosis, and confirmation processes are all implemented through software, which can be injected into the vehicle's existing MCU or other chips. This eliminates the need for discrete components such as resistors and capacitors required by the RC filter circuit in related technologies, effectively reducing the cost and space occupation caused by these components and facilitating miniaturization and high integration design. Secondly, the multi-mode state machine in this method, through timing logic and state transition mechanisms, can effectively distinguish between real, continuous connection / disconnection and instantaneous, brief interference fluctuations in the high-voltage interlock circuit, reducing false alarm and false negative rates and improving the robustness of high-voltage interlock circuit fault diagnosis. Furthermore, the judgment logic and parameters of the multi-mode state machine can be adjusted in real time through software configuration, facilitating adaptation to different application scenarios (e.g., flexible adaptation to vehicle platforms with different electromagnetic environments and safety requirements, from economy to luxury models), and supports future software upgrades to optimize diagnostic strategies without hardware modifications, significantly improving system adaptability and maintenance efficiency.

[0007] In conjunction with the first aspect, in some possible implementations, when the multi-mode state machine is in the normal diagnostic state, the method includes: starting a first counter in response to a level transition of the detection signal; detecting the level state of the detection signal; if the detected level state is a first level, clearing the first counter to zero and maintaining the normal diagnostic state as the current diagnostic state; if the detected level state is a second level, incrementing the count value of the first counter and switching to the suspected interference diagnostic state; wherein the logic values ​​of the first level and the second level are opposite.

[0008] In the above technical solution, if the detected signal immediately recovers to the first level (i.e., normal state) after a level transition is detected, it indicates that the anomaly was extremely short-lived. At this point, by immediately resetting the first counter to zero and maintaining it in the normal diagnostic state, millisecond-level rapid filtering and recovery of the most obvious transient interference is achieved, enabling instantaneous recovery and rapid resetting. This process is rapid, consumes almost no additional system resources, and demonstrates excellent immunity to high-frequency noise. If the detected level is low, the count value of the first counter is incremented, for example, by adding one, and the system switches to the suspected interference diagnostic state. If the signal remains at the second level (i.e., abnormal state) after the transition, it indicates that the anomaly may be persistent. At this point, by incrementing the count value of the first counter and immediately switching to the suspected interference diagnostic state, a higher-level, in-depth analysis process based on counting and sampling is initiated. Furthermore, in the normal diagnostic state, there is no need to continuously execute complex diagnostic algorithms at a high frequency; instead, it is sufficient to silently monitor the critical event of the "level transition" of the detected signal. Only when a transition occurs is the first counter activated, and subsequent diagnostic procedures initiated. This event-driven working mode saves computational overhead and power consumption during most of the time when there are no anomalies, significantly optimizing energy efficiency.

[0009] In conjunction with the first aspect and the above implementation methods, in some possible implementation methods, when the multi-mode state machine is in a suspected interference diagnosis state, the method includes: continuously detecting the level state at a preset sampling period; if the detected level state is a first level, then decrementing the count value of the first counter and determining the current value of the first counter; if the current value is greater than or equal to a first threshold, then maintaining the suspected interference diagnosis state as the current diagnosis state; if the current value is less than the first threshold, then clearing the first counter and switching back to the normal diagnosis state; if the detected level state is a second level, then incrementing the count value of the first counter and determining the current value of the first counter; if the current value is greater than or equal to the second threshold, then switching to the fault confirmation diagnosis state; if the current value is less than the second threshold, then maintaining the suspected interference diagnosis state as the current diagnosis state; wherein, the first threshold and the second threshold are positive integers, and the second threshold is greater than the first threshold.

[0010] In the above technical solution, under suspected interference diagnostic conditions, by incrementing (when an abnormal second level is sampled) and decrementing (when a normal first level is sampled) the first counter, this strategy essentially performs digital integration on the "duty cycle" or "accumulated abnormal energy" of the abnormal signal. This method reflects the dynamic characteristics of the signal more accurately than simple time accumulation. For example, a series of dense short-pulse interferences will cause the count value of the first counter to rise rapidly, while a longer normal interval will cause the count value of the first counter to fall slowly, achieving bidirectional counting. Secondly, a first threshold and a second threshold are set. The count value must accumulate to a higher level (the second threshold) to be considered sufficiently serious to enter fault confirmation; and once entering the suspected interference diagnostic state, the count value must fall back to a lower level (below the first threshold) to be considered "recovered" and return to the normal diagnostic state. Compared with the single threshold method, this application, through the dual threshold method, effectively prevents frequent state jitter caused by small signal fluctuations near the threshold critical point, ensuring the diagnostic stability and accuracy of the diagnostic state.

[0011] Combining the first aspect and the above implementation methods, in some possible implementation methods, when the multi-mode state machine is in the fault confirmation and diagnosis state, the method includes: starting the second counter; detecting the level state; if the detected level state is the first level, reverting to the suspected interference diagnosis state; if the detected level state is the second level, incrementing the count value of the second counter, and judging the current value of the second counter; if the current value is greater than or equal to the third threshold, triggering the fault latching mechanism; if the current value is less than the third threshold, maintaining the fault confirmation and diagnosis state as the current diagnosis state.

[0012] In the above technical solution, although the system enters the highest level of fault confirmation and diagnosis, if the abnormal signal is unstable or recovers to the first level on its own, it will still revert to the previous suspected interference diagnosis state, further enhancing the system's fault tolerance and decision accuracy. When the detected level is the second level, a completely new and independent second counter is started to avoid the diagnostic results being affected by accidental interference accumulated in the previous suspected interference diagnosis state, thus improving diagnostic reliability. Simultaneously, in the fault confirmation state, the system also sets a third threshold. Only when the accumulated count value of the second counter reaches or exceeds this threshold will the fault latching mechanism be finally triggered. Through this mechanism, the possibility of misjudging any complex and persistent interference as a real fault can be minimized, effectively reducing the false alarm rate and improving diagnostic accuracy and reliability.

[0013] In combination with the first aspect and the above implementation methods, in some possible implementation methods, the fault latching mechanism is triggered, including: storing the fault information in a non-volatile memory and reporting it to the vehicle controller.

[0014] In the above technical solution, this millisecond-level automated closed loop from detection and judgment to reporting and handling upgrades the function of the high-voltage interlock system from simple "monitoring" to proactive "safety protection," greatly shortening the time window from the occurrence of a fault to the effectiveness of safety measures, and providing the highest level of safety protection for drivers and passengers and the vehicle itself.

[0015] In combination with the first aspect and the above implementation methods, in some possible implementation methods, if the current value is greater than or equal to the second threshold, after switching to the fault confirmation and diagnosis state, the method further includes: clearing the second counter to zero.

[0016] In the above technical solution, the second counter is dedicated to independent counting during the fault confirmation phase. Before switching from the suspected interference diagnosis state to the fault confirmation diagnosis state, the second counter is reset to zero, ensuring that the counter accumulates from an absolute zero baseline. This completely eliminates any risk of potential interference to the final decision caused by incomplete counter initialization, residual memory values, or data left over from the previous diagnosis cycle, ensuring the accuracy of the final fault determination.

[0017] In combination with the first aspect and the above implementation methods, in some possible implementation methods, before acquiring the detection signal of the high-voltage interlock circuit, the method further includes: setting a first threshold, a second threshold, and a third threshold; setting the normal diagnostic state as the initial diagnostic state of the multi-mode state machine; and clearing the first counter and the second counter.

[0018] In the above technical solution, the multi-mode state machine is initialized to a normal diagnostic state, and the first and second counters are cleared to zero, establishing an absolutely clear and consistent starting point for the entire diagnostic process. This ensures that regardless of any abnormal shutdown or reset the system experiences, its diagnostic behavior after restarting is deterministic and repeatable, eliminating uncertain behavior caused by state remnants. Secondly, clearing the first and second counters to zero also prevents misjudgments in the initial diagnosis due to non-volatile memory remnants or data left over from the previous run, thus establishing a clear initial baseline and ensuring the accuracy of the initial diagnosis.

[0019] Secondly, embodiments of this application provide a fault diagnosis device applied to a high-voltage interlock circuit with multiple low-voltage detection connectors. The device includes: an acquisition module for acquiring detection signals from the high-voltage interlock circuit; a diagnosis module for diagnosing the detection signals using a preset multi-mode state machine, wherein the multi-mode state machine is configured to switch between a normal diagnosis state, a suspected interference diagnosis state, and a fault confirmation diagnosis state, and is in only one diagnosis state at any given time; and a confirmation module for determining, based on the diagnosis results of the multi-mode state machine, whether the current state of the high-voltage interlock circuit is a real fault, a transient interference, or a normal connection.

[0020] Thirdly, a vehicle is provided, the vehicle including a memory and a processor; the memory is used to store executable program code; the processor is used to call and run the executable program code from the memory, causing the vehicle to perform the fault diagnosis method in any possible implementation of the second aspect and the second aspect.

[0021] Fourthly, a computer program product is provided, comprising: computer program code, which, when run on a computer, causes the computer to perform the fault diagnosis method in any possible implementation of the second aspect and the second aspect described above.

[0022] Fifthly, a computer-readable storage medium is provided, which stores a computer program that, when executed, causes the computer to perform the fault diagnosis method in any possible implementation of the second aspect and the second aspect described above. Attached Figure Description

[0023] Figure 1 This is a schematic flowchart of a fault diagnosis method provided in an embodiment of this application; Figure 2 This is a schematic flowchart of another fault diagnosis method provided in the embodiments of this application; Figure 3 This is a schematic diagram of the structure of a vehicle provided in an embodiment of this application.

[0024] In the attached figures, the following labels are used: 3. Vehicle; 31. Memory; 32. Processor; 311. Executable program code. Detailed Implementation

[0025] The technical solutions in this application will be clearly and thoroughly described below with reference to the accompanying drawings. In the description of the embodiments of this application, unless otherwise stated, " / " means "or," for example, A / B can mean A or B. "And / or" in the text is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Furthermore, in the description of the embodiments of this application, "multiple" refers to two or more than two.

[0026] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as implying or suggesting relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature.

[0027] Currently, new energy vehicles are widely used in various scenarios, replacing internal combustion engine vehicles. Compared to internal combustion engine vehicles, new energy vehicles produce less noise and do not directly emit exhaust fumes, making them more environmentally friendly. At the same time, new energy vehicles are more intelligent, have higher energy conversion efficiency, and lower maintenance costs, leading to a growing number of people using them as their mode of transportation. New energy vehicles typically include a power battery to provide power to the vehicle and drive motor. For example, the power battery outputs direct current (DC) to the motor. The motor control unit (MCU) converts this DC power into three-phase alternating current (AC) to control the motor, according to the target torque and speed sent by the vehicle control unit (VCU). This AC power controls the motor to perform functions such as starting, acceleration, deceleration, braking, and energy recovery, ensuring the normal operation of the vehicle.

[0028] New energy vehicles typically have two electrical systems: a high-voltage system and a low-voltage system. The high-voltage system contains a high-voltage battery (e.g., a power battery) that powers high-power electrical equipment (e.g., motors) to drive the vehicle. Simultaneously, the power battery, under the control of the vehicle controller, charges the low-voltage battery, typically at several hundred volts. To ensure the safety of the driver, passengers, and the vehicle itself, a high-voltage interlock system is usually included. This system consists of high-voltage connectors and a control system. The connectors connect various components in the high-voltage electrical system (e.g., high-voltage batteries, motors, inverters, etc.), ensuring the safe transmission of high-voltage current. Each connector typically has an interlock contact, and these contacts are connected in series to form a complete high-voltage interlock circuit. The high-voltage interlock circuit and control system can promptly cut off the high-voltage power supply in case of an abnormality in the high-voltage electrical system, thus preventing electric shock and fire risks.

[0029] High-voltage connectors may become loose or detached, causing an abnormality in the high-voltage interlock circuit. To monitor the connection status of the high-voltage interlock circuit in real time, high-voltage interlock systems in related technologies typically include low-voltage detection connectors, low-voltage detection ports, and a control system. Low-voltage detection connectors connect the low-voltage detection ports and the high-voltage interlock circuit to ensure reliable signal transmission; they are usually distributed among various nodes in the high-voltage interlock circuit. Low-voltage detection ports send and receive low-voltage signals (e.g., 5V or 12V) to detect the status of the high-voltage interlock circuit. The detection principle is generally as follows: before vehicle startup, the control system sends a low-voltage excitation signal through the low-voltage detection port. This excitation signal travels through the low-voltage detection connector along the interlock contacts of all high-voltage connectors in the high-voltage interlock circuit. If all high-voltage connectors are correctly connected, the excitation signal will be successfully transmitted and returned to the low-voltage detection port through the low-voltage detection connector. If the low-voltage detection port receives a feedback signal matching the sent excitation signal, it indicates that all high-voltage connectors are correctly connected and the high-voltage interlock circuit is normal. At this point, the control system will activate the high-voltage power supply, and the high-voltage electrical system will begin operation. If a fault is detected in the high-voltage interlock circuit, the control system will take the same action, namely, cutting off the high-voltage output of all loads. This technology monitors the electrical integrity (connectivity) of the entire high-voltage system through a low-voltage signal loop that runs through all high-voltage components and connectors. When this loop is broken for any reason (such as a loose connector or improper insertion during maintenance), the vehicle controller must detect it promptly and take safety measures, such as disconnecting the main relay or preventing the vehicle from starting.

[0030] Currently, the detection of high-voltage interlock status in related technologies is typically achieved by the main control chip reading the voltage level signal of the high-voltage interlock circuit through a signal acquisition circuit. For example, a high level indicates that the circuit is connected (normal), and a low level indicates that the circuit is disconnected (abnormal). However, the electrical environment of electric vehicles is extremely complex, with a large amount of electromagnetic interference. This interference may cause brief low-level pulses to be generated on the signal lines, causing the main control chip to misinterpret it as a high-voltage interlock disconnection, thereby triggering a false alarm, or even causing unexpected power outages or breakdowns, seriously affecting vehicle reliability and user experience.

[0031] In related technologies, hardware RC filter circuits are typically used to achieve interference suppression. However, this method is a hardware-based approach, which increases the number of components and thus increases manufacturing costs. Furthermore, these components occupy space on the printed circuit board. Secondly, the filtering effect is limited by the time constants of the resistors and capacitors, resulting in limited adjustment flexibility.

[0032] Therefore, embodiments of this application provide a fault diagnosis method, device, vehicle, and computer-readable storage medium. The acquisition, diagnosis, and confirmation processes in this method are all implemented through software, eliminating the need for discrete components such as resistors and capacitors required by the RC filter circuit in related technologies. This effectively eliminates the cost and space occupation caused by these components, which is conducive to the miniaturization and high integration design of the product.

[0033] The following description, in conjunction with the accompanying drawings, provides an exemplary description of the fault diagnosis method, apparatus, vehicle, and computer-readable storage medium provided in the embodiments of this application.

[0034] In one example, the fault diagnosis method provided in this application is applied to a vehicle, which includes a high-voltage electrical system and a low-voltage electrical system. The high-voltage electrical system includes a high-voltage battery (e.g., a power battery) that supplies power to high-power electrical equipment (e.g., motors, inverters, and other high-voltage components) in the vehicle to drive it and maintain normal operation. Simultaneously, the power battery, under the control of the vehicle controller, charges the low-voltage battery in the low-voltage electrical system. The low-voltage electrical system includes a low-voltage battery (e.g., a 12V storage battery) and a DC-DC converter (DCDC). The DC-DC converter converts the high-voltage electricity from the high-voltage battery to low-voltage electricity to meet the signal transmission / control requirements of the vehicle; details of this will not be elaborated further.

[0035] In high-voltage electrical systems, the voltage is typically several hundred volts or higher. When personnel are repairing or inspecting vehicles, they may accidentally come into contact with high-voltage components that are not fully disconnected, leading to electric shock. Furthermore, short circuits or poor connections in high-voltage electrical systems can cause sparks or overheating, potentially leading to fires, posing significant safety hazards. Therefore, the vehicle provided in this application is equipped with a high-voltage interlock system. This system includes high-voltage connectors used to connect various components in the high-voltage electrical system, ensuring the safe transmission of high-voltage current. Each high-voltage connector typically has an interlock contact, and these contacts are connected in series via wires to form a complete high-voltage interlock circuit. This circuit ensures that the high-voltage power supply will not be activated when the high-voltage connector is not fully connected or disconnected, thus preventing personnel from contacting energized high-voltage components. Simultaneously, when the high-voltage electrical system experiences a short circuit or poor connection, the high-voltage interlock circuit can quickly cut off the high-voltage power supply, preventing fires caused by electrical faults.

[0036] In one example, the vehicle provided in this application also includes a fault diagnosis device and multiple low-voltage detection connectors. The low-voltage detection connectors are located in the high-voltage interlock circuit and correspond to the high-voltage connectors. The fault diagnosis device in this application can detect faults in the high-voltage interlock circuit and accurately locate faults by detecting the connection status of the low-voltage detection connectors. It is worth noting that the number of low-voltage detection connectors can be equal to or less than the number of high-voltage connectors. When the number of low-voltage detection connectors is equal to the number of high-voltage connectors, there is a one-to-one correspondence between the high-voltage connectors and the low-voltage detection connectors, ensuring that the status of each high-voltage connector can be detected independently, thereby improving system safety. When the number of low-voltage detection connectors is less than the number of high-voltage connectors, multiple high-voltage connectors can be connected to the same low-voltage detection connector to save manufacturing costs. The specific configuration can be determined according to actual needs, and this application does not impose specific limitations on this.

[0037] The electrical environment of electric vehicles is extremely complex, with a large amount of electromagnetic interference. This interference can cause brief low-level pulses to be generated on signal lines, leading fault diagnosis devices to misinterpret it as a disconnection of the high-voltage interlock circuit, thereby triggering false alarms, or even causing unexpected power outages or breakdowns, seriously affecting vehicle reliability and user experience. Therefore, this application also provides a fault diagnosis method capable of performing anti-interference detection on the high-voltage interlock circuit.

[0038] The fault diagnosis method provided in the embodiments of this application will be described exemplarily below with reference to the accompanying drawings. In one example, Figure 1 This is a schematic flowchart of a fault diagnosis method provided in an embodiment of this application; the method 100 includes S101 to S103; S101 to S103 are described in detail below: S101. Obtain the detection signal of the high-voltage interlock circuit.

[0039] This step triggers the fault diagnosis and serves as the starting point for data acquisition. Through this step, the detection signals of the high-voltage interlock circuit can be acquired in real time, providing raw data input for software diagnosis.

[0040] Alternatively, this step can be implemented using the vehicle's existing signal acquisition circuitry, such as an analog-to-digital converter (ADC) module or the signal acquisition port of a microcontroller unit (MCU), without the need for additional dedicated filtering hardware, thus avoiding additional material costs and PCB layout burden. Secondly, directly acquiring the raw signal without hardware filtering preserves the complete information dimension for subsequent software algorithms in fault diagnosis methods, avoiding signal feature loss that might occur with hardware filtering.

[0041] S102. Diagnose the detection signal through a preset multi-mode state machine. The multi-mode state machine is configured to switch between normal diagnosis state, suspected interference diagnosis state and fault confirmation diagnosis state, and is only in one diagnosis state at any given time.

[0042] Understandably, the multi-mode state machine used in this step is entirely implemented in software. For example, it can run in the vehicle's existing MCU without the need for discrete components such as resistors and capacitors required by the RC filter circuit in related technologies, effectively eliminating the cost and space occupation caused by these components.

[0043] In this step, the multi-mode state machine design includes multiple diagnostic states: normal diagnostic state, suspected interference diagnostic state, and fault confirmation diagnostic state. It can automatically and flexibly switch between these states based on pre-stored diagnostic mechanisms. For example, when a transient anomaly occurs in the detected signal, the multi-mode state machine can transition from the normal diagnostic state to the suspected interference diagnostic state and initiate timing monitoring instead of immediately reporting an error, thus identifying and buffering the transient interference. If the signal returns to normal within a preset time, the multi-mode state machine returns to the normal diagnostic state, determining the anomaly as transient interference. If the anomaly persists beyond a set threshold, the multi-mode state machine enters the fault confirmation diagnostic state, determining it as a genuine fault.

[0044] By combining a multi-mode diagnostic mechanism that integrates normal diagnostic status, suspected interference diagnostic status, and fault confirmation diagnostic status, intelligent diagnosis is achieved without manual intervention, effectively improving diagnostic efficiency.

[0045] S103. Based on the diagnostic results of the multi-mode state machine, determine whether the current state of the high-voltage interlock circuit is a real fault, a transient interference, or a normal connection.

[0046] In summary, the acquisition, diagnosis, and verification processes in this method are all implemented through software, which can be injected into the vehicle's existing MCU or other chips. This eliminates the need for discrete components such as resistors and capacitors required by RC filter circuits in related technologies, effectively reducing the cost and space occupation associated with these components and facilitating miniaturization and high integration design. Secondly, the multi-mode state machine in this method, through timing logic and state transition mechanisms, can effectively distinguish between real, continuous connection / disconnection and instantaneous, brief interference fluctuations in the high-voltage interlock circuit, reducing false alarm and false negative rates and improving the robustness of high-voltage interlock circuit fault diagnosis. Furthermore, the judgment logic and parameters of the multi-mode state machine can be adjusted in real time through software configuration, facilitating adaptation to different application scenarios (e.g., flexible adaptation to vehicle platforms with different electromagnetic environments and safety requirements, from economy to luxury models), and supports future software upgrades to optimize diagnostic strategies without hardware modifications, significantly improving system adaptability and maintenance efficiency.

[0047] The following is about Figure 1 The implementation methods of each step in the illustrated embodiment are explained in detail below: Regarding step S102, in some embodiments, when the multi-mode state machine is in the normal diagnostic state, the method includes: starting a first counter in response to a level transition of the detection signal; detecting the level state of the detection signal; if the detected level state is a first level, clearing the first counter to zero and maintaining the normal diagnostic state as the current diagnostic state; if the detected level state is a second level, incrementing the count value of the first counter and switching to the suspected interference diagnostic state; wherein, the logic values ​​of the first level and the second level are opposite.

[0048] It is worth noting that this application only limits the logic values ​​of the first and second levels to be opposite, but does not specifically define what is normal and what is abnormal (i.e., if the first level is low, then the second level is high; if the first level is high, then the second level is low), in order to improve adaptability. That is, the first and second levels can seamlessly adapt to different electrical conventions (active high or active low) of high-voltage interlock detection signals under different manufacturers or different circuit designs, requiring only level definition settings at the software configuration level without changing the core algorithm logic, thus enhancing the versatility and portability of the solution.

[0049] In this step, after acquiring the detection signal from the high-voltage interlock circuit, the multi-mode state machine enters the normal diagnostic state. At this time, in response to the level change of the detection signal, the first counter is started, and the level state of the detection signal is detected. When a level change is detected, if the detection signal immediately returns to the first level (i.e., the normal state), it indicates that the anomaly was extremely brief. At this point, by immediately resetting the first counter to zero and maintaining it in the normal diagnostic state, millisecond-level rapid filtering and recovery from the most obvious transient interference is achieved, i.e., instantaneous recovery and rapid resetting are possible. This process is rapid, consumes almost no additional system resources, and demonstrates excellent immunity to high-frequency noise.

[0050] If a low-level signal is detected, the count value of the first counter is incremented (e.g., by one), and the system switches to the suspected interference diagnosis state. If the signal remains at the second level (i.e., an abnormal state) after the transition, it indicates that the abnormality may be persistent. In this case, the count value of the first counter is incremented, and the system immediately switches to the suspected interference diagnosis state, initiating a higher-level, in-depth analysis process based on counting and sampling. This enables rapid response and early intervention to potential real faults or complex interference.

[0051] Thus, when the multi-mode state machine is in normal diagnostic mode, the specific logic it executes is to start counting in response to level transitions and reset or switch based on the sustained level. In normal diagnostic mode, there is no need to continuously execute complex diagnostic algorithms at high frequency; instead, it silently monitors the critical event of "level transitions" in the detection signal. Only when a transition occurs (e.g., a transition from a first level indicating normal connection to a second level indicating an anomaly) is the first counter started, activating the subsequent diagnostic process. This event-driven operating mode saves computational overhead and power consumption during most of the anomaly-free time, significantly optimizing energy efficiency. Furthermore, limiting the trigger condition to "level transitions," rather than simple, unchanging "level states," effectively filters out uncertain level phases that may exist during system power-on initialization or signal steady-state processes, ensuring that the diagnostic process only starts when a clear, dynamic state change is detected, improving the reliability of system operation.

[0052] It should be understood that when the multi-mode state machine is in normal diagnostic mode, if a second level is detected, the system does not immediately compare it with a preset threshold, but first enters a suspected interference diagnostic state. This avoids excessive and complex analysis and judgment of the detected signal in the initial stage, thereby reducing unnecessary computational overhead.

[0053] When the multi-mode state machine switches to the suspected interference diagnosis state, in some embodiments, when the multi-mode state machine is in the suspected interference diagnosis state, the method includes: continuously detecting the level state at a preset sampling period; if the detected level state is a first level, then decrementing the count value of a first counter and determining the current value of the first counter; if the current value is greater than or equal to a first threshold, then maintaining the suspected interference diagnosis state as the current diagnosis state; if the current value is less than the first threshold, then clearing the first counter and switching back to the normal diagnosis state; if the detected level state is a second level, then incrementing the count value of the first counter and determining the current value of the first counter; if the current value is greater than or equal to a second threshold, then switching to the fault confirmation diagnosis state; if the current value is less than the second threshold, then maintaining the suspected interference diagnosis state as the current diagnosis state; wherein, the first threshold and the second threshold are positive integers.

[0054] In this step, when the multi-mode state machine is in a suspected interference diagnosis state, it executes fine-grained decision logic based on periodic sampling, bidirectional counting, and two-level threshold comparison to distinguish between transient interference and potential real faults. The second threshold is set to be greater than the first threshold; for example, the second threshold is set to 15, the first threshold is set to 5, and the sampling period is set to 1ms.

[0055] If the detected level is at the first level, the count value of the first counter is decremented, and the current value of the first counter is checked. If the current value is greater than or equal to 5, the suspected interference diagnosis state is maintained as the current diagnosis state. If the current value is less than 5, the first counter is cleared, and the system switches back to the normal diagnosis state. It should be understood that for typical, rapidly changing intermittent interference (such as that caused by electromagnetic noise), the appearance of the second level is brief and random, with the first level dominating. Therefore, the value of the first counter will hover around the first threshold, making it difficult to accumulate to the second threshold. The system will eventually switch back to the normal diagnosis state when the count value falls below the first threshold, effectively filtering out this type of interference, and the entire process does not require complex waveform analysis.

[0056] If the detected voltage level is the second level, the first counter is incremented, and its current value is checked. If the current value is greater than or equal to 15, the system switches to the fault confirmation and diagnosis state. If the current value is less than 15, the suspected interference diagnosis state remains the current diagnosis state. For early signs of a real fault (such as intermittent contact where the contact point begins to loosen) or persistent interference / faults, the second level will continue to appear or account for a high proportion, causing the value of the first counter to show a stable upward trend and eventually reach or exceed the second threshold. At this time, the system identifies it as a "suspect" requiring higher-level attention and decisively switches to the fault confirmation and diagnosis state for final decision-making to avoid missed detections.

[0057] Thus, in the suspected interference diagnostic state, by incrementing (when an abnormal second level is sampled) and decrementing (when a normal first level is sampled) the first counter, this strategy essentially performs digital integration on the "duty cycle" or "accumulated abnormal energy" of the abnormal signal. This method reflects the dynamic characteristics of the signal more accurately than simple time accumulation. For example, a series of dense short-pulse interferences will cause the count value of the first counter to rise rapidly, while a longer normal interval will cause the count value of the first counter to fall slowly, achieving bidirectional counting. Secondly, a first threshold and a second threshold are set. The count value must accumulate to a higher level (the second threshold) to be considered serious enough to enter fault confirmation; and once in the suspected interference diagnostic state, the count value must fall back to a lower level (below the first threshold) to be considered "recovered" and return to the normal diagnostic state. Compared with the single threshold method, this application effectively prevents frequent state jitter caused by small signal fluctuations near the threshold critical point through the dual threshold method, ensuring the diagnostic stability and accuracy of the diagnostic state.

[0058] Furthermore, the specific values ​​of the first and second thresholds can be flexibly set according to actual needs. For example, lowering the first threshold or raising the second threshold increases the system's tolerance to interference, making it less likely to exit the suspected state or enter the confirmed state, thus enhancing robustness; raising the first threshold or lowering the second threshold increases the system's sensitivity to anomalies, resulting in a faster response and enhanced sensitivity. The sampling period can also be optimized according to the expected frequency of the target interference. For example, a shorter sampling period can capture signal changes more precisely, making it suitable for high-frequency interference analysis; a longer sampling period can smooth high-frequency noise, reduce computational load, and is suitable for evaluating slower changing trends. The specific values ​​of the first and second thresholds and the sampling period can be reasonably set by those skilled in the art according to actual needs, and this application does not impose specific limitations on this.

[0059] When the multi-mode state machine switches to the fault confirmation and diagnosis state, in some embodiments, the method includes: starting a second counter; detecting the level state; if the detected level state is a first level, reverting to the suspected interference diagnosis state; if the detected level state is a second level, incrementing the count value of the second counter, and determining the current value of the second counter; if the current value is greater than or equal to a third threshold, triggering a fault latching mechanism; if the current value is less than the third threshold, maintaining the fault confirmation and diagnosis state as the current diagnosis state.

[0060] In this step, when the multi-mode state machine is in the fault confirmation and diagnosis state, if the detected signal recovers to the first level indicating normal connection, the system immediately performs a "rollback" operation, switching the state machine back to the suspected interference diagnosis state. At this time, although it has entered the highest level of fault confirmation and diagnosis state, if the abnormal signal is unstable or recovers to the first level on its own, it will still roll back to the previous suspected interference diagnosis state, further enhancing the system's fault tolerance and decision-making accuracy.

[0061] When a second level is detected, a new, independent second counter is activated. This means that the fault confirmation diagnostic state discards the historical count values ​​accumulated by the previous "first counter," which may contain significant interference. By activating the second counter, the fault confirmation diagnostic state ensures the independence of the final fault determination, avoiding the influence of accidental interference accumulated in previous suspected interference diagnostic states, thus improving diagnostic reliability. Simultaneously, in the fault confirmation state, the system also sets a third threshold. Only when the accumulated count value of the second counter reaches or exceeds this threshold will the fault latching mechanism be ultimately triggered. The third threshold is the final and most stringent threshold for the system to confirm a "real fault," and its setting typically reflects the minimum duration required for a physical, persistent disconnection fault in the high-voltage interlock circuit. This mechanism minimizes the possibility of misjudging any complex, persistent interference as a real fault, effectively reducing the false alarm rate.

[0062] In some embodiments, triggering a fault latching mechanism includes: storing fault information in a non-volatile memory and reporting it to the vehicle controller.

[0063] In this step, the fault latching mechanism confirms that the fault is genuine. Once determined to be a genuine fault, the fault record, including key information such as fault location, fault timestamp, and relevant environmental conditions, is immediately latched into non-volatile memory. This ensures that fault information is completely preserved even after system power failure or reset, preventing the loss of fault evidence due to temporary power outages and providing reliable data for subsequent maintenance and diagnosis. Secondly, while storing the fault information, it is immediately reported to the vehicle controller via the vehicle communication network to trigger the vehicle-level rapid safety response mechanism. The vehicle controller can be pre-set with a tiered safety protection strategy, such as: Level 1 alarm: Displaying a clear high-voltage system fault warning on the instrument panel, prompting the driver to stop safely. Level 2 power limiting: Limiting the output power of the drive motor or charging system to reduce risk. Level 3 high-voltage cutoff: Controlling the high-voltage main relay or fuse to actively cut off the high-voltage power supply, achieving the highest level of physical isolation.

[0064] This millisecond-level automated closed loop, from detection and judgment to reporting and handling, upgrades the function of the high-voltage interlock system from simple "monitoring" to proactive "safety protection," greatly shortening the time window from the occurrence of a fault to the effectiveness of safety measures, and providing the highest level of safety protection for drivers, passengers and the vehicle itself.

[0065] In some embodiments, if the current value is greater than or equal to the second threshold, after switching to the fault confirmation and diagnosis state, the method further includes: clearing the second counter to zero.

[0066] In this step, the second counter is dedicated to independent counting during the fault confirmation phase. Before switching from the suspected interference diagnosis state to the fault confirmation diagnosis state, the second counter is reset to zero, ensuring that the counter accumulates from an absolute zero baseline. This completely eliminates any risk of potential interference to the final decision caused by incomplete counter initialization, residual values ​​in memory, or data left over from the previous diagnosis cycle, ensuring the accuracy of the final fault determination.

[0067] In some embodiments, before acquiring the detection signal of the high-voltage interlock circuit, the method further includes: setting a first threshold, a second threshold, and a third threshold; setting the normal diagnostic state as the initial diagnostic state of the multi-mode state machine; and clearing the first counter and the second counter.

[0068] In this step, the multi-mode state machine is initialized to a normal diagnostic state, and the first and second counters are cleared to zero, establishing an absolutely clear and consistent starting point for the entire diagnostic process. This ensures that regardless of any abnormal shutdown or reset the system experiences, its diagnostic behavior after restarting is deterministic and repeatable, eliminating uncertain behavior caused by residual states. Secondly, clearing the first and second counters also prevents misjudgments in the initial diagnosis due to non-volatile memory residues or data left over from the previous run, thus establishing a clear initial baseline and ensuring the accuracy of the initial diagnosis.

[0069] The following example illustrates the following: the first threshold M is 5, the second threshold N is 15, the fault confirmation window length K of the third threshold is 3, the sampling period is 1ms, the first level is a normal high level, and the second level is a normal low level.

[0070] Suppose there is a typical interference pulse lasting for 4 ms. At the initial moment (normal diagnosis state mode), the count value T of the first counter is 0. Sampling at the 1st ms (mode conversion point): A low level is detected, and T increases from 0 to 1. The system immediately enters the suspected interference diagnosis state from the normal diagnosis state mode. Sampling from the 2nd to the 4th ms, if it remains abnormal, in the suspected interference diagnosis state, a low level is detected continuously three times. T accumulates in sequence: 1 → 2 → 3 → 4. The interference ends. Sampling at the 5th ms (the first recovery attempt): A high level is detected, and T decreases from 4 to 3. Judgment: Whether T = 3 is less than M = 5? The result is yes, T(3) < M(5), the system immediately determines it as interference, then jumps back to the "normal mode", and clears the count value T of the first counter.

[0071] Suppose the high - voltage connector is completely disconnected, and the high - voltage interlock detection circuit generates a continuous low level. At the initial moment (normal diagnosis state mode): The count value T of the first counter is 0. Sampling at the 1st ms: A low level is detected, T = 0 + 1 = 1, and the system enters the suspected interference diagnosis state. Sampling from the 2nd to the 15th ms: In the suspected interference diagnosis state, a low level is detected continuously. T continues to accumulate, and after sampling at the 15th ms, T = 15. Threshold judgment: At this time, T(15) ≥ N(15), and the system enters the fault confirmation diagnosis state from the suspected interference diagnosis state. Sampling from the 16th to the 18th ms (confirmation window): In the fault confirmation diagnosis state, a low level is confirmed and sampled continuously three times. The fault confirmation window length C of the second counter accumulates from 0 to 3. Final judgment: C(3) ≥ K(3), and the confirmation condition is met. The system triggers the fault latching mechanism and executes the fault recording, reporting, and safety handling procedures.

[0072] It should be understood that the following only exemplarily describes the fault diagnosis method provided in the embodiments of the present application with the first level being a high level and the second level being a low level.

[0073] In summary, in one example, Figure 2 is a schematic flowchart of another fault diagnosis method provided in the embodiments of the present application; this method 200 includes S201 to S2020; the following describes S201 to S2020: S201. System initialization.

[0074] S202. Periodically collect the detection signals of the high - voltage interlock loop.

[0075] S203. Confirm the current diagnosis state.

[0076] S204. Whether the level state of the detection signal is a low level; if so, execute S205; if not, execute S206.

[0077] S205, the first counter increments by one, entering the suspected interference diagnosis state.

[0078] S206. Clear the first counter to maintain normal diagnostic status.

[0079] S207. Detect whether the level of the detection signal is high; if yes, execute S208; if no, execute S2011.

[0080] S208, Decrease the first counter by one.

[0081] S209, T >= M; if yes, then execute S2010; if no, then execute S206.

[0082] S2010, Maintain suspected interference diagnosis status.

[0083] S2011, Decrease the first counter by one.

[0084] S2012, T >= N; if yes, then execute S2013; otherwise, execute S2010.

[0085] S2013, Entering fault confirmation and diagnosis state, first counter C=0.

[0086] S2014. Check if the level of the detection signal is low; if yes, execute S2015; if no, execute S2016.

[0087] S2015, Increment the second counter by one.

[0088] S2016, Revert to suspected interference diagnosis status.

[0089] S2017, C >= K; if yes, then execute S2018; if no, then execute S2019.

[0090] S2018, Trigger fault latching mechanism.

[0091] S2019. Maintain the fault confirmation and diagnosis status.

[0092] S2020: Store the fault information in a non-volatile memory and report it to the vehicle controller.

[0093] In summary, the acquisition, diagnosis, and verification processes in this method are all implemented through software, which can be injected into the vehicle's existing MCU or other chips. This eliminates the need for discrete components such as resistors and capacitors required by RC filter circuits in related technologies, effectively reducing the cost and space occupation associated with these components and facilitating miniaturization and high integration design. Secondly, the multi-mode state machine in this method, through timing logic and state transition mechanisms, can effectively distinguish between real, continuous connection / disconnection and instantaneous, brief interference fluctuations in the high-voltage interlock circuit, reducing false alarm and false negative rates and improving the robustness of high-voltage interlock circuit fault diagnosis. Furthermore, the judgment logic and parameters of the multi-mode state machine can be adjusted in real time through software configuration, facilitating adaptation to different application scenarios (e.g., flexible adaptation to vehicle platforms with different electromagnetic environments and safety requirements, from economy to luxury models), and supports future software upgrades to optimize diagnostic strategies without hardware modifications, significantly improving system adaptability and maintenance efficiency.

[0094] In some embodiments, this application also provides a fault diagnosis device applied to a high-voltage interlock circuit having multiple low-voltage detection connectors. The device includes: an acquisition module, a diagnosis module, and a confirmation module.

[0095] The acquisition module is used to acquire the detection signal of the high-voltage interlock circuit.

[0096] The diagnostic module is used to diagnose the detection signal through a preset multi-mode state machine. The multi-mode state machine is configured to switch between normal diagnostic state, suspected interference diagnostic state, and fault confirmation diagnostic state, and is only in one diagnostic state at any given time.

[0097] The confirmation module is used to determine whether the current state of the high-voltage interlock circuit is a real fault, a transient interference, or a normal connection based on the diagnostic results of the multi-mode state machine.

[0098] Figure 3 This is a schematic diagram of the structure of a vehicle provided in an embodiment of this application.

[0099] For example, such as Figure 3 As shown, vehicle 3 includes a memory 31 and a processor 32. The memory 31 stores executable program code 311, and the processor 32 is used to call and execute the executable program code 311 to perform a fault diagnosis method.

[0100] This embodiment can divide the device into functional modules based on the above method example. For example, each module can correspond to a separate function, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware. It should be noted that the module division in this embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods.

[0101] When each functional module is divided according to its corresponding function, the device may also include a judgment module, an activation module, and a control module. It should be noted that all relevant content regarding the steps involved in the above method embodiments can be referenced from the functional descriptions of the corresponding functional modules, and will not be repeated here.

[0102] It should be understood that the device provided in this embodiment is used to perform the above-described fault diagnosis method, and therefore can achieve the same effect as the above-described implementation method.

[0103] When using an integrated unit, the device may include a processing module and a storage module. When the device is applied to a vehicle, the processing module can be used to control and manage the vehicle's movements. The storage module can be used to support the vehicle in executing relevant program code and data.

[0104] The processing module may be a processor or a controller, which can implement or execute various exemplary logic blocks, modules, and circuits shown in conjunction with the disclosure of this application. The processor may also be a combination of functions that implement computing capabilities, such as a combination of one or more microprocessors, a combination of digital signal processing (DSP) and a microprocessor, etc., and the storage module may be a memory.

[0105] In addition, the device provided in the embodiments of this application may specifically be a chip, component or module. The chip may include a connected processor and a memory. The memory is used to store instructions. When the processor calls and executes the instructions, the chip can execute a fault diagnosis method provided in the above embodiments.

[0106] This embodiment also provides a computer-readable storage medium storing computer program code. When the computer program code is run on a computer, the computer executes the above-described related method steps to implement a fault diagnosis method provided in the above embodiment.

[0107] This embodiment also provides a computer program product that, when run on a computer, causes the computer to perform the aforementioned related steps to implement a fault diagnosis method provided in the above embodiment.

[0108] In this embodiment, the device, computer-readable storage medium, computer program product, or chip are all used to execute the corresponding methods provided above. Therefore, the beneficial effects they can achieve can be referred to the beneficial effects in the corresponding methods provided above, and will not be repeated here.

[0109] Through the above description of the embodiments, those skilled in the art will understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0110] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0111] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A fault diagnosis method applied to a high-voltage interlock circuit with multiple low-voltage detection connectors, characterized in that, The method includes: Obtain the detection signal of the high-voltage interlock circuit; The detection signal is diagnosed by a preset multi-mode state machine, which is configured to switch between normal diagnosis state, suspected interference diagnosis state and fault confirmation diagnosis state, and is only in one diagnosis state at any given time. Based on the diagnostic results of the multi-mode state machine, the current state of the high-voltage interlock circuit is determined to be a real fault, a transient interference, or a normal connection.

2. The fault diagnosis method according to claim 1, characterized in that, When the multi-mode state machine is in the normal diagnostic state, the method includes: In response to a level transition of the detection signal, the first counter is started; Detect the level state of the detection signal; If the level is detected to be at the first level, the first counter is cleared and the normal diagnostic state is maintained as the current diagnostic state. If the level is detected to be at the second level, the count value of the first counter is incremented, and the system switches to the suspected interference diagnosis state. The logic values ​​of the first level and the second level are opposite.

3. The fault diagnosis method according to claim 2, characterized in that, When the multi-mode state machine is in the suspected interference diagnosis state, the method includes: The level state is continuously detected at a preset sampling period; If the level state is detected to be the first level, the count value of the first counter is decremented, and the current value of the first counter is determined. If the current value is greater than or equal to the first threshold, the suspected interference diagnosis state is maintained as the current diagnosis state. If the current value is less than the first threshold, the first counter is cleared and switched back to the normal diagnosis state. If the level state is detected to be the second level, the count value of the first counter is incremented, and the current value of the first counter is determined. If the current value is greater than or equal to the second threshold, the fault confirmation diagnosis state is switched to the fault confirmation diagnosis state. If the current value is less than the second threshold, the suspected interference diagnosis state is kept as the current diagnosis state. Wherein, the first threshold and the second threshold are positive integers, and the second threshold is greater than the first threshold.

4. The fault diagnosis method according to claim 3, characterized in that, When the multi-mode state machine is in the fault confirmation and diagnosis state, the method includes: Start the second counter; Detect the voltage level; If the detected level is the first level, the system will revert to the suspected interference diagnosis state. If the level state is detected to be the second level, the count value of the second counter is incremented, and the current value of the second counter is determined. If the current value is greater than or equal to the third threshold, the fault latching mechanism is triggered. If the current value is less than the third threshold, the fault confirmation diagnosis state is maintained as the current diagnosis state.

5. The fault diagnosis method according to claim 4, characterized in that, The fault latching mechanism includes: The fault information is stored in non-volatile memory and reported to the vehicle controller.

6. The fault diagnosis method according to claim 3, characterized in that, After switching to the fault confirmation and diagnosis state if the current value is greater than or equal to the second threshold, the method further includes: Clear the second counter.

7. The fault diagnosis method according to claim 1, characterized in that, Before acquiring the detection signal of the high-voltage interlock circuit, the method further includes: Set a first threshold, a second threshold, and a third threshold; Set the normal diagnostic state as the initial diagnostic state of the multi-mode state machine; Clear the first and second counters to zero.

8. A fault diagnosis device, applied to a high-voltage interlock circuit with multiple low-voltage detection connectors, characterized in that, The device includes: The acquisition module is used to acquire the detection signal of the high-voltage interlock circuit; The diagnostic module is used to diagnose the detection signal through a preset multi-mode state machine. The multi-mode state machine is configured to switch between a normal diagnostic state, a suspected interference diagnostic state, and a fault confirmation diagnostic state, and is only in one diagnostic state at any given time. The confirmation module is used to determine, based on the diagnostic results of the multi-mode state machine, whether the current state of the high-voltage interlock circuit is a real fault, a transient interference, or a normal connection.

9. A vehicle, characterized in that, The vehicles include: Memory, used to store executable program code; A processor is configured to call and run the executable program code from the memory, causing the vehicle to perform the fault diagnosis method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed, implements the fault diagnosis method as described in any one of claims 1 to 7.

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