Serial port debugging method and circuit board

Abstract

The embodiment of the invention provides a serial port debugging method and a circuit board, and the method comprises the steps: receiving a register access command transmitted by an upper computer through a target serial port, enabling a programmable logic device to directly respond to the register access command of the upper computer, and executing a target access operation on a target register of the programmable logic device, under the condition that the control component fails and cannot normally communicate, the state information of the control component can be obtained by accessing the target register, so that abnormal fault positioning is realized; and the register access result is fed back to the upper computer in real time through the target serial port and the programmable logic device, so that the detailed state information of the control part can be quickly obtained, and the technical problem of serial port debugging failure caused by failure positioning when the control part is abnormal in the prior art is solved.

Description

Technical Field

[0001] This application relates to the server field, and more specifically, to a serial port debugging method and a circuit board. Background Technology

[0002] In servers, serial port debugging is a common debugging method. In related technologies, the control unit (Baseboard Management Controller (BMC) or Central Processing Unit (CPU)) accesses programmable logic registers to monitor the status information of some key signals and achieve the purpose of debugging.

[0003] However, when the control components malfunction due to external factors (such as abnormal voltage causing BMC abnormality), there is a problem that the fault cannot be located, leading to serial port debugging failure. Summary of the Invention

[0004] This application provides a serial port debugging method and circuit board to at least solve the technical problem in the related art where the failure to locate the fault when the control component malfunctions leads to serial port debugging failure.

[0005] According to one aspect of the embodiments of this application, a serial port debugging method is provided, comprising: receiving a register access command transmitted by a host computer through a target serial port, wherein the register access command is used to perform a target access operation on a target register of a programmable logic device, the target register being used to store status information of a control component connected to the programmable logic device; responding to the register access command, performing the target access operation on the target register to obtain a register access result; and sending the register access result to the host computer through the target serial port, wherein the register access result is used to locate anomalies in the control component.

[0006] According to another aspect of the embodiments of this application, a circuit board is also provided, comprising: a programmable logic device and a control component, wherein the programmable logic device is connected to the control component, the programmable logic device includes a target register for storing state information of the control component; wherein the programmable logic device is configured to receive a register access command transmitted from a host computer via a target serial port, wherein the register access command is configured to perform a target access operation on the target register; in response to the register access command, the programmable logic device performs the target access operation on the target register to obtain a register access result; and transmits the register access result to the host computer via the target serial port, wherein the register access result is used for anomaly localization of the control component.

[0007] According to another aspect of the embodiments of this application, a computer-readable storage medium is also provided, wherein a computer program is stored therein, wherein the computer program is configured to perform the steps in any of the above method embodiments when executed by a processor.

[0008] According to another aspect of the embodiments of this application, a computer program product or computer program is provided, the computer program product or computer program including computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, causing the computer device to perform the steps in any of the method embodiments described above.

[0009] According to another aspect of the embodiments of this application, an electronic device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to perform the steps of any of the above method embodiments through the computer program.

[0010] Through this application, since the target serial port receives register access commands transmitted from the host computer, the programmable logic device (PLD) can directly respond to the host computer's register access commands and perform target access operations on the target register of the PLD. In the event that the control component fails and cannot communicate normally, the status information of the control component can be obtained by accessing the target register, thereby realizing the location of abnormal faults. Furthermore, through the target serial port, the PLD feeds back the register access results to the host computer in real time, enabling the rapid acquisition of detailed status information of the control component. This solves the technical problem in related technologies where the inability to locate faults when control components malfunction leads to serial port debugging failures. Attached Figure Description

[0011] Figure 1 This is a schematic diagram illustrating an application scenario of a serial port debugging method according to an embodiment of this application;

[0012] Figure 2 This is a flowchart illustrating an optional serial port debugging method according to an embodiment of this application;

[0013] Figure 3 This is a schematic diagram of an optional hardware design according to an embodiment of this application;

[0014] Figure 4 This is a schematic diagram of another optional hardware design according to an embodiment of this application;

[0015] Figure 5 This is a schematic diagram of another optional hardware design according to an embodiment of this application;

[0016] Figure 6 This is an optional connection diagram according to an embodiment of this application;

[0017] Figure 7 This is a schematic diagram of an optional write data method according to an embodiment of this application;

[0018] Figure 8 This is a schematic diagram of an optional data reading method according to an embodiment of this application;

[0019] Figure 9 This is a schematic diagram of the connection of some modules inside an optional CPLD according to an embodiment of this application;

[0020] Figure 10 This is a logic block diagram of an optional CPLD according to an embodiment of this application;

[0021] Figure 11 This is an optional embodiment according to this application. Figure 10 A block diagram of the logical interface;

[0022] Figure 12 This is a schematic diagram of an optional serial port connection according to an embodiment of this application;

[0023] Figure 13 This is a schematic diagram of the internal connections of an optional CPLD according to an embodiment of this application;

[0024] Figure 14 This is a logic block diagram of an optional serial port switching module according to an embodiment of this application;

[0025] Figure 15 This is a structural block diagram of an optional serial port debugging device according to an embodiment of this application;

[0026] Figure 16 This is a computer system architecture block diagram of an optional electronic device according to an embodiment of this application. Detailed Implementation

[0027] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0028] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0029] According to one aspect of the embodiments of this application, a serial port debugging method is provided. Optionally, in this embodiment, the above-described serial port debugging method may be applied to, but is not limited to, [examples of other methods]. Figure 1 The hardware environment shown includes a host computer 102 and a complex programmable logic device (CPLD) 104. The host computer 102 can be connected to the programmable logic device 104 via a serial cable or a wireless network.

[0030] The aforementioned wireless network may include, but is not limited to, at least one of the following: Wireless Fidelity (WIFI) and Bluetooth. The host computer 102 may be, but is not limited to, a personal computer (PC), mobile phone, tablet computer, etc.

[0031] The serial port debugging method of this embodiment can be executed by a programmable logic device 102. Taking the execution of the serial port debugging method of this embodiment by a programmable logic device 102 as an example, Figure 2 This is a flowchart illustrating an optional serial port debugging method according to an embodiment of this application, as shown below. Figure 2 As shown, the process of this method may include the following steps S202 to S206.

[0032] Step S202: Receive register access command transmitted from host computer via target serial port. The register access command is used to perform target access operation on target register of programmable logic device. Target register is used to store status information of control components connected to programmable logic device.

[0033] Step S204: In response to the register access command, perform a target access operation on the target register to obtain the register access result.

[0034] Step S206: Send the register access result to the host computer through the target serial port. The register access result is used to locate the anomaly of the control component.

[0035] The serial port debugging method in this embodiment can be applied to the server field, specifically to scenarios involving serial port debugging of control components such as the Baseboard Management Controller (BMC) or Central Processing Unit (CPU). The purpose of serial port debugging is to access the contents of the CPLD registers. Through the CPLD registers, the status information of certain signals can be viewed, thereby enabling problem localization and analysis.

[0036] However, in servers, serial port debugging is a common debugging method. In related technologies, the control unit (Baseboard Management Controller (BMC) or Central Processing Unit (CPU)) accesses programmable logic registers to monitor the status information of key signals, thereby achieving the debugging purpose. For example, Figure 3 This is a schematic diagram of an optional hardware design according to an embodiment of this application, such as... Figure 3 As shown, in related technologies, the server architecture includes a BMC, CPLD, USB to UART converter, and TYPE-C. The BMC and CPLD communicate via a serial port (UART); the CPLD then connects to the USB to UART chip via a serial port, and finally outputs serial port print information through the TYPE-C interface; users can use the serial port tool corresponding to the TYPE-C interface to view the monitoring signal status acquired by the BMC. For example, Figure 4 This is a schematic diagram of another optional hardware design according to an embodiment of this application, such as... Figure 4 As shown, in related technologies, the server architecture includes a BMC, CPLD, USB to UART, and TYPE-C. The core method for the BMC to obtain monitoring signal status is the I2C interface (accessing the CPLD's register values ​​via I2C); the UART serial port is a "debugging tool"—serial communication is maintained between the BMC and CPLD, and ultimately, debugging information is output via TYPE-C for engineers to view. For example, Figure 5 This is a schematic diagram of another optional hardware design according to an embodiment of this application, such as... Figure 5 As shown, the server architecture includes a BMC, a USB-to-UART converter, and a TYPE-C interface. The CPLD has been removed; the BMC's serial port is directly connected to the USB-to-UART chip, and debug information is output via the TYPE-C interface. Among these features... Figure 3 , Figure 4 and Figure 5 The Type-C cable is a USB-to-serial adapter cable; it should be selected according to design requirements, and Type-C is not the only option.

[0037] according to Figure 3 , Figure 4 and Figure 5 As shown in the monitoring example, it can be confirmed that if both the CPU and BMC are stuck in the relevant technology, the serial port debugging will fail, there is no way to locate the problem, and the machine can only be disassembled, which is very inconvenient for locating problems in the live network.

[0038] To address the issue of serial port debugging failures caused by the inability to locate faults when control components malfunction due to external factors (e.g., abnormal voltage causing BMC malfunction), this embodiment utilizes programmable logic devices to perform problem location analysis when control components (such as BMC) malfunction. This improves the efficiency of engineers in solving problems, facilitates rapid problem location, and enhances work efficiency.

[0039] In this embodiment, the target serial port refers to the serial communication interface used for debugging programmable logic devices. Optionally, Figure 6 This is an optional connection diagram according to an embodiment of this application, such as... Figure 6 As shown, the target serial port can be a physical interface on the circuit board where the programmable logic device is located (such as a Type-C interface or a UART interface). The host computer connects to a USB-to-Universal Asynchronous Receiver / Transmitter (UART) chip via the Type-C interface. The USB-to-UART chip is connected to the CPLD via the UART interface. The CPLD can connect to the BMC via an I2C interface or a UART interface. Alternatively, the target serial port can be the UART interface on the CPLD or BMC.

[0040] A host computer refers to a computer or device used for serial port debugging. Optionally, the serial port is a debugging tool that can feed back acquired status information to the interface of the serial port debugging tool, allowing the user to view information through the serial port interface. For example, the host computer can run serial port debugging assistant software, which is used to send register access commands (i.e., debugging commands) and receive register access results (i.e., debugging results). The serial port debugging assistant software communicates with CPLDs, etc., through the target serial port.

[0041] Register access commands are commands sent by the host computer and transmitted via the target serial port. They are used to read or write target registers within the CPLD. The target register refers to the register in the CPLD that stores the status information of the control components connected to the programmable logic device (PLD). Optionally, the status information of the control components connected to the PLD may include the operating status of the control components (such as the BMC), error codes, system voltage information, temperature parameters, and other diagnostic data related to the anomaly. For example, if a fault occurs in the BMC during operation, the host computer sends a register access command via the target serial port to obtain the status information stored in the target register of the BMC in the CPLD. This status information is then sent back to the host computer as a register access result. The user can then see the changes in the information stored in the register before and after the anomaly occurred, thus quickly locating the fault.

[0042] Optionally, register access commands can be sent in a predefined format. For example, a register access command may include the register address, the operation type (read or write), and the data to be written or read. In serial port debugging, the host computer can access the status information of the control components stored in the CPLD by sending register access commands.

[0043] A target access operation refers to the actual read or write operation performed on a target register according to the received register access command. The register access result refers to the access result obtained after the target access operation is completed. For example, if the target access operation is a read operation, the register access result is the data at a certain address in the target register. If the target access operation is a write operation, the register access result can be "write failed" or "write successful".

[0044] Optionally, in the event of a control component failure, a target serial port is added to the server's circuit board. The host computer sends a register access command to the server through the target serial port. In response to the register access command, the server performs a target access operation on the target register and obtains the register access result. After the register access result is sent to the host computer through the target serial port, the host computer can automatically analyze the register access result of the target register to determine whether there is an anomaly in the control component, and locate the anomaly if one exists. Alternatively, the register access result of the target register can be manually analyzed to determine whether there is an anomaly in the control component, and locate the anomaly if one exists.

[0045] In this way, when abnormalities occur in control components (such as BMC) or serial ports fail to print, relevant information can be viewed through the CPLD, enabling rapid location and resolution of problems. This provides an additional means of problem identification. Through this embodiment, problems can be resolved quickly, improving user satisfaction and possessing certain economic value.

[0046] Through the embodiments provided in this application, the target serial port receives register access commands transmitted by the host computer, enabling the programmable logic device (PLD) to directly respond to the host computer's register access commands and perform target access operations on the target register of the PLD. In the event that the control component malfunctions and cannot communicate normally, the status information of the control component can be obtained by accessing the target register, thus realizing fault location. Furthermore, through the target serial port, the PLD feeds back the register access results to the host computer in real time, enabling the rapid acquisition of detailed status information of the control component. This solves the technical problem in related technologies where the inability to locate faults when control components malfunction leads to serial port debugging failure.

[0047] In one exemplary embodiment, a serial port connector is further provided on the circuit board where the programmable logic device is located. The serial port connector is connected to a target serial port and connected to a host computer via a serial port debugging cable. Receiving register access commands transmitted by the host computer through the target serial port includes: receiving register access commands transmitted by the host computer via the serial port debugging cable and the serial port connector through the target serial port.

[0048] A serial connector is a device used to connect a host computer and a CPLD, allowing the host computer to directly connect to the CPLD via the serial connector. A serial debugging cable is a cable used to connect a host computer and a serial connector, facilitating debugging of the CPLD by the host computer. Through the serial debugging cable, the host computer can perform bidirectional data communication with the target serial port, enabling remote access and control of the programmable logic device. For example, a serial debugging cable can be a USB-to-serial cable.

[0049] In this embodiment, the target serial port can be the UART interface on the CPLD.

[0050] Optionally, in the event of a control component failure, a serial port connector can be added to the server's circuit board. This serial port connector can be a UART header, for example... Figure 6As shown, a serial port connector (UART_HEADER) can be set on the circuit board. The host computer can connect to the CPLD through the serial port connector (UART_HEADER). The serial port connector connects to the CPLD via the UART interface, and the CPLD can connect to the BMC via an I2C interface or a UART interface. The host computer sends register access commands to the CPLD through the serial connector. The CPLD responds to the register access command, performs a target access operation on the target register, and obtains the register access result. The target register sends the register access result back to the host computer through the target serial port. Users can use the register access result to locate faults in the control components. During the debugging and problem location process using the host computer, a USB-to-serial cable can be connected to the UART_HEADER to locate the problem.

[0051] In this embodiment, by using a combination of a serial port connector and a serial port debugging cable, when a control component malfunctions or becomes abnormal, it is possible to directly communicate with the CPLD to obtain key system status data, thereby enabling fault location and analysis. This avoids dependence on the system software stack and increases the reliability and efficiency of fault diagnosis.

[0052] In one exemplary embodiment, the programmable logic device includes a serial port control module for data interaction with a host computer via a target serial port; receiving register access commands transmitted by the host computer via the target serial port includes: receiving register access commands transmitted by the host computer via the target serial port through the serial port control module, wherein the command format of the register access command includes at least one of the following: command type identifier, register address, and data to be written.

[0053] In this embodiment, the serial port control module refers to the module that controls the data interaction between the target serial port and the host computer. The host computer transmits register access commands to the serial port control module through the target serial port. The register access command format includes at least one of the following: command type identifier, register address, and data to be written. The command type identifier identifies the target access operation performed on the target register. For example, when the target access operation is a read operation, the command type identifier can be represented by "rr", and when the target access operation is a write operation, the command type identifier can be represented by "wr". The register address is the address of the target register to which the register access command is sent, and the data to be written is the data to be written to the target register.

[0054] In an optional embodiment, the serial port control module can be divided into a serial port receiving module and a serial port transmitting module. The serial port receiving module is used to receive register access commands from the host computer. For example, the serial port receiving module receives input signals from the keyboard of the host computer. This operation is similar to a write operation. The code of the serial port receiving module sets the write command format to "w" + "r" + addr + data, where "w" + "r" is the write command type identifier, addr is the address of the target register to be written, and data is the data to be written. The serial port transmitting module is used to output the target access result of the register in the CPLD to the serial port interface (i.e., the host computer). This operation is similar to a read operation. The read operation command can be set as needed. For example, the code of this module sets the read command format to 'r' + 'r' + addr, where 'r' + 'r' is the read command type identifier, and addr is the address of the target register to be read.

[0055] For example, to write the value 0x56 to address 0x04, the serial port debugging assistant needs to enter the register access command: 'wr0456', where wr is the command type identifier, 04 is the register address, and 56 is the data to be written. To read data from address 0x04 and get the value 0x56, the serial port debugging assistant needs to enter the command: 'rr0400', where rr is the command type identifier, 04 is the register address, and the return value (i.e., the register access result) is in 16-bit hex format: 0x00 0x56.

[0056] In this embodiment, the serial port control module enables data interaction between the host computer and the programmable logic device, allowing the host computer to control the CPLD to read or write specific registers, obtain or update the status information of the control components, and quickly locate anomalies.

[0057] In one exemplary embodiment, the data format of the register access command is a string format; after receiving the register access command transmitted by the host computer through the target serial port, the above method further includes: converting the data format of the register access command from string format to the corresponding ASCII value through the serial port control module to obtain the converted register access command, wherein the target access operation is executed based on the converted register access command.

[0058] In this embodiment, a string is a sequence of characters used as a user-readable data representation; while an ASCII value is a numeric code representing a specific character, used internally by the computer to store and transmit text data.

[0059] For example, the serial port debugging assistant on the host computer inputs character data, but the actual UART interface transmits the corresponding ASCII code. Figure 7This is a schematic diagram of an optional write data method according to an embodiment of this application, such as... Figure 7 As shown, taking writing value 0x56 to address 0x04 as an example, the serial port debugging assistant needs to enter the register access command: 'wr0456'. The corresponding ASCII values ​​output by the serial port assistant are: 0x77 0x72 0x30 0x34 0x35 0x36, and it can return register access results such as "write failed" or "write successful" from the host computer. Figure 8 This is a schematic diagram of an optional data reading method according to an embodiment of this application, such as... Figure 8 As shown, taking reading data from address 0x04 and reading a value of 0x56 as an example, the serial port debugging assistant needs to enter the command: 'rr0400'. The corresponding ASCII value output by the serial port debugging assistant is: 0x72 0x72 0x30 0x34 0x30 0x30. The return value (i.e., the register access result) is in 16-bit hex format as 0x00 0x56.

[0060] In this embodiment, by using commands in string format and performing ASCII value conversion within the serial port control module, the host computer can interact with the CPLD in a more intuitive way, simplifying the software design of the host computer and making the sending of register access commands easier and more intuitive.

[0061] In one exemplary embodiment, the programmable logic device further includes a peripheral bus for connecting a serial port control module and a target register; in response to a register access command, performing a target access operation on the target register to obtain a register access result includes: in response to a register access command, transmitting the register access command to the target register via the peripheral bus through the serial port control module to perform a target access operation on the target register to obtain a register access result.

[0062] In this embodiment, the peripheral bus refers to the bus that connects the serial port control module and the target register. Optionally, the peripheral bus can be an Advanced Peripheral Bus (APB). The APB bus can access or control the registers in the CPLD.

[0063] For example, Figure 9 This is a schematic diagram of the connection of some modules inside an optional CPLD according to an embodiment of this application, such as... Figure 9 As shown, the CPLD includes three functional modules: a serial port control module (divided into a serial port receiving module and a serial port transmitting module), an APB interface interaction module, and a register read / write module. The peripheral bus is located in the APB interface interaction module. The register read / write module is used to respond to register access commands, perform target access operations on the target register, and obtain the register access result. Figure 10 This is a logic block diagram of an optional CPLD according to an embodiment of this application, such as... Figure 10 As shown, Figure 10 Indicate Figure 9 The connection diagram in the middle section is shown. Figure 10 In this module, Key_uart_rx is the serial port receiving module, Key_uart_tx is the serial port transmitting module, Process To APB is the APB interface interaction module, and APB BUS is the APB bus. The APB interface interaction module is connected to the register read / write module through the APB bus. Figure 11 This is an optional embodiment according to this application. Figure 10 A block diagram of the logical interface, such as Figure 11 As shown, Figure 11 The diagram illustrates the integrated interface of the serial port control module, APB interface interaction module, and register read / write module. UART_RX transmits register access commands from the host computer to the serial port receiving module, and UART_TX transmits the target access result back to the host computer. Table 2 shows the interface... Figure 11 The logical interface description.

[0064] Table 2

[0065]

[0066] This embodiment avoids complex internal circuit connections through the external bus, while ensuring the reliability and speed of data transmission. In this way, the host computer can directly control or access the registers inside the CPLD, making the hardware debugging and fault diagnosis process more intuitive and efficient.

[0067] In one exemplary embodiment, in response to a register access command, performing a target access operation on a target register to obtain a register access result includes: if the target access operation is a data write operation, in response to the register access command, writing target write data to the target write address of the target register to obtain a data write result, wherein the target write data is the write data indicated by the register access command, the target write address is the write address indicated by the register access command, and the register access result is the data write result; if the target access operation is a data read operation, in response to the register access command, reading data from the target register based on the target read address to obtain a data read result, wherein the target read address is the read address indicated by the register access command, and the register access result is the data read result.

[0068] In this embodiment, the target write data refers to the write data to the target register indicated by the register access command during a data write operation. The target write address refers to the write address of the target register indicated by the register access command during a data write operation. The data write result refers to the feedback information obtained after performing the data write operation, indicating whether the data write operation was successfully executed. Optionally, if the data write operation is successful, the data write result may include confirmation information or the register status after writing; if the data write operation fails, the data write result may include an error code or status code to help the user understand the reason for the write failure. After the data write result is transmitted to the host computer, the location of the anomaly can be located based on the data write result.

[0069] The target read address refers to the location identifier of the target register accessed and its contents read during a data read operation. The data read result is the data obtained from the target register where the target read address is located after the data read operation is completed. After the data write result is transmitted to the host computer, the location of the anomaly can be located based on the data read result.

[0070] For example, when a write command starting with 'w' is received, the serial port control module parses the target write address and target write data in the command. Through the peripheral bus, the serial port control module writes the target write data to the specific address location in the target register, completing the data write operation. After the write is complete, the serial port control module generates a data write result, indicating whether the write operation was successful.

[0071] For example, when a write operation command starting with 'r' is received, the serial port control module first identifies the target read address in the register access command. The serial port control module reads data from the corresponding address of the target register via the peripheral bus. After successful reading, the serial port control module returns the read data as the data read result, so that the host computer or user can perform subsequent processing or analysis.

[0072] This embodiment achieves control and status reading of the internal registers of the programmable logic device through two target access operations: data write operation and data read operation. The accurate execution and result feedback of the data write operation and data read operation provide strong support for the status management and fault location of hardware devices, and significantly improve the user's work efficiency and problem-solving ability when debugging complex devices such as servers and switches.

[0073] In one exemplary embodiment, using the aforementioned serial port connector requires additional code modification or reconnection of the serial port debugging cable after a power outage, which leads to low efficiency and a complex process for serial port debugging. To solve the above problems, this embodiment adds a serial port switching module. The advantage of this is that no additional serial port connector (such as a serial port debugging socket) is required. If a problem occurs, it can be used directly without additional code modification or reconnection of the serial port debugging cable after a power outage.

[0074] The programmable logic device includes a serial port switching module, which includes a universal asynchronous transceiver. The serial port switching module is used to switch the enabled serial ports in a set of serial ports. Data received by the universal asynchronous transceiver is transmitted to the enabled serial ports in the set of serial ports, which includes a target serial port.

[0075] In this embodiment, the serial port switching module refers to a module that switches between a group of serial ports. The serial port switching module is used to switch the enabled serial ports within the group. It is used to switch communication objects or switch the source of status information. Each serial port in the group refers to a serial port on a different communication object; that is, each serial port in the group refers to a serial port on a controller. An enabled serial port is a specific serial port selected by the serial port switching module at a certain moment for data transmission. It should be noted that the host computer can only effectively communicate with a serial port after the serial port switching module has enabled it. In this way, the serial port switching function can be implemented using CPLD logic code without the need for a serial port socket.

[0076] Since this embodiment does not require an additional serial port connector, the target serial port in this embodiment refers to the physical interface connected to the CPLD. For example, in this embodiment, the target serial port refers to the Type-C interface.

[0077] Optionally, a set of serial ports is configured with a default serial port, which is the CPLD serial port. For example, if the default serial port is the CPLD serial port, and you need to switch the enabled serial port to the BMC serial port, you need to manually switch to the BMC serial port.

[0078] In some embodiments, Figure 9 Introducing a serial port switching module based on this approach involves various hardware design approaches. For example, Figure 12 This is a schematic diagram of an optional serial port connection according to an embodiment of this application, such as... Figure 12As shown, when a USB-to-serial chip supports two or more USB drivers, the USB-to-UART chip outputs two UART channels. In the hardware design, these two serial ports are connected to the CPLD. The CPLD code then sets one of the serial ports as the BMC serial port; this port can be fixed or switchable. The other serial port can be fixed as the CPLD serial port or can be switched to the serial port of another device. This allows multiple serial ports to be connected to the CPLD. The logic code implements serial port switching; that is, if a change in communication target is needed, the CPLD's internal serial port switching logic switches to the target serial port. In the event of a control component failure, the target serial port is a Type-C interface, and the default interface in a set of serial ports is the CPLD. If the host computer needs to obtain register information from the CPLD, it needs to issue a serial port switching command. If the host computer needs to obtain information from the BMC, it issues a serial port switching command to the USB-to-UART chip through the target serial port. The USB-to-UART chip can switch to the CPLD serial port via UART_1, and the USB-to-UART chip can switch to the BMC serial port via UART_2. When switching to the CPLD serial port, the following steps are followed: Figure 9 The implementation of the anomaly localization method can be understood by referring to the foregoing implementation, and will not be repeated here. Figure 13 This is a schematic diagram of the internal connections of an optional CPLD according to an embodiment of this application, which allows for the following: Figure 13 The diagram shows that the host computer accesses the serial port switching module in the CPLD via UART.

[0079] The above embodiments enable the abnormal status information to be obtained by switching the serial port to communicate with the normal component when either the BMC or CPLD fails, thereby achieving abnormal location without disassembling the device.

[0080] In some embodiments, if the selected USB-to-serial chip does not support driving more than two drivers, CPLD logic code can be used, with the default serial port set to the CPLD serial port; if switching to another device is required, manual control is possible. In this scenario, if the CPLD serial port is used, the host computer will send the register access command to the serial port control module via the UART interface. The serial port control module then converts the data format of the register access command from string format to the corresponding ASCII value, obtaining the converted register access command. The serial port control module sends the converted register access command to the target register via the peripheral bus, accesses the status information of the control unit (such as BMC) stored in the target register, and converts the status information into the target access result. The target register sends the target access result to the serial port control module via the peripheral bus, and the serial port control module then sends the target access result to the host computer via the UART interface to analyze the target access result and locate abnormal faults in the control unit. If the serial port of the control unit (such as the BMC serial port) is used, after switching the serial port, the host computer directly sends the register access command through the UART interface to directly obtain the status information of the control unit. The control unit sends the target access result to the host computer to analyze the target access result and locate the abnormal fault in the control unit.

[0081] In some embodiments, before receiving the register access command transmitted from the host computer via the target serial port, the method further includes: in response to the received serial port switching command, switching the enabled serial port in a group of serial ports to the target serial port, wherein the register access command received by the serial port switching module from the host computer via a universal asynchronous transceiver is transmitted to the target serial port.

[0082] In this embodiment, the serial port switching module includes a universal asynchronous transceiver (UAST). The UAST receives serial port switching commands. After receiving the serial port switching command, the serial port switching module can adjust the currently enabled serial ports in a group of serial ports and switch the communication path to a specific target serial port, so that register access commands can be correctly transmitted to and processed at the target serial port.

[0083] In an optional embodiment, the CPLD includes a serial port switching module, a serial port control module (divided into a serial port receiving module and a serial port transmitting module), an APB interface interaction module, and a read / write register module. The peripheral bus is located in the APB interface interaction module. The read / write register module is used to respond to register access commands, perform target access operations on the target register, and obtain the register access result. The serial port switching module can be further divided into a serial port selection control module and a serial port data parsing module. The serial port selection control module allows the user to manually select the current serial port. For example, pressing Ctrl+U / R / T 1 switches to the CPLD serial port; pressing Ctrl+U / R / T 2 switches to the BMC serial port; and pressing Ctrl+U / R / T 3 switches to the CPU serial port. The serial port data parsing module can parse the received key input signals, converting the key input signals (e.g., Ctrl+U / R / T 1) into recognizable ASCII values. Figure 14 This is a logic block diagram of an optional serial port switching module according to an embodiment of this application, such as... Figure 14 As shown, UART_MUX is the serial port switching module, MUX represents the serial port selection and switching module, Decode represents the serial port data parsing module, it receives register access commands through UART_0_RX~UART_9_RX, and transmits the target access result through UART_0_TX~UART_9_TX, MUX_REG_SEL / MUX_REG_EN indicate that the BMC accesses the CPLD register through the I2C interface, UART_MUX_SEL indicates the UART switching status output after register control, and Sel Reg indicates the register control selection module. See Table 2 below. Table 2 shows... Figure 14 A diagram illustrating the interface.

[0084] Table 2

[0085]

[0086] In this way, when the target serial port is a type-C interface, the debugging function can be completed with only a type-C interface through the serial port switching module of the CPLD, simplifying the hardware design and structure.

[0087] In this embodiment, through the serial port switching module, the host computer can select a target serial port from a group of serial ports to communicate with a specific control component (such as CPLD, BMC, CPU) without changing hardware connections or reconfiguring the device. This dynamic serial port switching function allows engineers to quickly switch to a serial port with debugging capabilities without physically touching the device, greatly improving the speed and accuracy of fault location.

[0088] The above two embodiments are summarized. This application provides two possible solutions. Solution one, as follows: Figure 9 As shown, the host computer sends register access commands to the UART_HEADER via the UART interface. The UART_HEADER then sends the register access commands to the serial port control module via the UART interface. The serial port control module is divided into a serial port receiving module and a serial port transmitting module. The serial port receiving module receives the register access commands and converts them from string format to the corresponding ASCII values, obtaining the converted register access commands. The serial port receiving module sends the converted register access commands to the APB interface interaction module. The APB interface interaction module sends the converted register access commands to the register read / write module via the peripheral bus. The register read / write module responds to the converted register access commands by accessing the target register, thereby obtaining the target access result. The target register sends the target access result back to the APB interface interaction module via the peripheral bus. The APB interface interaction module then sends the target access result back to the serial port transmitting module. The serial port transmitting module sends the result back to the UART_HEADER via the UART interface. The UART_HEADER then transmits the target access result back to the host computer for analysis to locate the fault or anomaly of the control component. Scheme Two, as... Figure 13 As shown, the host computer sends a serial port switching command to the serial port switching module via a Type-C interface and a USB-to-UART chip. The serial port switching module responds to the received command by switching the enabled serial port in a group to the target serial port; for example, switching the enabled serial port in a group to a CPLD serial port. Then, the host computer sends a register access command to the serial port control module via the Type-C interface and the USB-to-UART chip. The serial port control module is divided into a serial port receiving module and a serial port transmitting module. The serial port receiving module receives the register access command and converts it from a string format to the corresponding ASCII value, obtaining the converted register access command. The serial port receiving module sends the converted register access command to the APB interface interaction module. The APB interface interaction module then sends the converted register access command to the register read / write module via the peripheral bus. The register read / write module responds to the converted register access command by accessing the target register, thereby obtaining the target access result. The target register sends the target access result back to the APB interface interaction module via the peripheral bus. The APB interface interaction module then sends the target access result back to the serial port sending module. The serial port sending module transmits the target access result to the host computer via a USB-to-UART chip and a Type-C interface, and analyzes the target access result to locate the fault or abnormality of the control component.

[0089] Through the above embodiments, if a BMC malfunction occurs in a server product or switch product, affecting the use of the machine, but the user needs to quickly locate the problem, a debugging method based on programmable logic devices can be used to solve the pain point of difficulty in locating the problem.

[0090] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0091] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as read-only memory (ROM) / random access memory (RAM), magnetic disk, optical disk), and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0092] According to another aspect of the embodiments of this application, a serial port debugging device is also provided, which can be used to implement the serial port debugging method provided in the above embodiments, and will not be repeated hereafter. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0093] Figure 15 This is a structural block diagram of an optional serial port debugging device according to an embodiment of this application, such as... Figure 15 As shown, the serial port debugging device includes:

[0094] The first execution unit 1502 is used to receive register access commands transmitted from the host computer through the target serial port. The register access commands are used to perform target access operations on the target register of the programmable logic device. The target register is used to store the status information of the control unit connected to the programmable logic device.

[0095] The second execution unit 1504 is used to perform a target access operation on the target register in response to a register access command and obtain the register access result.

[0096] The third execution unit 1506 is used to send the register access results to the host computer through the target serial port. The register access results are used to locate abnormalities in the control components.

[0097] It should be noted that the first execution unit 1502 in this embodiment can be used to execute the above step S202, the second execution unit 1504 in this embodiment can be used to execute the above step S204, and the third execution unit 1506 in this embodiment can be used to execute the above step S206.

[0098] Through the embodiments provided in this application, the target serial port receives register access commands transmitted by the host computer, enabling the programmable logic device (PLD) to directly respond to the host computer's register access commands and perform target access operations on the target register of the PLD. In the event that the control component malfunctions and cannot communicate normally, the status information of the control component can be obtained by accessing the target register, thus realizing fault location. Furthermore, through the target serial port, the PLD feeds back the register access results to the host computer in real time, enabling the rapid acquisition of detailed status information of the control component. This solves the technical problem in related technologies where the inability to locate faults when control components malfunction leads to serial port debugging failure.

[0099] In one exemplary embodiment, a serial port connector is also provided on the circuit board where the programmable logic device is located. The serial port connector is connected to a target serial port and connected to a host computer via a serial port debugging cable. The first execution unit is used to receive register access commands transmitted by the host computer via the serial port debugging cable and the serial port connector through the target serial port.

[0100] In one exemplary embodiment, the programmable logic device includes a serial port switching module, which includes a universal asynchronous transceiver (UART). The serial port switching module is used to switch the enabled serial port in a group of serial ports. Data received through the UART is transmitted to the enabled serial port in the group of serial ports, and the group of serial ports includes a target serial port. A first execution unit is used to switch the enabled serial port in the group of serial ports to the target serial port in response to a received serial port switching command before receiving a register access command transmitted from the host computer through the target serial port. The register access command received by the serial port switching module from the host computer through the UART is transmitted to the target serial port.

[0101] In one exemplary embodiment, the programmable logic device includes a serial port control module for data interaction with a host computer via a target serial port; and a first execution unit for receiving a register access command transmitted by the host computer via the target serial port through the serial port control module, wherein the command format of the register access command includes at least one of the following: command type identifier, register address, and data to be written.

[0102] In an exemplary embodiment, the data format of the register access command is a string format; the first execution unit is configured to, after receiving the register access command transmitted by the host computer through the target serial port, convert the data format of the register access command from the string format to the corresponding ASCII value through the serial port control module to obtain the converted register access command, wherein the target access operation is executed based on the converted register access command.

[0103] In one exemplary embodiment, the programmable logic device further includes a peripheral bus for connecting a serial port control module and a target register; and a second execution unit for transmitting a register access command to the target register via the peripheral bus through the serial port control module in response to a register access command, so as to perform a target access operation on the target register and obtain a register access result.

[0104] In one exemplary embodiment, the second execution unit, when the target access operation is a data write operation, responds to the register access command by writing the target write data to the target write address of the target register to obtain a data write result, wherein the target write data is the write data indicated by the register access command, the target write address is the write address indicated by the register access command, and the register access result is the data write result; when the target access operation is a data read operation, responds to the register access command by reading data from the target register based on the target read address to obtain a data read result, wherein the target read address is the read address indicated by the register access command, and the register access result is the data read result.

[0105] It should be noted that the above modules can be implemented by software or hardware. For the latter, they can be implemented in the following ways, but are not limited to: all the above modules are located in the same processor; or, the above modules are located in different processors in any combination.

[0106] According to another aspect of the embodiments of this application, a computer-readable storage medium is provided, the computer-readable storage medium including a stored program, wherein the program executes the steps in any of the above method embodiments when it is run.

[0107] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as USB flash drives, ROMs, RAMs, portable hard drives, magnetic disks, or optical disks.

[0108] According to another aspect of the embodiments of this application, a circuit board is provided, including: a programmable logic device and a control unit, wherein the programmable logic device is connected to the control unit, and the programmable logic device includes a target register for storing state information of the control unit; wherein the programmable logic device is configured to receive a register access command transmitted from a host computer via a target serial port, wherein the register access command is configured to perform a target access operation on the target register; in response to the register access command, perform a target access operation on the target register to obtain a register access result; and transmit the register access result to the host computer via the target serial port, wherein the register access result is used for anomaly localization of the control unit.

[0109] Specific examples in this embodiment can be found in the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0110] According to another aspect of the embodiments of this application, a computer program product is also provided, comprising a computer program / instructions containing program code for performing the methods shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network via communication section 1609, and / or installed from removable medium 1611. When the computer program is executed by central processing unit 1601, it performs various functions provided in the embodiments of this application. The sequence numbers of the embodiments of this application above are merely descriptive and do not represent the superiority or inferiority of the embodiments.

[0111] Figure 16 A schematic block diagram of a computer system architecture for implementing embodiments of the present application is shown. Figure 16 As shown, the computer system 1600 includes a Central Processing Unit (CPU) 1601, which performs various appropriate actions and processes based on programs stored in ROM 1602 or loaded into RAM 1603 from storage section 1608. Random access memory 1603 also stores various programs and data required for system operation. The CPU 1601, ROM 1602, and RAM 1603 are interconnected via bus 1604. Input / output (I / O) interface 1605 is also connected to bus 1604.

[0112] The following components are connected to I / O interface 1605: an input section 1606 including a keyboard, mouse, etc.; an output section 1607 including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and speakers, etc.; a storage section 1608 including a hard disk, etc.; and a communication section 1609 including a network interface card such as a local area network card, modem, etc. The communication section 1609 performs communication processing via a network such as the Internet. A drive 1610 is also connected to I / O interface 1605 as needed. Removable media 1611, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., are installed on drive 1610 as needed so that computer programs read from them can be installed into storage section 1608 as needed.

[0113] Specifically, according to embodiments of this application, the processes described in the various method flowcharts can be implemented as computer software programs. For example, embodiments of this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via communication section 1609, and / or installed from removable medium 1611. When the computer program is executed by central processing unit 1601, it performs various functions defined in the system of this application.

[0114] It should be noted that, Figure 16 The computer system 1600 of the electronic device shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments of this application.

[0115] Obviously, those skilled in the art should understand that the modules or steps of this application described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those described herein, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, this application is not limited to any particular combination of hardware and software.

[0116] The above are merely preferred embodiments of this application and are not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the principles of this application should be included within the protection scope of this application.

Claims

1. A serial port debugging method, characterized in that, include: The target serial port receives register access commands transmitted from the host computer. The register access commands are used to perform target access operations on the target register of the programmable logic device. The target register is used to store the status information of the control components connected to the programmable logic device. In response to the register access command, the target access operation is performed on the target register to obtain the register access result; The register access result is sent to the host computer through the target serial port, wherein the register access result is used to locate the anomaly of the control component.

2. The method according to claim 1, characterized in that, The circuit board on which the programmable logic device is located is also provided with a serial port connector, which is connected to the target serial port and connected to the host computer through a serial port debugging cable; The step of receiving register access commands transmitted from the host computer via the target serial port includes: The target serial port receives the register access command transmitted by the host computer via the serial port debugging cable and the serial port connector.

3. The method according to claim 1, characterized in that, The programmable logic device includes a serial port switching module, which includes a universal asynchronous transceiver. The serial port switching module is used to switch the enabled serial port in a group of serial ports. Data received by the universal asynchronous transceiver is transmitted to the enabled serial port in the group of serial ports, which includes the target serial port. Before receiving the register access command transmitted from the host computer via the target serial port, the method further includes: In response to a received serial port switching command, the enabled serial port in the group of serial ports is switched to the target serial port, wherein the serial port switching module transmits the register access command received from the host computer via the universal asynchronous transceiver to the target serial port.

4. The method according to claim 1, characterized in that, The programmable logic device includes a serial port control module, which is used to interact with the host computer through the target serial port. The step of receiving register access commands transmitted from the host computer via the target serial port includes: The serial port control module receives the register access command transmitted by the host computer via the target serial port, wherein the command format of the register access command includes at least one of the following: command type identifier, register address, and data to be written.

5. The method according to claim 4, characterized in that, The data format of the register access command is a string format; After receiving the register access command transmitted from the host computer via the target serial port, the method further includes: The serial port control module converts the data format of the register access command from string format to the corresponding ASCII value to obtain the converted register access command. The target access operation is executed based on the converted register access command.

6. The method according to claim 4, characterized in that, The programmable logic device further includes a peripheral bus, which is used to connect the serial port control module and the target register. The step of performing the target access operation on the target register in response to the register access command, and obtaining the register access result, includes: In response to the register access command, the serial port control module transmits the register access command to the target register via the peripheral bus to perform the target access operation on the target register and obtain the register access result.

7. The method according to any one of claims 1 to 6, characterized in that, The step of performing the target access operation on the target register in response to the register access command, and obtaining the register access result, includes: When the target access operation is a data write operation, in response to the register access command, the target write data is written to the target write address of the target register to obtain a data write result, wherein the target write data is the write data indicated by the register access command, the target write address is the write address indicated by the register access command, and the register access result is the data write result; When the target access operation is a data read operation, in response to the register access command, data is read from the target register based on the target read address to obtain a data read result, wherein the target read address is the read address indicated by the register access command, and the register access result is the data read result.

8. A circuit board, characterized in that, include: A programmable logic device and a control unit are provided, wherein the programmable logic device is connected to the control unit, and the programmable logic device includes a target register for storing state information of the control unit; wherein... The programmable logic device is configured to receive a register access command transmitted from a host computer via a target serial port, wherein the register access command is used to perform a target access operation on the target register; in response to the register access command, perform the target access operation on the target register to obtain a register access result; and transmit the register access result to the host computer via the target serial port, wherein the register access result is used to locate anomalies in the control component.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the method according to any one of claims 1 to 7.

10. A computer program product comprising a computer program / instructions, characterized in that, When the computer program / instructions are executed by the processor, they implement the steps of the method according to any one of claims 1 to 7.

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