Parameter determination method and device of electromagnetic interference filter, electronic equipment and storage medium

Abstract

The invention relates to the technical field of electromagnetism, in particular to a method for determining parameters of an electromagnetic interference filter, and the method comprises the steps: obtaining information that a target electromagnetic interference filter needs to meet a target electromagnetic compatibility standard; and determining common-mode target insertion loss and differential-mode target insertion loss of the target electromagnetic interference filter based on the target electromagnetic compatibility standard information. According to the method provided by the invention, the common-mode and differential-mode target insertion loss is pre-determined based on the target electromagnetic compatibility standard, a clear quantitative index is provided for the design of the filter, the optimal parameter combination of the filter device is automatically obtained through the target insertion loss-oriented circuit simulation and parameter scanning optimization, and the design efficiency of the filter device is improved. By establishing a refined simulation model containing parasitic parameters of the magnetic ring and the capacitor and performing system-level verification, the performance of the filter can be accurately evaluated in a design stage, and the dependence on multiple real object trial-manufacture and tests is effectively reduced.

Description

Technical Field

[0001] This invention relates to the field of electromagnetic technology, and in particular to a method, apparatus, electronic device, and storage medium for determining the parameters of an electromagnetic interference filter. Background Technology

[0002] With the rapid development of the new energy vehicle industry, motor controllers are facing increasing demands for lightweighting, miniaturization, and cost reduction, while pursuing superior electromagnetic compatibility (EMC) performance. Electromagnetic interference (EMI) filters, as key sub-components in motor controllers for suppressing electromagnetic noise, account for a significant proportion of the overall system's size, weight, and cost. Therefore, ensuring accurate and efficient design of EMI filters while meeting EMC standards, avoiding over-design or under-design, has become a crucial challenge for enhancing the overall competitiveness of products.

[0003] Currently, the industry's commonly used EMI filter design methods primarily rely on a trial-and-error approach of "test-modify-test." This manifests in two paths: First, relying entirely on engineers' experience to directly provide filter topology and parameters, followed by repeated adjustments after sample testing. This method lacks quantitative analysis, resulting in a blind design process. Second, conducting rough qualitative analysis based on partial test data, i.e., performing overall system noise testing with the filter removed, followed by filter debugging and reinstallation verification on a network analyzer. Both methods suffer from fundamental flaws: they cannot accurately quantify the correspondence between filter performance and actual product requirements, leading to unnecessarily increased material usage, lengthy design cycles, high testing costs, and difficulty in quickly adapting to new product forms, severely hindering the agile development and healthy iteration of electric drive systems.

[0004] In summary, existing technologies lack a scientific, rigorous, and quantitatively calculable EMI filter design methodology, making it impossible to accurately predict and achieve target insertion loss requirements during the design phase. This results in low product development efficiency and uncontrolled costs. Therefore, there is an urgent need for an innovative method that can accurately and quickly complete EMI filter design, clarifying design objectives, optimizing component selection, significantly shortening development cycles, and reducing verification costs. This would meet the current market's pressing demand for rapid iteration and high cost-effectiveness in motor controllers. Summary of the Invention

[0005] In view of this, the purpose of the present invention is to provide a method, apparatus, electronic device, and storage medium for determining the parameters of an electromagnetic interference filter.

[0006] In a first aspect, embodiments of the present invention provide a method for determining the parameters of an electromagnetic interference filter, the method comprising: Obtaining the target electromagnetic interference filter requires meeting the target electromagnetic compatibility standard information; Based on the target electromagnetic compatibility standard information, the common-mode target insertion loss and differential-mode target insertion loss of the target electromagnetic interference filter are determined. Based on the common-mode target insertion loss, a common-mode filter circuit topology is constructed, and the device parameters in the topology are optimized by sweeping parameters through circuit simulation to obtain the optimal parameter combination of the common-mode devices. At the same time, based on the differential-mode target insertion loss, a differential-mode filter circuit topology is constructed, and the device parameters in the topology are optimized by sweeping parameters through circuit simulation to obtain the optimal parameter combination of the differential-mode devices. Based on the optimal parameter combination of common mode and the optimal parameter combination of differential mode devices, a simulation model including magnetic ring and capacitor parasitic parameters is established. Using a simulation model, the insertion loss of the target electromagnetic interference filter after integrating common-mode and differential-mode circuits is simulated and verified. If the simulation results satisfy both common-mode and differential-mode target insertion loss, the optimal parameter combination is confirmed as the target parameters of the target electromagnetic interference filter.

[0007] In conjunction with the first aspect, the steps for determining the common-mode target insertion loss and differential-mode target insertion loss based on target electromagnetic compatibility standard information include: Obtain raw electromagnetic interference noise data from devices that have not installed the target electromagnetic interference filter; The original electromagnetic interference noise data is decomposed into common-mode noise components and differential-mode noise components; The common-mode noise component and the differential-mode noise component are compared with the corresponding limits in the target electromagnetic compatibility standard information to obtain the common-mode target insertion loss and the differential-mode target insertion loss.

[0008] In conjunction with the first aspect, the steps of constructing a common-mode filter circuit topology based on the common-mode target insertion loss, and optimizing the device parameters in the topology through circuit simulation to obtain the optimal parameter combination of the common-mode devices include: Construct a common-mode filter circuit topology that includes a common-mode inductor and a Y capacitor in circuit simulation software; Set the values ​​of the common-mode inductor and the Y capacitor as the variable parameters to be optimized; Set the common-mode insertion loss as the optimization target in circuit simulation; Within the preset component parameter range, a scanning simulation is performed, and through iterative calculation, one or more sets of variable parameter combinations are found that make the common-mode insertion loss curve obtained in the simulation better than or equal to the common-mode target insertion loss in the target frequency band. From one or more sets of variable parameters that meet the requirements, select the optimal combination of values ​​for the common-mode inductor and Y capacitor as the optimal parameter combination for the common-mode device.

[0009] In conjunction with the first aspect, based on the differential-mode target insertion loss, a differential-mode filter circuit topology is constructed, and the optimal parameter combination of the differential-mode devices is obtained by sweeping and optimizing the device parameters in the topology through circuit simulation. This includes the following steps: Construct a differential-mode filter circuit topology containing a differential-mode inductor and an X capacitor in circuit simulation software; Set the values ​​of the differential mode inductor and the X capacitor as the variable parameters to be optimized; Set the differential-mode insertion loss as the optimization target in circuit simulation; Within the preset component parameter range, a scanning simulation is performed, and through iterative calculation, one or more sets of variable parameter combinations are found that make the differential mode insertion loss curve obtained from the simulation better than or equal to the differential mode target insertion loss in the target frequency band. From one or more sets of variable parameters that meet the requirements, select the optimal combination of values ​​for differential mode inductor and X capacitor as the optimal parameter combination for differential mode device.

[0010] Combining the first aspect, the steps for establishing a simulation model that includes the parasitic parameters of the magnetic ring and capacitance, based on the optimal parameter combination of the common-mode and differential-mode devices, include: Based on the target parameters of the common-mode magnetic ring in the optimal parameter combination of common-mode devices, a three-dimensional structural model of the common-mode magnetic ring is established. Electromagnetic field simulation was performed on the three-dimensional structural model of the common-mode magnetic ring to extract its frequency-varying equivalent circuit parameters and generate a SPICE model of the common-mode magnetic ring. Obtain the parasitic parameters of the equivalent series inductance (ESL) and equivalent series resistance (ESR) of the Y capacitor, and establish a Y capacitor model with parasitic parameters. Based on the target parameters of the differential mode magnetic ring in the optimal parameter combination of differential mode devices, a three-dimensional structural model of the differential mode magnetic ring is established. Electromagnetic field simulation was performed on the three-dimensional structural model of the differential-mode magnetic ring to extract its frequency-varying equivalent circuit parameters and generate a SPICE model of the differential-mode magnetic ring. Obtain the parasitic parameters of the equivalent series inductance (ESL) and equivalent series resistance (ESR) of the X capacitor, and establish an X capacitor model with parasitic parameters. The SPICE model of the common-mode magnetic ring, the Y-capacitor model with parasitic parameters, the SPICE model of the differential-mode magnetic ring, and the X-capacitor model with parasitic parameters are integrated to form a simulation model.

[0011] In conjunction with the first aspect, the steps for performing insertion loss simulation verification on the target electromagnetic interference filter after integrating common-mode and differential-mode circuits using a simulation model include: Based on the simulation model, a simulation schematic is built in the circuit simulation environment, and a standard impedance network is set at the input and output of the simulation schematic to simulate the source impedance and load impedance in actual applications. Set up frequency scanning analysis and perform insertion loss simulation on the simulation schematic within the frequency range specified by the target electromagnetic compatibility standard; Obtain the insertion loss curve data from the simulation output, compare the common-mode insertion loss curve with the common-mode target insertion loss, and compare the differential-mode insertion loss curve with the differential-mode target insertion loss. Based on whether the common-mode insertion loss curve is not lower than the common-mode target insertion loss in the target frequency band, and whether the differential-mode insertion loss curve is not lower than the differential-mode target insertion loss in the target frequency band.

[0012] In conjunction with the first aspect, the core material of the common-mode magnetic ring and / or differential-mode magnetic ring is nanocrystalline or ferrite.

[0013] Secondly, embodiments of this application also provide a parameter determination device for an electromagnetic interference filter, the device comprising: The acquisition module is used to acquire information on the electromagnetic compatibility standards that the target electromagnetic interference filter needs to meet. The insertion loss determination module is used to determine the common-mode and differential-mode insertion loss of the target electromagnetic interference filter based on the target electromagnetic compatibility standard information. The simulation module is used to build a common-mode filter circuit topology based on the common-mode target insertion loss, and to perform parameter sweep optimization on the device parameters in the topology through circuit simulation to obtain the optimal parameter combination of the common-mode devices. At the same time, based on the differential-mode target insertion loss, a differential-mode filter circuit topology is built, and the device parameters in the topology are also optimized through circuit simulation to obtain the optimal parameter combination of the differential-mode devices. A module is established to create a simulation model that includes magnetic ring and capacitor parasitic parameters based on the optimal parameter combination of common mode and differential mode devices. The verification module is used to perform insertion loss simulation verification on the target electromagnetic interference filter after integrating common-mode and differential-mode circuits using a simulation model. The parameter determination module is used to confirm the optimal parameter combination as the target parameters of the target electromagnetic interference filter if the simulation verification results meet the requirements of common-mode target insertion loss and differential-mode target insertion loss.

[0014] Thirdly, this application provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor runs the computer program to cause the electronic device to perform the above-described method.

[0015] Fourthly, this application provides a readable storage medium storing computer program instructions, which are read and executed by a processor to perform the above-described method.

[0016] The embodiments of this invention bring the following beneficial effects: The method provided in this application predetermines the common-mode and differential-mode target insertion loss based on the target electromagnetic compatibility standard, providing clear quantitative indicators for filter design. Through circuit simulation and parameter sweep optimization guided by the target insertion loss, the optimal parameter combination of filter devices is automatically obtained. By establishing a refined simulation model including magnetic ring and capacitor parasitic parameters and performing system-level verification, the filter performance can be accurately evaluated in the design stage, effectively reducing the dependence on multiple physical prototypes and tests. Under the premise of ensuring design accuracy, the development cycle can be shortened, the manpower and testing costs in the development process can be reduced, and the competitiveness of the product can be improved.

[0017] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention are realized and obtained in accordance with the structures particularly pointed out in the description, claims and drawings.

[0018] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0019] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0020] Figure 1 A flowchart illustrating the parameter determination method for an electromagnetic interference filter provided in an embodiment of the present invention; Figure 2 A schematic diagram of the structure of the 3D digital model obtained in the parameter determination method of the electromagnetic interference filter provided in the embodiment of the present invention; Figure 3 A schematic diagram of the target electromagnetic interference filter in the parameter determination method of the electromagnetic interference filter provided in the embodiment of the present invention; Figure 4 To Figure 3 The diagram shows a simulation of the target electromagnetic interference filter. Figure 5 A schematic diagram of the structure of the parameter determination device for an electromagnetic interference filter provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of the electronic device structure provided in an embodiment of the present invention.

[0021] Figure label: 10 - Acquisition Module, 20 - Insertion Loss Determination Module, 30 - Simulation Module, 40 - Establishment Module, 50 - Verification Module, 60 - Parameter Determination Module; 130 - Processor, 131 - Memory, 132 - Bus, 133 - Communication interface. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0023] To facilitate understanding of this embodiment, the application scenarios and design concepts of this application embodiment will be briefly introduced below.

[0024] Currently, in the field of new energy vehicle motor controllers, the design of electromagnetic interference filters generally relies on a trial-and-error approach of "test-modify-test," lacking precise and quantitative design methods. The mainstream practices in the industry can be summarized into the following two categories: The first type is the trial-and-error method based on experience-based imitation. This method relies entirely on engineers' experience with similar products in the past. The process is as follows: directly referencing existing products to determine the circuit topology of the filter; setting the initial parameters of each component in the topology based on experience; fabricating a prototype based on the topology and parameters and conducting electromagnetic compatibility tests; repeatedly adjusting and modifying the filter topology or component parameters based on the test results; and finally updating the topology and parameters that pass the tests into the product design. This method lacks quantitative basis from the initial stage, and the design process is highly arbitrary, easily leading to "over-design" or "under-design" of filter performance.

[0025] The second type is the qualitative debugging method based on rough testing. Although this method incorporates some test data, its analytical depth is limited, and it is essentially still a qualitative design. The process is as follows: remove the filter from the motor controller; perform electromagnetic compatibility testing on the unfiltered controller to obtain the original noise spectrum; analyze the noise spectrum to qualitatively determine the approximate frequency and amplitude of the out-of-range noise; place the removed filter on a network analyzer and adjust it according to the aforementioned judgment results so that its insertion loss curve meets the requirements at the corresponding frequency; reinstall the adjusted filter in the controller and perform electromagnetic compatibility testing again; based on the results of this test, further modifications may still be needed; update the final determined parameters in the product design. Although this method uses test data as input, it does not establish a precise, quantitative design model from noise to filter parameters and heavily relies on multiple, expensive whole-machine tests for iterative verification.

[0026] In summary, existing technologies have the following inherent drawbacks: First, they cannot accurately quantify the correspondence between filter performance requirements and device parameters during the parameter setting stage, resulting in vague parameter setting objectives. Second, the parameter setting process heavily relies on engineers' personal experience and repeated prototype manufacturing and testing, leading to lengthy development cycles and high manpower and testing costs. Third, it is difficult to avoid over-design or under-design, which is detrimental to achieving optimal cost-effectiveness and rapid iteration of the product. Therefore, there is an urgent need for a method that can achieve accurate and rapid parameter setting for electromagnetic interference filters.

[0027] Based on this, this application provides a method, apparatus, electronic device, and storage medium for determining the parameters of an electromagnetic interference filter, so as to achieve accurate and rapid setting of electromagnetic interference filter parameters.

[0028] Example 1 This application provides a method for determining the parameters of an electromagnetic interference filter, combined with... Figure 1 As shown, the method includes: S110, the target electromagnetic interference filter needs to meet the target electromagnetic compatibility standard information.

[0029] S120, based on the target electromagnetic compatibility standard information, determines the common-mode target insertion loss and differential-mode target insertion loss of the target electromagnetic interference filter.

[0030] S130. Based on the common-mode target insertion loss, a common-mode filter circuit topology is constructed, and the device parameters in the topology are optimized by scanning parameters through circuit simulation to obtain the optimal parameter combination of the common-mode devices. At the same time, based on the differential-mode target insertion loss, a differential-mode filter circuit topology is constructed, and the device parameters in the topology are optimized by scanning parameters through circuit simulation to obtain the optimal parameter combination of the differential-mode devices.

[0031] S140, based on the optimal parameter combination of common mode and the optimal parameter combination of differential mode devices, establishes a simulation model including magnetic ring and capacitor parasitic parameters.

[0032] S150 uses a simulation model to perform insertion loss simulation verification on the target electromagnetic interference filter after integrating common-mode and differential-mode circuits.

[0033] S160. If the simulation verification results satisfy the common-mode target insertion loss and differential-mode target insertion loss, the optimal parameter combination is confirmed as the target parameters of the target electromagnetic interference filter.

[0034] The electromagnetic interference filter parameter determination method provided in this application determines the common-mode and differential-mode target insertion loss through target electromagnetic compatibility standard information, accurately quantifying the design target and fundamentally overcoming the blindness of traditional empirical design methods. It effectively avoids "over-design" and "under-design" of the filter. Furthermore, by using system simulation parameter sweep optimization and model verification including parasitic parameters, the filter performance can be predicted efficiently and reliably during the design stage. This replaces the traditional "test-modify-test" cycle that relies on multiple prototypes and tests, significantly shortening the development cycle and greatly reducing the cost of prototype production and EMC testing. At the same time, by establishing a simulation model that approximates actual working conditions, this method greatly improves the design success rate and product reliability, providing a solid technical guarantee for the rapid and cost-effective development of products such as motor controllers.

[0035] In step S110, the target electromagnetic compatibility standard information refers to the standards that the target electromagnetic interference filter, whose parameters are to be determined, must meet. One feasible approach is to use industry standards, such as CISPR or GB standards, which are the most basic and universal basis. Another feasible approach is to use industry or field specifications, such as CISPR 25 in the automotive electronics field, which is more stringent and specific than general standards. Yet another feasible approach is to use standards that are manufacturer or customer requirements, covering many internal company standards or specific customer technical agreements set to enhance product competitiveness. All of the above methods are feasible and are merely examples without limitation.

[0036] In conjunction with the first aspect, step S120 includes: S1210: Obtain raw electromagnetic interference noise data from devices that do not have the target electromagnetic interference filter installed.

[0037] S1211 decomposes the original electromagnetic interference noise data into common-mode noise components and differential-mode noise components.

[0038] S1212, compare the common-mode noise component and the differential-mode noise component with the corresponding limits in the target electromagnetic compatibility standard information to obtain the common-mode target insertion loss and the differential-mode target insertion loss.

[0039] Step S1210 involves performing conducted emission tests on the device without the target filter installed in a standard EMC test environment to obtain its raw, authentic electromagnetic interference noise spectrum data. This step establishes an objective benchmark for the design, transforming the abstract electromagnetic interference problem into a quantifiable amplitude-frequency response curve.

[0040] Subsequently, in step S1211, the acquired total noise data is decomposed into independent common-mode noise components and differential-mode noise components using a specific noise separation network or algorithm. This process achieves "decoupling" of the mixed noise, clarifying the two types of interference that must be processed separately due to their different generation mechanisms and propagation paths.

[0041] Finally, in step S1212, the decomposed common-mode and differential-mode noise components are compared and calculated frequency-by-frequency with the corresponding limits in the target EMC standard information, thereby accurately determining the common-mode target insertion loss and the differential-mode target insertion loss. Thus, through rigorous data processing, the system-level EMC compliance requirements (i.e., the target EMC standard information) are directly transformed into quantified performance indicator curves that the component-level filter must achieve, fundamentally eliminating the blind spots of traditional design and ensuring a precise match between filter performance and system requirements.

[0042] It can be seen that steps S1210 to S1212 together constitute the precise design path of the electromagnetic interference filter based on measured noise.

[0043] In conjunction with the first aspect, step S130 includes: S131, Build a common-mode filter circuit topology including a common-mode inductor and a Y capacitor in the circuit simulation software.

[0044] S132 sets the values ​​of the common-mode inductor and the Y capacitor as the variable parameters to be optimized.

[0045] S133 sets the common-mode target insertion loss as the optimization target in circuit simulation.

[0046] S134 performs scanning simulation within the preset component parameter range, and finds one or more sets of variable parameter combinations through iterative calculations that make the common-mode insertion loss curve obtained from the simulation better than or equal to the common-mode target insertion loss in the target frequency band.

[0047] S135 selects the optimal combination of values ​​for common-mode inductor and Y capacitor from one or more sets of variable parameters that meet the requirements.

[0048] In step S131, the circuit simulation software refers to a computer program used to simulate circuit behavior, such as SPICE, PSPICE, LTspice, Saber, etc., which can predict the performance of the circuit in a virtual environment.

[0049] A common-mode inductor is a symmetrical inductor wound on the same magnetic ring. It presents high impedance to common-mode noise and very low impedance to differential-mode signals (normal power transmission). A Y capacitor is usually a capacitor connected between the phase line and the ground line (PE) to provide a low-impedance path to ground for common-mode noise.

[0050] A common-mode filter circuit topology refers to a specific circuit connection form designed to suppress common-mode noise. In this embodiment, it specifically refers to the basic filter structure composed of two core components: a common-mode inductor and a Y capacitor.

[0051] In step S131, a standard common-mode filter circuit consisting of a common-mode inductor and a Y capacitor is constructed in the circuit simulation software based on the principle of electromagnetic interference suppression. This virtual circuit model is the foundation and operational object for all subsequent parameter optimization and performance analysis. It transforms the abstract filtering requirements into a concrete object that can be accurately calculated and iterated by the computer.

[0052] In step S132, the variable parameters refer to the component values ​​defined in the simulation software as being able to vary within a specific range, and are the objects of adjustment in the automated optimization process. In step S132, the two core parameters that determine the filtering performance, the inductance value (Lcm) of the common-mode inductor and the capacitance value (Cy) of the Y capacitor, are set from fixed values ​​to "variables" that can vary within a preset range. This operation defines the decision space of the optimization process, allowing the simulation software to automatically and systematically traverse a massive number of (Lcm, Cy) parameter combinations.

[0053] In step S133, the "common-mode target insertion loss curve" accurately calculated in step S120 is input into the simulation environment and set as the ultimate goal that the optimization algorithm must achieve. This ensures that the entire automated design process is a strictly goal-driven process, and all parameter adjustments are closely centered around the clear objective of "making the insertion loss curve obtained from the simulation meet or exceed the preset target," thus ensuring that the design results do not deviate from the final performance requirements.

[0054] Subsequently, in step S134, the simulation software performs massive circuit simulations within the pre-defined component parameter boundaries using systematic scanning and efficient iterative algorithms. The goal is to select all parameter combinations that ensure the final simulated common-mode insertion loss curve meets or exceeds the target requirements across the entire target frequency band without exception. This process achieves global optimization using machine computing power and sets extremely strict performance qualification lines, fundamentally eliminating the risk of "under-design." The component parameter boundaries define reasonable value ranges for the common-mode inductor and Y capacitor (e.g., inductance: 1mH~100mH, capacitance: 1nF~10nF) based on engineering feasibility, cost, and physical constraints. "Completely better than or equal to" means that at every frequency point within the target frequency band, the simulated insertion loss value is not lower than (i.e., greater than or equal to) the target insertion loss value.

[0055] Finally, when multiple suitable parameter solutions are found in step S134, a final decision needs to be made based on additional engineering criteria. For example, a crucial engineering constraint is the need to manually set the Y capacitor to industry-standard parameters. Under this constraint, the designer first locks the Y capacitor value to a readily available standard specification on the market, and then selects a matching common-mode inductor value from the suitable solutions. The final determined (Lcm, Cy) combination represents the "optimal parameter combination" that achieves the best balance between filtering performance, manufacturability, and cost-effectiveness, thus ensuring that every component in the filter is necessary and non-redundant for achieving the desired outcome.

[0056] In conjunction with the first aspect, step S130 includes: S13A, build a differential-mode filter circuit topology including a differential-mode inductor and an X capacitor in circuit simulation software.

[0057] S13B sets the values ​​of the differential mode inductor and the X capacitor as the variable parameters to be optimized.

[0058] S13C sets the differential-mode target insertion loss as the optimization target in circuit simulation.

[0059] S13D performs scanning simulation within a preset component parameter range, and through iterative calculation, finds one or more sets of variable parameter combinations that make the simulated differential mode insertion loss curve better than or equal to the differential mode target insertion loss in the target frequency band.

[0060] S13E selects the optimal combination of values ​​for differential mode inductor and X capacitor from one or more sets of variable parameter combinations that meet the requirements.

[0061] Similar in logic to the common-mode optimization path in steps S131-S135, step S13A constructs a typical differential-mode filter structure in the simulation environment, consisting of a differential-mode inductor and an X capacitor. The differential-mode inductor is a single-winding inductor that presents high impedance to differential-mode noise; the X capacitor is connected between the phase lines (LN) to filter out differential-mode noise. This topology establishes a concrete circuit framework for subsequent differential-mode parameter optimization.

[0062] Subsequently, step S13B sets the inductance value (Ldm) of the differential mode inductor and the capacitance value (Cx) of the X capacitor to parameters that are variable within a reasonable engineering range. This provides operational space for the simulation software to perform automated parameter scanning and optimization, which is a prerequisite for achieving efficient, global optimization.

[0063] Subsequently, step S13C sets the differential-mode target insertion loss curve calculated in step S120 as the objective function for simulation optimization. This ensures that the parameter optimization process of the entire differential-mode circuit is closely centered on meeting the target insertion loss requirements.

[0064] Subsequently, in step S13, the simulation software searches for all parameter combinations (Ldm, Cx) within the preset parameter space through a systematic scanning simulation and iterative algorithm, which ensure that the differential mode insertion loss curve obtained from the simulation is not lower than the target requirement in all aspects within the target frequency band.

[0065] Finally, similar to step S135, the value of the X capacitor is usually selected as an industry standard to optimize cost and manufacturability, thereby determining the value of the differential mode inductor to match it. The final output (Ldm, Cx) combination is the optimal design parameter for the differential mode filter section.

[0066] It can be seen that steps S131~S135 are logically symmetrical with steps S13A~S13E, and together they realize the complete design of the EMI filter.

[0067] In conjunction with the first aspect, step S140 includes: S141. Based on the target parameters of the common-mode magnetic ring in the optimal parameter combination of the common-mode device, a three-dimensional structural model of the common-mode magnetic ring is established.

[0068] Among them, the three-dimensional structural model refers to the digital model established in computer-aided design software that accurately reflects the geometric dimensions of the magnetic ring (such as inner and outer diameters, height, magnetic circuit length Le, cross-sectional area Ae, etc.).

[0069] Step S141, based on the common-mode inductance target value obtained through optimization in S130, and combined with the selected core material, uses magnetic formulas to reverse-engineer and establish a three-dimensional geometric model of the magnetic ring that meets the target inductance requirements. This model forms the basis for subsequent electromagnetic field simulations, ensuring that the simulation object and the physical device to be manufactured are structurally identical. In conjunction with the first aspect, one or both of the core materials of the common-mode and differential-mode magnetic rings are nanocrystalline or ferrite.

[0070] S142 performs electromagnetic field simulation on the three-dimensional structural model of the common-mode magnetic ring, extracts its frequency-varying equivalent circuit parameters, and generates the SPICE model of the common-mode magnetic ring.

[0071] Among them, electromagnetic field simulation refers to the analysis of the electromagnetic field distribution of a three-dimensional model at high frequencies using numerical calculation methods such as the finite element method; frequency-varying equivalent circuit parameters refer to circuit models that can reflect the characteristics of device parameters changing with frequency (usually including inductance, resistance, capacitance, etc.); SPICE model is a device mathematical model that can be recognized and used by circuit simulation software.

[0072] In step S142, by performing electromagnetic field simulation on the three-dimensional magnetic ring model, its high-frequency characteristics within the operating frequency band can be accurately extracted, such as the frequency attenuation effect of the inductance value, parasitic capacitance, and core loss. These frequency-varying parameters are encapsulated into a SPICE model, so that in subsequent circuit simulations, the magnetic ring is no longer an ideal inductor element, but a precise model that can reflect its true physical behavior.

[0073] S143, obtain the parasitic parameters of the equivalent series inductance ESL and equivalent series resistance ESR of the Y capacitor, and establish a Y capacitor model with parasitic parameters.

[0074] ESL and ESR are inherent parasitic parameters of a capacitor, representing the equivalent series inductance and equivalent series resistance generated by its leads and internal structure, respectively.

[0075] At high frequencies, the parasitic ESL and ESR of a capacitor significantly affect its impedance characteristics, even causing it to become inductive after a certain frequency point, leading to a sharp deterioration in filtering performance. By obtaining these parasitic parameters from device datasheets or actual measurements and constructing a capacitor model that includes these parameters, the actual behavior of a Y capacitor in a high-frequency circuit can be realistically simulated.

[0076] S144. Based on the target parameters of the differential mode magnetic ring in the optimal parameter combination of the differential mode device, a three-dimensional structural model of the differential mode magnetic ring is established.

[0077] S145 performs electromagnetic field simulation on the three-dimensional structural model of the differential-mode magnetic ring, extracts its frequency-varying equivalent circuit parameters, and generates a SPICE model of the differential-mode magnetic ring.

[0078] Similarly, the target value of the differential mode inductor obtained based on S140 optimization is also processed through three-dimensional structural modeling, electromagnetic field simulation, and SPICE model generation to establish an accurate model of the differential mode inductor that includes high-frequency parasitic effects.

[0079] S146, obtain the parasitic parameters of the equivalent series inductance ESL and equivalent series resistance ESR of the X capacitor, and establish the X capacitor model with parasitic parameters.

[0080] Similar to S143, a high-precision model of the X capacitor on the differential mode path is performed to obtain and establish a model containing parasitic parameters to ensure the accuracy of high-frequency simulation of the differential mode filter circuit.

[0081] S147 integrates the SPICE model of the common-mode magnetic ring, the Y-capacitor model with parasitic parameters, the SPICE model of the differential-mode magnetic ring, and the X-capacitor model with parasitic parameters to form a simulation model.

[0082] The common-mode magnetic ring SPICE model, the Y-capacitor model with parasitic parameters, the differential-mode magnetic ring SPICE model, and the X-capacitor model with parasitic parameters generated in the preceding steps are connected in circuit simulation software to form a complete, system-level simulation model. This simulation model reproduces all the key non-ideal characteristics of the real filter to the greatest extent possible, providing a reliable "virtual prototype" for subsequent high-confidence performance verification. It is the final and most critical digital guarantee for ensuring the design's success on the first attempt. Figure 2 As shown, the magnetic circuit parameters Le and Ae are calculated based on the required inductance and impedance. A magnetic ring that meets the requirements of Le and Ae is designed, and a 3D digital model that meets the requirements is also designed. Combined with... Figure 3 The simulated common-mode insertion loss of the target electromagnetic interference filter shown, after processing in steps S110-S140, is as follows: Figure 4 As shown in the figure, this diagram specifically depicts the distributed parasitic capacitance paths (e.g., 1nF_Cy1_Screw:Cy1_GND_Body) formed between the mounting point (e.g., Mms_Split1Cy1_Mms_Busbar), pins, screws, and different ground reference points (e.g., Cy1_GND_Body, Cy1_GND_Housing) of the Y capacitor when it is installed in the system. These parasitic effects, which are often ignored in traditional ideal models, are precisely identified, defined, and incorporated into the simulation system in this method.

[0083] In conjunction with the first aspect, step S150 includes: S151, based on a refined simulation model, builds a simulation schematic in a circuit simulation environment, and sets up standard impedance networks at the input and output terminals of the simulation schematic to simulate the source impedance and load impedance in actual applications.

[0084] The standard impedance network refers to a standardized impedance circuit that conforms to EMC standards (such as the LISN model of 50Ω / 50μH) and is used to simulate the source impedance on the power grid side and the load impedance on the equipment side under real test conditions in simulation.

[0085] The refined simulation model obtained in step S140 is placed in the circuit simulation environment. Then, standard impedance networks are connected to the input and output ports of this complete filter model. Finally, the filter model integrated with the input or output impedance network constitutes the "simulation schematic" used for final verification. By setting the standard impedance network, the consistency between the simulation environment and the real EMC test environment is ensured, making the simulation results highly comparable and reliable, and avoiding performance misjudgments caused by impedance mismatch.

[0086] S152, set up frequency scan analysis, and perform insertion loss simulation on the simulation schematic within the frequency range specified by the target electromagnetic compatibility standard.

[0087] Frequency sweep analysis is a type of analysis in simulation software used to calculate the response of circuit performance as frequency changes.

[0088] The instruction simulation software performs insertion loss simulation on the entire integrated filter system within the full frequency band specified by the EMC standard (i.e., target electromagnetic compatibility standard information) (e.g., 150kHz to 1GHz). This process outputs the final common-mode and differential-mode insertion loss curves of the filter under real operating conditions, which is the direct basis for its performance evaluation.

[0089] S153, obtain the insertion loss curve data of the simulation output, compare the common mode insertion loss curve with the common mode target insertion loss, and compare the differential mode insertion loss curve with the differential mode target insertion loss.

[0090] By comparing the two actual performance curves obtained from the S152 simulation with the two target reference curves preset in the S120 stage, a precise, frequency-by-frequency comparison is made. This operation transforms the judgment of whether the design is qualified from a subjective feeling into an objective data relationship, which is the data basis for making the final decision.

[0091] S154, based on whether the common-mode insertion loss curve is not lower than the common-mode target insertion loss in the target frequency band, and whether the differential-mode insertion loss curve is not lower than the differential-mode target insertion loss in the target frequency band.

[0092] Based on the comparison results, a strict binary judgment is applied: the design is considered verified only when both simulation curves reach or exceed (i.e., "not lower than") the corresponding target curve at every frequency point within their respective target frequency bands. This extremely stringent standard ensures that the verified design has a theoretically 100% chance of meeting the standard, and is the ultimate guarantee for achieving "design is correct" and eliminating the need for subsequent rectification.

[0093] Example 2 In this embodiment, steps S110 and S130-S160 are the same as in Embodiment 1, except that step S120 includes: S1220 obtains the original electromagnetic interference noise simulation data of the device without the target electromagnetic interference filter installed through simulation.

[0094] S1221 decomposes the original electromagnetic interference noise simulation data into common-mode noise components and differential-mode noise components.

[0095] S1222, compare the common-mode noise component and the differential-mode noise component with the corresponding limits in the target electromagnetic compatibility standard information to obtain the common-mode target insertion loss and the differential-mode target insertion loss.

[0096] In step S1220, during the early stages of product development, a digital model of the power electronic equipment (such as a motor controller) without the target filter is established using circuit or system simulation software, and its original electromagnetic interference noise spectrum is predicted through simulation calculations. This step enables the acquisition of the equipment's noise characteristics proactively before the physical prototype is manufactured, thereby significantly advancing design verification, shortening the development cycle, and reducing upfront costs.

[0097] Subsequently, in step S1221, the raw noise data obtained from the simulation is decomposed into independent common-mode and differential-mode noise components using the same principles and algorithms as those used for processing measured data. Although the data source is a virtual model, this decomposition process strictly follows the physical definition and mathematical separation method of common-mode and differential-mode noise, ensuring the accuracy and relevance of the analysis results and providing clear input for the subsequent design of common-mode and differential-mode filter circuits.

[0098] Finally, in step S1222, the same core calculation as the actual measurement path is performed: the common-mode and differential-mode noise components obtained from the simulation decomposition are compared with the limits in the target electromagnetic compatibility standard information frequency by frequency, thereby accurately calculating the common-mode target insertion loss and the differential-mode target insertion loss. This simulation-based technical path enables the generation of quantified filter performance targets in the early stages of product design, greatly enhancing the predictability and guidance of the design.

[0099] As can be seen, in this embodiment, the above steps constitute a precise design path for electromagnetic interference filters based on simulation prediction.

[0100] Example 3 This embodiment is the same as Embodiment 1 and Embodiment 2 in steps S110 and S130-S160, except that step S120 includes: S1230: Acquire common-mode insertion loss data and differential-mode insertion loss data of an initial electromagnetic interference filter.

[0101] S1231, compare the common-mode insertion loss data and differential-mode insertion loss data of the initial electromagnetic interference filter with the corresponding limits in the target electromagnetic compatibility standard information to obtain the common-mode target insertion loss and differential-mode target insertion loss.

[0102] In step S1230, accurate common-mode and differential-mode insertion loss data of an existing initial electromagnetic interference filter are obtained by performing network analyzer testing or simulation analysis based on its model. This step establishes a performance optimization benchmark, transforming existing design results or prototype states into quantifiable performance curves, providing a clear reference starting point for subsequent targeted enhancements.

[0103] In step S1231, the obtained initial filter insertion loss data is compared and analyzed with the corresponding limits in the new target EMC standard information. It is worth noting that this process is not a simple data comparison, but rather a precise performance gap calculation: by analyzing the difference between the initial filter performance and the new standard requirements, and comprehensively considering the necessary design margins, the additional common-mode and differential-mode insertion loss values ​​required to achieve standard compliance are accurately derived. Thus, starting from a known design state, the specific performance improvement target is clearly defined through quantitative gap analysis.

[0104] It can be seen that steps S1230~S1231 together constitute a precise optimization path based on the iteration of a known electromagnetic interference filter.

[0105] Example 4 This application also provides a parameter determination device for a magnetic interference filter, which is used to execute the method provided in Embodiment 1, Embodiment 2, or Embodiment 3; in conjunction with Figure 5 As shown, the device includes: an acquisition module 10, an insertion loss determination module 20, a simulation module 30, an establishment module 40, a verification module 50, and a parameter determination module 60.

[0106] The acquisition module 10 is used to acquire information on the electromagnetic compatibility standards that the target electromagnetic interference filter needs to meet.

[0107] The insertion loss determination module 20 is used to determine the common-mode and differential-mode insertion loss of the target electromagnetic interference filter based on the target electromagnetic compatibility standard information.

[0108] Simulation module 30 is used to build a common-mode filter circuit topology based on the common-mode target insertion loss, and to perform parameter sweep optimization on the device parameters in the topology through circuit simulation to obtain the optimal parameter combination of the common-mode devices; at the same time, based on the differential-mode target insertion loss, a differential-mode filter circuit topology is built, and to perform parameter sweep optimization on the device parameters in the topology through circuit simulation to obtain the optimal parameter combination of the differential-mode devices.

[0109] Module 40 is used to establish a simulation model that includes the parasitic parameters of the magnetic ring and capacitor, based on the optimal parameter combination of common mode and differential mode devices.

[0110] The verification module 50 is used to perform insertion loss simulation verification on the target electromagnetic interference filter after integrating common-mode and differential-mode circuits using a simulation model.

[0111] The parameter determination module 60 is used to confirm the optimal parameter combination as the target parameters of the target electromagnetic interference filter if the simulation verification results meet the requirements of common-mode target insertion loss and differential-mode target insertion loss.

[0112] Thirdly, embodiments of this application provide an electronic device, combined with Figure 6 As shown, the electronic device includes a memory 131 and a processor 130. The memory 131 stores a computer program, and the processor 130 runs the computer program to make the electronic device perform the above-described method.

[0113] Furthermore, combined Figure 6 The electronic device shown also includes a bus 132 and a communication interface 133, with the processor 130, the communication interface 133 and the memory 131 connected via the bus 132.

[0114] The memory 131 may include high-speed random access memory (RAM) and may also include non-volatile memory, such as at least one disk storage device. Communication between this system network element and at least one other network element is achieved through at least one communication interface 133 (which can be wired or wireless), such as the Internet, wide area network, local area network, metropolitan area network, etc. The bus 132 may be an ISA bus, PCI bus, or EISA bus, etc. The bus can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 6 The symbol is represented by a single double-headed arrow, but this does not mean that there is only one bus or one type of bus.

[0115] Processor 130 may be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method can be completed by the integrated logic circuitry in the hardware of processor 130 or by instructions in software form. Processor 130 may be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc.; it may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this invention. The general-purpose processor may be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this invention can be directly manifested as execution by a hardware decoding processor, or execution by a combination of hardware and software modules in the decoding processor. The software module can reside in a readily available storage medium in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, or registers. This storage medium is located in memory 131. The processor 130 reads the information from memory 131 and, in conjunction with its hardware, completes the steps of the method described in the foregoing embodiments.

[0116] Fourthly, embodiments of this application provide a readable storage medium storing computer program instructions, which are read and executed by a processor to perform the above-described method.

[0117] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the system and apparatus described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0118] Furthermore, in the description of the embodiments of the present invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in the present invention based on the specific circumstances.

[0119] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0120] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0121] Finally, it should be noted that the above embodiments are merely specific implementations of the present invention, used to illustrate the technical solutions of the present invention, and not to limit it. The scope of protection of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments within the technical scope disclosed in the present invention, or make equivalent substitutions for some of the technical features; and these modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method for determining the parameters of an electromagnetic interference filter, characterized in that, The method includes: Obtaining the target electromagnetic interference filter requires meeting the target electromagnetic compatibility standard information; Based on the target electromagnetic compatibility standard information, the common-mode target insertion loss and differential-mode target insertion loss of the target electromagnetic interference filter are determined; Based on the common-mode target insertion loss, a common-mode filter circuit topology is constructed, and the device parameters in the topology are optimized by scanning parameters through circuit simulation to obtain the optimal parameter combination of the common-mode devices. At the same time, based on the differential-mode target insertion loss, a differential-mode filter circuit topology is constructed, and the device parameters in the topology are optimized by scanning parameters through circuit simulation to obtain the optimal parameter combination of the differential-mode devices. Based on the optimal parameter combination of the common mode and the optimal parameter combination of the differential mode device, a simulation model including the magnetic ring and capacitor parasitic parameters is established. Using the aforementioned simulation model, the insertion loss of the target electromagnetic interference filter after integrating common-mode and differential-mode circuits is simulated and verified. If the simulation verification results satisfy the common-mode target insertion loss and differential-mode target insertion loss, the optimal parameter combination is confirmed as the target parameters of the target electromagnetic interference filter.

2. The method according to claim 1, characterized in that, The steps for determining common-mode and differential-mode target insertion loss based on target electromagnetic compatibility standard information include: Obtain raw electromagnetic interference noise data from devices that have not installed the target electromagnetic interference filter; The original electromagnetic interference noise data is decomposed into common-mode noise components and differential-mode noise components; The common-mode noise component and the differential-mode noise component are compared with the corresponding limits in the target electromagnetic compatibility standard information to obtain the common-mode target insertion loss and the differential-mode target insertion loss.

3. The method according to claim 1, characterized in that, The steps include: constructing a common-mode filter circuit topology based on the common-mode target insertion loss, and performing parameter sweep optimization on the device parameters in the topology through circuit simulation to obtain the optimal parameter combination of the common-mode devices; Construct a common-mode filter circuit topology that includes a common-mode inductor and a Y capacitor in circuit simulation software; Set the values ​​of the common-mode inductor and the Y capacitor as the variable parameters to be optimized; The common-mode target insertion loss is set as the optimization target in circuit simulation; Within a preset range of component parameters, a scanning simulation is performed. Through iterative calculation, one or more sets of variable parameter combinations are found that make the common-mode insertion loss curve obtained from the simulation better than or equal to the common-mode target insertion loss in the target frequency band. From one or more sets of variable parameter combinations that meet the requirements, the optimal combination of values ​​for the common-mode inductor and the Y capacitor is selected as the optimal parameter combination for the common-mode device.

4. The method according to claim 3, characterized in that, Based on the differential-mode target insertion loss, the following steps are taken: A differential-mode filter circuit topology is constructed, and the device parameters in the topology are optimized through circuit simulation to obtain the optimal parameter combination of the differential-mode devices: Construct a differential-mode filter circuit topology containing a differential-mode inductor and an X capacitor in circuit simulation software; Set the values ​​of the differential mode inductor and the X capacitor as the variable parameters to be optimized; The differential-mode target insertion loss is set as the optimization target in circuit simulation; Within a preset range of component parameters, a scanning simulation is performed. Through iterative calculation, one or more sets of variable parameter combinations are found that make the differential mode insertion loss curve obtained from the simulation better than or equal to the differential mode target insertion loss in the target frequency band. From one or more sets of variable parameter combinations that meet the requirements, the optimal parameter combination for the differential mode device is selected by selecting the values ​​of the differential mode inductor and the X capacitor.

5. The method according to claim 4, characterized in that, The steps for establishing a simulation model including magnetic ring and capacitor parasitic parameters based on the optimal parameter combination of the common-mode device and the optimal parameter combination of the differential-mode device include: Based on the target parameters of the common-mode magnetic ring in the optimal parameter combination of the common-mode device, a three-dimensional structural model of the common-mode magnetic ring is established. Electromagnetic field simulation was performed on the three-dimensional structural model of the common-mode magnetic ring to extract the frequency-varying equivalent circuit parameters and generate the SPICE model of the common-mode magnetic ring. Obtain the parasitic parameters of the equivalent series inductance (ESL) and equivalent series resistance (ESR) of the Y capacitor, and establish a Y capacitor model with parasitic parameters. Based on the target parameters of the differential mode magnetic ring in the optimal parameter combination of the differential mode device, a three-dimensional structural model of the differential mode magnetic ring is established. Electromagnetic field simulation was performed on the three-dimensional structural model of the differential-mode magnetic ring to extract the frequency-varying equivalent circuit parameters and generate a SPICE model of the differential-mode magnetic ring. Obtain the parasitic parameters of the equivalent series inductance (ESL) and equivalent series resistance (ESR) of the X capacitor, and establish an X capacitor model with parasitic parameters. The SPICE model of the common-mode magnetic ring, the Y-capacitor model with parasitic parameters, the SPICE model of the differential-mode magnetic ring, and the X-capacitor model with parasitic parameters are integrated to form the simulation model.

6. The method according to claim 4, characterized in that, The steps for performing insertion loss simulation verification on the target electromagnetic interference filter after integrating common-mode and differential-mode circuits using the aforementioned simulation model include: Based on the simulation model, a simulation schematic is built in the circuit simulation environment, and a standard impedance network is set at the input and output terminals of the simulation schematic to simulate the source impedance and load impedance in actual applications. Set up frequency scanning analysis and perform insertion loss simulation on the simulation schematic within the frequency range specified by the target electromagnetic compatibility standard; Obtain the insertion loss curve data from the simulation output, compare the common-mode insertion loss curve with the common-mode target insertion loss, and compare the differential-mode insertion loss curve with the differential-mode target insertion loss. Based on whether the common-mode insertion loss curve is not lower than the common-mode target insertion loss in the target frequency band, and whether the differential-mode insertion loss curve is not lower than the differential-mode target insertion loss in the target frequency band.

7. The method according to claim 5, characterized in that, The core material of the common-mode magnetic ring and / or the differential-mode magnetic ring is nanocrystalline or ferrite.

8. A parameter determination device for an electromagnetic interference filter, characterized in that, The device includes: The acquisition module is used to acquire information on the electromagnetic compatibility standards that the target electromagnetic interference filter needs to meet. The insertion loss determination module is used to determine the common-mode target insertion loss and differential-mode target insertion loss of the target electromagnetic interference filter based on the target electromagnetic compatibility standard information. The simulation module is used to build a common-mode filter circuit topology based on the common-mode target insertion loss, and to perform parameter sweep optimization on the device parameters in the topology through circuit simulation to obtain the optimal parameter combination of the common-mode devices; at the same time, based on the differential-mode target insertion loss, a differential-mode filter circuit topology is built, and to perform parameter sweep optimization on the device parameters in the topology through circuit simulation to obtain the optimal parameter combination of the differential-mode devices. A module is established to build a simulation model that includes the magnetic ring and capacitor parasitic parameters based on the optimal parameter combination of the common mode and the optimal parameter combination of the differential mode devices. The verification module is used to perform insertion loss simulation verification on the target electromagnetic interference filter after integrating common-mode and differential-mode circuits using the simulation model. The parameter determination module is used to confirm that the optimal parameter combination is the target parameter of the target electromagnetic interference filter if the simulation verification results satisfy the common-mode target insertion loss and differential-mode target insertion loss.

9. An electronic device, characterized in that, The electronic device includes a memory and a processor, the memory storing a computer program and the processor running the computer program to cause the electronic device to perform the method of any one of claims 1 to 7.

10. A storage medium, characterized in that, The storage medium stores computer program instructions, which, when read and executed by a processor, perform the method described in any one of claims 1 to 7.

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