Leakage Current Test Structure and Method
By designing a centrally symmetrical and cross-arranged interconnection structure in the leakage current test structure, parasitic leakage current interference is eliminated, solving the problem of balancing test accuracy and area in the prior art, and realizing high-precision small-area leakage current testing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- NEXCHIP SEMICON CO LTD
- Filing Date
- 2026-03-31
- Publication Date
- 2026-06-30
AI Technical Summary
Existing leakage current testing structures suffer from poor testing accuracy and large area when dealing with parasitic leakage current, making it difficult to balance testing accuracy and area.
A leakage current test structure is designed, including a substrate, a first test structure, a second test structure, a first interconnect structure, and a second interconnect structure. By applying different voltages to the interconnects of the interconnect structure, parasitic leakage current interference is eliminated, the test accuracy is improved, and the area occupied is reduced by the central symmetric distribution and cross arrangement.
It significantly improves the accuracy of leakage current testing, reduces the area of the leakage current testing structure, saves cutting space, and improves testing precision.
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Figure CN121933982B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and in particular to a leakage current testing structure and method. Background Technology
[0002] Leakage current of semiconductor devices is related to the device's static power consumption, thermal effect, and reliability. Currently, leakage current test structures are usually formed simultaneously during the semiconductor device manufacturing process to test the leakage current of the semiconductor device, in order to ensure the reliability of the semiconductor device and the quality of the finished product.
[0003] However, low leakage testing is susceptible to parasitic leakage. When the parasitic leakage current is comparable to the leakage current of the test structure itself, the test accuracy deteriorates, causing the test structure to fail to detect the leakage current accurately. Although increasing the number of test structures can increase the proportion of the leakage current of the test structure itself, thus distributing and diluting the parasitic leakage current, this requires designing a large number of test structures, resulting in a large test structure area. Summary of the Invention
[0004] In view of this, the embodiments of this application aim to provide a leakage current testing structure and method to solve the problem that the area and testing accuracy of the leakage current testing structure in the prior art cannot be simultaneously achieved.
[0005] This application provides a leakage current test structure, including a substrate, a first test structure, a second test structure, a first interconnect structure, and a second interconnect structure;
[0006] The first test structure and the second test structure are at least partially located on the substrate. The first test structure and the second test structure are identical in structure and both include a first electrode and a second electrode.
[0007] The first interconnect structure and the second interconnect structure are respectively located on the first structure under test and the second structure under test. Both the first interconnect structure and the second interconnect structure include a first interconnect component and a second interconnect component.
[0008] The first interconnect member of the first interconnect structure has a gap with the first electrode of the first structure under test; the second interconnect member of the first interconnect structure is electrically connected to the second electrode of the first structure under test; the first interconnect member and the second interconnect member of the second interconnect structure are respectively electrically connected to the first electrode and the second electrode of the second structure under test; and...
[0009] The first interconnect and the second interconnect are respectively used to receive a first voltage and a second voltage, wherein the absolute value of the first voltage is greater than the absolute value of the second voltage.
[0010] In some embodiments, the first interconnecting element of the first interconnecting structure includes at least one metal layer, and the second interconnecting element of the first interconnecting structure and the first and second interconnecting elements of the second interconnecting structure each include at least one contact hole and at least one metal layer interconnected with each other.
[0011] In some embodiments, the second interconnecting element of the first interconnecting structure and the first interconnecting element and the second interconnecting element of the second interconnecting structure both include a first layer of contact holes to an nth layer of contact holes and a first layer of metal layers to an nth layer of metal layers. The first interconnecting element of the first interconnecting structure includes a second layer of contact holes to an nth layer of contact holes and a first layer of metal layers to an nth layer of metal layers, where n is greater than or equal to 2.
[0012] In some embodiments, the number of the first electrodes of the first structure under test is equal to the number of the first interconnects of the first interconnect structure, and they correspond one-to-one; the number of the second electrodes of the first structure under test is equal to the number of the second interconnects of the first interconnect structure, and they correspond one-to-one; and,
[0013] The number of the first electrodes of the second structure under test is equal to the number of the first interconnects of the second interconnect structure and they correspond one-to-one. The number of the second electrodes of the second structure under test is equal to the number of the second interconnects of the second interconnect structure and they correspond one-to-one.
[0014] In some embodiments, both the first test structure and the second test structure are MOS transistors, the drain of the MOS transistor is the first electrode, and the source, gate and body of the MOS transistor are the second electrodes. The leakage current test structure is used to test the turn-off current of the MOS transistor.
[0015] Alternatively, both the first test structure and the second test structure are MOS transistors, with the gate of the MOS transistor being the first electrode, and the source, drain, and body of the MOS transistor being the second electrode. The leakage current test structure is used to test the gate leakage current of the MOS transistor.
[0016] Alternatively, both the first and second test structures include two comb-shaped conductive layers that interpenetrate each other, with one conductive layer serving as the first electrode and the other serving as the second electrode. The leakage current test structure is used to test the bridging current between the two conductive layers.
[0017] In some embodiments, the two second interconnects that electrically connect the body electrodes of the first test structure and the second test structure share a top metal layer.
[0018] In some embodiments, the MOS transistor is an NMOS transistor, the first voltage is positive, and the second voltage is 0V; the MOS transistor is a PMOS transistor, the first voltage is negative, and the second voltage is 0V.
[0019] In some embodiments, the top metal layers of the first interconnects of the same type as the first interconnect structure and the second interconnect structure are centrally symmetrically distributed, and the top metal layers of the second interconnects of the same type as the first interconnect structure and the second interconnect structure are centrally symmetrically distributed.
[0020] In some embodiments, the center of symmetry of the top metal layer of the two first interconnects that are centrally symmetrically distributed coincides with the center of symmetry of the top metal layer of the two second interconnects that are centrally symmetrically distributed.
[0021] In some embodiments, the top metal layers of all the first interconnects and the top metal layers of all the second interconnects are arranged in a line.
[0022] In some embodiments, the substrate has a first region and a second region above it, the first region and the second region do not overlap, the top metal layer of the first interconnect of the first interconnect structure and the top metal layer of the second interconnect of the second interconnect structure are located in the first region, and the top metal layer of the second interconnect of the first interconnect structure and the top metal layer of the first interconnect of the second interconnect structure are located in the second region.
[0023] In some embodiments, the top metal layer of the first interconnect in the first interconnect structure is further away from the second region than the top metal layer of the second interconnect in the second interconnect structure, and the top metal layer of the first interconnect in the second interconnect structure is further away from the first region than the top metal layer of the second interconnect in the first interconnect structure.
[0024] In some embodiments, at least one first isolated metal layer is provided between the top metal layer of the first interconnection in the first interconnection structure and the top metal layer of the second interconnection in the second interconnection structure, and at least one second isolated metal layer is provided between the top metal layer of the first interconnection in the second interconnection structure and the top metal layer of the second interconnection in the first interconnection structure.
[0025] In some embodiments, the first interconnect and the second interconnect of the first interconnect structure employ different metal layer windings, and the first interconnect and the second interconnect of the second interconnect structure employ different metal layer windings.
[0026] This application also provides a leakage current testing method, including:
[0027] Provide the aforementioned leakage current test structure;
[0028] By applying the first voltage and the second voltage to the first interconnect and the second interconnect of the first interconnect structure, a first total leakage current is obtained;
[0029] By applying the first voltage and the second voltage to the first interconnect and the second interconnect of the second interconnect structure, a second total leakage current is obtained; and,
[0030] The test leakage current is obtained by subtracting the first total leakage current from the second total leakage current.
[0031] This application provides a leakage current testing structure and method, including a substrate, a first test structure, a second test structure, a first interconnect structure, and a second interconnect structure; the first test structure and the second test structure are at least partially located on the substrate, the first test structure and the second test structure are identical in structure, and each includes a first electrode and a second electrode; the first interconnect structure and the second interconnect structure are respectively located on the first test structure and the second test structure, and each of the first interconnect structure and the second interconnect structure includes a first interconnect member and a second interconnect member; there is a gap between the first interconnect member of the first interconnect structure and the first electrode of the first test structure, the second interconnect member of the first interconnect structure is electrically connected to the second electrode of the first test structure, and the first interconnect member and the second interconnect member of the second interconnect structure are respectively electrically connected to the first electrode and the second electrode of the second test structure; the first interconnect member and the second interconnect member are respectively used to receive a first voltage and a second voltage, the absolute value of the first voltage being greater than the absolute value of the second voltage. An unexpected effect of this application is that the leakage current obtained by testing with this application can eliminate parasitic leakage current, and the test results are close to the actual leakage current of the structure under test, which significantly improves the test accuracy. At the same time, the leakage current test structure in this application occupies a small area, saving space for the cutting channel. Attached Figure Description
[0032] Figure 1 This is a schematic diagram of the first leakage current test structure provided in the embodiments of this application.
[0033] Figure 2This is a schematic diagram of the second leakage current test structure provided in the embodiments of this application.
[0034] Figure 3 This is a schematic diagram of the third leakage current testing structure provided in the embodiments of this application.
[0035] Figure 4 This is a planar schematic diagram of a first or second structure to be tested provided in an embodiment of this application.
[0036] Figure 5 This is a plan view of a leakage current test structure provided in an embodiment of this application.
[0037] Figure 6 This is another planar schematic diagram of a leakage current test structure provided in an embodiment of this application.
[0038] Figure 7 This is another planar schematic diagram of a leakage current test structure provided in an embodiment of this application.
[0039] Figure 8 This is a flowchart of a leakage current testing method provided in an embodiment of this application.
[0040] The attached figures are labeled as follows:
[0041] 100 - Substrate; 101 - First structure under test; 102 - Second structure under test; 200 - Dielectric layer; 201 - First interconnect; 202 - Second interconnect; S - Source; D - Drain; G - Gate; M1 - First conductive layer; M2 - Second conductive layer; VH - First voltage; VL - Second voltage. Detailed Implementation
[0042] Taking the gate leakage current of a MOSFET (Metal-Oxide-Semiconductor Transistor) as an example, this study analyzes the sources of parasitic leakage current. Typically, the leakage current test structure is also a MOSFET, with the source, drain, gate, and body led out through corresponding interconnects. A probe card is used to apply a high voltage to the gate and a low voltage to the source, drain, and body to obtain the test leakage current, which is then considered the gate leakage current of the MOSFET. However, the test leakage current does not only include the gate leakage current of the MOSFET; it also includes parasitic leakage current generated between the same metal layers of the interconnects (BEOL metal leakage), between the top metal layer of the interconnects and the dielectric on the wafer surface, and between the probes of the probe card (Prober card leakage). These three types of parasitic leakage current account for a significant portion of the test leakage current, leading to decreased test accuracy.
[0043] Based on this, this application provides a leakage current testing structure and method, including a substrate, a first structure to be tested, a second structure to be tested, a first interconnect structure, and a second interconnect structure. The first and second structures to be tested are at least partially located on the substrate, and are identical in structure, each including a first electrode and a second electrode. The first and second interconnect structures are respectively located on the first and second structures to be tested, and each includes a first interconnect component and a second interconnect component. A gap exists between the first interconnect component of the first interconnect structure and the first electrode of the first structure to be tested. The second interconnect component of the first interconnect structure is electrically connected to the second electrode of the first structure to be tested, and the first and second interconnect components of the second interconnect structure are respectively electrically connected to the first and second electrodes of the second structure to be tested. The first and second interconnect components are used to receive a first voltage and a second voltage, respectively, where the absolute value of the first voltage is greater than the absolute value of the second voltage. An unexpected effect of this application is that the leakage current obtained through this application can eliminate parasitic leakage current, and the test results are close to the true leakage current of the structure to be tested, significantly improving test accuracy. Furthermore, the leakage current testing structure in this application occupies a small area, saving space for the cutting path.
[0044] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0045] Figure 1 This is a schematic diagram of the first leakage current testing structure provided in an embodiment of this application. Figure 1 As shown, the leakage current test structure can be fabricated simultaneously with the semiconductor device on a wafer. The leakage current test structure can be fabricated on the dicing track of the wafer. The leakage current test structure includes a substrate 100, a first test structure 101, a second test structure 102, a first interconnect structure, and a second interconnect structure. The substrate 100 has a dielectric layer 200. The first test structure 101 and the second test structure 102 are at least partially located on the substrate 100. The dielectric layer 200 covers the substrate 100, the first test structure 101, and the second test structure 102. The first interconnect structure and the second interconnect structure are both located within the dielectric layer 200, and the top metal layer of the first interconnect structure and the second interconnect structure is exposed from the surface of the dielectric layer 200. The first interconnect structure is located on the first test structure 101, and the second interconnect structure is located on the second test structure 102.
[0046] Specifically, the first test structure 101 and the second test structure 102 are identical, and the dimensional parameters and electrical parameters of the first test structure 101 and the second test structure 102 can be completely equal. The first test structure 101 and the second test structure 102 can be prepared synchronously using the same process parameters. Figure 1 In this context, both the first test structure 101 and the second test structure 102 are MOSFETs, but this should not be a limitation. The first test structure 101 and the second test structure 102 can also be other devices or structures.
[0047] The first test structure 101 and the second test structure 102 are at least partially located on the substrate 100, and both include a first electrode and a second electrode. Specifically, Figure 1 In the test, both the first structure to be tested 101 and the second structure to be tested 102 are MOSFETs ( Figure 1 The MOSFET on the right is the first test structure 101, and the MOSFET on the left is the second test structure 102. Both the first test structure 101 and the second test structure 102 include a source (S), a drain (D), a gate (G), and a body (B). The source (S), drain (D), and body (B) are located within the substrate 100, and the gate (G) is located on the substrate 100. The gate (G) serves as the first electrode of both the first test structure 101 and the second test structure 102, while the source (S), drain (D), and body (B) are all second electrodes of both structures. It should be noted that although the source (S), drain (D), and body (B) of both the first test structure 101 and the second test structure 102 are second electrodes, they belong to different types of second electrodes.
[0048] Furthermore, both the first interconnection structure and the second interconnection structure include a first interconnection component 201 ( Figure 1 The structure shown in the red dashed box) and the second interconnect 202 ( Figure 1(The structure is shown in the blue dashed box). The number of first electrodes of the first test structure 101 is equal to the number of first interconnect components 201 of the first interconnect structure, and they correspond one-to-one. The first interconnect components 201 of the first interconnect structure are located above the corresponding first electrodes of the first test structure 101. The number of second electrodes of the first test structure 101 is equal to the number of second interconnect components 202 of the first interconnect structure, and they correspond one-to-one. The second interconnect components 202 of the first interconnect structure are located above the corresponding second electrodes of the first test structure 101. The number of first electrodes of the second test structure 102 is equal to the number of first interconnect components 201 of the second interconnect structure, and they correspond one-to-one. The first interconnect components 201 of the second interconnect structure are located above the corresponding first electrodes of the second test structure 102. The number of second electrodes of the second test structure 102 is equal to the number of second interconnect components 202 of the second interconnect structure, and they correspond one-to-one. The second interconnect components 202 of the second interconnect structure are located above the corresponding second electrodes of the second test structure 102.
[0049] Furthermore, the first interconnect 201 and the second interconnect 202 are respectively used to receive a first voltage VH and a second voltage VL, wherein the absolute value of the first voltage VH is greater than the absolute value of the second voltage VL. For example, the probes of the probe card can be used to contact the top metal layers of the first interconnect 201 and the second interconnect 202, thereby applying a high voltage to the first interconnect 201 and a low voltage to the second interconnect 202.
[0050] In some embodiments, when the first test structure 101 and the second test structure 102 are NMOS transistors, the first voltage is positive and the second voltage is 0V; when the first test structure 101 and the second test structure 102 are PMOS transistors, the first voltage is negative and the second voltage is 0V.
[0051] Figure 1 In the first test structure 101 and the second test structure 102, there is one first electrode, namely the gate G. Therefore, there is one first interconnect 201 in both the first interconnect structure and the second interconnect structure. The gate G of the first test structure 101 and the second test structure 102 are each equipped with one first interconnect 201. The second electrode of the first test structure 101 and the second test structure 102 is three, namely the source S, the drain D and the body B. The source S, the drain D and the body B of the first test structure 101 and the second test structure 102 are each equipped with one second interconnect 202.
[0052] There is a gap h between the first interconnect member 201 of the first interconnect structure and the first electrode of the first test structure 101, such that there is no electrical connection between the first interconnect member 201 of the first interconnect structure and the first electrode of the first test structure 101; the second interconnect member 202 of the first interconnect structure is electrically connected to the second electrode of the first test structure 101, and the first interconnect member 201 and the second interconnect member 202 of the second interconnect structure are respectively electrically connected to the first electrode and the second electrode of the second test structure 102. Figure 1 As can be seen, the gate G of the first test structure 101 has a gap h with the first interconnect 201 above it and is not electrically connected. The source S, drain D and body B of the first test structure 101 are electrically connected to the second interconnect 202 above it. The gate G of the second test structure 102 is electrically connected to the first interconnect 201 above it. The source S, drain D and body B of the second test structure 102 are electrically connected to the second interconnect 202 above it.
[0053] Furthermore, the first interconnecting element 201 of the first interconnecting structure may include at least one metal layer, or at least one contact hole and at least two metal layers interconnected with each other; the second interconnecting element 202 of the first interconnecting structure and the first interconnecting element 201 and the second interconnecting element 202 of the second interconnecting structure may each include at least one contact hole and at least one metal layer interconnected with each other. For example, the second interconnecting member 202 of the first interconnecting structure and the first interconnecting member 201 and the second interconnecting member 202 of the second interconnecting structure both include a first layer of contact holes to an nth layer of contact holes and a first layer of metal layers to an nth layer of metal layers. The first interconnecting member 201 of the first interconnecting structure includes a second layer of contact holes to an nth layer of contact holes and a first layer of metal layers to an nth layer of metal layers, where n is greater than or equal to 2. That is to say, the number of contact holes and the number of metal layers of the second interconnecting member 202 of the first interconnecting structure and the first interconnecting member 201 and the second interconnecting member 202 of the second interconnecting structure are the same. However, the first interconnecting member 201 of the first interconnecting structure lacks a first layer of contact holes compared to the second interconnecting member 202 of the first interconnecting structure and the first interconnecting member 201 and the second interconnecting member 202 of the second interconnecting structure. In this way, it can be ensured that there is a distance h between the first interconnecting member 201 of the first interconnecting structure and the first electrode of the first test structure 101, and the distance h is exactly equal to the height of the first layer contact hole. The second interconnecting member 202 of the first interconnecting structure is electrically connected to the second electrode of the first test structure 101, and the first interconnecting member 201 and the second interconnecting member 202 of the second interconnecting structure are electrically connected to the first electrode and the second electrode of the second test structure 102, respectively.
[0054] It should be noted that the height and width of the contact holes in the same layer of the first interconnect 201 and the second interconnect 202 can be completely consistent, and the thickness and area of the same layer of the metal layer of the first interconnect 201 and the second interconnect 202 can be completely consistent.
[0055] Figure 1 The leakage current test structure can be used to test the gate leakage current of a MOSFET. Specifically, by applying a first voltage VH to the first interconnect 201 of the first interconnect structure and a second voltage VL to the second interconnect 202 of the first interconnect structure, the first total leakage current I1 can be measured. Since the first interconnect 201 of the first interconnect structure is not interconnected with the gate G of the first structure under test 101, the first total leakage current I1 only includes the parasitic leakage current I generated between the same metal layers of the first interconnect structure. 11 The parasitic leakage current I generated between the top metal layer and the dielectric layer 200 of the first interconnect structure 12 And the parasitic leakage current I generated between the probes of the probe card. 13 However, this excludes the gate leakage current of the first structure under test 101, i.e., I1 = I 11 +I 12 +I 13 By applying a first voltage VH to the first interconnect 201 of the second interconnect structure and a second voltage VL to the second interconnect 202 of the second interconnect structure, the second total leakage current I2 can be measured. Since the first interconnect 201 of the second interconnect structure is interconnected with the gate G of the second test structure 102, and the second interconnect 202 of the second interconnect structure is correspondingly interconnected with the source S, drain D, and body B of the second test structure 102, the second total leakage current I2 includes the parasitic leakage current I generated between the same metal layers of the second interconnect structure. 21 The parasitic leakage current I generated between the top metal layer and the dielectric layer 200 of the second interconnect structure 22 Parasitic leakage current I is generated between the probes of the probe card. 23 and the gate leakage current I of the second test structure 102 24 That is, I2=I 21 +I 22 +I 23 +I 24 Because the first interconnect structure and the second interconnect structure are fabricated simultaneously, the parasitic leakage current I generated between the same metal layers of the first interconnect structure... 11 Parasitic leakage current I generated between the same metal layer of the second interconnect structure and the second interconnect structure 21 The parasitic leakage current I generated between the top metal layer and the dielectric layer 200 of the first interconnect structure is very close. 12 Parasitic leakage current I generated between the top metal layer and dielectric layer 200 of the second interconnect structure22 The probes were very close, and a parasitic leakage current I was generated between the probes of the probe card during the two tests. 13 and I 23 They are also very close; therefore, the gate leakage current I of the second test structure 102 can be obtained by subtracting the first total leakage current I1 from the second total leakage current I2. 24 This eliminates interference from parasitic leakage currents generated between the same metal layers of interconnects, between the top metal layer of interconnects and the dielectric on the wafer surface, and between the probes of the probe card, thereby improving test accuracy.
[0056] Figure 2 This is a schematic diagram of the second leakage current testing structure provided in an embodiment of this application. Figure 2 As shown, in some embodiments, the first test structure 101 and the second test structure 102 can both be MOSFETs. The drain D of the MOSFET is the first electrode of the first test structure 101 and the second test structure 102, and the source S, gate G, and body B of the MOSFET are all the second electrodes of the first test structure 101 and the second test structure 102. It should be noted that although the source S, gate G, and body B of the first test structure 101 and the second test structure 102 are all second electrodes, they belong to different types of second electrodes.
[0057] Figure 2 In the first test structure 101 and the second test structure 102, there is one first electrode, namely the drain D. Therefore, there is one first interconnect 201 in both the first interconnect structure and the second interconnect structure. The drain D of the first test structure 101 and the second test structure 102 each has one first interconnect 201. The second electrode of the first test structure 101 and the second test structure 102 each has three electrodes, namely the source S, the gate G and the body B. Therefore, there are three second interconnect 202 in both the first interconnect structure and the second interconnect structure. The source S, the gate G and the body B of the first test structure 101 and the second test structure 102 each have one second interconnect 202.
[0058] from Figure 2 As can be seen, the drain D of the first test structure 101 has a gap h between it and the first interconnect 201 above it, and they are not electrically connected. The source S, gate G and body B of the first test structure 101 are electrically connected to the second interconnect 202 above it. The drain D of the second test structure 102 is electrically connected to the first interconnect 201 above it. The source S, gate G and body B of the second test structure 102 are electrically connected to the second interconnect 202 above it.
[0059] akin, Figure 2 The leakage current test structure can be used to test the turn-off current (Ioff) of a MOSFET. Specifically, by applying a first voltage VH to the first interconnect 201 of the first interconnect structure and a second voltage VL to the second interconnect 202 of the first interconnect structure, the first total leakage current I3 can be measured. Since the first interconnect 201 of the first interconnect structure is not interconnected with the drain G of the first structure under test 101, the first total leakage current I3 includes the parasitic leakage current I0 generated between the same metal layers of the first interconnect structure. 11 The parasitic leakage current I generated between the top metal layer and the dielectric layer 200 of the first interconnect structure 12 And the parasitic leakage current I generated between the probes of the probe card. 13 However, this excludes the turn-off current of the first structure under test 101, i.e., I3 = I 11 +I 12 +I 13 By applying a first voltage VH to the first interconnect 201 of the second interconnect structure and a second voltage VL to the second interconnect 202 of the second interconnect structure, the second total leakage current I4 can be measured. Since the first interconnect 201 of the second interconnect structure is interconnected with the drain D of the second test structure 102, and the second interconnect 202 of the second interconnect structure is correspondingly interconnected with the source S, gate G, and body B of the second test structure 102, the total leakage current I4 includes the parasitic leakage current I generated between the same metal layers of the second interconnect structure. 21 The parasitic leakage current I generated between the top metal layer and the dielectric layer 200 of the second interconnect structure 22 Parasitic leakage current I is generated between the probes of the probe card. 23 and the turn-off current I of the second structure under test 102 25 That is, I4=I 21 +I 22 +I 23 +I 25 Because the first interconnect structure and the second interconnect structure are fabricated simultaneously, the parasitic leakage current I generated between the same metal layers of the first interconnect structure... 11 Parasitic leakage current I generated between the same metal layer of the second interconnect structure and the second interconnect structure 21 The parasitic leakage current I generated between the top metal layer and the dielectric layer 200 of the first interconnect structure is very close. 12 Parasitic leakage current I generated between the top metal layer and dielectric layer 200 of the second interconnect structure 22 The probes were very close, and a parasitic leakage current I was generated between the probes of the probe card during the two tests. 13 and I 23 They are also very close; therefore, by subtracting the first total leakage current I3 from the second total leakage current I4, the turn-off current I of the second test structure 102 can be obtained.25 This eliminates interference from parasitic leakage currents generated between the same metal layers of interconnects, between the top metal layer of interconnects and the dielectric on the wafer surface, and between the probes of the probe card, thereby improving test accuracy.
[0060] Figure 3 This is a schematic diagram of the third leakage current testing structure provided in an embodiment of this application. Figure 4 This is a planar schematic diagram of a first test structure 101 or a second test structure 102 provided in an embodiment of this application. Figure 3 and Figure 4 As shown, in some embodiments, both the first test structure 101 and the second test structure 102 may include two comb-shaped conductive layers, which are interwoven. One conductive layer serves as the first electrode, and the other serves as the second electrode. For ease of description, the two conductive layers in the first test structure 101 and the second test structure 102 are referred to as the first conductive layer M1 and the second conductive layer M2, respectively. The first conductive layer M1 serves as the first electrode, and the second conductive layer M2 serves as the second electrode.
[0061] Figure 3 In the first test structure 101 and the second test structure 102, the number of first electrodes is one, namely the first conductive layer M1. Therefore, the number of first interconnects 201 in the first interconnect structure and the second interconnect structure is one. The first conductive layer M1 of the first test structure 101 and the second test structure 102 each has one first interconnect 201. The number of second electrodes in the first test structure 101 and the second test structure 102 is one, namely the second conductive layer M2. Therefore, the number of second interconnects 202 in the first interconnect structure and the second interconnect structure is also one. The second conductive layer M2 of the first test structure 101 and the second test structure 102 each has one second interconnect 202.
[0062] from Figure 3 As can be seen, the first conductive layer M1 of the first structure under test 101 has a gap h between it and the first interconnect 201 above it, and they are not electrically connected. The second conductive layer M2 of the first structure under test 101 is electrically connected to the second interconnect 202 above it. The first conductive layer M1 of the second structure under test 102 is electrically connected to the first interconnect 201 above it. The second conductive layer M2 of the second structure under test 102 is electrically connected to the second interconnect 202 above it.
[0063] akin, Figure 3The leakage current test structure can be used to test the metal bridge current between two conductive layers. Specifically, by applying a first voltage VH to the first interconnect 201 of the first interconnect structure and a second voltage VL to the second interconnect 202 of the first interconnect structure, the first total leakage current I5 can be measured. Since the first interconnect 201 of the first interconnect structure is not interconnected with the first conductive layer M1 of the first structure under test 101, the first total leakage current I5 includes the parasitic leakage current I generated between the same metal layers of the first interconnect structure. 11 The parasitic leakage current I generated between the top metal layer and the dielectric layer 200 of the first interconnect structure 12 And the parasitic leakage current I generated between the probes of the probe card. 13 This excludes the bridging current between the two conductive layers of the first test structure 101, i.e., I5 = I 11 +I 12 +I 13 By applying a first voltage VH to the first interconnect 201 of the second interconnect structure and a second voltage VL to the second interconnect 202 of the second interconnect structure, the second total leakage current I6 can be measured. Since the first interconnect 201 of the second interconnect structure is interconnected with the first conductive layer M1 of the second test structure 102, and the second interconnect 202 of the second interconnect structure is correspondingly interconnected with the second conductive layer M2 of the second test structure 102, the second total leakage current I6 includes the parasitic leakage current I generated between the same metal layers of the second interconnect structure. 21 The parasitic leakage current I generated between the top metal layer and the dielectric layer 200 of the second interconnect structure 22 Parasitic leakage current I is generated between the probes of the probe card. 23 and the bridging current I between the two conductive layers of the second test structure 102 26 That is, I4=I 21 +I 22 +I 23 +I 26 Because the first interconnect structure and the second interconnect structure are fabricated simultaneously, the parasitic leakage current I generated between the same metal layers of the first interconnect structure... 11 Parasitic leakage current I generated between the same metal layer of the second interconnect structure and the second interconnect structure 21 The parasitic leakage current I generated between the top metal layer and the dielectric layer 200 of the first interconnect structure is very close. 12 Parasitic leakage current I generated between the top metal layer and dielectric layer 200 of the second interconnect structure 22 The probes were very close, and a parasitic leakage current I was generated between the probes of the probe card during the two tests. 13 and I 23They are also very close; therefore, by subtracting the first total leakage current I5 from the second total leakage current I6, the bridging current I between the two conductive layers of the second test structure 102 can be obtained. 26 This eliminates interference from parasitic leakage currents generated between the same metal layers of interconnects, between the top metal layer of interconnects and the dielectric on the wafer surface, and between the probes of the probe card, thereby improving test accuracy.
[0064] As can be seen, the leakage current obtained by the leakage current test structure in this application can eliminate parasitic leakage current, and the test result is close to the real leakage current of the structure under test, which significantly improves the test accuracy. At the same time, the leakage current test structure in this application occupies a small area (the number of first interconnection 201 and second interconnection 202 is small, a total of 4 to 8), saving space for the cutting channel (saving more than 40% of the space).
[0065] Furthermore, the number of the first test structure 101, the second test structure 102, the first interconnect structure, and the second interconnect structure can be multiple, and the number of each type can be the same. In this case, the first electrodes of all the first interconnect structures can be electrically connected to each other, and the second electrodes of all the first interconnect structures can be electrically connected to each other, so as to connect all the first test structures 101 in parallel. The first electrodes of all the second interconnect structures are electrically connected to each other, and the second electrodes of all the second interconnect structures are electrically connected to each other, so as to connect all the second test structures 102 in parallel. This is equivalent to connecting the first test structures 101 in parallel into an array and the second test structures 102 in parallel into an array, which can significantly improve the testing accuracy.
[0066] In some embodiments, the top metal layers of the same type of first interconnect 201 in the first and second interconnect structures can be centrally symmetrically distributed, and the top metal layers of the same type of second interconnect 202 in the first and second interconnect structures can also be centrally symmetrically distributed. This ensures that the distances between the same type of first interconnects in the first and second interconnect structures are the same, and the distances between the same type of second interconnects in the first and second interconnect structures are also the same. This ensures that the environments in which the first and second interconnect structures are located are similar, making the parasitic leakage current included in the total leakage current obtained from the two tests more similar, thereby improving the reliability of the test results.
[0067] For example, both the first test structure 101 and the second test structure 102 are MOSFETs, and the leakage current test structure is used to test the turn-off current of the MOSFET. In this case, the drain D of the first test structure 101 and the second test structure 102 are its first electrodes, the source S of the first test structure 101 and the second test structure 102 are its second electrodes of the same type, the gate G is its second electrode of the same type, and the body B is its second electrode of the same type. Figure 5 This is a plan view of a leakage current testing structure provided in an embodiment of this application, as shown below. Figure 5 As shown, the top metal layers of the first interconnect 201 of the same type in the first interconnect structure and the second interconnect structure are TMD1 and TMD2, respectively, and TMD1 and TMD2 are centrally symmetrically distributed; the second interconnect 202 of the same type in the first interconnect structure and the second interconnect structure are two second interconnects 202 electrically connected to the source S, and the top metal layers of these two second interconnects 202 are TMS1 and TMS2, and TMS1 and TMS2 are centrally symmetrically distributed; the second interconnect 202 of the same type in the first interconnect structure and the second interconnect structure are two second interconnects 202 electrically connected to the gate G, and the top metal layers of these two second interconnects 202 are TMG1 and TMG2, and TMG1 and TMG2 are centrally symmetrically distributed; the second interconnect 202 of the same type in the first interconnect structure and the second interconnect structure are two second interconnects 202 electrically connected to the body B, and the top metal layers of these two second interconnects 202 are TMB1 and TMB2, and TMB1 and TMB2 are centrally symmetrically distributed.
[0068] Furthermore, the center of symmetry of the top metal layer of the two centrally symmetrically distributed first interconnects 201 coincides with the center of symmetry of the top metal layer of the two centrally symmetrically distributed second interconnects 202. For example, Figure 5 In the above, the centers of symmetry of TMD1 and TMD2, TMS1 and TMS2, TMG1 and TMG2, and TMB1 and TMB2 all coincide.
[0069] Furthermore, the top metal layers of all first interconnects 201 and all second interconnects 202 are arranged in a straight line. For example, the centers of TMD1, TMD2, TMS1 and TMS2, TMG1, TMG2, TMB1 and TMB2 are on a straight line, and the TMD1, TMD2, TMS1 and TMS2, TMG1, TMG2, TMB1 and TMB2 are arranged in a straight line. This reduces the area occupied by the leakage current test structure and makes the leakage current test structure more symmetrical.
[0070] Furthermore, the substrate 100 has a first region and a second region above it, which do not overlap. The top metal layer of the first interconnect 201 of the first interconnect structure and the top metal layer of the second interconnect 202 of the second interconnect structure are located in the first region, and the top metal layer of the second interconnect 202 of the first interconnect structure and the top metal layer of the first interconnect 201 of the second interconnect structure are located in the second region. That is, by arranging the first interconnect 201 and the second interconnect 202 of the first interconnect structure in a staggered manner, without wasting the space for the dicing layout, the first interconnect 201 of the first interconnect structure can be moved away from the second interconnect 202, and the first interconnect 201 of the second interconnect structure can be moved away from the second interconnect 202, thereby reducing the proportion of parasitic leakage current generated between the top metal layer and the dielectric layer 200 of the first or second interconnect structure in the total leakage current, thus further improving the reliability of the test results. Figure 5 As shown, Figure 5 The area to the left of the dotted line is the first region. Figure 5 The right side of the dotted line is the second region. TMD1, TMS2, TMG2, and TMB2 are located in the first region, while TMD2, TMS1, TMG1, and TMB1 are located in the second region. In this way, without increasing the area of the leakage current test structure, it can be ensured that TMD1 is far away from TMS1, TMG1, and TMB1, and TMD2 is also far away from TMS2, TMG2, and TMB2.
[0071] Table 1 shows... Figure 5 The distances between the drain D and the body B, the drain D and the gate G, and the drain D and the source S in the first test structure 101 and the second test structure 102 are shown in Table 1. Here, pitch is the spacing between the centers of adjacent top metal layers (equal to the spacing between two adjacent probe tips on the probe card). As can be seen from Table 1, after the first interconnect 201 and the second interconnect 202 of the first interconnect structure and the second interconnect structure are arranged in a cross arrangement, the distance between the first interconnect 201 and the second interconnect 202 of the first interconnect structure is relatively large, and the distance between the first interconnect 201 and the second interconnect 202 of the second interconnect structure is also relatively large. This can reduce the proportion of parasitic leakage current generated between the top metal layer and the dielectric layer 200 of the first interconnect structure or the second interconnect structure in the total leakage current.
[0072] Table 1: Distances between DB, DG, and DS in the first test structure 101 and the second test structure 102
[0073]
[0074] Figure 6 This is another planar schematic diagram of a leakage current testing structure provided in an embodiment of this application, as shown below. Figure 6As shown, in some embodiments, if both the first test structure 101 and the second test structure 102 are MOS transistors, the two second interconnects 202 that are electrically connected to the body electrode B of the first test structure 101 and the second test structure 102 can share the top metal layer, thereby further reducing the area of the leakage current test structure and saving the space of the cutting channel.
[0075] Figure 7 This is another planar schematic diagram of a leakage current testing structure provided in an embodiment of this application, as shown below. Figure 7 As shown, in some embodiments, there is at least one first isolated metal layer between the top metal layer of the first interconnect 201 of the first interconnect structure and the top metal layer of the adjacent second interconnect 202 of the second interconnect structure, and there is at least one second isolated metal layer between the top metal layer of the first interconnect 201 of the second interconnect structure and the top metal layer of the adjacent second interconnect 202 of the first interconnect structure. The first and second isolated metal layers may not be electrically connected to any other structure, but are only used to occupy area. The first isolated metal layer can increase the distance between the top metal layer of the first interconnect 201 of the first interconnect structure and the top metal layer of the adjacent second interconnect 202 of the second interconnect structure. The second isolated metal layer can increase the distance between the top metal layer of the first interconnect 201 of the second interconnect structure and the top metal layer of the adjacent second interconnect 202 of the first interconnect structure, thereby further increasing the distance between the first interconnect 201 and the second interconnect 202 of the first interconnect structure, and increasing the distance between the first interconnect 201 and the second interconnect 202 of the second interconnect structure, thereby further reducing the proportion of parasitic leakage current generated between the top metal layers of the first and second interconnect structures and the dielectric layer 200 in the total leakage current, thereby further improving the reliability of the test results. Figure 7 As shown, TMK1 is between TMD1 and TMS2, and TMK2 is between TMD2 and TMS1. TMK1 is the first isolated metal layer, and TMK2 is the second isolated metal layer.
[0076] Furthermore, the first interconnect 201 and the second interconnect 202 of the first interconnect structure can employ different metal layer windings, and the first interconnect 201 and the second interconnect 202 of the second interconnect structure can also employ different metal layer windings. This can reduce the parasitic leakage current generated between the same metal layers of the first and second interconnect structures. In some embodiments, the first interconnect 201 and the second interconnect 202 of the first interconnect structure and the first interconnect 201 and the second interconnect 202 of the second interconnect structure both employ different metal layer windings, such as... Figure 5 , Figure 6 and Figure 7As shown, different colors of the metal layers indicate that the metal layers are located in different layers. By using different layers of metal layers for winding, the distance between metal layers in the same layer can be avoided as much as possible, which would lead to a large parasitic leakage current between metal layers in the same layer.
[0077] Based on this, one embodiment of this application also provides a leakage current testing method. Figure 8 A flowchart of a leakage current testing method provided in an embodiment of this application is shown below. Figure 8 As shown, leakage current testing methods include:
[0078] Step S100: Provide a leakage current test structure;
[0079] Step S200: Apply a first voltage VH and a second voltage VL to the first interconnect 201 and the second interconnect 202 of the first interconnect structure to obtain the first total leakage current;
[0080] Step S300: Apply a first voltage VH and a second voltage VL to the first interconnect 201 and the second interconnect 202 of the second interconnect structure to obtain the second total leakage current; and,
[0081] Step S400: Subtract the first total leakage current from the second total leakage current to obtain the test leakage current.
[0082] Specifically, first, step S100 is executed, providing a leakage current test structure, which can be... Figures 1-3 Any of the leakage current test structures in the above. The specific structure of the leakage current test structure has been described in detail above, and will not be repeated here.
[0083] Next, step S200 is executed, applying a first voltage VH and a second voltage VL to the first interconnect 201 and the second interconnect 202 of the first interconnect structure to obtain a first total leakage current. The first total leakage current includes the parasitic leakage current generated between the same metal layers of the first interconnect structure, the parasitic leakage current generated between the top metal layer and the dielectric layer 200 of the first interconnect structure, and the parasitic leakage current generated between the probes of the probe card.
[0084] In step S300, a first voltage VH and a second voltage VL are applied to the first interconnect 201 and the second interconnect 202 of the second interconnect structure to obtain a second total leakage current. The second total leakage current includes the parasitic leakage current generated between the same metal layers of the second interconnect structure, the parasitic leakage current generated between the top metal layer and the dielectric layer 200 of the second interconnect structure, the parasitic leakage current generated between the probes of the probe card, and the leakage current inside the second structure under test 102.
[0085] It should be noted that steps S200 and S300 can be executed simultaneously or sequentially, and the execution order of steps S200 and S300 does not affect the implementation of this application. Furthermore, to ensure that the parasitic leakage current between the probes of the probe card in the two tests is approximately equal, steps S200 and S300 can be performed sequentially using the same probe card, and no other tests are performed on the probe card between steps S200 and S300.
[0086] In step S400, the first total leakage current is subtracted from the second total leakage current to obtain the test leakage current. Since the parasitic leakage current generated between the same metal layers of the first interconnect structure is close to that generated between the same metal layers of the second interconnect structure, and the parasitic leakage current generated between the top metal layer and dielectric layer 200 of the first interconnect structure is close to that generated between the top metal layer and dielectric layer 200 of the second interconnect structure, and the parasitic leakage current generated between the probes of the probe cards in the two tests is also close, the test leakage current obtained by subtracting the first total leakage current from the second total leakage current is also close to the leakage current inside the second structure under test 102. Therefore, the test leakage current eliminates parasitic leakage current, and the test result is close to the true leakage current of the structure under test, significantly improving the test accuracy.
[0087] Furthermore, in some embodiments, before applying a first voltage VH and a second voltage VL to the first interconnect 201 and the second interconnect 202 of the first interconnect structure, the first interconnect 201 and the second interconnect 202 of the first interconnect structure can be grounded for a first predetermined time to release the charge on the first interconnect 201 and the second interconnect 202 of the first interconnect structure, thereby eliminating the interference of residual charge on the first interconnect 201 and the second interconnect 202 of the first interconnect structure on the test and improving the test accuracy.
[0088] Similarly, before applying the first voltage VH and the second voltage VL to the first interconnect 201 and the second interconnect 202 of the second interconnect structure, the first interconnect 201 and the second interconnect 202 of the second interconnect structure can be grounded for a second predetermined time to release the charge on the first interconnect 201 and the second interconnect 202 of the second interconnect structure, thereby eliminating the interference of residual charge on the first interconnect 201 and the second interconnect 202 of the second interconnect structure on the test and improving the test accuracy.
[0089] In some embodiments, the first predetermined time and the second predetermined time can be 3s to 5s, but should not be limited to this.
[0090] In summary, this embodiment provides a leakage current testing structure and method, including a substrate 100, a first test structure 101, a second test structure 102, a first interconnect structure, and a second interconnect structure. The first test structure 101 and the second test structure 102 are at least partially located on the substrate 100. The first test structure 101 and the second test structure 102 have the same structure and both include a first electrode and a second electrode. The first interconnect structure and the second interconnect structure are respectively located on the first test structure 101 and the second test structure 102. Both the first interconnect structure and the second interconnect structure include a first interconnect structure. The first interconnecting member 201 and the second interconnecting member 202 are respectively connected to the first electrode of the first test structure 101, and the first interconnecting member 201 of the first interconnecting structure is electrically connected to the second electrode of the first test structure 101. The first interconnecting member 201 and the second interconnecting member 202 of the second interconnecting structure are respectively electrically connected to the first electrode and the second electrode of the second test structure 102. The first interconnecting member 201 and the second interconnecting member 202 are respectively used to receive a first voltage VH and a second voltage VL, wherein the absolute value of the first voltage VH is greater than the absolute value of the second voltage VL. The leakage current obtained by testing in this application can eliminate parasitic leakage current, and the test result is close to the real leakage current of the test structure, which significantly improves the test accuracy. At the same time, the leakage current test structure in this application occupies a small area, saving space for the cutting channel.
[0091] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the systems disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and relevant parts can be referred to the method section.
[0092] It should also be noted that although preferred embodiments have been disclosed above, these embodiments are not intended to limit this application. Any person skilled in the art can make many possible variations and modifications to the technical solutions of this application, or modify them into equivalent embodiments, without departing from the scope of the technical solutions of this application. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of this application, without departing from the content of the technical solutions of this application, shall still fall within the scope of protection of the technical solutions of this application.
[0093] It should also be understood that, unless otherwise specified or indicated, the terms “first,” “second,” “third,” etc., in the specification are used only to distinguish the various components, elements, and steps in the specification, and not to indicate the logical or sequential relationships between the various components, elements, and steps.
[0094] Furthermore, it should be recognized that the terminology described herein is used only to describe particular embodiments and is not intended to limit the scope of this application. It must be noted that the singular forms “a” and “an” as used herein include plural bases unless the context clearly indicates the opposite. For example, a reference to “a step” or “an apparatus” means a reference to one or more steps or apparatuses, and may include secondary steps and secondary apparatuses. All conjunctions used should be understood in the broadest sense. Also, the word “or” should be understood as having the definition of logical “or”, not logical “exclusive OR”, unless the context clearly indicates the opposite. Furthermore, implementations of the methods and / or devices in the embodiments of this application may include performing selected tasks manually, automatically, or in combination.
Claims
1. A leakage current testing structure, characterized in that, It includes a substrate, a first structure to be tested, a second structure to be tested, a first interconnect structure, and a second interconnect structure; The first test structure and the second test structure are at least partially located on the substrate. The first test structure and the second test structure are identical in structure and both include a first electrode and a second electrode. The first interconnect structure and the second interconnect structure are respectively located on the first structure under test and the second structure under test. Both the first interconnect structure and the second interconnect structure include a first interconnect component and a second interconnect component. There is a gap between the first interconnecting element of the first interconnecting structure and the first electrode of the first structure under test; the second interconnecting element of the first interconnecting structure is electrically connected to the second electrode of the first structure under test; and the first interconnecting element and the second interconnecting element of the second interconnecting structure are respectively electrically connected to the first electrode and the second electrode of the second structure under test. as well as, The first interconnect and the second interconnect are respectively used to receive a first voltage and a second voltage, wherein the absolute value of the first voltage is greater than the absolute value of the second voltage.
2. The leakage current testing structure according to claim 1, characterized in that, The first interconnecting element of the first interconnecting structure includes at least one metal layer, and the second interconnecting element of the first interconnecting structure and the first and second interconnecting elements of the second interconnecting structure each include at least one contact hole and at least one metal layer interconnected with each other.
3. The leakage current testing structure according to claim 2, characterized in that, The second interconnecting element of the first interconnecting structure and the first interconnecting element and the second interconnecting element of the second interconnecting structure both include a first layer of contact holes to an nth layer of contact holes and a first layer of metal layers to an nth layer of metal layers. The first interconnecting element of the first interconnecting structure includes a second layer of contact holes to an nth layer of contact holes and a first layer of metal layers to an nth layer of metal layers, where n is greater than or equal to 2.
4. The leakage current testing structure according to claim 1, characterized in that, The number of the first electrodes of the first structure under test is equal to the number of the first interconnects of the first interconnect structure, and they correspond one-to-one; the number of the second electrodes of the first structure under test is equal to the number of the second interconnects of the first interconnect structure, and they correspond one-to-one; and, The number of the first electrodes of the second structure under test is equal to the number of the first interconnects of the second interconnect structure and they correspond one-to-one. The number of the second electrodes of the second structure under test is equal to the number of the second interconnects of the second interconnect structure and they correspond one-to-one.
5. The leakage current testing structure according to claim 1, characterized in that, Both the first test structure and the second test structure are MOS transistors. The drain of the MOS transistor is the first electrode, and the source, gate and body of the MOS transistor are the second electrodes. The leakage current test structure is used to test the turn-off current of the MOS transistor. Alternatively, both the first test structure and the second test structure are MOS transistors, with the gate of the MOS transistor being the first electrode, and the source, drain, and body of the MOS transistor being the second electrode. The leakage current test structure is used to test the gate leakage current of the MOS transistor. Alternatively, both the first and second test structures include two comb-shaped conductive layers that interpenetrate each other, with one conductive layer serving as the first electrode and the other serving as the second electrode. The leakage current test structure is used to test the bridging current between the two conductive layers.
6. The leakage current testing structure according to claim 5, characterized in that, The two second interconnects that electrically connect the body electrodes of the first test structure and the second test structure share a top metal layer.
7. The leakage current testing structure according to claim 5, characterized in that, The MOS transistor is an NMOS transistor, with the first voltage being positive and the second voltage being 0V; the MOS transistor is a PMOS transistor, with the first voltage being negative and the second voltage being 0V.
8. The leakage current testing structure according to any one of claims 1 to 7, characterized in that, The top metal layers of the first interconnect components of the same type as the first interconnect structure and the second interconnect structure are centrally symmetrically distributed, and the top metal layers of the second interconnect components of the same type as the first interconnect structure and the second interconnect structure are centrally symmetrically distributed.
9. The leakage current testing structure according to claim 8, characterized in that, The center of symmetry of the top metal layer of the two first interconnects that are centrally symmetrically distributed coincides with the center of symmetry of the top metal layer of the two second interconnects that are centrally symmetrically distributed.
10. The leakage current testing structure according to claim 9, characterized in that, The top metal layers of all the first interconnects and the top metal layers of all the second interconnects are arranged in a straight line.
11. The leakage current testing structure according to claim 8, characterized in that, The substrate has a first region and a second region above it, the first region and the second region do not overlap, the top metal layer of the first interconnect of the first interconnect structure and the top metal layer of the second interconnect of the second interconnect structure are located in the first region, and the top metal layer of the second interconnect of the first interconnect structure and the top metal layer of the first interconnect of the second interconnect structure are located in the second region.
12. The leakage current testing structure according to claim 11, characterized in that, The top metal layer of the first interconnect in the first interconnect structure is farther away from the second region than the top metal layer of the second interconnect in the second interconnect structure, and the top metal layer of the first interconnect in the second interconnect structure is farther away from the first region than the top metal layer of the second interconnect in the first interconnect structure.
13. The leakage current testing structure according to claim 12, characterized in that, There is at least one first isolated metal layer between the top metal layer of the first interconnection in the first interconnection structure and the top metal layer of the second interconnection in the second interconnection structure, and there is at least one second isolated metal layer between the top metal layer of the first interconnection in the second interconnection structure and the top metal layer of the second interconnection in the first interconnection structure.
14. The leakage current testing structure according to any one of claims 1 to 7, characterized in that, The first interconnect and the second interconnect of the first interconnect structure employ different metal layer windings, and the first interconnect and the second interconnect of the second interconnect structure employ different metal layer windings.
15. A leakage current testing method, characterized in that, include: Provide a leakage current test structure as described in any one of claims 1 to 14; By applying the first voltage and the second voltage to the first interconnect and the second interconnect of the first interconnect structure, a first total leakage current is obtained; By applying the first voltage and the second voltage to the first interconnect and the second interconnect of the second interconnect structure, a second total leakage current is obtained; as well as, The test leakage current is obtained by subtracting the first total leakage current from the second total leakage current.