A directional liquid cooling-staged fallback dual-band radio frequency transceiver integrated assembly

Abstract

The application belongs to the technical field of semiconductor and its packaging, and particularly relates to a directional liquid cooling-grading back-off dual-frequency-band radio frequency receiving and transmitting integrated assembly. The device, heat dissipation and wiring are integrated through a multilayer glass-based packaging substrate, and the dual-frequency-band electromagnetic compatibility is improved by cooperating with a closed ground TGV fence. A thermoelectric combined monitoring system is formed by using a first temperature-sensitive TGV, a second temperature-sensitive TGV and a first power supply branch current sampling resistor, and heat flow is directionally dredged by combining a directional gradient copper-filled heat-conducting TGV. A double-acting sub-micro liquid cooling structure controls a main jet impact cavity and a biased auxiliary jet cavity through an adjustable micro throttle valve, so that targeted cooling and heat migration interception are realized. A controller discriminates drive stage overheat migration, end stage self-overheating and full-link overload working conditions based on temperature, current and gain compression amount, and links and adjusts cooling flow and executes grading power back-off and smooth recovery on the first and second power supply branches, so that the radio frequency performance is ensured, and the reliability and working condition adaptability of the high-power assembly are improved.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor and packaging technology, and specifically relates to a directional liquid-cooled-graded back-off dual-band radio frequency transceiver integrated component. Background Technology

[0002] As dual-band, multi-channel RF transceiver components rapidly evolve towards higher power density, miniaturization, and high integration, a limited package size must simultaneously integrate power driver amplifiers, final-stage power amplifiers, low-noise amplifiers, transceiver switching devices, power supply modulation circuits, and high-density RF vertical interconnect structures. Currently, the local hotspot heat flux density of mainstream high-power RF components has exceeded 200W / cm², creating an irreconcilable contradiction between increased package integration and multi-physics performance constraints. Under the trend of high-density integration, a strong coupling and constraint relationship has formed between heat dissipation performance, wiring density, electromagnetic isolation, power supply stability, and integration level: increased integration directly exacerbates local heat accumulation and electromagnetic crosstalk problems, while strengthening the heat dissipation structure to solve heat dissipation problems occupies wiring space within the package and may also worsen electromagnetic isolation performance.

[0003] To address this technical contradiction, existing technologies generally employ averaged heat dissipation methods, such as using external heat sinks, bottom cold plates, thermal interface materials (TIMs), or integral microfluidic cold plates to remove heat from the chip. However, under actual high-power transmission conditions, over 90% of the heat generated in the transmission link is concentrated in the active region of the power driver stage and the final power amplifier stage. Furthermore, the hotspot location dynamically shifts between the power driver amplifier and the final power amplifier stage as the operating mode (continuous wave or pulse wave) changes, the operating frequency band changes, the output power is adjusted, and the gain changes. The shift response time can reach the microsecond level. This dynamic hotspot characteristic exposes the following inherent defects in the averaged heat dissipation method: First, the heat path is long, requiring heat to pass through multiple layers of structure including the chip body, thermal interface material, packaging substrate, and metal cold plate before being transferred to the cooling medium. The overall thermal resistance is generally higher than 0.5℃・cm² / W, with prominent local thermal resistance. Second, it cannot achieve precise heat exchange for local hotspots at the millimeter or even micrometer level, resulting in hotspot temperatures far exceeding the chip's rated junction temperature, while non-hotspot areas have a large amount of redundant cooling resources. Third, it cannot dynamically allocate cooling resources according to the migration of hotspots, remaining in a passive heat dissipation state and exhibiting a serious response lag to rapidly migrating hotspots.

[0004] More critically, the high-frequency performance requirements of dual-band RF components further exacerbate the aforementioned heat dissipation problems. To meet the RF performance demands of dual-band high-frequency scenarios, the industry commonly uses glass-based materials as packaging substrates. These materials possess significant advantages such as low dielectric loss (as low as 0.005@30GHz), high thermal expansion coefficient matching with silicon chips, nanoscale precision processing capability, and suitability for constructing high-density TGV vertical interconnects, making them the preferred substrate material for millimeter-wave high-frequency, high-density RF packaging. However, glass-based materials have inherent limitations. Their bulk thermal conductivity is extremely low, only 0.8~1.2W / (m・K), far lower than that of silicon chips (148W / (m・K)) and copper (401W / (m・K)). Even with microchannels within the glass substrate, heat still needs to pass through the low thermal conductivity glass layer before being transferred to the cooling medium. Under high heat flux density conditions, the glass layer forms a solid thermal conductivity bottleneck, preventing the rapid dissipation of heat from chip hotspots, causing a sharp rise in junction temperature and exacerbating the problem of dynamic hotspot heat dissipation.

[0005] Furthermore, the inherent difficulties in heat dissipation for dynamic hotspots amplify the reliability risks of components due to flaws in power supply protection logic. While existing multi-stage power amplifier systems generally employ tiered power supply between the driver stage and the final stage, or protect the final stage by weakening the preceding stage, their over-temperature protection and power back-off control logic is often based on package temperature, external temperature measurement points on the chip, abnormal output power, or power supply current threshold triggers, rather than on the actual local thermal state inside the package or in the vicinity of the hotspot. This means that when the hotspot dynamically migrates between the power driver amplifier and the final stage power amplifier, the system often only recognizes an overall temperature increase, but cannot determine whether the heat migration to the final stage is caused by driver overdrive, whether it is due to mismatch in the final stage itself or excessive load causing overheating, or whether it is due to overall power overload of the entire transmit link causing excessive thermal load across the entire area. This directly leads to incorrect protection selection, delayed back-off action, and inaccurate allocation of cooling resources, resulting in significant fluctuations in output power, frequent oscillations in protection actions, repeated thermal shocks to devices, and even permanent failure of the final stage power amplifier, ultimately severely affecting the output stability and long-term operational reliability of RF components. Summary of the Invention

[0006] The technical problem to be solved by this invention is: how to achieve in-situ sensing of dynamically migrating hotspots, directional heat conduction, dynamic matching of cooling resources, and differentiated power supply backoff based on thermal causality in the glass-based package of high-power dual-band RF transceiver components through the coordinated use of package-level structure and control logic, thereby solving the problems of inaccurate thermal state identification, mismatch between heat conduction paths and hotspot migration, fixed allocation of cooling resources, and misalignment of power supply protection objects, and meeting the requirements of high-power dual-band RF transceiver components for high power density, high integration, and high reliability.

[0007] To solve the above-mentioned technical problems, the present invention is achieved through the following technical solution:

[0008] A directional liquid-cooled, graded backoff dual-band radio frequency transceiver integrated component includes: a multilayer glass substrate, a dual-band radio frequency transceiver functional unit, a thermal causality discrimination and locking unit, a directional gradient copper-filled thermally conductive TGV, a dual-actuator micro-spray liquid-cooling structure, a first power supply branch, a second power supply branch, a closed grounded TGV fence, and a controller.

[0009] The dual-band radio frequency transceiver unit includes a power drive amplifier and a final stage power amplifier cascaded in sequence, with a thermal migration transition gap region between the power drive amplifier and the final stage power amplifier.

[0010] The thermal cause-effect discrimination locking unit includes a first temperature-sensitive TGV located below the power drive amplifier, a second temperature-sensitive TGV located below the final stage power amplifier, and a current sampling resistor connected in series with the first power supply branch;

[0011] The directional gradient copper-filled thermally conductive TGV includes a main heat exchange region located below the final stage power amplifier and a drive-side traction thermally conductive region extending towards the drive stage with a linearly decreasing duty cycle.

[0012] The dual-acting micro-jet liquid cooling structure includes a main jet impact chamber corresponding to the main heat exchange area and an offset auxiliary jet chamber corresponding to the driving side traction heat guide area. The main jet impact chamber and the offset auxiliary jet chamber are respectively connected to the liquid inlet branch equipped with an adjustable micro-throttle valve.

[0013] The controller is electrically connected to the first temperature-sensitive TGV, the second temperature-sensitive TGV, the current sampling resistor, the detection unit for detecting the gain compression of the final stage power amplifier and the total power supply current of the transmit link, the first power supply branch, the second power supply branch, and the adjustable micro-throttle valve. Based on the output results of the first temperature-sensitive TGV, the second temperature-sensitive TGV, the current sampling resistor, and the detection unit, the controller judges the thermal migration state caused by the overdrive of the drive stage, the overheating state of the final stage itself, and the overload state of the entire link. According to the judgment results, the controller adjusts the flow distribution between the main injection impact chamber and the bias auxiliary injection chamber, and performs power backoff or restoration on the first power supply branch and the second power supply branch.

[0014] Compared with existing technologies, this invention has the following advantages and beneficial effects: First, it achieves integrated RF devices, heat dissipation structures, and electrical wiring through a multi-layer glass-based encapsulation substrate. Combined with a closed-loop grounded TGV enclosure to construct a fully enclosed shielding structure, it ensures both compact integration and effectively suppresses crosstalk and electromagnetic radiation from dual-band RF signals. Based on this, it utilizes a first and second temperature-sensitive TGV to collect the hotspot temperatures of the power drive amplifier and the final stage power amplifier in situ, respectively. Combined with a current sampling resistor connected in series with the first power supply branch and a matching detection unit, it establishes a thermoelectric joint monitoring system to obtain core parameters such as temperature, current, and gain compression, providing solid and reliable data support for subsequent thermal anomaly detection. Simultaneously, by leveraging the main heat exchange area and the drive-side heat-guiding area of ​​the directional gradient copper-filled thermally conductive TGV, it achieves targeted heat flow directional traction and diversion, overcoming the technical defect of low thermal conductivity in traditional glass-based encapsulation and alleviating the thermal migration transition gap between the two power amplifier stages. This addresses the potential for heat buildup. Furthermore, by utilizing a dual-actuator micro-jet liquid cooling structure and an independent liquid inlet branch with an adjustable micro-throttle valve, the cooling strategy can be flexibly switched according to the type of thermal anomaly. This allows for precise control of the flow distribution between the main jet impact chamber and the bias auxiliary jet chamber, simultaneously achieving targeted cooling of the final stage's main hot spot and intercepting cooling along the heat migration path. Finally, through controller-linked hierarchical discrimination logic and two independent power supply branches, it accurately distinguishes between three operating conditions: overdrive thermal migration in the drive stage, overheating of the final stage itself, and overload of the entire link. Differentiated power back-off and reverse-sequence smooth recovery strategies are implemented, which not only suppress heat generation at its source, rapidly reduce device junction temperature, and prevent over-temperature failure, but also minimize power fluctuations and RF link gain loss, eliminating protection malfunctions and frequent oscillations. The entire structure thus achieves a fully closed-loop collaborative control system encompassing thermal state sampling, thermal causality discrimination, directional heat conduction, cooling redistribution, hierarchical back-off, and smooth recovery, significantly improving the long-term reliability and adaptability to complex operating conditions of high-power dual-band RF components. Attached Figure Description

[0015] The accompanying drawings, which are included to provide a further understanding of embodiments of the invention and form part of this application, do not constitute a limitation thereof. In the drawings:

[0016] Figure 1 This is a schematic diagram of the structure of the multilayer glass-based encapsulation substrate provided in an embodiment of the present invention;

[0017] Figure 2 This is a top view of the bottom flow channel capping layer provided in an embodiment of the present invention;

[0018] Figure 3 This is a top view of the liquid cooling tank forming layer provided in an embodiment of the present invention;

[0019] Figure 4 This is a top view of the chip mounting layer provided in an embodiment of the present invention;

[0020] Figure 5 A top view of the air cavity layer provided in an embodiment of the present invention;

[0021] Figure 6 A top view of the intermediate wiring layer provided in an embodiment of the present invention;

[0022] Figure 7 A top view of the top cover layer provided in an embodiment of the present invention;

[0023] Figure 8 This is a schematic diagram of the thermal cause-effect discrimination and locking unit provided in an embodiment of the present invention.

[0024] The attached diagram shows the markings and corresponding component names:

[0025] 1- Bottom flow channel capping layer; 101- Bottom grounding pad; 102- Drive stage power supply interface pad; 103- Final stage power supply interface pad; 104- Temperature-sensitive TGV signal pad; 105- Micro throttling valve control pad; 106- Liquid inlet; 107- Liquid outlet; 108- Annular isolation zone; 109- Fluid zone; 110- Electrical zone; 111- Liquid cooling flow channel capping layer; 2- Liquid cooling tank forming layer; 201- Main jet impact chamber; 202- Offset auxiliary 203-Common manifold; 204-Main heat exchange area; 205-Drive-side traction heat guide area; 206-First liquid inlet branch; 207-Second liquid inlet branch; 208-Adjustable micro-throttle valve; 209-First manifold inlet; 210-Second manifold inlet; 211-Total outlet; 212-Thermal migration transition gap area; 3-Chip mounting layer; 301-Final stage power amplifier pad area; 302-Driver stage power amplifier pad area; 303- RF transmission line; 304-First power supply branch; 305-Second power supply branch; 4-Air cavity layer; 401-Driver stage power amplifier corresponding clearance cavity; 402-Final stage power amplifier corresponding clearance cavity; 403-First RF transmission line corresponding clearance cavity; 404-Second RF transmission line corresponding clearance cavity; 405-Closed grounded TGV enclosure; 5-Intermediate wiring layer; 501-RF signal wiring; 502-Control signal wiring; 503-Upper grounded metal plane; 504-Lower grounded metal plane; 505-RF signal lead-out area; 506-Control and power supply area; 507-Control signal TGV; 508-Power supply TGV; 509-Center signal hole; 6-Top cover layer; 601-Top grounded metal layer; 701-First temperature-sensitive TGV, 702-Second temperature-sensitive TGV; 703-Power drive amplifier; 704-Final stage drive amplifier; 705-High-precision current sampling resistor. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to embodiments. The illustrative embodiments and descriptions of this invention are for illustrative purposes only and are not intended to limit the invention. The embodiments described below are some, but not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0027] In the following description, numerous specific details are set forth to provide a thorough understanding of the invention. However, it will be apparent to those skilled in the art that these specific details are not necessary to practice the invention. In other embodiments, well-known structures, materials, or methods are not specifically described to avoid obscuring the invention. Unless otherwise specified, the materials, instruments, and reagents used in the following embodiments are commercially available. Unless otherwise specified, the techniques used in the embodiments are conventional methods well known to those skilled in the art.

[0028] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0029] Example: In high-power dual-band RF transceiver components, the power drive amplifier and final stage power amplifier in the transmit link are the core heat sources, contributing over 90% of the total heat generation of the entire link. Due to operating conditions such as continuous wave / pulse wave mode switching, frequency band switching, input power fluctuations, and load matching changes, localized heat centers dynamically migrate between the power drive amplifier and the final stage power amplifier. Using single-point temperature measurement, averaged heat dissipation, and fixed threshold protection will lead to the following technical defects: First, single-point temperature measurement suffers from long heat paths, slow response, and large measurement errors, failing to reflect the true thermal state of the area adjacent to the hot spot in a timely and accurate manner, thus unable to provide a reliable basis for thermal management decisions; second, the low thermal conductivity of the glass substrate makes it difficult to guide the migrating heat flow to the cooling area in a timely and directional manner. The heat flow diffuses disorderly within the glass layer, not only causing excessively high junction temperatures at the hot spot but also affecting… Adjacent RF-sensitive circuits cause thermal crosstalk; secondly, the fixed jet cooling structure cannot change the cooling focus as the hot spot migrates, and can only achieve uniform cooling across the entire area, resulting in a large waste of cooling resources in non-hot spot areas, while the real hot spot areas cannot receive sufficient cooling enhancement; finally, relying solely on a single temperature threshold or output anomaly for unified back-off protection cannot distinguish between thermal migration caused by driver overdrive and overheating of the final stage itself, leading to a complete misalignment between cooling and protection actions, resulting in erroneous protections such as "final stage overheating but only backing off the driver stage" and "driver stage overdrive but only limiting the final stage". This not only fails to effectively suppress overheating, but also causes large fluctuations in output power, deterioration of linearity, and even permanent device failure.

[0030] To address the aforementioned technical deficiencies, this embodiment provides a directional liquid-cooled, graded backoff dual-band RF transceiver integrated component. Within this structure, a closed-loop technical route is formed, encompassing thermal state sampling, thermal causality discrimination, directional heat conduction, cooling redistribution, differentiated backoff, and smooth recovery of the operating state. First, differential thermal states are acquired in situ within the package from the power drive amplifier side and the final stage drive amplifier side, while simultaneously acquiring the electrical state of the drive stage circuit, forming the basis for thermal causality discrimination. Then, directional gradient heat conduction, matched to the power transfer direction, is used to directionally pull and guide the migrating heat flow, overcoming the glass-based thermal conductivity bottleneck. Simultaneously, a dual-actuator micro-jet liquid cooling structure dynamically allocates cooling resources to the main hotspot area or the heat migration transition zone based on the thermal discrimination results. Finally, the controller, based on the thermal causality discrimination results, performs differentiated and precise power backoff between the first and second power supply branches, achieving coordinated optimization of the thermal, electrical, electromagnetic, and fluid multi-physics fields of the high-power RF component.

[0031] Based on the above-mentioned closed-loop technical route, the directional liquid-cooled-graded backoff dual-band RF transceiver integrated component described in this embodiment includes: a multi-layer glass substrate, a dual-band RF transceiver functional unit, an independent thermal causality discrimination and locking unit corresponding to each high-power transmission channel, a directional gradient copper-filled thermal conductive TGV, a dual-actuator micro-spray liquid cooling structure, graded independent power supply branches, a closed grounded TGV fence, and a controller.

[0032] 1. Multilayer glass-based encapsulation substrate

[0033] like Figure 1 As shown, the multilayer glass substrate adopts a six-layer alkali-free glass stack structure, namely: bottom channel capping layer 1, liquid cooling tank forming layer 2, chip mounting layer 3, air cavity layer 4, middle wiring layer 5, and top capping layer 6, with a total thickness of 1700μm. The specific structure, function, and thickness of each layer are as follows:

[0034] (1) The first layer (bottom layer) is the bottom flow channel capping layer 1, with a thickness of 300 μm, used to achieve bottom sealing of the liquid cooling flow channel. Reference Figure 1 and Figure 2 The bottom flow channel capping layer 1 integrates: an external liquid cooling interface, a bottom grounding pad 101, a power supply interface pad (including a drive-stage power supply interface pad 102 and a final-stage power supply interface pad 103), and a control interface pad (including a temperature-sensitive TGV signal pad 104 and a micro-throttle valve control pad 105). The external liquid cooling interface enables fluid interconnection with external systems (e.g., cooling medium inlet / outlet), the bottom grounding pad 101 enables grounding interconnection with external systems, the power supply interface pad enables electrical interconnection with external systems (e.g., power input), and the control interface pad enables control signal transmission with external systems. The attributes, available models, and specifications of the external liquid cooling interface, bottom grounding pad 101, power supply interface pad, and control interface pad are as follows:

[0035] The external liquid cooling interface is a standardized fluid connector used for detachable or fixed interconnection between the encapsulation substrate and the external cooling system. It requires reliable sealing, low flow resistance, and suitability for micro-flow cooling scenarios. The optional models and specifications of the external liquid cooling interface include: Model 1: SS-QD2-B-4 (Swagelok) – a quick-plug miniature liquid cooling connector with an interface size of 1 / 8 inch, a maximum working pressure of 10MPa, a metal-to-metal hard seal, compatible with cooling media such as deionized water and electronic fluorinated liquids, and a temperature range of -40℃ to 125℃, suitable for fluid interconnection in miniaturized packages; Model 2: LLC-04-02 (Amphenol) – a miniature locking liquid cooling interface with an outer diameter of 4mm and an inner diameter of 2mm, using an O-ring seal (fluororubber material), a mating cycle of ≥500 times, and a flow resistance of ≤0.05MPa・L / min, suitable for package-level microchannel cooling systems; Model 3: MC-2-01 (CPC) – a push-in quick-connect liquid cooling connector with an interface pitch of 12mm, a working pressure of 0~5MPa, compatible with low-temperature bonding processes for semiconductor packaging, and a non-magnetic design to avoid interference with RF performance.

[0036] The bottom ground pad 101 is a standardized metallized pad integrated into the bottom of the package substrate. It serves to provide grounding, electromagnetic shielding, and auxiliary heat dissipation. Its size and layout conform to general packaging industry standards. Optional models and specifications for the bottom ground pad 101 include: Model 1: EPAD-1.0×1.0 (industry standard) square ground pad, 1.0mm×1.0mm in size, metallized with nickel-gold plating (Ni / Au), with a thickness of 5μm (Ni) + 0.5μm (Au), compatible with QFN / DFN package series, and compatible with nano-silver sintering and eutectic bonding processes; Model 2: GND-PAD-0.9×0.9 (compatible with ESP32-S3 module). (Specifications) — Rectangular grounding pad, 0.9mm × 0.9mm in size, tin-plated (Sn) with a thickness of 10μm, used for bottom grounding of miniaturized RF packages, compatible with reflow soldering process; Model 3: Thermal-GND-2.0×2.0 (with heat dissipation enhancement) — 2.0mm × 2.0mm in size, with a copper bottom layer (50μm thick) and a palladium (Pd) plated top layer, combining grounding and auxiliary heat dissipation, suitable for high-power RF packaging scenarios.

[0037] The power supply interface pads are characterized as: standardized power supply pads, used for interconnection between external power supply and internal power supply branches of the package. They must meet the requirements of current carrying capacity, low impedance and corrosion resistance, and comply with IPC (International Electronics Industry Connection Association) standards. The optional models and specifications of the power supply interface pads include: Model 1: PWR-PAD-0.5×0.8 (IPC-2221 standard) - a rectangular power supply pad with dimensions of 0.5mm×0.8mm and a spacing of 1.27mm. The metallization material is silver-plated (Ag), with a current carrying capacity of ≥3A. It is suitable for power supply interconnection between DC-DC converters and power amplifiers; Model 2: VDD-PAD-0.6×0.6 (high-density package specification) - a square pad with dimensions of 0.6mm×0.6mm and a spacing of 0.8mm. It adopts the chemical nickel-palladium-gold (ENEPIG) plating process, with a contact resistance of ≤10mΩ. It is suitable for high-density power supply wiring of multi-layer glass-based packages; Model 3: Power-Array-4×4 (array power supply pad) - a 4×4 array layout with a single pad size of 0.4mm×0.4mm and a spacing of 0.6mm. The total current carrying capacity is ≥10A. It is used for multi-channel power supply interconnection of high-power final stage amplifiers.

[0038] The control interface pads are characterized as: standardized signal pads used to transmit control signals (such as PWM and temperature measurement signals), conforming to the low parasitic and anti-interference design specifications of RF packaging, and their size and spacing are compatible with general connectors. The optional models and specifications of the control interface pads include: Model 1: CTRL-PAD-0.3×0.3 (IPC-2222 standard) – a square control pad, 0.3mm×0.3mm in size, with a pitch of 0.5mm. The metallized material is nickel-gold plated, suitable for interconnecting control signals of microcontrollers (MCU / FPGA), with parasitic capacitance ≤0.1pF; Model 2: Sig-PAD-0.4×0.6 (differential signal specification) – a rectangular differential signal pad, 0.4mm×0.6mm in size, with a differential pair pitch of 0.8mm and impedance matching of 50Ω, used for temperature measurement signal transmission of temperature-sensitive TGV devices; Model 3: GPIO-PAD-0.5×0.5 (general purpose I / O pad) – 0.5mm×0.5mm in size, with a pitch of 1.0mm, compatible with SMD / DIP packaged control interfaces, pluggable and pluggable compatible with JTAG debugging functions, suitable for package cascading debugging scenarios.

[0039] It should be noted that: 1) All components in the external liquid cooling interface, bottom grounding pad 101, power supply interface pad, and control interface pad are existing products with standardized structures. They can be directly purchased or integrated into the multilayer glass substrate according to general specifications, and are compatible with existing glass-based TGV packaging technology; 2) The model selection of each component needs to be adjusted according to actual requirements such as package size, working pressure, current carrying capacity, and signal frequency. The core parameters (size, material, and process) all follow industry general standards to ensure interchangeability and mass production feasibility; 3) The metallization material and thickness of the grounding pad, power supply interface pad, and control interface pad can be adapted according to the bonding process of the package (low-temperature bonding, anodic bonding) to avoid process compatibility issues.

[0040] Furthermore, in the multilayer glass substrate, the external liquid cooling interface of the bottom flow channel capping layer 1, the bottom grounding pad 101, the power supply interface pad, and the control interface pad must meet the requirements of functional isolation, non-interference, shortest path, and process compatibility in terms of their positional and connection relationships, as follows:

[0041] 1) The functional isolation requirements between the external liquid cooling interface and the electrical pads (bottom grounding pad 101, power supply interface pad, and control interface pad) are as follows: Firstly, the distance between the edge of the external liquid cooling interface (including the inlet 106 and outlet 107) and the edges of all electrical pads must be ≥500μm, and an annular isolation strip 108 (width ≥200μm, depth ≥50μm) must be provided between the edge of the external liquid cooling interface and the edges of all electrical pads to prevent short circuits or corrosion caused by leakage of cooling medium. Secondly, the bottom flow channel cover layer 1 needs to divide the fluid area 109 and the electrical area 110 into independent zones. The inlet 106, outlet 107, and liquid cooling flow channel cover 111 structures must be centrally arranged in the fluid area 109; all electrical pads must be centrally arranged in the electrical area 110; the boundary of the fluid area 109 and the boundary of the electrical area 110 must be separated by an isolation groove to prevent cross-interference between the fluid and electrical structures.

[0042] 2) The position requirements of the bottom grounding pad 101 are as follows: The bottom grounding pad 101 should be arranged around the edge of the electrical area 110 and the edge of the fluid area 109 to form an outer grounding ring. At the same time, the bottom grounding pads 101 can be set in a distributed manner inside the electrical area 110 to realize multi-point conduction of the grounding path and reduce the grounding impedance. The vertical projection of the bottom grounding pads 101 distributed inside the electrical area 110 should coincide with the vertical projection of the grounding TGV inside the multilayer glass substrate (alignment deviation ≤ ±5μm) to ensure the shortest grounding current path and reduce ground bounce noise.

[0043] 3) The positional requirements for the power supply interface pads and control interface pads are as follows: Firstly, the power supply interface pads and control interface pads should be arranged in functional groups, with a spacing of ≥300μm between the two groups to avoid interference from the large current of the power supply circuit with the small signal transmission of the control signal. Secondly, the power supply interface pads should be perpendicularly aligned with the hierarchical independent power supply branches inside the multilayer glass substrate, and the control interface pads should be perpendicularly aligned with the temperature sensing electrode of the temperature-sensitive TGV and the drive circuit of the adjustable micro-throttle valve to ensure the shortest interlayer interconnection path and reduce wiring loss and signal delay.

[0044] 4) The overall layout priority requirements are as follows: the fluid area 109 should be arranged at the edge of the bottom flow channel cover layer 1 to avoid occupying the core area of ​​electrical interconnection; the bottom grounding pad 101 should cover the periphery of the electrical area 110 and the area below the signal nodes to form a shielded grounding network; the power supply interface pad should be close to the power input side, and the control interface pad should be close to the signal interface side to reduce the wiring crossover of the two types of signals.

[0045] 5) The connection requirements for the external liquid cooling interface are as follows: it is only connected to the liquid cooling channel. The external liquid cooling interface (inlet 106, outlet 107) is connected to the liquid cooling channel system of the second layer (liquid cooling tank forming layer 2) through the channel structure inside the bottom channel cover layer 1. It is not directly connected to any electrical structure (pads, wiring, TGV). The inner wall of the channel structure must be insulated and corrosion-resistant (such as TiN plating) to avoid electrical contact with the underlying metal structure.

[0046] 6) The connection requirements for the bottom grounding pad 101 are as follows: On the one hand, the bottom grounding pad 101 is electrically connected to the closed grounding TGV fence inside the multilayer glass substrate, the grounding metal planes of each layer, and the chip grounding pins through the vertically penetrating grounding TGV, forming a full-package grounding network to ensure that the grounding potential of each functional area is consistent; on the other hand, the bottom grounding pad 101 is only used for grounding and is not directly connected to the power supply interface pad and the control interface pad to avoid cross-coupling of the grounding loop with the power supply loop and the signal loop.

[0047] 7) The connection requirements for the power supply interface pads are as follows: On the one hand, the driver-stage power supply interface pad 102 is connected only to the first power supply branch (driver-stage power supply branch) inside the multilayer glass substrate via an independent power supply TGV508; the final-stage power supply interface pad 103 is connected only to the second power supply branch (final-stage power supply branch) via an independent power supply TGV. The two power supply paths have no direct electrical connection at the bottom layer or in each layer, ensuring independent power supply at each level. On the other hand, a decoupling capacitor mounting area needs to be reserved near the power supply interface pads. The decoupling capacitor mounting area can be set in the bottom flow channel capping layer 1 or the chip mounting layer 3. One end of the decoupling capacitor is connected to the power supply interface pad, and the other end is connected to the ground pad, realizing the nearby decoupling of the power supply signal and reducing power supply noise. It should be further noted that: the capacitor mounting area must be adjacent to the edge of the corresponding power supply interface pad, with a distance of ≤200μm between them, to ensure the shortest possible wiring length (preferably ≤500μm) between the decoupling capacitor and the power supply interface pad and ground pad, thereby reducing parasitic inductance and power supply noise; the area of ​​the capacitor mounting area must match the decoupling capacitor package size (e.g., 0402 package, 0603 package), allowing for a mounting tolerance of ≥±50μm, while avoiding liquid cooling interfaces, ground TGV, and other electrical pads to prevent structural interference. Furthermore, if the decoupling capacitor is mounted on the bottom flow channel capping layer 1, it must be connected to the power supply branch and the full-package grounding network inside the multilayer glass substrate through an independent vertical interconnect structure (e.g., micro vias); if the decoupling capacitor is mounted on the chip mounting layer 3, the capacitor interface pad must be prepared simultaneously at the corresponding position on the chip mounting layer 3, and the capacitor interface pad must be connected to the corresponding power supply TGV and ground TGV of the power supply interface pad through the shortest path to achieve the local decoupling function. In addition, the capacitor mounting area must meet the requirements of surface mount technology (SMT). When mounting on the bottom channel capping layer 1, the surface flatness Ra of the area must be ensured to be ≤10nm, and there is no risk of leakage from the liquid cooling channel. When mounting on the chip mounting layer 3, the chip body and bonding area must be avoided, so as not to affect the installation and interconnection of core components.

[0048] 8) The connection requirements for the control interface pads are as follows: Firstly, the temperature-sensitive TGV signal pad 104 is connected only to the controller's signal acquisition port via an independent control TGV; the micro-throttle valve control pad 105 is connected only to the controller's drive output port via an independent control TGV. All control signal paths are independent to avoid signal crosstalk. Secondly, the wiring area of ​​the control interface pads must be surrounded by a grounding pad or grounding shield to form a signal shielding channel, and the distance between the control TGV and the grounding TGV must be ≥200μm to reduce the impact of electromagnetic interference on small signals.

[0049] The above requirements for positional and connection relationships are to simultaneously achieve the sealing of fluid interconnection, the reliability of electrical interconnection, and the tightness of electromagnetic isolation within the limited space of the bottom flow channel capping layer 1. This avoids short circuits and corrosion caused by contact between the cooling medium and the electrical structure, reduces mutual interference between high power supply current, grounding loops, and small control signals, ensures the shortest connection path for each functional structure, reduces losses and delays, and ultimately guarantees the overall RF performance, thermal management performance, and long-term operational reliability of the package.

[0050] (2) Reference Figures 1 to 3 The second layer is the liquid cooling tank forming layer 2, with a thickness of 400 μm. As the supporting layer of the thermal management structure, the liquid cooling tank forming layer 2 is processed through precision etching to form a liquid cooling channel system for a dual-actuator micro-jet liquid cooling structure. This liquid cooling channel system includes: a main jet impact chamber 201, an offset auxiliary jet chamber 202, a liquid inlet branch, and a common manifold 203. Simultaneously, a directional gradient copper-filled thermal conductive TGV is arranged within the liquid cooling tank forming layer 2 to ensure a perpendicular correspondence between the thermal conductive structure and the liquid cooling structure. The dual-actuator micro-jet liquid cooling structure and the directional gradient copper-filled thermal conductive TGV are integrated coplanarly and perpendicularly, formed through laser-induced deep hole etching and partitioned electroplating metallization processes. After bonding with the bottom channel capping layer 1, a sealed liquid cooling channel is formed. Alignment with the chip mounting layer 3 achieves the shortest path conduction of heat from the chip to the cooling medium.

[0051] The liquid cooling channel system is a grooved sealing structure formed by laser etching, machined on the lower surface of the liquid cooling tank forming layer 2 (towards the bottom channel capping layer 1). All channels have annular sealing platforms (10μm wide and 5μm high, surface roughness Ra≤10nm) at their edges, which bond with the bottom channel capping layer 1 to form a seal with a leakage rate ≤1×10⁻⁻⁶. 9 Pa・m³ / s. The specific morphological parameters of each component of the liquid cooling flow channel system (main jet impact chamber 201, offset auxiliary jet chamber 202, liquid inlet branch and common manifold 203) are as follows:

[0052] The main jet impact chamber 201 has the following morphological characteristics: chamber shape – rectangular groove, length × width × depth = 2.0mm × 1.5mm × 150μm; jet hole array – the bottom plate of the chamber (facing the bottom flow channel capping layer 1) is provided with micro jet holes arranged in an equilateral triangle (the total number can be set to 300), with a hole diameter of 80μm, a hole spacing of 200μm, smooth hole walls, and a verticality deviation of the micro jet holes ≤ ±2°. The upper end face of the micro jet holes is directly attached to the lower end face of the directional gradient copper-filled thermal conductive TGV (without a medium layer); interface design – a 150μm wide liquid inlet 106 is provided on one side edge of the main jet impact chamber 201, and a 200μm wide manifold is provided on the other side edge. Both the liquid inlet 106 and the manifold are flush with the sealing platform without steps.

[0053] The bias-assisted jet cavity 202 has the following morphological characteristics: cavity shape – a long strip-shaped groove, length × width × depth = 1.8mm × 0.6mm × 120μm, with the length direction consistent with the RF power transmission direction; jet hole array – the cavity bottom plate is provided with linearly arranged micro-jet holes (the total number can be set to 30), with a hole diameter of 60μm and a hole spacing of 150μm; the central axis of the micro-jet hole is offset towards the drive stage side relative to the geometric center of the thermal migration transition gap region 212 (the offset is 40% of the gap region width, such as 0.2mm), and the upper end face of the micro-jet hole is directly attached to the lower end face of the copper pillar of the drive-side traction heat-guiding area 205; interface design – the bias-assisted jet cavity 202 is provided with a 100μm wide liquid inlet 106 in the middle and a 150μm wide manifold at the end, flush with the sealing platform.

[0054] The liquid inlet branches (independent dual channels without interconnection, each channel is a smooth arc-shaped flow channel with a corner radius ≥150μm to reduce fluid resistance, and each channel is connected to the bottom external liquid cooling inlet interface) have the following morphological characteristics: First liquid inlet branch 206—corresponding to the main jet impact chamber 201; it is an L-shaped flow channel, 3.0mm long, 300μm wide, and 150μm deep. One end of the first liquid inlet branch 206 is connected to the main liquid inlet interface of the bottom flow channel sealing layer 1, and the other end is seamlessly connected to the liquid inlet of the main jet impact chamber through a gradual narrowing (the diameter is reduced from 300μm to 150μm); Second liquid inlet branch 207— —Corresponding to the biased auxiliary injection chamber 202; it is a straight flow channel with a length of 2.5mm, a width of 200μm, and a depth of 120μm. One end of the second liquid inlet branch 207 is connected to the auxiliary liquid inlet interface of the bottom flow channel capping layer 1, and the other end is vertically connected to the liquid inlet of the biased auxiliary injection chamber; the inner wall of the second liquid inlet branch 207 has no steps or protrusions; throttle valve mounting position—both branches are provided with rectangular mounting grooves with dimensions of 500μm×300μm×200μm near the injection chamber. The inner wall of the rectangular mounting groove is plated with a 5μm thick Ti / Cu metal layer for embedding a piezoelectric driven MEMS micro throttle valve to achieve independent flow regulation.

[0055] The common manifold 203 has the following morphological characteristics: Cavity shape – a U-shaped groove, serving as a unified collection channel for the cooling medium after heat exchange, with a length × width × depth of 4.0mm × 0.8mm × 180μm (the depth is greater than that of the main jet impact chamber 201 and the offset auxiliary jet chamber 202, ensuring smooth fluid collection without stagnation); Manifold inlet – two branch inlets are provided. The first branch inlet is 200μm wide (on the main cavity side), seamlessly connected to the main jet impact chamber manifold through an arc-shaped transition channel (corner radius ≥ 100μm). The second branch inlet is 150μm wide, also seamlessly connected through an arc-shaped transition channel. The flow channel (rounded corner radius ≥ 100μm) is seamlessly connected to the manifold of the offset auxiliary jet chamber; the depth of the arc-shaped transition flow channel is consistent with the depth of the corresponding jet chamber; the manifold outlet is the total outlet 211 located at the end of the U-shaped groove, with a width of 400μm and a depth of 180μm. The manifold outlet is connected to the external liquid-cooled liquid outlet of the bottom flow channel cover layer 1. A ring-shaped anti-vortex protrusion with a height of 20μm is provided at the manifold outlet to avoid pressure loss caused by fluid turbulence; inner wall treatment: the inner wall of all manifolds is hydrophobically treated with a contact angle ≥ 110° to reduce the risk of scaling and flow resistance.

[0056] The directional gradient copper-filled thermal conductive TGV is an array-type copper-filled glass via structure that vertically penetrates the liquid cooling tank to form layer 2. The upper surface of the directional gradient copper-filled thermal conductive TGV is bonded to the chip heat sink pads of the chip mounting layer 3, and the lower surface of the directional gradient copper-filled thermal conductive TGV is flush with the top surface of the jet chamber of the liquid cooling channel system (no step difference, roughness Ra≤500nm). The directional gradient copper-filled thermal conductive TGV is divided into a main heat exchange region 204 and a drive-side traction heat conduction region 205. Specific morphological characteristics and structural parameters are as follows:

[0057] The morphological characteristics and structural parameters of the main heat exchange region 204 are as follows: it is located directly below the final stage power amplifier, and its vertical projection area completely covers the active heat-generating area of ​​the final stage power amplifier. It also corresponds one-to-one with the active area of ​​the final stage power amplifier located in the chip mounting layer 3 in the vertical direction and is coaxially coincident. The main heat exchange region 204 is a rectangular TGV array (arranged in equilateral triangles) with a size of 2.0mm × 1.5mm. The aperture of the TGV is 100μm and the spacing between the apertures is 200μm. The copper filling area has a duty cycle of 80%, the copper pillar density is ≥99%, there is no gap between the hole wall and the glass substrate, and the upper end of the copper pillar protrudes 5μm from the upper surface of the liquid cooling tank forming layer 2 (to facilitate bonding with the pads of the chip mounting layer 3).

[0058] The morphological characteristics and structural parameters of the drive-side traction heat-guiding region 205 are as follows: it extends towards the side where the power drive amplifier is located to form an extension segment. The projection area of ​​this extension segment in the vertical direction completely covers the heat migration transition gap region 212 between the drive stage and the final stage, as well as the vertical projection area of ​​the active region of the power drive amplifier on the liquid cooling tank forming layer 2. The drive-side traction heat-guiding region 205 is a trapezoidal TGV array. The size of the end near the main heat exchange region 204 is 1.8mm×0.6mm, and the size of the end near the drive stage is 1.5mm×0.5mm. The TGV aperture is linearly reduced from 100μm to 80μm, the aperture spacing is linearly reduced from 200μm to 150μm, the copper filling area duty cycle is linearly reduced from 60% to 30% towards the drive stage side, and the copper column density is ≥99%.

[0059] Overall parameters: Verticality deviation of all TGV bore walls ≤ ±2°, resistivity of copper pillars ≤ 1.75 × 10⁻ 8 The Ω・m and the matching error between the glass thermal expansion coefficient of the liquid cooling tank forming layer 2 are ≤5%, and there are no defects such as electroplating voids or cracks.

[0060] Within the liquid cooling tank forming layer 2, the directional gradient copper-filled TGV and the liquid cooling channel system are integrated in a vertically projected, perfectly aligned, and layered manner. Using the RF power transfer axis (the center line connecting the driver stage to the final stage) as a reference, the positional deviation of all structures is ≤ ±5μm. The specific positional relationships of each structure are as follows:

[0061] 1) Positional relationship between the directional gradient copper-filled TGV and the injection chamber: The vertical projection of the main injection impact chamber 201 completely coincides with the main heat exchange region 204 of the directional gradient copper-filled TGV, and the injection hole array corresponds one-to-one with the TGV array of the main heat exchange region 204; The vertical projection of the offset auxiliary injection chamber 202 completely coincides with the driving-side traction heat-guiding region 205, and the linear array of injection holes is arranged along the length direction of the driving-side traction heat-guiding region 205 to ensure that the cooling medium accurately impacts the lower end face of the heat-conducting core copper pillar.

[0062] 2) Positional relationship between the injection chambers: The main injection impact chamber 201 is located on the last stage side, and the offset auxiliary injection chamber 202 is located on the drive stage and gap area side; the distance between the edge of the injection impact chamber and the edge of the offset auxiliary injection chamber 202 is 300μm, and there is no direct connection. The injection impact chamber and the offset auxiliary injection chamber 202 are each supplied with liquid through independent liquid inlet branches, and the manifolds are all oriented towards the common manifold 203.

[0063] 3) Positional relationship between the liquid inlet branch, the directional gradient copper-filled thermal conductive TGV, and the throttle valve: The first liquid inlet branch 206 and the second liquid inlet branch 207 are both arranged along the edge of the liquid cooling tank forming layer 2, and their vertical projections must avoid all TGV structures; the horizontal distance between the first liquid inlet branch 206 and the second liquid inlet branch 207 and the directional gradient copper-filled thermal conductive TGV must be ≥200μm, and the mounting position of the adjustable micro throttle valve 208 is integrally machined without any additional connection gap.

[0064] 4) Positional relationship between the shared manifold 203 and the injection chambers—The shared manifold 203 is located downstream of the two injection chambers (away from the inlet end), with a distance of 200μm from the edge of the main injection impact chamber 201 and a distance of 150μm from the edge of the offset auxiliary injection chamber 202; the shared manifold 203 is respectively provided with a first manifold inlet 209 matching the main injection impact chamber 201 and a second manifold inlet 210 matching the offset auxiliary injection chamber 202, wherein the first manifold inlet 209 is matched with the edge of the main injection impact chamber 201. The positions of the flow inlets and the flow channels are aligned and smoothly connected. The second flow inlet 210 is aligned with the flow inlet of the offset auxiliary jet chamber and the flow channels are smoothly connected. Each flow inlet and the corresponding jet chamber flow inlet adopt a continuous flow channel structure without steps, abrupt changes, or dead angles. This allows the cooling medium after heat exchange in the main jet impact chamber 201 and the offset auxiliary jet chamber 202 to smoothly flow into the common flow channel 203 along the flow direction, avoiding the generation of eddies, dead zones, or stagnation of fluid in the chamber, and ensuring smooth flow of cooling fluid and stable heat exchange efficiency.

[0065] Furthermore, within the liquid cooling tank forming layer 2, the directional gradient copper-filled thermally conductive TGV and the liquid cooling channel system are physically directly bonded and functionally strongly coupled. Simultaneously, the connection relationships between the structures within the layer and between the structures within the layer and their associated components outside the layer are as follows:

[0066] 1) The connection relationship between the components inside and outside the liquid cooling tank forming layer 2 is as follows:

[0067] The lower end face of the directional gradient copper-filled heat-conducting TGV is directly and physically bonded to the top surface of the main jet impact chamber 201 and the top surface of the offset auxiliary jet chamber 202, without any medium layer. The gap between the bonding surfaces is ≤1μm, ensuring that heat is directly transferred from the copper column to the cooling medium without additional thermal resistance.

[0068] All connection parts of the liquid inlet branch, the spray chamber and the common manifold 203 are integrally laser-etched, with no splicing gaps. The inner wall of the flow channel is smooth and continuous, ensuring smooth flow of the cooling medium without leakage or stagnation.

[0069] The copper pillars of the directional gradient copper-filled thermally conductive TGV are not electrically connected to the liquid cooling channel system. There is no metal layer on the inner wall of the channel. The thermally conductive core copper pillars are only electrically connected to the upper metal wiring structure of the chip mounting layer 3, the upper metal wiring structure of the middle wiring layer 5, and the upper metal wiring structure in the top capping layer 6, thus avoiding electro-corrosion and short circuits.

[0070] Both the directional gradient copper-filled thermal conductive TGV and the liquid cooling channel system are located within the enclosure of the closed grounded TGV fence, and are processed at the same layer and physically isolated from the closed grounded TGV fence; the horizontal distance between the directional gradient copper-filled thermal conductive TGV and the liquid cooling channel system and the closed grounded TGV fence is ≥500μm.

[0071] The Ti / Cu metal layer on the inner wall of the mounting position of the liquid inlet branch throttle valve is connected to the control interface pad on the upper surface of the second layer through an independent control TGV (with an aperture of 50μm). The horizontal distance between the control TGV and the directional gradient copper-filled thermally conductive TGV is ≥200μm, with no electrical coupling.

[0072] 2) The connection relationship between the components inside and outside the liquid cooling tank forming layer 2 is as follows:

[0073] The upper end of the copper pillar of the directional gradient copper-filled thermal conductive TGV is directly soldered to the heat sink pads on the back of the power drive amplifier and the back of the final stage power amplifier of the chip mounting layer 3 through a solder layer (made of AuSn with a thickness of 5μm), achieving efficient heat conduction of the chip to the thermal core, with a solder void rate of ≤5%.

[0074] The annular sealing platform of the liquid-cooled flow channel system and the lower surface of the bottom flow channel capping layer 1 are sealed together by low-temperature plasma-assisted anodic bonding. The bonding temperature is ≤200℃ and the bonding pressure is 0.8MPa, ensuring that the flow channel is sealed without leakage.

[0075] The outer end of the liquid inlet branch and the external liquid cooling inlet interface of the bottom flow channel cover layer 1, the total outlet 211 of the common manifold 203 and the external liquid cooling outlet interface of the bottom flow channel cover layer 1 are all vertically projected and completely overlapped docking relationships, with no steps at the docking point to ensure smooth entry and exit of the cooling medium.

[0076] The control TGV of the throttle valve mounting position extends downward and connects to the control interface pad of the bottom flow channel cover layer 1 to realize the electrical signal transmission between the external controller and the micro throttle valve.

[0077] In addition to the aforementioned positional and connection relationships, it should be further noted that: to ensure the precise forming and reliable connection of each structure within the liquid cooling tank forming layer 2, and to ensure precise docking between the liquid cooling tank forming layer 2 and corresponding external components, the processing and assembly within the liquid cooling tank forming layer 2 must meet the following process requirements, which can be achieved by those skilled in the art using existing glass-based encapsulation processes:

[0078] 1) Laser processing precision requirements: The dimensional tolerance of all TGV through holes and flow channel grooves is ≤ ±5μm, the depth tolerance is ≤ ±3μm, and the roughness of the hole wall and the inner wall is ≤ 500nm.

[0079] 2) Zoned electroplating requirements - The directional gradient copper-filled heat conduction TGV adopts zoned pulse electroplating. By adjusting the current density (the current density of the main heat exchange zone 204 is 2.5A / dm², and the current density of the drive-side traction heat conduction zone 205 is 0.8~1.5A / dm²), the copper filling duty cycle gradient is achieved, so that the surface of the electroplated copper column is flat and free of copper overflow and pits.

[0080] 3) Surface treatment requirements - The lower end face of the copper pillar and the surface of the flow channel sealing platform of the directional gradient copper-filled thermal conductive TGV need to be polished, and the inner wall of the flow channel needs to be plasma activated and hydrophobic treated to ensure tight fit and smooth fluid flow.

[0081] 4) Interlayer alignment requirements - The bonding alignment deviation between the liquid cooling tank forming layer 2 and the bottom flow channel capping layer 1 and the chip mounting layer 3 must be ≤ ±5μm to ensure that the heat conduction core and the chip heat sink, and the liquid cooling interface and the bottom external interface are accurately corresponded.

[0082] (3) Reference Figures 1 to 4 The third layer is the chip mounting layer 3, which is 200μm thick and is the core carrier layer for radio frequency functions. The surface of this layer is prepared with chip mounting pads, radio frequency transmission lines 303 and power supply lines through photolithography and electroplating processes. It is used to mount core radio frequency chips such as power drive amplifiers, final stage power amplifiers and low noise amplifiers, as well as passive devices such as resistors and capacitors. It is the core functional layer for realizing radio frequency signal amplification and transmission.

[0083] Chip mounting layer 3 is based on the center line connecting the final stage power amplifier and the driver stage power amplifier, and adopts a functional partition and isolated wiring layout, with all structural position deviations ≤ ±5μm.

[0084] 1) Layout of chip mounting pads

[0085] Chip mounting pads are divided into: chip heat sink pads, chip electrode pads, and passive device pads. Among them, the chip heat sink pads are further divided into: final stage power amplifier pads (located in the final stage power amplifier pad area 301) and driver stage power amplifier pads (located in the driver stage power amplifier pad area 302); passive device pads include: decoupling capacitor pads and resistor pads.

[0086] The final stage power amplifier pad is located at the center of the chip mounting layer 3, slightly to the right. The final stage power amplifier pad is a rectangular pad, and its vertical projection completely coincides with the main heat transfer area 204 of the directional gradient copper-filled thermally conductive TGV of the liquid cooling tank forming layer 2. The size of the final stage power amplifier pad is perfectly matched with the size of the heat sink on the back of the chip, realizing the shortest path conduction of heat from the chip hotspot. The chip electrode pads are arranged around the final stage power amplifier pad, and the distance between the chip electrode pads and the final stage power amplifier pads is ≥100μm to avoid electrical-thermal cross-interference.

[0087] The driver-stage power amplifier pad group is located on the left side of the center of the chip mounting layer 3. The vertical projection of the final stage power amplifier pads completely coincides with the heat-conducting area 205 on the drive side of the liquid cooling tank forming layer 2; the chip electrode pads are arranged on one side along the signal transmission direction to avoid heat conduction paths.

[0088] The decoupling capacitor pads and resistor pads are arranged close to the corresponding power supply interface pads, and the distance between the power supply interface pads and the decoupling capacitor pads and resistor pads is ≤200μm.

[0089] 2) Wiring method of RF transmission line 303 and power supply line and their positional relationship.

[0090] The RF transmission line is laid out on one side along the center line connecting the final stage power amplifier and the driver stage power amplifier, forming an independent strip-shaped RF signal area. The RF transmission line adopts a 50Ω impedance-matched coplanar waveguide structure, with straight lines and no sharp corners (corner radius ≥ 200μm) to avoid signal reflection.

[0091] The power supply line is laid on the opposite side of the strip radio frequency signal area, forming a driver stage power supply branch and a final stage power supply branch. The two power supply paths are laid in parallel, without crossing or overlapping, and the distance between the two power supply paths is ≥300μm.

[0092] The distance between the edge of the RF transmission line 303 and the edge of any power supply line and the edge of the grounding wiring is ≥250μm to avoid crosstalk of high current power supply noise to small RF signals; all wiring avoids the chip mounting area and chip heat sink pads and does not cover the chip projection area.

[0093] 3) Intra-layer and inter-layer interconnections of chip mounting layer 3

[0094] The chip electrode pads and the RF transmission line 303 are directly connected point-to-point. The input end of the RF transmission line 303 is directly soldered to the signal output electrode of the chip. The output end of the RF transmission line 303 extends to the edge of the chip mounting layer 3 and then connects to the RF coaxial TGV of the intermediate wiring layer 5 to realize unidirectional transmission of RF signals.

[0095] The chip electrode pads and power supply lines are connected in a hierarchical and independent manner. The first power supply branch 304 (driver-level power supply branch) is connected only to the driver-level power supply electrode, and the second power supply branch 305 (final-stage power supply branch) is connected only to the final-stage power supply electrode. The two power supply paths have no electrical connection. The ends of the two power supply paths are connected to decoupling capacitor pads, and the other end of each decoupling capacitor is connected to the nearest ground pad to achieve local filtering.

[0096] The chip heat sink pads use a straight (or slightly curved) metal wiring method with the shortest path, no redundant bends, and no extra branches to connect with the surrounding ground pads, thereby minimizing conduction impedance, shortening the heat conduction path, and reducing parasitic parameters.

[0097] The chip heat sink pads are seamlessly connected to the directional gradient copper-filled heat-conducting TGV through an integrated thermally conductive TGV that vertically penetrates the third and second layers, without any dielectric gaps, enabling the chip's heat to be conducted downwards to the liquid cooling channel.

[0098] The vertical projection area of ​​the RF transmission line 303 falls completely within the chip avoidance air cavity contour range corresponding to the air cavity layer 4, with an interlayer alignment deviation of ≤±5μm. The air cavity layer 4 forms a low dielectric constant dielectric isolation layer, blocking the parasitic coupling between the RF transmission line 303 and the metal structure of the intermediate wiring layer 5, avoiding the problems of parasitic capacitance and parasitic inductance degrading the transmission quality of RF signals and causing impedance mismatch. Each ground pad of the chip mounting layer 3 corresponds one-to-one with the vertical through-hole of the closed ground TGV fence of the air cavity layer 4 and is precisely aligned, with an alignment deviation of ≤±5μm. The ground pad achieves stable and low impedance grounding conduction between the upper and lower layers through the through ground TGV, ensuring the electrical continuity of the three-dimensional shielding structure.

[0099] The end of the RF transmission line 303 is vertically interconnected with the RF line of the intermediate wiring layer 5 via an RF coaxial TGV; the power supply line is connected to the intermediate wiring via an independent power supply TGV; each ground pad of the chip mounting layer 3 is connected to and vertically aligned with the upper and lower ground metal planes of the intermediate wiring layer 5 via a ground TGV, with an interlayer alignment deviation ≤ ±5μm. Through the continuous ground TGV penetrating the intermediate wiring layer 5, the air cavity layer 4, and the intermediate wiring layer 5, low impedance and uninterrupted electrical conduction between the three layers is achieved. Together with the closed ground TGV enclosure of the air cavity layer 4, they form a fully enclosed Faraday shielding cavity, building a solid electromagnetic shielding barrier.

[0100] This embodiment achieves synergistic optimization of RF performance, power supply stability, heat dissipation efficiency, and electromagnetic shielding through thermally conductive aligned pad layout, hierarchical isolated power supply wiring, impedance-matched and unobstructed RF traces, and three-dimensional interlayer interconnection.

[0101] (4) Reference Figures 1 to 5 The fourth layer is an air cavity layer 4, with a thickness of 200μm. Air cavity layer 4 corresponds to the device area of ​​the chip mounting layer 3 and includes chip clearance air cavities (including clearance cavity 401 corresponding to the driver stage power amplifier, clearance cavity 402 corresponding to the final stage power amplifier, clearance cavity 403 corresponding to the first RF transmission line, and clearance cavity 404 corresponding to the second RF transmission line). These chip clearance air cavities are hollow structures that penetrate the air cavity layer 4, and their vertical projection completely covers the chip body and RF transmission line area of ​​the chip mounting layer 3, with an interlayer alignment deviation ≤ ±5μm. This chip clearance air cavity utilizes the low dielectric constant of air to form a dielectric isolation space between the RF transmission line 303 of the chip mounting layer 3 and the upper metal wiring of the intermediate wiring layer 5, reducing parasitic capacitance and parasitic coupling between the RF transmission line 303 and the upper metal wiring, and avoiding RF performance degradation such as impedance mismatch and increased signal loss. Meanwhile, in the air cavity layer 4, vertical through holes arranged in a closed ring are provided around the outer area of ​​the chip avoidance air cavity, forming a closed grounded TGV fence 405, which provides a structural basis for the subsequent formation of electromagnetic shielding boundary and the realization of electrical and thermal isolation between units.

[0102] (5) Reference Figures 1 to 6 The fifth layer is the intermediate wiring layer 5, with a thickness of 300μm, which is used to handle interlayer signal interconnection and enhance electromagnetic shielding. The intermediate wiring layer 5 is provided with radio frequency signal wiring 501, control signal wiring 502, upper ground metal plane 503, and lower ground metal plane 504.

[0103] 1) The RF signal routing 501 is arranged in the RF signal lead-out area 505 of the intermediate routing layer 5. It adopts a 50Ω impedance-matched stripline or coplanar waveguide structure, with straight routing and no sharp bends to reduce RF signal transmission loss. One end of the RF signal routing 501 is connected to the upper end of the RF coaxial TGV, and the lower end of the RF coaxial TGV is connected to the RF transmission line 303 of the chip mounting layer 3, realizing the vertical low-loss transmission of RF signals from the chip mounting layer 3 to the intermediate routing layer 5. The other end of the RF signal routing 501 extends to the edge of the intermediate routing layer 5 and is connected to the external RF interface pad to form a complete RF signal lead-out path.

[0104] 2) Control signal wiring 502 is arranged in the control and power supply area 506 of the intermediate wiring layer 5, using a hierarchical, independent, and parallel non-intersecting wiring method. Control signal wiring 502 and RF signal wiring 501 are laid out in separate areas, maintaining sufficient electrical isolation (the distance between the edge of control signal wiring 502 and the edge of RF signal wiring 501 is greater than or equal to 250μm) to avoid crosstalk between control signals and RF signals. Furthermore, one end of control signal wiring 502 is connected to the upper end of control signal TGV507 and power supply TGV508, the lower end of control signal TGV507 is connected to the control signal pad of chip mounting layer 3, and the lower end of power supply TGV508 is connected to the power supply line of chip mounting layer 3, achieving vertical transmission of power supply and control signals. The other end of control signal wiring 502 extends to the edge of the intermediate wiring layer 5 and connects to the external power supply interface and control interface pads, forming a complete power supply and control loop.

[0105] 3) The upper and lower grounded metal planes and the continuous grounded TGV that runs through each layer (chip mounting layer 3, air cavity layer 4 and intermediate wiring layer 5) are interconnected and work together with the closed grounded TGV fence 405 of air cavity layer 4 to form a fully enclosed, continuously closed three-dimensional Faraday shielding cavity, which realizes electromagnetic shielding of internal radio frequency devices and power supply circuits, and suppresses the coupling of external interference signals and the radiation of internal signals outward.

[0106] 4) The intermediate wiring layer 5 also integrates the radio frequency coaxial TGV and the control signal TGV507 to realize vertical signal interconnection between the layers. Both the radio frequency coaxial TGV and the control signal TGV507 are glass via structures that vertically penetrate the chip mounting layer 3, the air cavity layer 4 and the intermediate wiring layer 5. Both are arranged inside the shielded area enclosed by the closed grounded TGV fence 405 in the air cavity layer 4, and maintain a preset electrical isolation distance from the closed grounded TGV fence 405. The RF coaxial TGV is located at the signal output end of the RF transmission line. The lower end of the RF coaxial TGV is directly connected to the RF transmission line of the chip mounting layer 3, and the upper end extends upwards and is connected to the RF interface wiring of the intermediate wiring layer 5, enabling low-loss vertical transmission of RF signals. A ring-shaped grounding shield is provided around the central signal hole 509 of the RF coaxial TGV. This grounding shield is interconnected with the grounding TGV penetrating each layer, the closed grounding TGV enclosure 405 of the air cavity layer 4, and the upper and lower grounding metal planes of the intermediate wiring layer 5, forming a coaxial shielding structure to suppress electromagnetic interference during vertical transmission of RF signals. Furthermore, the control signal TGV 507 is located in the power supply wiring and control loop area. The lower end of the control signal TGV 507 is connected to the control signal pad or power supply wiring of the chip mounting layer 3, and the upper end extends upwards and is connected to the control signal interface wiring of the intermediate wiring layer 5, enabling vertical transmission of power and control signals. Sufficient isolation distance is maintained between the control signal TGV507 and the RF coaxial TGV and RF transmission line to avoid crosstalk between the control signal and the RF signal.

[0107] (6) Reference Figures 1 to 7 The sixth layer (top layer) is the top cover layer 6, with a thickness of 300μm, used to achieve top sealing protection for the entire package. The top cover layer 6 also has a top grounding metal layer 601. The top grounding metal layer 601 is interconnected with the lower grounding metal plane 504 of the intermediate wiring layer 5 and the closed grounding TGV fence 405, forming a fully enclosed three-dimensional grounding shielding system to achieve electromagnetic isolation between internal radio frequency devices and external interference, and suppress signal crosstalk and radiation leakage.

[0108] The six-layer glass substrate of the multilayer glass-based packaging substrate is integrated into a single package using a low-temperature plasma-assisted anodic bonding process. The bonding temperature is strictly controlled below 200°C to avoid thermal stress damage to the metallized structures (such as TGV copper fillers and wiring metal layers) caused by the high-temperature environment, ensuring structural stability. The interlayer alignment deviation of each glass substrate is controlled within ±5μm. The aforementioned six-layer glass substrate adopts a stacked layout to achieve functional layering and structural synergy. Within a limited packaging space, it simultaneously meets the requirements of RF interconnect reliability, efficient thermal management, and strict electromagnetic isolation, ultimately achieving high-density integration of high-power dual-band RF components.

[0109] 2. Dual-band radio frequency transceiver unit

[0110] refer to Figures 1 to 8 The dual-band RF transceiver unit adopts a common dual-band architecture, meaning it has the capability to operate in both the Sub-6GHz band (3.3GHz-3.8GHz) and the millimeter-wave band (24.75GHz-27.5GHz). The electrical performance parameters for a single high-power transmit channel are set as follows: rated output power of 10W in continuous wave mode, peak power of 50W in pulse wave mode, and a duty cycle of 10%.

[0111] The single-channel high-power transmit channel adopts a cascaded amplification architecture. The power drive amplifier 703 and the final stage power amplifier are sequentially mounted on the chip mounting pad along the unidirectional transmission direction of the radio frequency signal. The radio frequency output terminal of the power drive amplifier 703 is connected to the radio frequency input terminal of the final stage power amplifier through bonding wires or a 50Ω impedance-matched coplanar waveguide to achieve low-loss electrical connection. A thermal migration transition gap 212 with a width of 0.8mm~1.5mm is reserved between the two stages of amplifiers to avoid the superposition of high heat flux density areas and alleviate the problem of local heat concentration.

[0112] For each high-power transmit channel: multiple thermal cause-effect discrimination locking units are deployed in the area where the power drive amplifier 703 and the final stage power amplifier are located (the core heat-generating area). Furthermore, each high-power transmit channel is physically separated and electrically isolated from adjacent high-power transmit channels and adjacent RF receive links by a closed grounded TGV fence 405 that penetrates the multilayer glass substrate, achieving independent control of the thermal and electrical states of each channel and eliminating crosstalk between channels.

[0113] 3. Thermal Causality Determination and Locking Unit

[0114] refer to Figures 1 to 8 A sensing unit group is set in the thermal causality discrimination locking unit corresponding to each high-power transmission channel. The sensing unit group is the sensing starting point of the entire dual-band RF transceiver integrated component, providing input signals for thermal causality discrimination. The sensing unit group includes: a first temperature-sensitive TGV701, a second temperature-sensitive TGV702, and a high-precision current sampling resistor 705.

[0115] The first temperature-sensitive TGV701 is vertically positioned directly below the active area of ​​the power drive amplifier 703 (the core semiconductor functional area inside the power drive amplifier 703 chip that amplifies radio frequency signals and generates Joule heat, and is the main heat source area during device operation), at a vertical distance of no more than 200μm. This short heat conduction path enables precise in-situ temperature measurement of the heat-generating device. The first temperature-sensitive TGV701 penetrates the chip mounting layer 3 and the liquid cooling tank forming layer 2. Its upper end is tightly bonded to the back heat sink of the power drive amplifier 703 via a metal pad, ensuring efficient heat conduction. Its lower end extends to the top surface of the liquid cooling tank forming layer 2, separated from the cooling medium by a dense metal isolation layer, achieving both electrical insulation and thermal conduction.

[0116] The second temperature-sensitive TGV702 is vertically positioned directly below the active area of ​​the final stage driver amplifier 704, at a vertical distance of no more than 200μm. It achieves accurate in-situ temperature measurement of the heat-generating device through a short heat conduction path. Similarly, the second temperature-sensitive TGV penetrates the chip mounting layer 3 and the liquid cooling tank forming layer 2. Its upper end is tightly bonded to the back heat sink of the final stage driver amplifier 704 via metal pads, ensuring efficient heat conduction. Its lower end extends to the top surface of the liquid cooling tank layer, separated from the cooling medium by a dense metal isolation layer, achieving both electrical insulation and thermal conductivity.

[0117] To ensure temperature measurement accuracy, both the first temperature-sensitive TGV701 and the second temperature-sensitive TGV702 adopt a full-hole copper-filled structure, with a preferred aperture of 80μm~150μm and an aspect ratio of ≤10:1. The hole wall is first deposited with a TaN barrier layer of 200nm~500nm thickness by magnetron sputtering, followed by the deposition of a Ti / Cu seed layer, and finally full-hole copper filling is achieved by pulse electroplating, ensuring that the copper pillar density is >99%, with no pores or cracks. The barrier layer serves two purposes: firstly, it prevents copper ions from diffusing into the multilayer glass substrate, ensuring the long-term stability of the copper pillar resistance temperature coefficient; secondly, it ensures complete electrical insulation between the temperature-sensitive TGV and the grounding return network (used to provide a low-impedance return path for RF signals, control signals, and power supply signals) within the multilayer glass substrate, avoiding the impact of grounding common-mode interference on temperature measurement accuracy.

[0118] Furthermore, the temperature measurement principle of the first temperature-sensitive TGV701 and the second temperature-sensitive TGV702 is based on the temperature coefficient of resistance (TCR) characteristic of metallic copper. The TCR of copper is approximately 0.00393 / ℃ (reference temperature 20℃), and its resistance value changes linearly with the increase of temperature. By collecting the resistance value changes of the first temperature-sensitive TGV701 and the second temperature-sensitive TGV702, the real-time temperature of its location can be accurately calculated.

[0119] It should be further explained that, in order to eliminate the influence of lead resistance and contact resistance on measurement accuracy, this embodiment adopts a four-wire resistance measurement method to acquire the resistance of the first temperature-sensitive TGV701 and the second temperature-sensitive TGV702. A pair of independent current excitation electrodes and voltage measurement electrodes are set at the upper and lower ends of each temperature-sensitive TGV. During measurement, a high-precision constant current source applies a constant excitation current (preferably 1mA to avoid self-heating affecting temperature measurement accuracy) to the temperature-sensitive TGV through the current excitation electrodes. The controller acquires the voltage drop across the temperature-sensitive TGV through a high-input-impedance voltage measurement circuit. The real-time resistance value of the temperature-sensitive TGV is calculated according to Ohm's law R=U / I. Then, through a pre-calibrated resistance-temperature curve, the real-time temperature value T1 of the first temperature-sensitive TGV701 and the real-time temperature value T2 of the second temperature-sensitive TGV702 are obtained.

[0120] The high-precision current sampling resistor 705 is a low-temperature drift, high-precision milliohm-level resistor, with a preferred resistance value of 5mΩ~20mΩ and a temperature drift coefficient ≤±5ppm / ℃. The high-precision current sampling resistor 705 is connected in series only in the power circuit of the first power supply branch 304. Specifically, it is connected between the output terminal of the DC-DC converter in the first power supply branch 304 and the power supply pin of the power drive amplifier 703. It is used to collect the driving stage operating current in real time and combine it with the temperature-sensitive TGV measurement data to complete the thermal cause-and-effect discrimination, distinguish the root cause of heat generation, and provide a reliable basis for subsequent differentiated power reduction.

[0121] Meanwhile, the controller uses a high-precision differential amplifier circuit to collect the voltage difference across the high-precision current sampling resistor 705, converts it into the real-time power supply current I1 of the drive stage, and calculates the current change rate dI1 / dt, providing a joint criterion for thermal causality discrimination.

[0122] Based on the above explanations of the first temperature-sensitive TGV701, the second temperature-sensitive TGV702, and the high-precision current sampling resistor 705, the purpose of setting up the sensing unit group is to obtain highly timely and reliable in-situ thermal state information in the vicinity of hotspots within the dual-band RF transceiver integrated component. Simultaneously, it introduces drive-stage current sampling information (rather than relying solely on temperature information) to provide a joint criterion for distinguishing between "drive-stage overdrive-induced thermal migration" and "final stage self-overheating," thereby fundamentally improving the accuracy of thermal causality judgment. Furthermore, the temperature-sensitive TGV can promptly and accurately reflect local thermal changes in the vicinity of hotspots, with a temperature response time of no more than 100μs and a temperature measurement accuracy within ±0.3℃, without thermal delay or measurement error. By simultaneously acquiring temperature information (T1, T2, ΔT=T2-T1, d(ΔT) / dt) and electrical state variables (I1, dI1 / dt), the controller can obtain more complete thermal causality input information. Furthermore, the temperature-sensitive TGV is fabricated within a multilayer glass-based packaging substrate, eliminating the need for internal temperature measurement circuitry, reducing the area occupied by the active region of the chip, and not affecting the performance of the RF chip. It is fully compatible with existing glass-based TGV packaging processes and requires no additional processing steps.

[0123] 4. Directional gradient copper-filled thermal conductivity TGV

[0124] Continue to refer to Figures 1 to 8 The directional gradient copper-filled thermal conductive TGV is the core of the thermal guidance of the entire dual-band RF transceiver integrated component. It is used to receive the thermal migration trend identified by the sensing unit group, build a matching directional guidance path for the migrating heat flow, and prevent heat from passing through the low thermal conductivity glass layer.

[0125] The directional gradient copper-filled thermal conductive TGV is vertically positioned within the liquid cooling tank forming layer 2, directly below the power drive amplifier 703, the thermal migration transition gap region 212, and the final stage power amplifier. Its vertical projection completely covers the active areas of the power drive amplifier 703, the thermal migration transition gap region 212, and the final stage power amplifier, ensuring that the heat generated by the chip can directly enter the directional gradient copper-filled thermal conductive TGV8 without any additional heat diffusion path.

[0126] The directional gradient copper-filled heat conduction TGV comprises two functional zones: a "main heat exchange region 204" and a "drive-side traction heat conduction region 205." It achieves directional heat conduction through a gradient copper fill density. The main heat exchange region 204 is located directly below the active region of the final stage power amplifier, and its copper fill area duty cycle (the proportion of copper fill area to the total area of ​​this region) is preferably 70% to 85%. The directional gradient copper-filled thermal conductive TGV in the main heat exchange region 204 is uniformly arranged in an array, with a preferred aperture of 50μm~200μm and a preferred aperture spacing of 1.53 times the aperture to ensure the minimum vertical thermal resistance in this region. The drive-side traction thermal conductive region 205 extends from the main heat exchange region 204 toward the power drive amplifier 703, covering the thermal migration transition gap region 212 and directly below the active region of the power drive amplifier 703. The copper-filled area duty cycle decreases linearly from 60% near the main heat exchange region 204 toward the power drive amplifier 703 to 25%~30%, forming a thermal resistance gradient that gradually decreases along the RF power transfer direction. A dominant thermal direction axis is formed by gradient-guided directional heat conduction, which is completely aligned with the direction of RF power transfer. The thermal resistance along this dominant thermal direction axis gradually decreases from the power drive amplifier 703 side to the final stage power amplifier side. Based on the basic principle that heat flow spontaneously travels along a low thermal resistance path, the heat flow migrating along this dominant thermal direction axis will be preferentially drawn to the main heat exchange region 204. Then, through directional gradient copper-filled heat conduction TGV, it is vertically transferred downwards to the dual-acting micro-jet liquid cooling structure below, realizing the directional conduction of heat flow and avoiding overheating caused by heat flow accumulation in the drive stage. This significantly improves the efficiency of removing dynamically migrating heat flow. At the same time, it works in conjunction with the dual-acting micro-jet liquid cooling structure below, so that the directionally discharged heat flow can be quickly carried away in the corresponding area, achieving synergistic optimization of heat conduction and heat dissipation.

[0127] To further shorten the heat transfer path, the upper end of the directional gradient copper-filled thermal conductive TGV extends to the chip mounting layer 3, and is directly bonded to the back heat sink of the power drive amplifier 703 and the final stage power amplifier through metal pads. The lower end of the directional gradient copper-filled thermal conductive TGV extends directly to the top surface of the liquid cooling jet cavity, separated from the cooling medium by only a 2μm~5μm nickel-gold plated protective layer. The heat generated by the chip can be directly transferred to the cooling medium through the directional gradient copper-filled thermal conductive TGV without having to pass through the low thermal conductivity glass layer, thereby eliminating the thermal bottleneck of the glass layer.

[0128] 5. Dual-actuator micro-jet liquid-cooled structure

[0129] Continue to refer to Figures 1 to 8 The dual-actuator micro-jet liquid cooling structure is the core of the cooling system for the entire dual-band RF transceiver integrated assembly. It is used to receive the heat flow directionally guided by the directional gradient copper-filled heat conduction TGV. At the same time, based on the thermal causality judgment result of the controller, it realizes the dynamic allocation of cooling resources and puts the cooling resources into the areas where heat exchange needs to be enhanced.

[0130] The dual-acting micro-jet liquid cooling structure is positioned within the liquid cooling tank forming layer 2, perpendicular to the directional gradient copper-filled heat-conducting TGV. The dual-acting micro-jet liquid cooling structure includes: a main jet impact chamber 201, an offset auxiliary jet chamber 202, a first liquid inlet branch 206, a second liquid inlet branch 207, an adjustable micro-throttle valve 208, and a common manifold 203. The vertical projection of the main jet impact cavity 201 completely coincides with the main heat exchange region 204 of the directional gradient copper-filled thermal conductive TGV, corresponding to the main hot spot region of the final stage power amplifier. The top surface of the main jet impact cavity 201 is the lower end surface of the directional gradient copper-filled thermal conductive TGV. Micro-jet holes arranged in an equilateral triangular array are provided on the bottom plate of the main jet impact cavity 201. The aperture of the micro-jet holes is preferably 80μm~120μm, the spacing between the holes is preferably 2~5 times the aperture, and the jetting distance from the outlet of the micro-jet holes to the top surface of the main jet impact cavity 201 is preferably 1~3 times the aperture. The offset auxiliary jet cavity 202... The vertical projection covers the heat migration transition gap region 212. The central axis of the vertical projection of the biased auxiliary jet cavity 202 is offset towards the power drive amplifier 703 side relative to the geometric central axis of the heat migration transition gap region 212. The offset distance is 30% to 50% of the width of the gap region, so that it is closer to the heat flow path migrating from the power drive amplifier 703 side to the final stage power amplifier side, thereby achieving early interception and cooling of the migrating heat flow. The bottom plate of the biased auxiliary jet cavity 202 is provided with a linear array of micro-jet holes arranged along the dominant heat direction axis. The hole diameter is preferably 60μm to 100μm, and the hole spacing is preferably 24 times the hole diameter.

[0131] To achieve independent flow regulation between the main injection impact chamber 201 and the offset auxiliary injection chamber 202, the inlet end of the first inlet branch 206 is connected to the main inlet pipe of the external liquid cooling interface, and the outlet end of the first inlet branch 206 is connected to the main injection impact chamber 201, supplying cooling medium to the main injection impact chamber 201 through the first inlet branch 206. The inlet end of the second inlet branch 207 is connected to the main inlet pipe of the external liquid cooling interface, and the outlet end of the second inlet branch 207 is connected to the offset auxiliary injection chamber 202. The second inlet branch 207 is completely independent of the first inlet branch 206, with no fluid coupling. Adjustable micro-throttle valves 208 are respectively installed on the first inlet branch 206 and the second inlet branch 207. The adjustable micro-throttle valve 208 can be a piezoelectric-driven MEMS micro-valve with a response time ≤500μs and a flow rate adjustment range of 0~100%. The controller adjusts the opening ratio of the two micro-valves to achieve dynamic flow distribution of the cooling medium between the main injection impact chamber 201 and the biased auxiliary injection chamber 202. Under normal operating conditions, the temperatures on both the power drive amplifier 703 side and the final stage power amplifier side are within the rated operating temperature range, and the thermal gradient is stable. The main injection impact chamber 201 mainly undertakes the cooling task, with the preferred proportion of cooling medium flow rate in the main injection impact chamber 201 being 70%~80%, and the proportion of cooling medium flow rate in the biased auxiliary injection chamber 202 being 20%~30%. Maintain basic cooling; when the drive stage overdrive heat migration mode is determined, prioritize increasing the cooling medium flow rate of the bias auxiliary injection chamber 202 to 50%~70% to strengthen the interception cooling of the heat migration transition zone and suppress the heat flow to the final stage power amplifier side in advance; when the final stage self-overheating mode is determined, prioritize increasing the cooling medium flow rate of the main injection impact chamber 201 to more than 90% to strengthen the cooling of the main hot spot area and quickly reduce the final stage junction temperature; when the entire link overload mode is determined, simultaneously open the adjustable micro-throttle valve 208 of the first liquid inlet branch 206 and the second liquid inlet branch 207 to increase the total flow rate of the dual injection zone to the rated maximum value and achieve full-area enhanced cooling.

[0132] A common manifold 203 is located at the fluid end of the main jet impact chamber 201 and the biased auxiliary jet chamber 202. The inlet of the common manifold 203 is connected to the outlet 107 of both the main jet impact chamber 201 and the biased auxiliary jet chamber 202, and the outlet of the common manifold 203 is connected to the main outlet pipe of the external liquid cooling interface, thereby uniformly discharging the cooled medium after heat exchange. The cooling medium is preferably a fluid with insulating properties, corrosion resistance, and high specific heat capacity, such as deionized water, electronic fluorinated liquid, and ethylene glycol aqueous solution, to meet the requirements of semiconductor packaging. Furthermore, the rated operating pressure of the cooling medium flowing inside the liquid cooling tank layer does not exceed 0.5 MPa to avoid deformation or leakage of the packaging cavity due to high pressure.

[0133] The aforementioned dual-action micro-jet liquid cooling structure prioritizes the allocation of cooling resources to areas that truly require enhanced heat transfer based on the location and migration trend of hotspots. This enables dynamic switching between enhanced cooling of the main hotspot and interception cooling of the migration transition zone, adapting to the characteristics of dynamic hotspot migration. Furthermore, the embedded integrated design precisely aligns the cooling structure with the directional gradient copper-filled TGV thermal core and the chip's heat-generating area, forming the shortest heat conduction path. Simultaneously, the independent control of each channel does not affect the cooling status of other channels, making it suitable for multi-channel array integration.

[0134] 6. Hierarchical independent power supply branches

[0135] Continue to refer to Figures 1 to 8 The thermal cause-effect discrimination locking unit is also equipped with a hierarchical independent power supply branch and a closed-circuit grounded TGV fence 405. The hierarchical independent power supply branch is used to provide the hardware execution basis for differentiated backoff, and the closed-circuit grounded TGV fence 405 is used to provide boundary constraints for single-channel independent control.

[0136] (1) Hierarchical independent power supply branches

[0137] The hierarchical independent power supply branches include: a first power supply branch 304 and a second power supply branch 305. The first power supply branch 304 is used to independently power the power drive amplifier 703, and the second power supply branch 305 is used to independently power the final stage power amplifier.

[0138] The first power supply branch 304 and the second power supply branch 305 are each independently supplied with power from an external power supply interface. They employ independent power supply wiring, with no intersections or overlaps, and both wiring areas are located within a closed grounded TGV enclosure 405. The spacing between wiring areas is no less than 200μm to avoid parasitic coupling between wiring. Furthermore, the first power supply branch 304 and the second power supply branch 305 are each equipped with independent grounding loops, connected to the main grounding plane of the package via independent grounded TGV, preventing current fluctuations in one branch from affecting the power supply stability of the other.

[0139] Furthermore, the first power supply branch 304 and the second power supply branch 305 are respectively equipped with independent DC-DC conversion circuits, PWM control modules, overcurrent protection circuits and linear voltage regulator circuits, which can independently adjust the output voltage, current, modulation depth and duty cycle to achieve independent power control and backoff.

[0140] Furthermore, the first power supply branch 304 and the second power supply branch 305 are each equipped with an independent decoupling capacitor array. The decoupling capacitor array consists of large-capacity low-frequency decoupling capacitors and high-frequency decoupling capacitors. The large-capacity low-frequency decoupling capacitors can be 10μF tantalum capacitors, used for low-frequency power supply noise suppression and energy buffering. The high-frequency decoupling capacitors include 100nF and 1nF multilayer ceramic capacitors, used for high-frequency noise filtering and fast charge / discharge compensation, achieving wideband, full-frequency power supply decoupling. The decoupling capacitors are mounted on pads close to the corresponding power amplifier power supply pins, and along the power supply line direction, the decoupling capacitors are arranged in descending order of capacitance—smaller-value (high-frequency) multilayer ceramic capacitors are preferentially mounted on pads close to the power amplifier power supply pins, while larger-value (low-frequency) tantalum capacitors are mounted on pads farther from the power amplifier power supply pins, forming a hierarchical wideband decoupling structure from high to low frequency, used to suppress low-frequency and high-frequency power supply noise and ensure amplifier operating stability. It should be noted that each power supply branch's decoupling capacitor array should include at least one 10μF tantalum capacitor, at least one 100nF multilayer ceramic capacitor, and at least one 1nF multilayer ceramic capacitor.

[0141] Based on the aforementioned decoupling capacitor array, the first power supply branch 304 and the second power supply branch 305 can achieve power regulation using any of the following three power back-off methods: Method 1: Power back-off is achieved by gradually reducing the drain supply voltage, with a preferred voltage adjustment step size of 0.5V / step; Method 2: Power back-off is achieved by reducing the duty cycle of the supply pulse, with a duty cycle adjustment range of 10% to 100%; Method 3: Power back-off is achieved by adjusting the gate bias voltage, which allows for linear gain adjustment. The above three power back-off methods can be flexibly selected according to the actual application scenario.

[0142] The purpose of this embodiment in setting up a hierarchical independent power supply branch structure is to provide a hardware foundation for differentiated power back-off, enabling the driver-stage power amplifier and the final-stage power amplifier to be powered and controlled independently. Based on the real-time temperature measurement and overheating discrimination results output by the thermal cause-effect discrimination unit, the controller can selectively choose the amplifier stage to prioritize power back-off, eliminating the need for uniform derating of the entire power amplification chain. This avoids false protection issues caused by overall derating and improves the operational reliability and dynamic response capability of the power amplification system.

[0143] 7. Closed grounded TGV fence 405

[0144] Continue to refer to Figures 1 to 8A closed-loop grounding TGV fence 405 is disposed on the outer periphery of the thermal cause-effect discrimination locking unit, forming a closed rectangular ring boundary. The closed-loop grounding TGV fence 405 vertically penetrates all six layers of the multilayer glass substrate. The upper end of the closed-loop grounding TGV fence 405 is electrically connected to the top grounding metal layer 601 of the multilayer glass substrate, and the lower end of the closed-loop grounding TGV fence 405 is electrically connected to the bottom grounding metal layer of the multilayer glass substrate, forming a complete closed grounding structure.

[0145] The closed grounded TGV enclosure 405 is composed of at least two rows of grounded TGVs arranged in an alternating pattern. The aperture of the grounded TGVs is preferably 50μm~150μm, and the center-to-center distance between adjacent grounded TGVs is ≤1 / 20 of the wavelength in free space corresponding to the highest operating frequency of the entire dual-band RF transceiver integrated component, to ensure good electromagnetic shielding and grounding return effect. For example, when the highest operating frequency of the dual-band RF transceiver integrated component is 28GHz, the free space wavelength is approximately 10.7mm, and the center-to-center distance between adjacent grounded TGVs is ≤0.53mm, thus ensuring that the enclosure effectively shields the electromagnetic signal at the highest operating frequency and prevents electromagnetic waves from leaking through gaps. Simultaneously, the horizontal distance between the closed grounded TGV enclosure 405 and the first temperature-sensitive TGV 701 and the second temperature-sensitive TGV 702 is >500μm, preventing electromagnetic interference from the grounded enclosure from affecting the temperature measurement accuracy of the temperature-sensitive TGVs.

[0146] The closed-circuit grounded TGV fence 405 confines the sensing unit group, the directional gradient copper-filled thermally conductive TGV8, the dual-actuator micro-spray liquid cooling structure, and the hierarchical independent power supply branches within the same local functional boundary. All local thermal sampling, liquid cooling adjustment, and power supply backoff actions are restricted within the functional boundary defined by the closed-circuit grounded TGV fence 405, realizing independent control of a single channel.

[0147] By setting up a closed-circuit grounded TGV fence 405, the following technical effects can be achieved: In terms of electromagnetic isolation, the closed-circuit grounded TGV fence 405, together with the upper and lower grounded metal layers, forms a closed Faraday cage structure, which can suppress the outward radiation of high-power transmitted signals within the closed-circuit grounded TGV fence 405, avoiding crosstalk to adjacent receiving channels and RF sensitive circuits, while also suppressing external electromagnetic interference from entering the closed-circuit grounded TGV fence 405; In terms of functional boundaries, the closed-circuit grounded TGV fence 405 defines the functional range of each thermal cause-effect discrimination locking unit, realizing single-pass... The independent control of each channel suppresses thermal and electrical crosstalk between channels, ensuring that a single channel malfunction does not affect the normal operation of other channels. In terms of interference resistance, the closed-circuit grounded TGV fence 405 forms a complete grounded shielding cavity, effectively suppressing the impact of external electromagnetic interference on the temperature-sensitive TGV temperature measurement circuit and current sampling circuit, improving the signal-to-noise ratio of the thermal sampling signal, and ensuring temperature measurement accuracy and discrimination accuracy. Simultaneously, structural reuse significantly saves internal wiring space, improves package integration, and resolves the space conflict between traditional shielding structures and thermal management and thermal sampling structures.

[0148] 8. Controller's thermal cause-effect discrimination and differentiated backoff logic

[0149] Continue to refer to Figures 1 to 8 The controller is used to perform thermal causality discrimination and differentiated backoff control. Specifically, the controller adopts a field-programmable gate array (FPGA) or a microcontroller unit (MCU), with a sampling frequency of not less than 20kHz; all discrimination thresholds, time windows, and hysteresis parameters can be adjusted through calibration to adapt to different application scenarios.

[0150] The following provides a complete and detailed explanation of the criteria, execution logic, and technical objectives for the four core working modes:

[0151] (1) Thermal migration mode caused by overdrive at the drive stage

[0152] The criteria for determining thermal migration caused by driver stage overdrive include conditions 1.1 to 1.3. Only when conditions 1.1 to 1.3 are met simultaneously is it determined to be a thermal migration mode caused by driver stage overdrive. Condition 1.1 is used to identify whether there is significant overdrive in the driver stage, specifically: the driver stage current change rate dI1 / dt exceeds a preset current change rate threshold (preferably 0.5A / ms), and the duration exceeds a preset first time window (the window duration is preferably 50μs~200μs). Condition 1.2 is used to identify, by comparing the real-time temperature measurement data of the first temperature-sensitive TGV701 and the second temperature-sensitive TGV702, that the temperature rise trend on the driver stage side is approaching the final stage power amplifier side, and the hot spot gradually migrates from the driver stage side to the final stage side. Specifically: the real-time temperature value T1 of the first temperature-sensitive TGV701 rises synchronously and continuously, and... The difference between the real-time temperature value T2 of the second temperature-sensitive TGV702 and the real-time temperature value T1 of the first temperature-sensitive TGV701, ΔT = T2 - T1, continuously decreases, or the rate of change of ΔT, d(ΔT) / dt, is negative and lasts for more than the first time window. This is used to identify that the temperature rise on the drive side is approaching the final stage side and the hot spot is migrating from the drive side to the final stage. Condition 1.3 is used to confirm in real time that the final stage power amplifier has not entered the saturation working state, and to rule out the possibility that the final stage power amplifier is overheating due to its own abnormal operation. This provides a reliable basis for the system overheat protection and working status judgment. Specifically, the gain compression of the final stage power amplifier is <1dB.

[0153] When conditions 1.1 to 1.3 above are met simultaneously, the controller determines that the thermal migration mode is caused by overdrive in the drive stage and performs the following actions in sequence: In terms of cooling control, the adjustable micro-throttle valve 208 of the second liquid inlet branch 207 is adjusted first to increase the proportion of cooling medium flow in the bias auxiliary injection chamber 202 from 20%–30% under normal operating conditions to 50%–70%, thereby strengthening the interception cooling of the thermal migration transition zone and suppressing the diffusion of heat flow to the final stage power amplifier in advance. In terms of power supply rollback, the PWM control module of the first power supply branch 304 is adjusted first to gradually reduce the modulation depth, duty cycle, or drain voltage of the drive stage, for example, from 100% of the rated value to 80%, to reduce the output power of the drive stage and suppress heat flow generation at the source. Simultaneously, the temperature difference ΔT and its rate of change d(ΔT) / dt are monitored in real time; if the thermal gradient continues to increase, the rollback amplitude of the drive stage is further increased, with each rollback amplitude not exceeding 5% of the rated value, to avoid large fluctuations in output power. During the adjustment process, rigid current limiting will not be immediately applied to the second power supply branch 305 corresponding to the final stage power amplifier to avoid unnecessary output power loss.

[0154] Conditions 1.1 to 1.3 identify the condition where "the heat source mainly comes from the driver stage and is moving towards the final stage." This allows for simultaneous suppression of heat diffusion at both the heat source and migration path levels, intervening before the final stage forms its strongest hotspot to reduce the risk of the final stage passively experiencing thermal shock. The control logic under the thermal migration mode caused by driver stage overdrive enables early prediction and intervention of thermal migration, preventing overheating of the final stage caused by driver stage overdrive. Simultaneously, during the protection process, only the driver stage is rolled back, while the final stage maintains normal operating conditions, maximizing the preservation of RF output capability.

[0155] (2) Final stage self-overheating mode

[0156] The criteria for determining the final stage self-overheating include conditions 2.1 to 2.3. Only when conditions 2.1 to 2.3 are met simultaneously is it determined to be a final stage self-overheating mode. Condition 2.1 is used to confirm that the driver stage is operating stably without significant overdrive. Specifically, the driver stage current change rate dI1 / dt is lower than a preset stability threshold (preferably 0.1 A / ms), and the duration exceeds a preset second time window (the window duration is preferably 100 μs to 300 μs). Condition 2.2 is used to identify the trend of heat concentration on the final stage power amplifier side and no hotspot migration back to the driver side by comparing the real-time temperature measurement data of the first temperature-sensitive TGV701 and the second temperature-sensitive TGV702. Specifically, the real-time temperature value T2 of the second temperature-sensitive TGV702 continuously increases... The temperature rises, and the difference between the real-time temperature value T2 of the second temperature-sensitive TGV702 and the real-time temperature value T1 of the first temperature-sensitive TGV701, ΔT=T2-T1, continues to increase, or the rate of change of ΔT, d(ΔT) / dt, is positive and lasts for more than the second time window. This condition is used to identify that the heat is concentrated on the final stage side and the hot spot does not migrate to the driving side. Condition 2.3 is used to confirm that the final stage power amplifier has entered the saturation working state and to determine that the final stage itself is the core source of overheating. Specifically, the gain compression of the final stage power amplifier exceeds 3dB, and the output power no longer increases with the increase of the driving power.

[0157] When conditions 2.1 to 2.3 above are met simultaneously, the controller determines that the final stage is in an overheating mode and performs actions in the following order: Regarding cooling control, the adjustable micro-throttle valve 208 of the first liquid inlet branch 206 is adjusted first to increase the proportion of cooling medium flow in the main jet impact chamber 201 from 70%–80% under normal operating conditions to over 90%, thereby implementing extreme enhanced cooling for the main hot spot of the final stage and rapidly reducing the junction temperature of the final stage. Regarding power supply rollback, the PWM control module of the second power supply branch 305 is adjusted first to implement current limiting or power rollback for the final stage branch, for example, gradually reducing the final stage power supply current from the rated value to 70%, directly reducing the thermal load of the final stage; the first power supply branch 304 corresponding to the drive stage only undergoes minor auxiliary adjustments, such as reducing the gain by 5%–10%, to avoid further overdrive and exacerbating final stage saturation, and no large rollback is performed. Meanwhile, the final stage temperature and gain changes are monitored in real time; if the temperature continues to exceed the limit, the backoff of the final stage is further increased, with each backoff step not exceeding 5% of the rated value, to avoid large fluctuations in output power.

[0158] Conditions 2.1 to 2.3 identify the condition where "the input to the driver side is basically stable, but the local heat load of the final stage continues to rise." This allows for precise application of protection and control to the final stage itself, fundamentally solving the problem of "incorrect protection target selection" in traditional protection logic. By using control logic under the final stage's own overheating mode, the erroneous action of "backing down the driver stage first when the final stage is clearly overheating" common in traditional unified derating control can be avoided. This ensures that cooling and power supply back-off are applied more accurately to the actual overheated area, improving cooling efficiency. Simultaneously, it maximizes the maintenance of the driver stage's operating state, guaranteeing the gain stability and output continuity of the RF link.

[0159] (3) End-to-end overload mode

[0160] The criteria for determining full-link overload include conditions 3.1 to 3.3. Only when conditions 3.1 to 3.3 are met simultaneously is the entire link considered to be in overload mode. Condition 3.1 is used to identify synchronous overheating trends in both the driver stage and the final stage power amplifier. Specifically, the real-time temperature values ​​T1 and T2 of the first and second temperature-sensitive TGVs are respectively higher than the corresponding preset synchronous temperature rise thresholds (preferably 85℃), and the duration exceeds a preset third time window (preferably 200μs~500μs). Condition 3.2 is used to identify that the entire transmission link is in a synchronous heating state, without obvious single-point local overheating or directional heat migration trends. Specifically, the difference between the temperature rise rates of T1 and T2 is within a preset synchronous tolerance range (preferably not exceeding 20%), and there is no obvious thermal gradient direction, confirming synchronous heating of the entire link. Condition 3.3 is used to confirm that the entire transmission link is in an overloaded operating state. Specifically, the total supply current of the entire transmission link exceeds 120% of the rated current.

[0161] When conditions 3.1 to 3.3 above are met simultaneously, the controller determines that the entire link is in overload mode and executes actions in the following order: Regarding cooling control, the adjustable micro-throttle valves 208 of the first liquid inlet branch 206 and the second liquid inlet branch 207 are simultaneously opened to increase the total flow rate of the cooling medium in the dual-jet zone to the rated maximum value, achieving synchronous enhanced cooling across the entire area. Regarding power supply rollback, the output power of the first power supply branch 304 and the second power supply branch 305 is simultaneously reduced, adopting a gradual rollback strategy of "reducing the output of the preceding stage first, then the subsequent stage." The output amplitude of the drive stage is reduced by 10% to 15% first, and then the power supply amplitude of the final stage is reduced simultaneously to avoid signal distortion caused by sudden power changes. At the same time, the overall temperature and output power are monitored in real time; if the temperature continues to exceed the limit, the rollback amplitude is further increased while ensuring the stability of the basic working state of the link.

[0162] Conditions 3.1 to 3.3 identify the condition of "excessive synchronous thermal load across the entire transmit link," enabling the system to switch from localized differentiated control to full-link collaborative protection, avoiding control lag or insufficient response caused by using localized protection modes. Through the control logic in full-link overload mode, the system's heat generation can be rapidly reduced when the overall thermal load is abnormal, preventing devices from operating in over-temperature conditions for extended periods. Simultaneously, a gradual back-off strategy ensures the accuracy and stability of the RF beam pointing, adapting to the application requirements of phased array systems.

[0163] (4) Recovery Mode

[0164] The criteria for determining the recovery mode are: the real-time temperature value T1 of the first temperature-sensitive TGV, the real-time temperature value T2 of the second temperature-sensitive TGV, and the temperature difference ΔT all fall back to the preset recovery threshold range (preferably T1 and T2 are both below 75℃), and the duration exceeds the preset hysteresis time window (the window duration is preferably 300μs~1ms), and there is no tendency to trigger overheating again.

[0165] When the above-mentioned criteria are met, the controller enters recovery mode and gradually and smoothly restores the system's operating state according to preset hysteresis rules. The recovery sequence is the reverse of the rollback sequence. For cooling recovery, the flow distribution ratio between the main injection impact chamber 201 and the offset auxiliary injection chamber 202 is first gradually adjusted to restore it to the preset value under normal operating conditions. Each adjustment step does not exceed 10%, and the interval between each step is not less than 100μs. For power supply recovery, the output power of the final stage second power supply branch 305 is gradually restored to its rated value. Each recovery step does not exceed 5%, and the interval between each step is not less than 200μs. Finally, the output power of the drive stage first power supply branch 304 is gradually restored to its rated value. Each recovery step does not exceed 5%, and the interval between each step is not less than 200μs. During the recovery process, the changes in T1, T2, and ΔT are monitored in real time. If a rapid temperature rise occurs again, the recovery process is immediately paused and the system re-enters the corresponding protection mode to avoid frequent oscillations in protection actions.

[0166] By using recovery mode discrimination and control logic, thermal fluctuations and protection oscillations can be avoided again after the overheating state is resolved by immediately resuming full power or default flow allocation, thus forming a complete thermo-electric-fluid coordinated closed-loop control. This smooth recovery strategy ensures that the control system smoothly returns from the protection state to the normal operating state, reducing repeated thermal shocks to devices and effectively improving the long-term reliability of devices and the overall stability of the system.

[0167] For example:

[0168] Taking a single high-power transmit channel as an example, this paper fully describes the workflow of the directional liquid-cooled, graded back-off dual-band RF transceiver integrated component under all operating conditions (divided into three stages: normal operation, abnormal mode triggering and control, and fault recovery), as follows:

[0169] In the initial normal operating state, the RF signal is pre-amplified by the gain driver stage and then input to the power driver amplifier 703 for pre-amplification. This prevents the amplified RF signal from being input to the final power amplifier stage for high-power amplification and output. The dual-band RF transceiver integrated component operates under stable conditions with a continuous wave rated output power of 10W. The controller continuously collects the real-time current I1 of the driver stage, the real-time temperature T1 of the first temperature-sensitive TGV701, and the real-time temperature T2 of the second temperature-sensitive TGV702 at a sampling frequency of 20kHz, and simultaneously calculates the temperature difference ΔT=T2-T1, the current change rate dI1 / dt, and the temperature difference change rate d(ΔT) / dt. Assuming that under this operating condition, the drive-side temperature T1 is stable at 55℃, the final stage temperature T2 is stable at 65℃, ΔT is maintained constant at 10℃, and the current change rate dI1 / dt is lower than the preset stable threshold; the controller maintains a basic cooling flow ratio of 80% for the main injection impact chamber and 20% for the bias auxiliary injection chamber, and both the first power supply branch 304 and the second power supply branch 305 are operating at rated output. The system continues to work stably, while monitoring various parameters in real time (including the real-time current I1 of the drive stage, the real-time temperature T1 of the first temperature-sensitive TGV, the real-time temperature T2 of the second temperature-sensitive TGV, the temperature difference ΔT=T2-T1, the current change rate dI1 / dt, the temperature difference change rate d(ΔT) / dt, the gain compression of the final stage power amplifier, and the total power supply current of the transmit link) to prepare data for subsequent anomaly detection.

[0170] When the system operating conditions change abruptly, the thermal migration mode caused by overdrive in the driver stage may be triggered first. For example, when the input signal power suddenly increases by 3dB, the driver stage experiences an overdrive anomaly, and the current change rate dI1 / dt rises to 1A / ms, exceeding the preset current change rate threshold, and lasts for more than 100μs. At the same time, the temperature T1 of the first temperature sensor TGV701 rises at a rate of 200℃ / ms, the temperature difference ΔT continuously decreases from 10℃ to 2℃, the temperature difference change rate d(ΔT) / dt becomes negative, and the gain compression of the final stage power amplifier is less than 1dB, satisfying all the discrimination conditions for the thermal migration mode caused by overdrive in the driver stage. Based on this, the controller determines that the thermal migration mode caused by overdrive in the drive stage has been entered and performs directional control actions. It prioritizes adjusting the adjustable micro-throttle valve 208 of the second liquid inlet branch 207 to increase the proportion of cooling medium flow in the bias auxiliary injection chamber 202 to 60%, thereby strengthening the interception cooling of the thermal migration transition zone and blocking the heat flow from spreading to the final stage. Simultaneously, it reduces the duty cycle of the PWM control module of the first power supply branch 304 to 80% in a stepwise manner, reducing the output power of the drive stage and suppressing heat flow generation at the source. The parameters of the second power supply branch 305 in the final stage are not adjusted for the time being. After 1ms of adjustment, the temperature rise rate on the drive side drops to zero, and the temperature difference ΔT gradually returns to the normal range. The controller determines that the overheating trend has been resolved and then switches to recovery mode.

[0171] If the system experiences an abnormal load matching in the final stage, the controller will trigger the final stage self-overheating mode. For example, when the final stage load matching is abnormal and the VSWR rises to 2.5:1, the final stage power amplifier enters a deep saturation operating state. At this time, the rate of change of the drive stage current dI1 / dt is lower than the stable threshold of 0.1A / ms, and the drive stage operates stably without overdrive. However, the temperature T2 of the second temperature sensor TGV702 rises rapidly to 120℃, the temperature difference ΔT increases to 30℃, the rate of change of the temperature difference d(ΔT) / dt is positive and lasts for more than 200μs, and the gain compression of the final stage power amplifier exceeds 4dB, satisfying all the discrimination conditions for the final stage self-overheating mode. Based on this, the controller determines that it has entered the final stage self-overheating mode and executes targeted control actions. It prioritizes adjusting the adjustable micro-throttle valve 208 of the first liquid inlet branch 206, increasing the proportion of cooling medium flow in the main jet impact chamber 201 to 95%, implementing extreme enhanced cooling for the main hot spot of the final stage, and rapidly reducing the final stage junction temperature. Simultaneously, it adjusts the second power supply branch 305 and the PWM control module to implement current limiting, reducing the final stage power supply current to 70% of the rated value, directly reducing the core heat load of the final stage. The first power supply branch 304 of the drive stage only slightly reduces its gain by 5% to avoid exacerbating the final stage saturation. After 2ms of adjustment, the final stage temperature drops below 85℃, the gain returns to the normal range, the controller determines that the overheating trend has been resolved, and simultaneously switches to recovery mode.

[0172] When the system enters full-power heavy-load operation, it will trigger the full-link overload mode. For example, when the system enters full-power transmission mode, the duty cycle increases from 10% to 50%, and the thermal load of the entire transmission link increases synchronously. At this time, the temperature T1 of the first temperature sensor TGV701 and the temperature T2 of the second temperature sensor TGV702 rise to 90°C, both exceeding the preset synchronous temperature rise threshold of 85°C, and the difference in their temperature rise rates does not exceed 15%, which is within the preset synchronous tolerance range. The total power supply current of the entire transmission link exceeds 130% of the rated value, satisfying all the discrimination conditions of the full-link overload mode. Based on this, the controller determines that it has entered the full-link overload mode and executes coordinated control actions. It simultaneously opens the adjustable micro-throttle valves 208 of the first liquid inlet branch 206 and the second liquid inlet branch 207, increasing the total flow rate of the cooling medium in the dual-jet chambers to the rated maximum value of 100mL / min, achieving synchronous enhanced cooling across the entire area. It adopts a step-by-step retreat strategy of "reducing the output amplitude of the front stage first, and then reducing the output amplitude of the rear stage," prioritizing a 15% reduction in the output amplitude of the drive stage, and then simultaneously reducing the power supply amplitude of the final stage by 10%, quickly reducing the overall heat generation. After 5ms of adjustment, both T1 and T2 have dropped below 75℃, and the controller determines that the overheating trend has been resolved, immediately switching to recovery mode.

[0173] Once the aforementioned abnormal thermal conditions are resolved and the parameters return to a safe range, the system enters recovery mode to perform a smooth recovery operation. For example, when the temperatures T1 of the first temperature-sensitive TGV701, T2 of the second temperature-sensitive TGV702, and the temperature difference ΔT all fall back to the preset recovery threshold range, and the duration exceeds a hysteresis time window of 500μs without any tendency to trigger abnormal thermal conditions again, the controller officially enters recovery mode and smoothly restores the system's operating state step by step, following the reverse of the rollback sequence. First, the flow distribution ratio of the dual injection chambers is gradually adjusted to restore the standard ratio of 80%:20% under normal operating conditions, with each adjustment not exceeding 10% and each step interval not less than 100μs; second, the output power of the final stage second power supply branch 305 is gradually restored to the rated value, with each restoration not exceeding 5% and each step interval not less than 200μs; finally, the output power of the drive stage first power supply branch 304 is gradually restored to the rated value. Throughout the recovery process, the controller continuously monitors the changes in T1, T2, and ΔT in real time. If the temperature shows a rapid upward trend again, the recovery process is immediately paused and the corresponding thermal protection mode is switched back to prevent frequent oscillations in protection actions.

[0174] Thus, the directional liquid-cooled-graded backoff dual-band RF transceiver integrated component completes a full cycle of thermal causality discrimination, directional control, and smooth recovery, achieving accurate identification of dynamic hotspots, directional heat flow guidance, precise allocation of cooling resources, and differentiated power supply protection.

[0175] In summary, this embodiment provides a directional liquid-cooled, graded power back-off dual-band RF transceiver integrated component. It achieves device integration and directional heat conduction using a multi-layer glass-based packaging substrate. A thermoelectric joint monitoring system is constructed through an in-situ deployed temperature-sensitive TGV and a high-precision current sampling resistor 705. Combined with graded discrimination logic, it accurately distinguishes three types of thermal anomalies: driver stage overdrive thermal migration, final stage self-overheating, and full-link overload. It is further equipped with differentiated directional liquid cooling control and graded power back-off strategies. After the anomaly is resolved, a reverse-sequence smooth recovery mechanism prevents protection oscillations. This structure overcomes the thermal conductivity bottleneck of traditional glass-based packaging, achieving a closed-loop control from thermal state sampling, thermal causality discrimination, directional heat conduction, cooling redistribution, graded back-off to smooth recovery. It can accurately suppress heat flow migration, enhance hotspot heat dissipation efficiency, and maximize RF link gain and output stability, effectively avoiding device over-temperature failure and protection malfunctions. This significantly improves the long-term reliability and operational adaptability of high-power dual-band RF components, making it particularly suitable for integrated applications in high-power RF transceiver systems such as phased arrays.

[0176] It should be understood that the terms "system," "device," "unit," and / or "module" as used in this specification are a method of distinguishing different components, elements, parts, sections, or assemblies at different levels. However, if other terms can achieve the same purpose, they may be replaced by other expressions.

[0177] As indicated in this specification and claims, unless the context clearly indicates otherwise, the words "a," "an," "an," and / or "the" do not specifically refer to the singular and may also include the plural. Generally speaking, the terms "comprising" and "including" only indicate the inclusion of expressly identified steps and elements, which do not constitute an exclusive list, and the method or apparatus may also include other steps or elements.

[0178] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

[0179] It should be noted that the structure, proportions, and sizes of the accompanying drawings in this specification are merely for illustrative purposes to aid those skilled in the art and to facilitate understanding and reading. They are not intended to limit the scope of the invention and therefore have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and objectives of the invention, should still fall within the scope of the technical content disclosed herein. Furthermore, terms such as "upper," "lower," "left," "right," and "middle" used in this specification are merely for clarity and not intended to limit the scope of the invention. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of the invention's implementation.

Claims

1. A directional liquid-cooled, graded back-off dual-band radio frequency transceiver integrated component, characterized in that, include: Multilayer glass substrate, dual-band RF transceiver unit, thermal causality discrimination locking unit, directional gradient copper-filled thermally conductive TGV, dual-actuator micro-spray liquid cooling structure, first power supply branch (304), second power supply branch (305), closed grounded TGV fence (405) and controller; The dual-band radio frequency transceiver unit includes a power drive amplifier (703) and a final stage power amplifier cascaded together, with a thermal migration transition gap region (212) between the power drive amplifier (703) and the final stage power amplifier. The thermal cause-effect discrimination locking unit includes a first temperature-sensitive TGV (701) located below the power drive amplifier (703), a second temperature-sensitive TGV (702) located below the final stage power amplifier, and a current sampling resistor connected in series with the first power supply branch (304); The directional gradient copper-filled thermal TGV includes a main heat exchange region (204) located below the final stage power amplifier and a drive-side traction thermal tractor region (205) extending towards the drive stage with a linearly decreasing duty cycle. The dual-acting micro-jet liquid cooling structure includes a main jet impact chamber (201) corresponding to the main heat exchange area (204) and an offset auxiliary jet chamber (202) corresponding to the driving side traction heat guide area (205). The main jet impact chamber (201) and the offset auxiliary jet chamber (202) are respectively connected to the liquid inlet branch equipped with an adjustable micro throttle valve (208). The controller is electrically connected to the first temperature-sensitive TGV (701), the second temperature-sensitive TGV (702), the current sampling resistor, the detection unit for detecting the gain compression of the final stage power amplifier and the total power supply current of the transmit link, the first power supply branch (304), the second power supply branch (305), and the adjustable micro throttle valve (208), respectively. The controller is configured as follows: The current change rate of the drive stage is obtained based on the current sampling resistor, the first temperature is obtained based on the first temperature-sensitive TGV (701), the second temperature is obtained based on the second temperature-sensitive TGV (702), the difference between the first temperature and the second temperature is obtained, and the gain compression of the final stage power amplifier and the total power supply current of the transmit link are obtained based on the detection unit. When conditions 1.1 to 1.3 are met, the controller determines that the thermal migration state is caused by overdrive of the drive stage, and prioritizes increasing the flow ratio of the bias auxiliary injection chamber (202) to implement interception cooling, while prioritizing power back-off of the first power supply branch (304); wherein, condition 1.1: the current change rate of the drive stage exceeds the preset current change rate threshold and the duration exceeds the first time window; condition 1.2: the real-time temperature of the first temperature-sensitive TGV (701) continues to rise, and the temperature difference between the second temperature-sensitive TGV (702) and the first temperature-sensitive TGV (701) decreases or the change rate of the temperature difference between the second temperature-sensitive TGV (702) and the first temperature-sensitive TGV (701) is negative; condition 1.3: the gain compression of the final stage power amplifier is less than one decibel; When conditions 2.1 to 2.3 are met simultaneously, the controller determines that the final stage is in an overheated state and prioritizes increasing the flow rate ratio of the main jet impact chamber (201) to enhance cooling of the main hot spot of the final stage. At the same time, it prioritizes current limiting or power back-off of the second power supply branch (305), and only makes auxiliary adjustments to the first power supply branch (304). Among them, condition 2.1: the rate of change of the drive stage current is lower than the preset stable threshold and the duration exceeds the second time window; condition 2.2: the real-time temperature of the second temperature-sensitive TGV (702) continues to rise, and the temperature difference between the second temperature-sensitive TGV (702) and the first temperature-sensitive TGV (701) increases or the rate of change of the temperature difference between the second temperature-sensitive TGV (702) and the first temperature-sensitive TGV (701) is positive; condition 2.3: the gain compression of the final stage power amplifier exceeds three decibels. When conditions 3.1 to 3.3 are met simultaneously, the controller determines that the entire link is overloaded and simultaneously opens the two adjustable micro-throttle valves (208) to achieve enhanced cooling across the entire area. At the same time, it first reduces the output amplitude of the first power supply branch (304) and then reduces the output amplitude of the second power supply branch (305). Among them, condition 3.1: the real-time temperature of the first temperature-sensitive TGV (701) and the second temperature-sensitive TGV (702) are both higher than the preset synchronous temperature rise threshold and the duration exceeds the third time window; condition 3.2: the difference in the temperature rise rate between the first temperature-sensitive TGV (701) and the second temperature-sensitive TGV (702) is within the preset synchronous tolerance range; condition 3.3: the total power supply current of the transmission link exceeds 120% of the rated current. When the real-time temperature of the first temperature-sensitive TGV (701), the real-time temperature of the second temperature-sensitive TGV (702), and the difference between the real-time temperatures of the first temperature-sensitive TGV (701) and the second temperature-sensitive TGV (702) all fall back to within the preset recovery threshold range, and the duration exceeds the preset hysteresis time window, the controller enters the recovery mode. Following the reverse order of the return sequence, it first gradually adjusts the flow distribution ratio between the main injection impact chamber (201) and the bias auxiliary injection chamber (202) to the preset value under normal operating conditions, then gradually restores the output power of the second power supply branch (305), and finally gradually restores the output power of the first power supply branch (304). If the temperature is detected to rise rapidly again during the recovery process, the recovery process is paused and the corresponding abnormal control mode is re-entered.

2. The directional liquid-cooled-graded backoff dual-band RF transceiver integrated component according to claim 1, characterized in that, The multilayer glass substrate is a six-layer glass stack structure.

3. The directional liquid-cooled-graded back-off dual-band RF transceiver integrated component according to claim 2, characterized in that, The six-layer glass laminate structure includes: The first bottom flow channel cover layer (1) integrates an external liquid cooling interface, a bottom grounding pad (101), a power supply interface pad and a control interface pad. The boundary of the fluid area (109) and the boundary of the electrical area (110) are separated by an isolation groove or a shielding strip, and the external liquid cooling interface is only connected to the liquid cooling flow channel system. The second layer is the liquid cooling tank forming layer (2), which is equipped with a coplanar integrated and vertically corresponding dual-acting micro-spray liquid cooling structure and a directional gradient copper-filled thermal conductive TGV8. The third layer is the chip mounting layer (3), on which chip heat sink pads matching the bottom surface of the two-stage amplifier are prepared, as well as parallel and non-intersecting power supply branches for the driver stage and the final stage. The fourth layer is an air cavity layer (4), with a chip avoidance air cavity provided in the corresponding chip area, and vertical through holes forming the closed grounding TGV fence (405) around it; The fifth layer is the intermediate wiring layer (5), which is equipped with radio frequency signal wiring (501), control signal wiring (502) and upper and lower grounding metal planes; The sixth layer is the top cover layer (6), which has a top grounding metal layer (601) that is connected in a closed loop with the grounding plane of the intermediate wiring layer (5).

4. The directional liquid-cooled-graded back-off dual-band radio frequency transceiver integrated component according to claim 1, characterized in that, The main heat exchange area (204) of the directional gradient copper-filled heat conduction TGV8 is a rectangular TGV array; the vertical projection of the rectangular TGV array completely covers the active heating area of ​​the final stage power amplifier, and the copper-filled area of ​​the rectangular TGV array has a duty cycle of 80%.

5. The directional liquid-cooled-graded back-off dual-band RF transceiver integrated component according to claim 1, characterized in that, The driving-side heat transfer zone (205) is a trapezoidal TGV array; the vertical projection of the trapezoidal TGV array completely covers the heat transfer transition gap zone (212) and the active area of ​​the power drive amplifier (703). The copper filling area duty cycle of the trapezoidal TGV array decreases linearly from 60% on the side near the main heat transfer zone (204) to 30% on the driving stage side.

6. The directional liquid-cooled-graded backoff dual-band radio frequency transceiver integrated component according to claim 1, characterized in that, The dual-acting micro-jet liquid-cooled structure includes: a main jet impact chamber (201), an offset auxiliary jet chamber (202), a first liquid inlet branch (206), a second liquid inlet branch (207), and a common manifold (203).

7. The directional liquid-cooled-graded back-off dual-band radio frequency transceiver integrated component according to claim 6, characterized in that, The bottom plate of the main jet impact chamber (201) is provided with an array of micro-jet holes; The central axis of the bias auxiliary injection chamber (202) is offset toward the power drive amplifier (703) relative to the geometric central axis of the thermal migration transition gap region (212), and the bottom plate of the chamber is provided with a linearly arranged array of micro injection holes; the first liquid inlet branch (206) is connected to the main injection impact chamber (201), and the second liquid inlet branch (207) is connected to the bias auxiliary injection chamber (202); the common manifold (203) is provided on the downstream side of the main injection impact chamber (201) and the bias auxiliary injection chamber (202), and is connected to the manifold of the main injection impact chamber (201) and the bias auxiliary injection chamber (202) respectively through a smoothly transitioned arc flow channel.

8. The directional liquid-cooled-graded backoff dual-band RF transceiver integrated component according to claim 1, characterized in that, Both the first temperature-sensitive TGV (701) and the second temperature-sensitive TGV (702) adopt a whole-hole copper-filled structure. The hole wall of the whole-hole copper-filled structure is deposited with a TaN barrier layer, and the real-time resistance is collected by a high-precision constant current source through a four-wire measurement method and the temperature value is converted.

9. The directional liquid-cooled-graded backoff dual-band radio frequency transceiver integrated component according to claim 1, characterized in that, The current sampling resistor is a resistor with a resistance of 5mΩ to 20mΩ and a temperature drift coefficient of no more than ±5ppm per degree Celsius, and is connected in series between the output terminal of the DC-DC converter of the first power supply branch (304) and the power supply pin of the power drive amplifier (703).

10. The directional liquid-cooled-graded backoff dual-band radio frequency transceiver integrated component according to claim 1, characterized in that, The first power supply branch (304) and the second power supply branch (305) are respectively equipped with independent DC-DC conversion circuits, PWM control modules, overcurrent protection circuits and linear voltage regulator circuits.

11. The directional liquid-cooled, graded back-off dual-band radio frequency transceiver integrated component according to claim 1 or 10, characterized in that, The first power supply branch (304) and the second power supply branch (305) are each equipped with an independent decoupling capacitor array. Along the power supply line toward the corresponding power amplifier, large-capacity low-frequency capacitors and high-frequency multilayer ceramic capacitors are arranged in descending order of capacitance value to form a hierarchical wideband decoupling structure.

12. The directional liquid-cooled-graded backoff dual-band RF transceiver integrated component according to claim 1, characterized in that, The power back-off method performed by the controller includes any one or a combination of the following: stepwise reduction of the drain supply voltage, reduction of the supply pulse duty cycle, and adjustment of the gate bias voltage.

13. The directional liquid-cooled-graded backoff dual-band radio frequency transceiver integrated component according to claim 1, characterized in that, The closed grounded TGV fence (405) is formed by at least two rows of staggered grounded TGVs to form the closed fence boundary. The center distance between adjacent grounded TGVs is less than or equal to 5% of the wavelength corresponding to the highest operating frequency of the entire integrated structure in free space, and the horizontal distance between the closed fence boundary and the first temperature-sensitive TGV (701) and the second temperature-sensitive TGV (702) is greater than 500μm.

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