System and method for testing wafer-level dynamic and static parameters of power device

Abstract

The invention relates to the technical field of power semiconductor wafer testing, and discloses a power device wafer level dynamic and static parameter testing system and method, and the system comprises dynamic testing equipment which is electrically connected with a switching device, static testing equipment which is electrically connected with the switching device, a testing seat which is electrically connected with the switching device, and a wafer fixing disc. The wafer fixing disc is electrically connected with the static testing equipment and the lower metal plate through a static change-over switch and is electrically connected with the dynamic testing equipment, the fixing ring is used for moving in the direction close to the lower metal plate, the wafer fixing disc and the lower metal plate are conducted when the fixing ring moves to a set position, and the motion control device is in transmission connection with the fixing ring and is used for controlling the wafer fixing disc to move in the direction close to the lower metal plate. The control equipment is electrically connected with the switching device, the motion control device and the static change-over switch, two tests can be completed without replacing a test system, the two tests can be completed through one-time needle pressing, and damage to wafers is reduced.

Description

A wafer-level dynamic and static parameter testing system and method for power devices Technical Field

[0001] This invention relates to the field of power semiconductor wafer testing technology, and specifically to a wafer-level dynamic and static parameter testing system and method for power devices. Background Technology

[0002] Wafer testing is a method of testing electrical performance parameters by directly contacting the bare die on the wafer with probes after wafer manufacturing is completed and before dicing and packaging. In traditional technology, power devices are only tested for static electrical performance parameters on the wafer, while dynamic parameter testing is performed after the wafer is diced into qualified dies or after it is packaged into finished tubes. However, the testing equipment for testing qualified dies is very expensive, and performing dynamic testing after packaging further increases the cost of packaging.

[0003] With the development of new energy technologies, third-generation wide-bandgap power semiconductors are widely used in new energy vehicles. However, automotive-grade power semiconductor devices have higher reliability requirements, and testing dynamic parameters on wafers has become a trend.

[0004] However, since dynamic parameter testing requires extremely low parasitic parameters and static parameter testing requires excellent leakage current shielding protection, the requirements of the two are not the same. Moreover, there is only one station on the probe station, making it difficult to combine the functions of dynamic parameter testing and static parameter testing. Therefore, in related technologies, there is no solution that can simultaneously support dynamic parameter testing and static parameter testing on power semiconductor wafers. So, currently, dynamic parameter testing and static parameter testing for wafers are performed on different stations. However, testing on two stations requires the wafer to be probed twice, which will aggravate the damage to the wafer surface. Summary of the Invention

[0005] This invention provides a wafer-level dynamic and static parameter testing system and method for power devices, to solve the problem that dynamic and static testing require two indentations, which can cause increased wafer damage.

[0006] In a first aspect, the present invention provides a wafer-level dynamic and static parameter testing system for power devices. The system includes: a dynamic testing device electrically connected to a switching device, the dynamic testing device being used to acquire dynamic parameters during dynamic testing; a static testing device electrically connected to the switching device, the static testing device being used to acquire static parameters during static testing; a test socket electrically connected to the switching device, for electrically connecting to the gate and source of a wafer; a wafer mounting disk electrically connected to the static testing device via a static switching switch, for supporting the wafer and electrically connecting to the drain of the wafer; and a lower metal plate electrically connected to the dynamic testing device, for connecting to a mounting ring. When contacted, the wafer holder is electrically connected to the dynamic testing equipment; a switching device is used to control the test socket to be electrically connected to the dynamic testing equipment or to the static testing equipment; a fixing ring is used to move in a direction close to the lower metal plate, and when the fixing ring moves to a set setting, it connects the wafer holder and the lower metal plate; a motion control device is drivenly connected to the fixing ring and is used to drive the fixing ring away from or close to the lower metal plate; a control device is electrically connected to the switching device, the motion control device, and the static switching switch and is used to control the switching device, the motion control device, and the static switching switch.

[0007] By selectively connecting dynamic and static testing equipment to the test socket under the control of a switching device, and selectively connecting the wafer holder to dynamic and static testing equipment under the control of a static switching switch and a motion control device, a static or dynamic test loop can be formed during wafer testing by switching the equipment connected to the test socket and wafer holder through the switching and motion control devices. During dynamic testing, the test socket and wafer holder are combined with the dynamic testing equipment to complete the dynamic test, and during static testing, the test socket and wafer holder are combined with the static testing equipment to complete the static test. This eliminates the need to change the test system to complete the two tests separately, allowing both tests to be completed with a single probe, thus reducing wafer damage.

[0008] In one optional embodiment, when the fixing ring moves to a set position, the fixing ring, the lower metal plate, and the wafer fixing disk constitute a conductive cavity.

[0009] The dynamic testing equipment electrically connects the wafer drain via a short-loop connection using a fixed ring, a lower metal plate, and a wafer mounting disk. This avoids the increased parasitic inductance caused by long-loop connections via wire harnesses. The closed-loop design of the conductive cavity optimizes and reduces stray inductance in the test circuit. This design reduces parasitic inductance during dynamic testing in two ways, thereby improving the accuracy of dynamic testing.

[0010] In one optional embodiment, a grounding switch is also included, through which the lower metal plate is grounded; the control device is electrically connected to the grounding switch, and when the control device is in a first working state, the control device controls the grounding switch to open, and when the control device is in a second working state, the control device controls the grounding switch to close.

[0011] During dynamic testing, the grounding switch is open, and the lower metal plate normally serves as a short-circuit connection component for dynamic testing. During static testing, the grounding switch is closed, and the lower metal plate is grounded, thereby converting the conductive space into an equipotential grounding layer, which serves as a shielding layer for the wafer. This satisfies the excellent leakage current shielding protection required for static parameter testing, improving the accuracy and stability of static parameter testing.

[0012] In one optional embodiment, the fixing ring has a first contact portion and a second contact portion; when the fixing ring moves to a set position, the first contact portion contacts the wafer fixing disk, and the second contact portion contacts the lower metal plate; both the first contact portion and the second contact portion are provided with spring pins.

[0013] Due to limitations in processing precision and motion control device precision, when the retaining ring moves to the set position, there may be a certain gap between the first contact part and the wafer retaining plate, or between the second contact part and the lower metal plate. The presence of gaps will lead to a decrease in contact effect, which in turn will increase stray inductance. However, since the spring pin has a certain elastic tolerance, it can effectively eliminate the gap problem, increase the contact effect between the retaining ring and the lower metal plate and the wafer retaining plate, thereby reducing stray inductance and increasing the accuracy of dynamic testing of the wafer.

[0014] In one optional embodiment, an upper insulating plate is provided on the side of the lower metal plate away from the wafer fixing disk; the upper insulating plate has multiple through holes, and conductive posts are provided in the through holes; the dynamic testing equipment is electrically connected to the lower metal plate via the conductive posts.

[0015] The upper insulating plate provides shielding, which can isolate the interference caused to the wafer by the operation of various components and circuits on the circuit adapter board, thereby further improving the shielding effect and enhancing the accuracy of static testing.

[0016] In one optional embodiment, the switching device includes a switching switch, a first switching relay, a second switching relay, a third switching relay, and a fourth switching relay; the control device is electrically connected to the switching switch, the first switching relay, the second switching relay, the third switching relay, and the fourth switching relay; one end of the switching switch is electrically connected to the test socket, and the other end is electrically connected to the dynamic testing device; the common terminals of the first switching relay, the second switching relay, the third switching relay, and the fourth switching relay are all electrically connected to the test socket, the static terminals of the first switching relay, the second switching relay, the third switching relay, and the fourth switching relay are all electrically connected to the static testing device, and the dynamic terminals of the first switching relay, the second switching relay, the third switching relay, and the fourth switching relay are all electrically connected to the dynamic testing device.

[0017] By controlling the switching on and off of the switching switch, the first switching relay, the second switching relay, the third switching relay, and the fourth switching relay, the test socket can be selectively connected to dynamic test equipment and static test equipment, so that the source and gate of the wafer can be selectively connected to dynamic test equipment and static test equipment, thereby enabling the switching of the equipment connected to the source and gate of the wafer.

[0018] In one optional embodiment, the dynamic testing equipment includes a switching testing device, a dynamic tester, and a gate driver; the static testing equipment includes a static tester; the switching testing device is used to generate pulse signals; the dynamic terminal of the first switching relay is electrically connected to the switching testing device, and the static terminal of the first switching relay is electrically connected to the source-to-source port of the static tester; the dynamic terminal of the second switching relay is electrically connected to the gate driver, and the static terminal of the second switching relay is electrically connected to the gate-to-source port of the static tester; the dynamic terminal of the third switching relay is electrically connected to the source measurement port of the dynamic tester, and the static terminal of the third switching relay is electrically connected to the source measurement port of the static tester; the dynamic terminal of the fourth switching relay is electrically connected to the gate measurement port of the dynamic tester, and the static terminal of the fourth switching relay is electrically connected to the gate measurement port of the static tester; the wafer holder is electrically connected to the drain measurement port and the drain-to-source port of the static tester via the static switching switch; the lower metal plate is electrically connected to the drain measurement port and the drain-to-source port of the dynamic tester.

[0019] During dynamic testing, the first, second, third, and fourth switching relays are switched to the dynamic end. The switching test device and gate driver then inject pulses into the wafer through the second and first switching relays, and read the gate and source signals of the wafer through the third and fourth switching relays to analyze the dynamic parameters of the wafer. During static testing, the first, second, third, and fourth switching relays are switched to the static end. The wafer is powered through the first and second switching relays, and the wafer is measured through the third and fourth switching relays to read the gate and source signals of the wafer and analyze the static parameters.

[0020] In one optional embodiment, the switch testing device includes a bus capacitor, a test diode, an energy storage inductor, and a current sensing resistor; the first terminal of the bus capacitor is electrically connected to the first terminal of the energy storage inductor and the cathode of the test diode, the second terminal of the energy storage inductor and the anode of the test diode are electrically connected to the lower metal plate, and the second terminal of the bus capacitor is electrically connected to the dynamic terminal of the first switching relay via the current sensing resistor.

[0021] During dynamic testing, the DC bus capacitor is charged. Once the capacitor voltage reaches the set voltage, a pulse signal is output, which, in conjunction with the gate driver, forms a dual-pulse signal to achieve dual-pulse testing of the wafer.

[0022] In one alternative embodiment, the wafer holder is provided with a lower insulating plate and a metal shielding layer on the side near the motion control device.

[0023] The lower insulating plate and metal shielding layer can effectively shield the motion control device, avoid interference with wafer testing during the operation of the motion control device, and further improve the accuracy of static testing of the wafer.

[0024] Secondly, the present invention provides a method for testing the dynamic and static parameters of power devices at the wafer level, applied to the power device wafer-level dynamic and static parameter testing system as described above. The method includes: when the control device is in a first working state, controlling the static switching switch to be disconnected, controlling the switching device to connect the test socket and the dynamic testing device, and controlling the motion control device to drive the fixed ring to a set position; when the control device is in a second working state, controlling the motion control device to drive the fixed ring to move away from the set position, controlling the switching device to connect the test socket and the static testing device, and controlling the static switching switch to be turned on.

[0025] The control device selectively connects the test socket to dynamic and static testing equipment under the control of a switching device, and selectively connects the wafer holder to dynamic and static testing equipment under the control of a static switching switch and a motion control device. Thus, during wafer testing, the switching and motion control devices switch the equipment connected to the test socket and wafer holder to form either a static or dynamic test loop. During dynamic testing, the test socket and wafer holder are combined with the dynamic testing equipment to complete the dynamic test; during static testing, the test socket and wafer holder are combined with the static testing equipment to complete the static test. This eliminates the need to change the testing system to complete the two tests separately, allowing both tests to be completed with a single probe, reducing wafer damage. Attached Figure Description

[0026] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0027] Figure 1 is a schematic diagram of the structure of a power semiconductor wafer electrical parameter testing system according to an embodiment of the present invention; Figure 2 is a schematic diagram of the cavity structure according to an embodiment of the present invention; Figure 3 is a schematic diagram of the circuit of a power semiconductor wafer electrical parameter testing system according to an embodiment of the present invention; Figure 4 is a schematic flowchart of a power semiconductor wafer electrical parameter testing method according to an embodiment of the present invention.

[0028] 21. First switching relay; 22. Second switching relay; 23. Third switching relay; 24. Fourth switching relay; 25. Circuit adapter board; 26. Upper insulating plate; 27. Conductive post; 28. Test socket; 31. Lower metal plate; 41. Wafer holder; 42. Fixing ring; 43. Static switching switch; 44. Metal shielding layer; 45. Motion control servo motor; 46. Lifting servo motor; 47. Lower insulating plate; 48. Wire; 5. Drain switching device. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0030] It is understood that before using the technical solutions disclosed in the various embodiments of the present invention, users should be informed of the types, scope of use, and usage scenarios of the personal information involved in the present invention and their authorization should be obtained in accordance with relevant laws and regulations through appropriate means.

[0031] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0032] As an optional application scenario of this invention, as shown in Figure 1, the power semiconductor wafer electrical parameter testing system of this invention is used to perform dynamic parameter testing and static parameter testing on the wafer through a single probe. Specifically, it includes a control device, a probe station, a test application module, a dynamic test device, and a static test device.

[0033] In this embodiment, the dynamic testing equipment includes a gate driver, a switch testing device, and a dynamic tester, while the static testing equipment includes a static tester.

[0034] It is worth noting that the control device can be a controller integrated into a dynamic or static tester, or it can be an external, standalone control device.

[0035] The dynamic tester is electrically connected to the test application module to acquire dynamic parameters during dynamic testing. The static tester is electrically connected to the test application module and the probe station to acquire static parameters during static testing. In this embodiment, the dynamic parameters include parameters such as switching time, and the static parameters include parameters such as leakage current and on-resistance.

[0036] Referring to Figure 2, the probe station in this embodiment includes a wafer mounting disk 41 and a fixing ring 42. The test application module has a lower metal plate 31. The wafer mounting disk 41 is used to place the wafer U1 and is electrically connected to the drain of the wafer U1. Drain electrodes are evenly distributed on one side of the wafer U1. During testing, the wafer U1 is placed on the wafer mounting disk 41 with the drain side facing the wafer mounting disk 41, thus achieving electrical connection between the wafer mounting disk 41 and the wafer drain. The fixing ring 42 is an L-shaped ring. The fixed ring 42 is arranged around the wafer fixing disk 41 and can move in the up and down direction away from and close to the wafer fixing disk 41. When the fixed ring 42 moves to the set position, the fixed ring 42 simultaneously contacts the wafer fixing disk 41 and the lower metal plate 31 to realize the electrical connection between the lower metal plate 31 and the wafer fixing disk 41. The lower metal plate 31 is used to electrically connect the drain measurement port AC_DS and the drain supply port AC_DF of the dynamic test equipment so that the dynamic test equipment can be electrically connected to the drain of the wafer U1.

[0037] The short circuit from the wafer mounting plate 41 and the fixing ring 42 to the lower metal plate 31 avoids the problem of excessively long circuits caused by connecting the wafer mounting plate 41 with a wire harness during dynamic testing, which would lead to excessively high parasitic inductance. This allows the system to meet the accuracy requirements for dynamic testing of wafer U1. At the same time, the lower metal plate 31 covers the fixing ring 42, and the lower metal plate 31, wafer mounting plate 41, and fixing ring 42 form a conductive cavity to accommodate wafer U1. The design of the conductive cavity can further reduce stray inductance in the system and further improve the accuracy of dynamic testing.

[0038] On the probe stage, there is also a lifting device that drives the wafer holder 41 to move and a motion control device that drives the fixed ring 42 to move. The lifting device includes a lifting servo motor 46, which is fixedly connected to the wafer holder 41. It is used to drive the wafer holder 41 to rise and fall at the beginning and end to facilitate the replacement of the wafer U1. The motion control device includes two motion control servo motors 45, which are both connected to the fixed ring 42. They are used to drive the fixed ring 42 to move upward and approach the wafer holder 41 and the lower metal plate 31 until the fixed ring 42 contacts the wafer holder 41 and the lower metal plate 31, thus realizing the electrical connection between the lower metal plate 31 and the wafer holder 41, or to drive the fixed ring 42 to move downward and away from the wafer holder 41 and the lower metal plate 31, thus disconnecting the electrical connection between the lower metal plate 31 and the wafer holder 41.

[0039] The fixing ring 42 has a first contact portion and a second contact portion. When the fixing ring 42 moves to a set position, the first contact portion contacts the wafer fixing disk 41, and the second contact portion contacts the lower metal plate 31. Both the first contact portion and the second contact portion are provided with spring pins.

[0040] Due to limitations in processing precision and motion control device precision, when the fixing ring 42 moves to the set position, there may be a certain gap between the first contact part and the wafer fixing disk 41, or between the second contact part and the lower metal plate 31. The presence of gaps will lead to a decrease in contact effect, which in turn will lead to an increase in stray inductance. However, since the spring pin has a certain elastic tolerance, it can effectively eliminate the gap problem, increase the contact effect between the fixing ring 42 and the lower metal plate 31 and the wafer fixing disk 41, thereby reducing stray inductance and increasing the accuracy of dynamic testing of wafer U1.

[0041] Referring to Figures 2 and 3, the system in this embodiment has a switching device and a static switching switch 43 integrated on the probe station. The test application module has a test socket 28, which is used to electrically connect to the gate and source of the wafer U1. The switching device is used to selectively conduct the test socket 28 and the dynamic test equipment, or conduct the test socket 28 and the static test equipment, so as to switch between the dynamic test circuit and the static test circuit. Specifically, in this embodiment, the switching device includes a first switching relay 21, a second switching relay 22, a third switching relay 23 and a fourth switching relay 24 integrated on the test application module.

[0042] In this embodiment, one end of the static switching switch 43 is electrically connected to the wafer mounting disk 41 via a wire 48, and the other end is electrically connected to the drain-to-source port DC_DF and the drain measurement port DC_DS of the static tester, respectively. The dynamic terminal of the first switching relay 21 is electrically connected to the switch test device, and the static terminal of the first switching relay 21 is electrically connected to the source-to-source port DC_SF of the static tester. The dynamic terminal of the second switching relay 22 is electrically connected to the gate driver, and the static terminal of the second switching relay 22 is electrically connected to the gate-to-source port DC_GF of the static tester. The dynamic terminal of the third switching relay 23 is electrically connected to the source measurement port AC_SS of the dynamic tester, and the static terminal of the third switching relay 23 is electrically connected to the source measurement port DC_SS of the static tester. The dynamic terminal of the fourth switching relay 24 is electrically connected to the gate measurement port AC_GS of the dynamic tester, and the static terminal of the fourth switching relay 24 is electrically connected to the gate measurement port DC_GS of the static tester.

[0043] The static switching switch 43 and the motion control device together constitute the drain switching device 5, which is used to switch the drain selection of wafer U1 to connect to the static tester or the dynamic tester.

[0044] In this embodiment, the static terminals of the first switching relay 21, the second switching relay 22, the third switching relay 23, and the fourth switching relay 24 are normally open terminals, and the dynamic terminals of the first switching relay 21, the second switching relay 22, the third switching relay 23, and the fourth switching relay 24 are normally closed terminals.

[0045] The control equipment is electrically connected to the control terminals of the motion control device, static switch 43, first switching relay 21, second switching relay 22, third switching relay 23, and fourth switching relay 24. During dynamic testing, the control equipment is in the first working state. The control equipment controls the motion control device to move the fixed ring 42 to the set position to connect the lower metal plate 31 and the wafer mounting disk 41, and controls the static switch 43 to open. The first switching relay 21, second switching relay 22, third switching relay 23, and fourth switching relay 24 switch to the normally closed terminal, forming a dynamic test circuit to complete the dynamic test. During static testing, the control equipment is in the second working state. The control equipment controls the motion control device to move the fixed ring 42 downward away from the set position to disconnect the lower metal plate 31 and the wafer mounting disk 41, and controls the static switch 43 to open. The first switching relay 21, second switching relay 22, third switching relay 23, and fourth switching relay 24 switch to the normally open terminal, thereby forming a static test circuit to complete the static test.

[0046] The switch measurement device in this embodiment includes a bus capacitor C1, a test diode D1, an energy storage inductor L1, and a current sensing resistor R1.

[0047] The first end of the bus capacitor C1 is electrically connected to the first end of the energy storage inductor L1 and the cathode of the accompanying diode D1, the second end of the energy storage inductor L1 is electrically connected to the anode of the accompanying diode D1 and the lower metal plate 31, and the second end of the bus capacitor C1 is electrically connected to the dynamic end of the first switching relay 21 via the current sensing resistor R1.

[0048] During dynamic testing, the dynamic tester first charges the bus capacitor C1. After the bus capacitor C1 reaches the set voltage, the switching test device generates a pulse signal, and at the same time, the gate driver generates a pulse drive signal to perform a double-pulse test on the wafer U1.

[0049] In this embodiment, in order to further improve the accuracy of static testing, the lower metal plate 31 is grounded through a grounding switch, and the control device is electrically connected to the control terminal of the grounding switch. During dynamic testing, the control device controls the grounding switch to open, so that the system can normally form a dynamic test circuit. During static testing, the control device controls the grounding switch to open, so that the lower metal plate 31 is grounded. At this time, the lower metal plate 31 becomes a grounded shielding layer, which can improve the effect of static testing on wafer U1.

[0050] Furthermore, in this embodiment, the switch test device, the first switching relay 21, the second switching relay 22, the third switching relay 23, and the fourth switching relay 24 are located on the circuit adapter board 25, which is located above the lower metal plate 31. An upper insulating plate 26 is provided between the circuit adapter board 25 and the lower metal plate 31 for shielding, so as to isolate the interference caused by the operation of various devices and circuits on the circuit adapter board 25 to the wafer U1, thereby further improving the shielding effect and enhancing the accuracy of static testing.

[0051] In order to connect the circuit adapter board 25 with the test socket 28 and the lower metal plate 31, the upper insulating plate 26 has through holes at the positions corresponding to the lower metal plate 31 and the test socket 28. A conductive post 27 is placed in the through hole. One end of the conductive post 27 is electrically connected to the corresponding point on the circuit adapter board 25, and the other end is electrically connected to the lower metal plate 31, so as to realize the electrical connection between the circuit adapter board 25 and the lower metal plate 31.

[0052] In this embodiment, the upper insulating plate 26 surrounds the test base 28. Since the test base 28 is made of insulating material with spring pins, the upper insulating plate 26 and the test base 28 work together to enhance the shielding effect.

[0053] Similarly, since the servo motors will interfere with the wafer U1 during operation, in order to further improve the accuracy of static testing, in this embodiment, a lower insulating plate and a metal shielding layer 44 are provided below the wafer fixing plate 41 and between the wafer fixing plate 41 and the three servo motors to improve the shielding effect of the servo motors, reduce the interference caused by the operation of the servo motors to the wafer U1, and further improve the accuracy of static testing of the wafer U1.

[0054] Referring to Figure 4, according to an embodiment of the present invention, a method for testing the dynamic and static parameters of power devices at the wafer level is provided, which can be used in the above-mentioned power device wafer-level dynamic and static parameter testing system. The method includes: when the control device is in a first working state, controlling the switching device to connect the test socket 28 and the dynamic testing device, controlling the static switching switch 43 to disconnect, and controlling the motion control device to drive the fixed ring 42 to move to a set position; when the control device is in a second working state, controlling the switching device to connect the test socket 28 and the static testing device, controlling the static switching switch 43 to connect, and controlling the motion control device to drive the fixed ring 42 to move away from the set position.

[0055] Specifically, during dynamic testing, the control equipment is in its first operating state. The control equipment controls the static switching switch 43 to open, controls the first switching relay 21, the second switching relay 22, the third switching relay 23, and the fourth switching relay 24 to switch to their normally closed terminals, and controls the grounding switch to open, thereby switching to the dynamic test circuit. The dynamic tester charges the DC bus capacitor. After the DC bus capacitor voltage is charged to the set voltage, the gate driver outputs a voltage pulse to realize the double-pulse waveform test. The dynamic tester reads the signals of each electrode of wafer U1 to obtain dynamic parameters.

[0056] During static testing, the control equipment is in the second working state. The control equipment controls the static switching switch 43 to conduct, controls the first switching relay 21, the second switching relay 22, the third switching relay 23 and the fourth switching relay 24 to switch to the normally open terminal, and controls the grounding switch to conduct, thereby switching to the static test circuit, fully connecting the static tester, and completing the static parameter test.

[0057] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A wafer-level dynamic and static parameter testing system for power devices, characterized in that, The system includes: a dynamic testing device electrically connected to a switching device, the dynamic testing device being used to acquire dynamic parameters during dynamic testing; a static testing device electrically connected to the switching device, the static testing device being used to acquire static parameters during static testing; a test socket electrically connected to the switching device, for electrically connecting to the gate and source of the wafer; a wafer holder electrically connected to the static testing device via a static switching switch, for supporting the wafer and electrically connecting to the drain of the wafer; and a lower metal plate electrically connected to the dynamic testing device, for electrically connecting the wafer holder to the test socket when in contact with a fixing ring. The device includes: a dynamic testing device; a switching device for controlling the test socket to be electrically connected to the dynamic testing device or electrically connected to the static testing device; a fixing ring for moving along a direction close to the lower metal plate, wherein when the fixing ring moves to a set setting, it connects the wafer holder and the lower metal plate; a motion control device, drivenly connected to the fixing ring, for driving the fixing ring away from or close to the lower metal plate; and a control device, electrically connected to the switching device, the motion control device, and the static switching switch, for controlling the switching device, the motion control device, and the static switching switch.

2. The system according to claim 1, characterized in that, When the fixing ring moves to the set position, the fixing ring, the lower metal plate, and the wafer fixing disk form a conductive cavity.

3. The system according to claim 2, characterized in that, It also includes a grounding switch, through which the lower metal plate is grounded; the control device is electrically connected to the grounding switch, and when the control device is in the first working state, the control device controls the grounding switch to open, and when the control device is in the second working state, the control device controls the grounding switch to close.

4. The system according to claim 1, characterized in that, The fixing ring has a first contact portion and a second contact portion; when the fixing ring moves to a set position, the first contact portion contacts the wafer fixing disk, and the second contact portion contacts the lower metal plate; both the first contact portion and the second contact portion are provided with spring pins.

5. The system according to claim 1, characterized in that, An upper insulating plate is provided on the side of the lower metal plate away from the wafer fixing disk; multiple through holes are opened on the upper insulating plate, and conductive posts are provided in the through holes; the dynamic testing equipment is electrically connected to the lower metal plate through the conductive posts.

6. The system according to claim 1, characterized in that, The switching device includes a switching switch, a first switching relay, a second switching relay, a third switching relay, and a fourth switching relay; the control device is electrically connected to the switching switch, the first switching relay, the second switching relay, the third switching relay, and the fourth switching relay; one end of the switching switch is electrically connected to the test socket, and the other end is electrically connected to the dynamic testing equipment; the common terminals of the first switching relay, the second switching relay, the third switching relay, and the fourth switching relay are all electrically connected to the test socket, the static terminals of the first switching relay, the second switching relay, the third switching relay, and the fourth switching relay are all electrically connected to the static testing equipment, and the dynamic terminals of the first switching relay, the second switching relay, the third switching relay, and the fourth switching relay are all electrically connected to the dynamic testing equipment.

7. The system according to claim 6, characterized in that, The dynamic testing equipment includes a switching test device, a dynamic tester, and a gate driver. The static testing equipment includes a static tester. The switching test device is used to generate pulse signals. The dynamic terminal of the first switching relay is electrically connected to the switching test device, and the static terminal of the first switching relay is electrically connected to the source-to-source port of the static tester. The dynamic terminal of the second switching relay is electrically connected to the gate driver, and the static terminal of the second switching relay is electrically connected to the gate-to-source port of the static tester. The dynamic terminal of the third switching relay is electrically connected to the source measurement port of the dynamic tester, and the static terminal of the third switching relay is electrically connected to the source measurement port of the static tester. The dynamic terminal of the fourth switching relay is electrically connected to the gate measurement port of the dynamic tester, and the static terminal of the fourth switching relay is electrically connected to the gate measurement port of the static tester. The wafer holder is electrically connected to the drain measurement port and the drain-to-source port of the static tester via the static switching switch. The lower metal plate is electrically connected to the drain measurement port and the drain-to-source port of the dynamic tester.

8. The system according to claim 7, characterized in that, The switch testing device includes a bus capacitor, a test diode, an energy storage inductor, and a current sensing resistor. The first end of the bus capacitor is electrically connected to the first end of the energy storage inductor and the cathode of the test diode. The second end of the energy storage inductor, the anode of the test diode, and the lower metal plate are electrically connected. The second end of the bus capacitor is electrically connected to the dynamic terminal of the first switching relay via the current sensing resistor.

9. The system according to claim 1, characterized in that, The wafer holder is provided with a lower insulating plate and a metal shielding layer on the side near the motion control device.

10. A method for testing the dynamic and static parameters of power devices at the wafer level, characterized in that, A method for testing the dynamic and static parameters of power devices at the wafer level, applicable to any one of claims 1 to 9, comprises: when the control device is in a first working state, controlling the static switching switch to be disconnected, controlling the switching device to connect the test socket and the dynamic testing device, and controlling the motion control device to drive the fixed ring to a set position; when the control device is in a second working state, controlling the motion control device to drive the fixed ring to move away from the set position, controlling the switching device to connect the test socket and the static testing device, and controlling the static switching switch to be turned on.

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