Pixel circuit and display panel

Abstract

The invention discloses a pixel circuit and a display panel. The pixel circuit comprises a pulse width modulation module, a pulse amplitude modulation module and a light emitting module. The pulse amplitude modulation module is electrically connected with the light-emitting module and used for generating driving current according to pulse amplitude modulation voltage of the input end, and the light-emitting module responds to the driving current to emit light; the pulse width modulation module comprises a first driving unit and a coupling unit, and the coupling unit is used for coupling a pulse width modulation voltage and a sweep frequency voltage to a control end of the first driving unit; the first driving unit is used for outputting a control voltage to the control end of the pulse amplitude modulation module according to the pulse width modulation voltage and the sweep frequency voltage so as to control the pulse width of the driving current; the pulse width modulation module further comprises a conduction control unit which is used for writing the pulse width modulation voltage into the coupling unit in the pulse width data writing stage and writing the sweep frequency voltage into the coupling unit in the light emitting stage. The problem of abnormal display of the pixel circuit can be solved.

Description

Technical Field

[0001] This invention relates to the field of display technology, and more particularly to a pixel circuit and a display panel. Background Technology

[0002] Display panels utilize pixel circuits to achieve display. With the development of display technology, the application of display panels is becoming more and more widespread, and the requirements for display panels are correspondingly becoming higher and higher.

[0003] However, the pixel circuits in the display panels of related technologies have display abnormalities, which limits the further application of the display panels. Summary of the Invention

[0004] This invention provides a pixel circuit and a display panel to improve the problem of abnormal pixel circuit display.

[0005] According to one aspect of the present invention, a pixel circuit is provided, the pixel circuit comprising: a pulse width modulation module, a pulse amplitude modulation module, and a light-emitting module; the pulse amplitude modulation module is electrically connected to the light-emitting module and is used to generate a driving current according to a pulse amplitude modulation voltage at its input terminal, the light-emitting module being used to emit light in response to the driving current; the pulse width modulation module includes a first driving unit and a coupling unit, the coupling unit being used to couple the pulse width modulation voltage and the sweep voltage to the control terminal of the first driving unit; the first driving unit is used to output a control voltage to the control terminal of the pulse amplitude modulation module according to the pulse width modulation voltage and the sweep voltage, so as to control the pulse width of the driving current; the pulse width modulation module further includes a conduction control unit, used to write the pulse width modulation voltage to the coupling unit during a pulse width data writing phase, and to write the sweep voltage to the coupling unit during an emission phase.

[0006] Optionally, the conduction control unit includes a write control subunit and an emission control subunit; the control terminal of the emission control subunit is connected to a first emission control signal, and the emission control subunit is used to write the sweep voltage into the coupling unit during the emission phase; the control terminal of the write control subunit is connected to a first scan signal, and the write control subunit is used to write the pulse width modulation voltage into the coupling unit during the pulse width data writing phase.

[0007] Optionally, the pixel circuit includes a data and sweep frequency voltage input terminal, which is used to input the pulse width modulation voltage during the pulse width data writing stage and the sweep frequency voltage during the light emission stage; the first terminal of the writing control subunit is electrically connected to the data and sweep frequency voltage input terminal, and the second terminal of the writing control subunit is electrically connected to the first terminal of the coupling unit; the first terminal of the light emission control subunit is electrically connected to the data and sweep frequency voltage input terminal, and the second terminal of the light emission control subunit is electrically connected to the first terminal of the coupling unit.

[0008] Optionally, the conduction control unit further includes a voltage regulation control subunit; the first terminal of the voltage regulation control subunit is electrically connected to the data and sweep frequency voltage input terminal, the second terminal of the voltage regulation control subunit is electrically connected to the first terminal of the coupling unit, the control terminal of the voltage regulation control subunit is connected to the second scan signal, and the voltage regulation control subunit is used to connect the data and sweep frequency voltage input terminal to the first terminal of the coupling unit before the pulse width data writing stage;

[0009] Alternatively, the first terminal of the voltage regulation control subunit is connected to a reference voltage, the second terminal of the voltage regulation control subunit is electrically connected to the first terminal of the coupling unit, the control terminal of the voltage regulation control subunit is connected to a second scan signal, and the voltage regulation control subunit is used to write the reference voltage to the first terminal of the coupling unit before the pulse width data writing stage;

[0010] Alternatively, the first terminal of the voltage regulation control subunit is connected to a reference voltage, the second terminal of the voltage regulation control subunit is electrically connected to the first terminal of the coupling unit, the control terminal of the voltage regulation control subunit is connected to a voltage regulation control signal, and the voltage regulation control subunit is used to write the reference voltage to the first terminal of the coupling unit during a period of one frame, except for the light emission stage and the pulse width data writing stage.

[0011] Optionally, the coupling unit includes a first coupling subunit and a second coupling subunit; the first end of the write control subunit is electrically connected to the pulse width modulation voltage input terminal, and the second end of the write control subunit is electrically connected to the first end of the second coupling subunit; the first end of the light emission control subunit is electrically connected to the sweep frequency voltage input terminal, and the second end of the light emission control subunit is electrically connected to the first end of the first coupling subunit; the second end of the first coupling subunit is electrically connected to the second end of the second coupling subunit.

[0012] Optionally, the conduction control unit further includes a voltage regulation control subunit; the first terminal of the voltage regulation control subunit is electrically connected to one of the pulse width modulation voltage input terminal, the frequency sweep voltage input terminal, and the reference voltage input terminal; the second terminal of the voltage regulation control subunit is electrically connected to the first terminal of the second coupling subunit; the control terminal of the voltage regulation control subunit is connected to the second scan signal; and the voltage regulation control subunit is used to conduct its first terminal and its second terminal before the pulse width data writing stage.

[0013] Alternatively, the first terminal of the voltage regulation control subunit is electrically connected to the reference voltage input terminal or the frequency sweep voltage input terminal, the second terminal of the voltage regulation control subunit is electrically connected to the first terminal of the second coupling subunit, the control terminal of the voltage regulation control subunit is connected to the voltage regulation control signal, and the voltage regulation control subunit is used to connect its first terminal and its second terminal within one frame time except for the light emission stage and the pulse width data writing stage.

[0014] Optionally, the conduction control unit further includes a voltage regulation control subunit, and the coupling unit further includes a third coupling subunit; the second terminal of the voltage regulation control subunit is electrically connected to the first terminal of the third coupling subunit, and the second terminal of the third coupling subunit is electrically connected to the second terminal of the first coupling subunit.

[0015] The first terminal of the voltage regulation control subunit is electrically connected to one of the pulse width modulation voltage input terminal, the frequency sweep voltage input terminal, and the reference voltage input terminal; the control terminal of the voltage regulation control subunit is connected to the second scan signal; the voltage regulation control subunit is used to connect its first terminal and its second terminal before the pulse width data writing stage.

[0016] Alternatively, the first terminal of the voltage regulation control subunit is electrically connected to the reference voltage input terminal or the frequency sweep voltage input terminal, and the control terminal of the voltage regulation control subunit is connected to the voltage regulation control signal. The voltage regulation control subunit is used to connect its first terminal and its second terminal within one frame time, except for the light emission stage and the pulse width data writing stage.

[0017] Optionally, the pulse width modulation module further includes a first initialization unit, a second initialization unit, a first threshold compensation unit, a second threshold compensation unit, and a turn-off signal writing unit; the first terminal of the first initialization unit is connected to a first initialization signal, the second terminal of the first initialization unit is electrically connected to the control terminal of the first driving unit, and the control terminal of the first initialization unit is connected to a second scan signal; the first terminal of the second initialization unit is connected to a second initialization signal, the second terminal of the second initialization unit is electrically connected to the second terminal of the first driving unit, and the control terminal of the second initialization unit is connected to a global control signal; the first terminal of the first threshold compensation unit is connected to a first power supply voltage, the second terminal of the first threshold compensation unit is electrically connected to the first terminal of the first driving unit, and the control terminal of the first threshold compensation unit is connected to a first scan signal; the first terminal of the second threshold compensation unit is electrically connected to the first terminal of the first driving unit, the second terminal of the second threshold compensation unit is electrically connected to the control terminal of the first driving unit, and the control terminal of the second threshold compensation unit is connected to the first scan signal; the first terminal of the turn-off signal writing unit is connected to the first power supply voltage, the second terminal of the turn-off signal writing unit is electrically connected to the first terminal of the first driving unit, and the control terminal of the turn-off signal writing unit is connected to a first light emission control signal.

[0018] Optionally, the pulse amplitude modulation module includes: a first light-emitting control unit, a second driving unit, a pulse amplitude data writing unit, a third threshold compensation unit, a third initialization unit, a first storage unit, and a second storage unit; the first terminal of the first light-emitting control unit is connected to a second power supply voltage, the second terminal of the first light-emitting control unit is electrically connected to the first terminal of the second driving unit, and the control terminal of the first light-emitting control unit serves as the control terminal of the pulse amplitude modulation module; the first terminal of the second light-emitting control unit is electrically connected to the second terminal of the second driving unit, the second terminal of the second light-emitting control unit is electrically connected to the first terminal of the light-emitting module, and the control terminal of the second light-emitting control unit is connected to a second light-emitting control signal; the first terminal of the pulse amplitude data writing unit is connected to the pulse amplitude data voltage, and the second terminal of the pulse amplitude data writing unit is electrically connected to the first terminal of the second driving unit. The control terminal of the pulse amplitude data writing unit is connected to the second scan signal; the first terminal of the third threshold compensation unit is electrically connected to the second terminal of the second driving unit, and the control terminal of the third threshold compensation unit is also electrically connected to the second driving unit, with the control terminal of the third threshold compensation unit connected to the second scan signal; the first terminal of the third initialization unit is connected to the third initialization signal, and the second terminal of the third initialization unit is also electrically connected to the control terminal of the second driving unit, with the control terminal of the third initialization unit connected to the third scan signal; the first terminal of the first storage unit is connected to the second power supply voltage, and the second terminal of the first storage unit is electrically connected to the control terminal of the second driving unit; the first terminal of the second storage unit is connected to the second power supply voltage, and the second terminal of the second storage unit is electrically connected to the control terminal of the first light-emitting control unit; the second terminal of the light-emitting module is connected to the third power supply voltage.

[0019] According to another aspect of the present invention, a display panel is provided, the display panel including the pixel circuit described above.

[0020] The technical solution of this invention, by setting a conduction control unit, writes a sweep frequency signal into the coupling unit during the light emission stage and a pulse width modulation voltage into the coupling unit during the pulse width data writing stage, enabling the pixel circuit to drive normally. Simultaneously, in other stages, the conduction control unit shuts off the path between the signal line transmitting the pulse width modulation voltage and the coupling unit, preventing pulse width modulation voltages from other rows transmitted on the signal line from being written into the coupling unit. This prevents potential jumps at the control terminal of the first driving unit, maintains the stability of the potential at the control terminal of the first driving unit, and improves the situation of abnormal pixel circuit display.

[0021] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 A schematic diagram of a pixel circuit structure provided in an embodiment of the present invention;

[0024] Figure 2 A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0025] Figure 3 A timing diagram of a pixel circuit provided in an embodiment of the present invention;

[0026] Figure 4 A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0027] Figure 5 A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0028] Figure 6 A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0029] Figure 7 A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0030] Figure 8 for Figure 7 A type of timing diagram;

[0031] Figure 9 A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0032] Figure 10 A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0033] Figure 11 A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0034] Figure 12A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0035] Figure 13 A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0036] Figure 14 A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0037] Figure 15 A schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention;

[0038] Figure 16 A schematic diagram of the circuit structure of another display panel provided in an embodiment of the present invention;

[0039] Figure 17 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. Detailed Implementation

[0040] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0041] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0042] Just as pixel circuits in related technologies suffer from display anomalies, the inventors, through extensive research, discovered that the cause of this problem lies in the following: For pixel circuits driven by both pulse width modulation (PWM) and pulse amplitude modulation (PAM) modules, the PWM module uses a coupling unit to couple the PWM voltage to the control terminal of the driving unit. In the display panel, after the PWM voltage of a row of pixel circuits is successfully written, it does not immediately emit light; instead, it waits until the PWM voltages of all rows of pixel circuits have been successfully written before emitting light. Since a column of pixel circuits shares a single data line, when PWM voltages are written to other rows of pixel circuits, the coupling unit of that row's pixel circuit couples the corresponding PWM voltages of those rows to the control terminal of the driving unit. This means the potential at the control terminal of the driving unit frequently jumps with the writing of each row of pixel circuits, affecting the characteristics of the driving unit and causing display anomalies. Furthermore, different pixel circuits are affected by different bias voltages, leading to inconsistent characteristics of the driving units of different pixel circuits, resulting in display anomalies.

[0043] To address the aforementioned technical problems, the present invention proposes the following solutions:

[0044] Figure 1 This is a schematic diagram of a pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 1 The pixel circuit includes a pulse width modulation module 1, a pulse amplitude modulation module 2, and a light-emitting module 3. The pulse amplitude modulation module 2 is electrically connected to the light-emitting module 3. The pulse amplitude modulation module 2 generates a driving current based on the pulse amplitude modulation voltage DataI at its input terminal, and the light-emitting module 3 emits light in response to the driving current. The pulse width modulation module 1 includes a first driving unit 11 and a coupling unit 12. The coupling unit 12 couples the pulse width modulation voltage Datat and the sweep voltage sweepp to the control terminal of the first driving unit 11. The first driving unit 11 outputs a control voltage to the control terminal of the pulse amplitude modulation module 2 based on the pulse width modulation voltage Datat and the sweep voltage sweepp to control the pulse width of the driving current. The pulse width modulation module 1 also includes a conduction control unit 13. The conduction control unit 13 writes the pulse width modulation voltage Datat to the coupling unit 12 during the pulse width data writing stage and writes the sweep voltage sweepp to the coupling unit 12 during the light-emitting stage.

[0045] Specifically, the pixel circuit generates a driving current to drive the light-emitting module 3 to emit light. The light-emitting module 3 can be an OLED (Organic Light Emitting Diode), Micro-LED (Micro Light Emitting Diode), or Mini-LED (Mini Light Emitting Diode), etc. The pulse amplitude modulation module 2 can control the amplitude of the driving current according to the pulse amplitude modulation voltage DataI. The pulse width modulation module 1 can control the pulse width of the driving current according to the pulse width modulation voltage Datat. By precisely controlling the width and amplitude of the driving current, more refined adjustment of the light-emitting module can be achieved.

[0046] In this embodiment, the coupling unit 12 is mainly used to couple the pulse width modulation voltage Datat and the sweep frequency voltage sweepp to the control terminal of the first driving unit 11, so that the first driving unit 11 can output a control signal to control the pulse width of the driving current.

[0047] In addition, in this embodiment, by setting a turn-on control unit 13, the turn-on control unit 13 can write the pulse width data voltage Datat to the coupling unit 12 during the pulse width data writing stage of the pixel circuit in this row, so that the coupling unit 12 can further couple the pulse width data voltage Datat to the control terminal of the first driving unit 11. During the light-emitting stage of the pixel circuit in this row, the sweep voltage sweep can be written to the coupling unit 12, so that the coupling unit 12 can write the sweep voltage sweep to the control terminal of the first driving unit 11. In other stages, the turn-on control unit 13 controls the path between the coupling unit 12 and the signal line that writes the pulse width modulation voltage Datat to the pixel circuit to be turned off, so that the pulse width modulation voltage corresponding to other pixel circuits will not be written to the coupling unit 12 of the pixel circuit in this row, thereby preventing the potential jump of the control terminal of the first driving unit 11, maintaining the stability of the potential of the control terminal of the first driving unit 11, and improving the display abnormality of the pixel circuit. At the same time, it can also make the display consistency of different pixel circuits in the display panel higher.

[0048] The technical solution of this embodiment employs a pixel circuit including a pulse width modulation module, a pulse amplitude modulation module, and a light-emitting module. The pulse amplitude modulation module is electrically connected to the light-emitting module and is used to generate a driving current based on the pulse amplitude modulation voltage at its input terminal. The light-emitting module emits light in response to the driving current. The pulse width modulation module includes a first driving unit and a coupling unit. The coupling unit is used to couple the pulse width modulation voltage and the sweep voltage to the control terminal of the first driving unit. The first driving unit is used to output a control voltage to the control terminal of the pulse amplitude modulation module based on the pulse width modulation voltage and the sweep voltage to control the pulse width of the driving current. The pulse width modulation module also includes a conduction control unit, used to write the pulse width modulation voltage to the coupling unit during the pulse width data writing stage and to write the sweep voltage to the coupling unit during the light-emitting stage. By setting the conduction control unit, the sweep signal is written to the coupling unit during the light-emitting stage, and the pulse width modulation voltage is written to the coupling unit during the pulse width data writing stage, enabling the pixel circuit to drive normally. Meanwhile, in other stages, the conduction control unit shuts off the path between the signal line transmitting the pulse width modulation voltage and the coupling unit, preventing the pulse width modulation voltage of other lines transmitted on the signal line from being written into the coupling unit. This prevents the potential of the control terminal of the first driving unit from jumping, maintains the stability of the potential of the control terminal of the first driving unit, and improves the situation of abnormal pixel circuit display.

[0049] The above outlines the core idea of ​​this invention. For ease of understanding, the specific circuit structures of the pulse width modulation module 1 and the pulse amplitude modulation module 2 will be described below. It should be noted that there are various ways to implement the pulse width modulation module 1 and the pulse amplitude modulation module 2; this embodiment is merely an example.

[0050] Optionally, Figure 2 This is a schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention, with reference to... Figure 2The pulse width modulation module 1 further includes a first initialization unit 14, a second initialization unit 17, a first threshold compensation unit 15, a second threshold compensation unit 16, and a turn-off signal writing unit 18. The first terminal of the first initialization unit 14 is connected to a first initialization signal Vint3, and the second terminal of the first initialization unit 14 is electrically connected to the control terminal of the first driving unit 11. The control terminal of the first initialization unit 14 is connected to a second scan signal Gn-1. The first terminal of the second initialization unit 17 is connected to a second initialization signal Vint1, and the second terminal of the second initialization unit 17 is electrically connected to the second terminal of the first driving unit 11. The control terminal of the second initialization unit 17 is connected to a global control signal Set. The first terminal of the first threshold compensation unit 15 is connected to a first power supply voltage VDDW, and the second terminal of the first threshold compensation unit 15 is electrically connected to the first... The first end of the driving unit 11 is electrically connected, and the control end of the first threshold compensation unit 15 is connected to the first scan signal Gn; the first end of the second threshold compensation unit 16 is electrically connected to the first end of the first driving unit 11, and the second end of the second threshold compensation unit 16 is electrically connected to the control end of the first driving unit 11, and the control end of the second threshold compensation unit 16 is connected to the first scan signal Gn; the first end of the turn-off signal writing unit 18 is connected to the first power supply voltage VDDW, the second end of the turn-off signal writing unit 18 is electrically connected to the first end of the first driving unit 11, and the control end of the turn-off signal writing unit 18 is connected to the first light emission control signal EM2.

[0051] The pulse amplitude modulation module 2 includes a first light-emitting control unit 22, a second driving unit 21, a second light-emitting control unit 23, a pulse amplitude data writing unit 24, a third threshold compensation unit 25, a third initialization unit 26, a first storage unit 27, and a second storage unit 28. The first terminal of the first light-emitting control unit 22 is connected to the second power supply voltage ELVDD, and the second terminal of the first light-emitting control unit 22 is electrically connected to the first terminal of the second driving unit 21. The control terminal of the first light-emitting control unit 22 serves as the control terminal of the pulse amplitude modulation module 2. The first terminal of the second light-emitting control unit 23 is electrically connected to the second terminal of the second driving unit 21 and the first terminal of the light-emitting module 3. The control terminal of the second light-emitting control unit 23 is connected to the second light-emitting control signal EM1. The first terminal of the pulse amplitude data writing unit 24 serves as the input terminal of the pulse amplitude modulation module 2, used to connect to the pulse amplitude data voltage DataI. The second terminal of the pulse amplitude data writing unit 24 is electrically connected to the first terminal of the second driving unit 21, and the control terminal of the pulse amplitude data writing unit 24 is connected to the second scan signal Gn-1. The third threshold compensation unit 25... The first end of the first storage unit 27 is electrically connected to the second end of the second driving unit 21; the second end of the third threshold compensation unit 25 is electrically connected to the control end of the second driving unit 21; the control end of the third threshold compensation unit 25 is connected to the second scan signal Gn-1; the first end of the third initialization unit 26 is connected to the third initialization signal Vint2; the second end of the third initialization unit 26 is electrically connected to the control end of the second driving unit 21; the control end of the third initialization unit 26 is connected to the third scan signal Gn-2; the first end of the first storage unit 27 is connected to the second power supply voltage ELVDD; the second end of the first storage unit 27 is electrically connected to the control end of the second driving unit 21; the first end of the second storage unit 28 is connected to the second power supply voltage ELVDD; the second end of the second storage unit 28 is electrically connected to the control end of the first light-emitting control unit 22; the second end of the light-emitting module 3 is connected to the third power supply voltage ELVSS.

[0052] Specifically, Figure 3 A timing diagram of a pixel circuit provided in an embodiment of the present invention is shown below. Figure 2 and Figure 3 The operation of a pixel circuit includes stages t1-t8.

[0053] In the first stage t1, which is the stage where the previous frame is displayed, the control terminal of the first light-emitting control unit 22 is written with the second power supply voltage VDDW, the first light-emitting control unit 22 is turned off, and the light-emitting module 3 does not emit light.

[0054] In the second stage t2, the third scan signal Gn-2 controls the third initialization unit 26 to be turned on, and then the control terminal of the second drive unit 21 is initialized by the third initialization signal Vint2, so that the second drive unit 21 is turned on.

[0055] In the third stage t3, the second scan signal Gn-1 is enabled, controlling the first initialization unit 14 to turn on. This, in turn, initializes the control terminal of the first drive unit 11 using the first initialization signal Vint3, turning on the first drive unit 11. Additionally, the pulse amplitude data writing unit 24 and the third threshold compensation unit 25 are turned on. The pulse amplitude data voltage DataI is written to the control terminal of the second drive unit 21 after passing through the pulse amplitude data writing unit 24, the second drive unit 21, and the third threshold compensation unit 25, completing the threshold compensation for the second drive unit 21. The first storage unit 27 maintains the potential of the second drive unit 21.

[0056] In the fourth stage t4, which is the pulse width data writing stage, the control unit 13 writes the pulse width modulation voltage into the coupling unit 12. Simultaneously, the first threshold compensation unit 15 and the second threshold compensation unit 16 are turned on, and the first power supply voltage VDDW is written into the control terminal of the first drive unit 11, completing the threshold compensation for the first drive unit 11. At this time, the voltages across the coupling unit 12 are Datat and VDDW+Vth, respectively, where Vth is the threshold voltage of the first drive unit 11. Therefore, the voltage difference across the two ends is VDDW+Vth-Datat.

[0057] In the fifth stage t5, the other row pixel circuits sequentially perform the above stages.

[0058] In stage t6, all row pixel circuits have completed stage four. At this point, all input pulse width modulation voltage signal lines are set to the sweep voltage sweep. The sweep voltage sweep is greater than or equal to the maximum value among all pulse width modulation voltages. At this time, the control terminal voltage of the first driving unit 11 is sweep + VDDW + Vth - datat.

[0059] In the seventh stage t7, the global control signal set controls the second initialization unit 17 to be turned on, and the second initialization signal Vint1 initializes the control terminal of the first light-emitting control unit 22, so that the first light-emitting control unit 22 is turned on.

[0060] In the eighth stage t8, i.e., the light-emitting stage, the second light-emitting control signal EM1 controls the second light-emitting control unit 23 to turn on, and the light-emitting module 3 begins to emit light. The first light-emitting control signal EM2 controls the turn-off signal writing unit 18 to turn on. The control unit 13 writes the sweep signal to the coupling unit 12, and the coupling unit 12 couples the sweep signal to the control terminal of the first driving unit. The potential of the control terminal of the first driving unit 11 begins to decrease under the control of the sweep voltage. When the voltage difference between the control terminal and the first terminal is the threshold voltage of the first driving unit 11, the first driving unit 11 turns on, causing the control terminal of the first light-emitting control unit 22 to write the first power supply voltage VDDW, and the first light-emitting control unit 22 turns off, ending the light emission.

[0061] Optionally, the first driving unit 11 includes a first transistor T1, the first end of the first transistor T1 serves as the first end of the first driving unit 11, the second end of the first transistor T1 serves as the second end of the first driving unit 11, and the control end of the first transistor T1 serves as the control end of the first driving unit 11.

[0062] The second driving unit 21 includes a second transistor T2, the first end of the second transistor T2 serves as the first end of the second driving unit 21, the second end of the second transistor T2 serves as the second end of the second driving unit 21, and the control end of the second transistor T2 serves as the control end of the second driving unit 21.

[0063] The first light-emitting control unit 22 includes a third transistor T3. The first terminal of the third transistor T3 serves as the first terminal of the first light-emitting control unit 22, the second terminal of the third transistor T3 serves as the second terminal of the first light-emitting control unit 22, and the control terminal of the third transistor T3 serves as the control terminal of the first light-emitting control unit 22.

[0064] The second light-emitting control unit 23 includes a fourth transistor T4, the first terminal of the fourth transistor T4 serves as the first terminal of the second light-emitting control unit 23, the second terminal of the fourth transistor T4 serves as the second terminal of the second light-emitting control unit 23, and the control terminal of the fourth transistor T4 serves as the control terminal of the second light-emitting control unit 23.

[0065] The pulse amplitude data writing unit 24 includes a fifth transistor T5. The first terminal of the fifth transistor T5 serves as the first terminal of the pulse amplitude data writing unit 24, the second terminal of the fifth transistor T5 serves as the second terminal of the pulse amplitude data writing unit 24, and the control terminal of the fifth transistor T5 serves as the control terminal of the pulse amplitude data writing unit 24.

[0066] The third initialization unit 26 includes a sixth transistor T6. The first terminal of the sixth transistor T6 serves as the first terminal of the third initialization unit 26, the second terminal of the sixth transistor T6 serves as the second terminal of the third initialization unit 26, and the control terminal of the sixth transistor T6 serves as the control terminal of the third initialization unit 26.

[0067] The third threshold compensation unit 25 includes a seventh transistor T7. The first terminal of the seventh transistor T7 serves as the first terminal of the third threshold compensation unit 25, the second terminal of the seventh transistor T7 serves as the second terminal of the third threshold compensation unit 25, and the control terminal of the seventh transistor T7 serves as the control terminal of the third threshold compensation unit 25.

[0068] The second threshold compensation unit 16 includes an eighth transistor T8. The first terminal of the eighth transistor T8 serves as the first terminal of the second threshold compensation unit 16, the second terminal of the eighth transistor T8 serves as the second terminal of the second threshold compensation unit 16, and the control terminal of the eighth transistor T8 serves as the control terminal of the second threshold compensation unit 16.

[0069] The first initialization unit 14 includes a ninth transistor T9. The first terminal of the ninth transistor T9 serves as the first terminal of the first initialization unit 14, the second terminal of the ninth transistor T9 serves as the second terminal of the first initialization unit 14, and the control terminal of the ninth transistor T9 serves as the control terminal of the first initialization unit 14.

[0070] The second initialization unit 17 includes a tenth transistor T10. The first terminal of the tenth transistor T10 serves as the first terminal of the second initialization unit 17, the second terminal of the tenth transistor T10 serves as the second terminal of the second initialization unit 17, and the control terminal of the tenth transistor T10 serves as the control terminal of the second initialization unit 17.

[0071] The first threshold compensation unit 15 includes an eleventh transistor T11. The first terminal of the eleventh transistor T11 serves as the first terminal of the first threshold compensation unit 15, the second terminal of the eleventh transistor T11 serves as the second terminal of the first threshold compensation unit 15, and the control terminal of the eleventh transistor T11 serves as the control terminal of the first threshold compensation unit 15.

[0072] The shutdown signal writing unit 18 includes a twelfth transistor T12. The first terminal of the twelfth transistor T12 serves as the first terminal of the shutdown signal writing unit 18, the second terminal of the twelfth transistor T12 serves as the second terminal of the shutdown signal writing unit 18, and the control terminal of the twelfth transistor T12 serves as the control terminal of the shutdown signal writing unit 18.

[0073] Optionally, Figure 4 This is a schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention, with reference to... Figure 4The conduction control unit 13 includes an illumination control subunit 131 and a write control subunit 132. The control terminal of the illumination control subunit 131 is connected to a first illumination control signal EM2, and the illumination control subunit 131 is used to write a sweep voltage to the coupling unit 12 during the illumination phase. The control terminal of the write control subunit 132 is connected to a first scan signal Gn, and the write control subunit 132 is used to write a pulse width modulation voltage to the coupling unit 12 during the pulse width data writing phase.

[0074] Specifically, in this embodiment, the light-emitting control subunit 131 is turned on during the light-emitting phase, allowing the sweep voltage to be written into the coupling unit 12, enabling the light-emitting module 2 to emit light normally. During other phases, the light-emitting control subunit 131 is turned off to prevent the signal line transmitting the sweep voltage from being connected to the coupling unit 12. The write control subunit 132 is turned on during the pulse width data write phase, allowing the pulse width modulation voltage to be written into the coupling unit. During other phases, the write control subunit 132 is turned off to prevent the pulse width modulation voltage corresponding to other row pixel circuits from being written into the coupling unit of this row pixel circuit, thus preventing voltage instability at the control terminal of the first driving unit. In this embodiment, the function of the conduction control unit can be achieved using a simple circuit structure, and the signals connected to the control terminals of each subunit in the conduction control unit are signals from the existing pixel circuit, eliminating the need for additional control signals and resulting in a simple circuit structure.

[0075] Alternatively, in some implementations, such as Figure 4 As shown, the pixel circuit includes a first voltage input terminal, which is used to input a pulse width modulation voltage (datat) during the pulse width data writing stage and a sweep voltage (sweep) during the light emission stage; the first terminal of the write control subunit 132 is electrically connected to the data and sweep voltage input terminals, and the second terminal of the write control subunit is electrically connected to the first terminal of the coupling unit 12; the first terminal of the light emission control subunit 131 is electrically connected to the data and sweep voltage input terminals, and the second terminal of the light emission control subunit 131 is electrically connected to the first terminal of the coupling unit 12.

[0076] Specifically, in this embodiment, the sweep voltage (sweep) and the pulse width modulation voltage (Datat) are input through a single input terminal, i.e., the data and sweep voltage input terminal. A single pixel circuit requires only one data line to provide both the sweep voltage (sweep) and the pulse width modulation voltage (Datat), saving a signal line, reducing wiring complexity, and reducing costs.

[0077] Optionally, Figure 5 This is a schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention, with reference to... Figure 5The conduction control unit 13 also includes a voltage regulation control subunit 133. The first terminal of the voltage regulation control subunit 133 is electrically connected to the data and sweep frequency voltage input terminal Datat / sweep, and the second terminal of the voltage regulation control subunit 133 is connected to the second scan signal Gn-1. The voltage regulation control subunit 133 is used to connect the data and sweep frequency voltage input terminal to the first terminal of the coupling unit 12 before the pulse width data writing stage.

[0078] Specifically, in Figure 4 In the illustrated embodiment, the first terminal of the coupling unit 12 is written with a pulse width modulation voltage during the pulse width data writing phase, and is in a floating state before the pulse width data writing phase. In this embodiment, by setting a voltage regulation control subunit 133, data and the voltage on the sweep frequency voltage input terminal can be written to the first terminal of the coupling unit 12 before the pulse width data writing phase, avoiding the first terminal of the coupling unit 12 being floating, thereby further improving the stability of the potential at the control terminal of the first driving unit 11. The second scan signal Gn-1 and the first scan signal Gn are shift signals of each other, wherein the stage corresponding to the second scan signal Gn-1 in this row is the same stage as the stage corresponding to the first scan signal Gn in the previous row of pixel circuits.

[0079] Optionally, Figure 6 This is a schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention, and... Figure 5 The difference in the structure shown is that, in this embodiment, the first terminal of the voltage regulation control subunit 133 is connected to a reference voltage Vref. The reference voltage Vref is a DC voltage, and the voltage regulation control subunits 133 of all pixel circuits in the display panel are connected to the same reference voltage Vref. Figure 5 In the illustrated embodiment, within the same frame, different pixel circuits are written with different voltages by their corresponding voltage regulation control subunits 133, and the characteristics of the first driving voltage in different pixel circuits may still deviate. In this embodiment, all pixel circuit voltage regulation control subunits 133 write a reference voltage Vref to the coupling unit 12, resulting in higher consistency of characteristics among different pixel circuits and further improving the display effect.

[0080] Optionally, Figure 7 This is a schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention. Figure 8 for Figure 7 A timing diagram, reference Figure 7 and Figure 8In this embodiment, the first terminal of the voltage regulation control subunit 133 is connected to the reference voltage Vref, and the control terminal of the voltage regulation control subunit 133 is connected to the voltage regulation control signal Gnre. The voltage regulation control subunit 133 is used to write the reference voltage Vref to the first terminal of the coupling unit 12 during a frame time, except for the light emission stage and the pulse width data writing stage.

[0081] Specifically, in this embodiment, the voltage regulation control signal Gnre controls the voltage regulation control subunit 133 to be turned on during stages other than the pulse width data writing stage and the light emission stage, so that the voltage at the first terminal of the coupling unit 12 remains stable during these stages, thereby avoiding frequent voltage jumps at the control terminal of the first driving unit 11. During the pulse width data writing stage and the light emission stage, the voltage regulation control signal Gnre controls the voltage regulation control subunit 133 to be turned off, so as not to affect the normal writing of the corresponding signals to the coupling unit 12 by the light emission control subunit 131 and the writing control subunit 132.

[0082] Optionally, in the above embodiment, the coupling unit 12 includes a third capacitor C3, with the first end of the third capacitor C3 serving as the first end of the coupling unit 12 and the second end of the third capacitor C3 serving as the second end of the coupling unit 12.

[0083] Alternatively, in other embodiments, such as Figure 9 As shown, Figure 9 This is a schematic diagram of a pixel circuit structure provided in another embodiment of the present invention. The coupling unit 12 includes a first coupling subunit 121 and a second coupling subunit 122; the first terminal of the write control subunit 132 is electrically connected to the pulse width modulation voltage input terminal, and the second terminal of the write control subunit 132 is electrically connected to the first terminal of the second coupling subunit 122; the first terminal of the light emission control subunit 131 is electrically connected to the sweep frequency voltage input terminal, and the second terminal of the light emission control subunit 132 is electrically connected to the first terminal of the first coupling subunit 121. The second terminal of the first coupling subunit 121 is electrically connected to the second terminal of the second coupling subunit 122.

[0084] Specifically, in this embodiment, the light emission control subunit 131 and the write control subunit 132 are connected to different coupling subunits. The coupling unit 12 is equivalent to two coupling subunits connected in parallel, which can increase the overall capacitance value of the coupling unit 12 and improve the stability of the pixel circuit operation. In addition, compared with the method of using a single capacitor for the coupling unit, in this embodiment, the voltage switching frequency at the first end of each coupling subunit is reduced, which can improve the service life of each coupling subunit.

[0085] Optionally, the first coupling subunit 121 includes a fourth capacitor C4, with the first end of the fourth capacitor C4 serving as the first end of the first coupling subunit 121 and the second end of the fourth capacitor C4 serving as the second end of the first coupling subunit 121.

[0086] Optionally, the second coupling subunit 122 includes a fifth capacitor C5, with the first end of the fifth capacitor C5 serving as the first end of the second coupling subunit 122 and the second end of the fifth capacitor C5 serving as the second end of the second coupling subunit 122.

[0087] Optionally, Figure 10 This is a schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention. Figure 11 This is a schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention. Figure 12 This is a schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention, with reference to... Figures 10 to 12 The conduction control unit 13 also includes a voltage regulation control subunit 133. The first terminal of the voltage regulation control subunit 133 is electrically connected to one of the pulse width modulation voltage input terminal, the sweep frequency voltage input terminal, and the reference voltage input terminal; wherein, the pulse width modulation voltage input terminal is used to input the pulse width modulation voltage, the sweep frequency voltage input terminal is used to input the sweep frequency voltage, and the reference voltage input terminal is used to input the reference voltage. The control terminal of the voltage regulation control subunit 133 is connected to the second scan signal Gn-1.

[0088] Specifically, in this embodiment, the first terminal of the voltage regulation control subunit 133 can be connected to the pulse width modulation voltage input terminal, the sweep frequency voltage input terminal, or the reference voltage input terminal. When the second scan signal Gn-1 is enabled, a voltage can be written to the first terminal of the second coupling subunit, thus preventing the first terminal of the second coupling subunit 122 from being left floating during the pulse width data writing stage.

[0089] Alternatively, in some other implementations, Figure 13 This is a schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention. Figure 14 This is a schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention, with reference to... Figure 13 and Figure 14 In this embodiment, the control terminal of the voltage regulation control subunit 133 is connected to the voltage regulation control signal Gnre, and the first terminal of the voltage regulation control subunit 133 is electrically connected to the reference voltage input terminal or the sweep frequency voltage input terminal. In this embodiment, the voltage regulation control subunit 133 can write signals to the first terminal of the second coupling subunit 122 in all stages except the pulse width data writing stage and the light emission stage, thereby ultimately avoiding frequent potential jumps at the control terminal of the first driving unit 11.

[0090] Optionally, Figure 15This is a schematic diagram of the circuit structure of another pixel circuit provided in an embodiment of the present invention, with reference to... Figure 15 Unlike the above embodiments, in this embodiment, the coupling unit 12 further includes a third coupling subunit 123. The second end of the voltage regulation control subunit 133 is electrically connected to the first end of the third coupling subunit 123, and the second end of the third coupling subunit 123 is electrically connected to the second end of the first coupling subunit 121 and the first end of the second coupling subunit 122.

[0091] Similar to the above embodiments, the control terminal of the voltage regulation control subunit 123 can be connected to the second scan signal Gn-1. In this case, the first terminal of the voltage regulation control subunit 123 can be connected to one of the pulse width modulation voltage input terminal, the frequency sweep voltage input terminal, and the reference voltage input terminal. The control terminal of the voltage regulation control subunit 123 can also be connected to the voltage regulation control signal Gnre. In this case, the first terminal of the voltage regulation control subunit 123 can be connected to either the reference voltage input terminal or the frequency sweep voltage input terminal. In this embodiment, the voltage regulation control subunit 123 corresponds to a single coupling subunit, which can further make the coupling unit 12 equivalent to multiple capacitors connected in parallel, resulting in a larger overall capacitance of the coupling unit 12, thereby further improving the stability of the coupling unit 12's operation.

[0092] Optionally, the third coupling subunit 123 includes a sixth capacitor C6, with the first end of the sixth capacitor C6 serving as the first end of the third coupling subunit 123 and the second end of the sixth capacitor C6 serving as the second end of the third coupling subunit 123.

[0093] Optionally, Figure 16 This is a schematic diagram of the circuit structure of another display panel provided in an embodiment of the present invention, with reference to... Figure 16 The light-emitting control subunit 131 includes a thirteenth transistor T13. The first terminal of the thirteenth transistor T13 serves as the first terminal of the light-emitting control subunit 131, the second terminal of the thirteenth transistor T13 serves as the second terminal of the light-emitting control subunit 131, and the control terminal of the thirteenth transistor T13 serves as the control terminal of the light-emitting control subunit 131.

[0094] The write control subunit 132 includes a fourteenth transistor T14. The first terminal of the fourteenth transistor T14 serves as the first terminal of the write control subunit 132, the second terminal of the fourteenth transistor T14 serves as the second terminal of the write control subunit 132, and the control terminal of the fourteenth transistor T14 serves as the control terminal of the write control subunit 132.

[0095] The voltage regulation control subunit 133 includes a fifteenth transistor T15. The first terminal of the fifteenth transistor T15 serves as the first terminal of the voltage regulation control subunit 133, the second terminal of the fifteenth transistor T15 serves as the second terminal of the voltage regulation control subunit 133, and the control terminal of the fifteenth transistor T15 serves as the control terminal of the voltage regulation control subunit 133.

[0096] The present invention also provides a display panel, such as Figure 17 As shown, Figure 17 This is a schematic diagram of a display panel provided in an embodiment of the present invention. The display panel 70 includes the pixel circuit provided in any embodiment of the present invention. The display panel 70 can be a display panel in a mobile phone, tablet computer, MP3 player, MP4 player, smartwatch, smart helmet, or other wearable device. Since the display panel provided in the embodiment of the present invention includes the pixel circuit provided in the embodiment of the present invention, it also has the same beneficial effects, which will not be described again here.

[0097] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0098] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A pixel circuit, characterized in that, The pixel circuit includes: a pulse width modulation module, a pulse amplitude modulation module, and a light-emitting module; The pulse amplitude modulation module is electrically connected to the light-emitting module and is used to generate a driving current according to the pulse amplitude modulation voltage at its input terminal. The light-emitting module is used to emit light in response to the driving current. The pulse width modulation module includes a first driving unit and a coupling unit. The coupling unit is used to couple the pulse width modulation voltage and the sweep voltage to the control terminal of the first driving unit. The first driving unit is used to output a control voltage to the control terminal of the pulse amplitude modulation module according to the pulse width modulation voltage and the sweep voltage, so as to control the pulse width of the driving current. The pulse width modulation module further includes a conduction control unit, used to write the pulse width modulation voltage into the coupling unit during the pulse width data writing stage, and to write the sweep voltage into the coupling unit during the light emission stage.

2. The pixel circuit according to claim 1, characterized in that, The conduction control unit includes a write control subunit and a light emission control subunit; The control terminal of the light emission control subunit is connected to the first light emission control signal, and the light emission control subunit is used to write the sweep frequency voltage into the coupling unit during the light emission stage; The control terminal of the write control subunit is connected to the first scan signal, and the write control subunit is used to write the pulse width modulation voltage into the coupling unit during the pulse width data writing stage.

3. The pixel circuit according to claim 2, characterized in that, The pixel circuit includes a data and a sweep voltage input terminal, which is used to input the pulse width modulation voltage during the pulse width data writing stage and the sweep voltage during the light emission stage. The first terminal of the write control subunit is electrically connected to the data and sweep frequency voltage input terminal, and the second terminal of the write control subunit is electrically connected to the first terminal of the coupling unit. The first end of the light emission control subunit is electrically connected to the data and frequency sweep voltage input terminal, and the second end of the light emission control subunit is electrically connected to the first end of the coupling unit.

4. The pixel circuit according to claim 3, characterized in that, The conduction control unit also includes a voltage regulation control subunit; The first terminal of the voltage regulation control subunit is electrically connected to the data and frequency sweep voltage input terminal, the second terminal of the voltage regulation control subunit is electrically connected to the first terminal of the coupling unit, the control terminal of the voltage regulation control subunit is connected to the second scan signal, and the voltage regulation control subunit is used to connect the data and frequency sweep voltage input terminal to the first terminal of the coupling unit before the pulse width data writing stage; Alternatively, the first terminal of the voltage regulation control subunit is connected to a reference voltage, the second terminal of the voltage regulation control subunit is electrically connected to the first terminal of the coupling unit, the control terminal of the voltage regulation control subunit is connected to a second scan signal, and the voltage regulation control subunit is used to write the reference voltage to the first terminal of the coupling unit before the pulse width data writing stage; Alternatively, the first terminal of the voltage regulation control subunit is connected to a reference voltage, the second terminal of the voltage regulation control subunit is electrically connected to the first terminal of the coupling unit, the control terminal of the voltage regulation control subunit is connected to a voltage regulation control signal, and the voltage regulation control subunit is used to write the reference voltage to the first terminal of the coupling unit during a period of one frame, except for the light emission stage and the pulse width data writing stage.

5. The pixel circuit according to claim 2, characterized in that, The coupling unit includes a first coupling subunit and a second coupling subunit; The first terminal of the write control subunit is electrically connected to the pulse width modulation voltage input terminal, and the second terminal of the write control subunit is electrically connected to the first terminal of the second coupling subunit; The first terminal of the light emission control subunit is electrically connected to the sweep frequency voltage input terminal, and the second terminal of the light emission control subunit is electrically connected to the first terminal of the first coupling subunit. The second end of the first coupling subunit is electrically connected to the second end of the second coupling subunit.

6. The pixel circuit according to claim 5, characterized in that, The conduction control unit also includes a voltage regulation control subunit; The first terminal of the voltage regulation control subunit is electrically connected to one of the pulse width modulation voltage input terminal, the frequency sweep voltage input terminal, and the reference voltage input terminal. The second terminal of the voltage regulation control subunit is electrically connected to the first terminal of the second coupling subunit. The control terminal of the voltage regulation control subunit is connected to the second scanning signal. The voltage regulation control subunit is used to connect its first terminal and its second terminal before the pulse width data writing stage. Alternatively, the first terminal of the voltage regulation control subunit is electrically connected to the reference voltage input terminal or the frequency sweep voltage input terminal, the second terminal of the voltage regulation control subunit is electrically connected to the first terminal of the second coupling subunit, the control terminal of the voltage regulation control subunit is connected to the voltage regulation control signal, and the voltage regulation control subunit is used to connect its first terminal and its second terminal within one frame time except for the light emission stage and the pulse width data writing stage.

7. The pixel circuit according to claim 5, characterized in that, The conduction control unit further includes a voltage regulation control subunit, and the coupling unit further includes a third coupling subunit; The second terminal of the voltage regulation control subunit is electrically connected to the first terminal of the third coupling subunit, and the second terminal of the third coupling subunit is electrically connected to the second terminal of the first coupling subunit. The first terminal of the voltage regulation control subunit is electrically connected to one of the pulse width modulation voltage input terminal, the frequency sweep voltage input terminal, and the reference voltage input terminal; the control terminal of the voltage regulation control subunit is connected to the second scan signal; the voltage regulation control subunit is used to connect its first terminal and its second terminal before the pulse width data writing stage. Alternatively, the first terminal of the voltage regulation control subunit is electrically connected to the reference voltage input terminal or the frequency sweep voltage input terminal, and the control terminal of the voltage regulation control subunit is connected to the voltage regulation control signal. The voltage regulation control subunit is used to connect its first terminal and its second terminal within one frame time, except for the light emission stage and the pulse width data writing stage.

8. The pixel circuit according to claim 1, characterized in that, The pulse width modulation module further includes a first initialization unit, a second initialization unit, a first threshold compensation unit, a second threshold compensation unit, and a turn-off signal writing unit; The first terminal of the first initialization unit is connected to a first initialization signal, the second terminal of the first initialization unit is electrically connected to the control terminal of the first driving unit, and the control terminal of the first initialization unit is connected to a second scan signal. The first terminal of the second initialization unit is connected to the second initialization signal, the second terminal of the second initialization unit is electrically connected to the second terminal of the first driving unit, and the control terminal of the second initialization unit is connected to the global control signal. The first terminal of the first threshold compensation unit is connected to the first power supply voltage, the second terminal of the first threshold compensation unit is electrically connected to the first terminal of the first driving unit, and the control terminal of the first threshold compensation unit is connected to the first scan signal. The first end of the second threshold compensation unit is electrically connected to the first end of the first driving unit, the second end of the second threshold compensation unit is electrically connected to the control end of the first driving unit, and the control end of the second threshold compensation unit is connected to the first scanning signal. The first terminal of the shutdown signal writing unit is connected to the first power supply voltage, the second terminal of the shutdown signal writing unit is electrically connected to the first terminal of the first driving unit, and the control terminal of the shutdown signal writing unit is connected to the first light emission control signal.

9. The pixel circuit according to claim 1, characterized in that, The pulse amplitude modulation module includes: a first light-emitting control unit, a second driving unit, a second light-emitting control unit, a pulse amplitude data writing unit, a third threshold compensation unit, a third initialization unit, a first storage unit, and a second storage unit; The first terminal of the first light-emitting control unit is connected to the second power supply voltage, the second terminal of the first light-emitting control unit is electrically connected to the first terminal of the second driving unit, and the control terminal of the first light-emitting control unit serves as the control terminal of the pulse amplitude modulation module. The first end of the second light-emitting control unit is electrically connected to the second end of the second driving unit, the second end of the second light-emitting control unit is electrically connected to the first end of the light-emitting module, and the control end of the second light-emitting control unit is connected to the second light-emitting control signal; The first terminal of the pulse amplitude data writing unit is connected to the pulse amplitude data voltage, the second terminal of the pulse amplitude data writing unit is electrically connected to the first terminal of the second driving unit, and the control terminal of the pulse amplitude data writing unit is connected to the second scanning signal. The first end of the third threshold compensation unit is electrically connected to the second end of the second driving unit, the second end of the third threshold compensation unit is electrically connected to the control end of the second driving unit, and the control end of the third threshold compensation unit is connected to the second scanning signal; The first terminal of the third initialization unit is connected to the third initialization signal, the second terminal of the third initialization unit is electrically connected to the control terminal of the second driving unit, and the control terminal of the third initialization unit is connected to the third scan signal; The first end of the first storage unit is connected to the second power supply voltage, and the second end of the first storage unit is electrically connected to the control terminal of the second driving unit; the first end of the second storage unit is connected to the second power supply voltage, and the second end of the second storage unit is electrically connected to the control terminal of the first light-emitting control unit; the second end of the light-emitting module is connected to the third power supply voltage.

10. A display panel, characterized in that, The display panel includes the pixel circuitry as described in any one of claims 1-9.

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