RRAM data writing and reading method and device based on anti-phase programming
By reading back and comparing bit by bit in the RRAM, the inversion programming threshold is determined, which reduces the number of bits to be written and increases the number of repeated erase and write cycles. This solves the problem of limited repeated erase and write cycles in RRAM and enhances the chip's competitiveness.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- TSINGHUA UNIVERSITY
- Filing Date
- 2025-12-24
- Publication Date
- 2026-05-01
AI Technical Summary
In existing technologies, the number of times RRAM can be repeatedly erased and rewritten is limited, which reduces the competitiveness of the chip.
By reading back the target resistive random access memory, the total number of bits of data to be written is determined, and a bit-by-bit comparison operation is performed. The inversion programming threshold is determined based on the number of bits. If the number of bits is greater than or equal to the threshold, a normal read and write operation is performed; otherwise, an inversion programming flag is generated for inversion writing and reading operations.
This reduces the total number of bits written per write operation, increases the equivalent number of erase/write cycles for RRAM devices, and enhances the chip's competitiveness.
Smart Images
Figure CN121963818A_ABST
Abstract
Description
Method and apparatus for writing and reading RRAM data based on inversion programming Technical Field
[0001] This application relates to the field of RRAM memory technology, and in particular to a method and apparatus for writing and reading RRAM data based on inverted programming. Background Technology
[0002] Resistive Random Access Memory (RRAM) is a novel non-volatile memory technology. Because RRAM cells are small, they can store more data in a smaller space, thus achieving higher data storage density than traditional memory technologies.
[0003] Restricted RAM (RRAM) memory stores information by utilizing changes in the resistance of a material. Its working principle involves representing different data bits (such as 0 and 1) by altering the material's resistance state. RRAM has two main states: a low-resistance state (usually represented as "1") and a high-resistance state (usually represented as "0"). The "set" operation changes the RRAM to a low-resistance state, and the "reset" operation changes it to a high-resistance state. After RRAM fabrication, it is in a high-resistance state and requires the application of high voltage to form conductive filaments, a process known as initialization or "forming." Due to its physical characteristics, the number of write cycles for RRAM is limited. Excessive write cycles will cause the RRAM device to fail. The number of write cycles is an important indicator of RRAM performance.
[0004] Currently, existing technology performs a readback before each write operation. That is, before writing to the RRAM, it first reads the current data in the RRAM, then checks each storage cell to see if the data to be written is the same as the current data in the RRAM: if the data is the same, no writing is performed on the corresponding storage cell; if the data is different, the corresponding storage cell is written. Only after all storage cells have been checked is the overall write operation performed.
[0005] However, existing technologies limit the number of times RRAM can be repeatedly erased and written by checking each memory cell before performing the overall write operation, which reduces the chip's competitiveness and urgently needs to be addressed. Summary of the Invention
[0006] This application provides a method and apparatus for writing and reading RRAM data based on inverted programming, in order to solve the problems of existing technologies that limit the number of times RRAM can be repeatedly erased and written, thereby reducing chip competitiveness, by performing the overall write operation after judging the memory cell each time.
[0007] The first aspect of this application provides a method for writing and reading RRAM data based on inversion programming, comprising the following steps: reading back a target resistive random access memory (RRAM) to obtain corresponding readback data and determining the total number of bits of pre-written data; performing a bit-by-bit comparison operation on the readback data and the pre-written data to obtain the number of identical bits between the readback data and the pre-written data, and determining a corresponding inversion programming threshold based on the total number of bits of the pre-written data; comparing the number of identical bits with the inversion programming threshold, and if the number of identical bits is greater than or equal to the inversion programming threshold, performing a preset conventional read / write operation on the pre-written data; otherwise, generating inversion programming flag data corresponding to the target RRAM, and performing preset inversion write and inversion read operations on the pre-written data based on the inversion programming flag data.
[0008] Optionally, in one embodiment of this application, the step of reading back the target resistive random access memory to obtain the corresponding readback data and determining the total number of bits of pre-written data includes: reading the current resistance state of each inverted program in the target resistive random access memory and converting the current resistance state into corresponding binary bit data, so as to determine the readback data based on the binary bit data.
[0009] Optionally, in one embodiment of this application, the step of performing a bit-by-bit comparison operation between the readback data and the pre-written data to obtain the number of identical bits between the readback data and the pre-written data, and determining the corresponding inversion programming threshold based on the total number of bits in the pre-written data, includes: sequentially comparing the bit data at the same position between the readback data and the pre-written data, and incrementing a preset counter by one each time a bit data at the same position is determined to be identical, to obtain the number of identical bits between the readback data and the pre-written data; obtaining the total number of bits in the pre-written data, calculating half of the total number of bits, and determining the inversion programming threshold based on the half.
[0010] Optionally, in one embodiment of this application, generating the inverted programming flag data corresponding to the target resistive random access memory (RRAM) to perform preset reverse write and reverse read operations on the pre-written data based on the inverted programming flag data includes: generating corresponding inverted programming flag data when the number of identical bits is less than the inverted programming threshold, and storing the inverted programming flag data in the target inverted programming of the target RRAM; determining the flag type of the inverted programming flag data during the writing process of the pre-written data; if the inverted programming flag data is a preset flag type, performing a reverse write operation on the bit data of the pre-written data corresponding to the inverted programming flag data; otherwise, performing a preset normal write operation on the bit data of the pre-written data corresponding to the inverted programming flag data; during the reading process of the pre-written data, acquiring the inverted programming flag data stored in the target inverted programming, and when the inverted programming flag data is the preset flag, performing an invert operation on the read data to obtain the final read data.
[0011] A second aspect of this application provides an RRAM data writing and reading device based on inverted programming, comprising: a readback module for reading back a target resistive random access memory (RRAM) to obtain corresponding readback data and determine the total number of bits of pre-written data; a comparison module for performing a bit-by-bit comparison operation between the readback data and the pre-written data to obtain the number of identical bits between the readback data and the pre-written data, and determining a corresponding inverted programming threshold based on the total number of bits of the pre-written data; and an inverted programming module for comparing the number of identical bits with the inverted programming threshold, and performing a preset conventional read / write operation on the pre-written data if the number of identical bits is greater than or equal to the inverted programming threshold; otherwise, generating inverted programming flag data corresponding to the target RRAM, and performing preset inverted write and read operations on the pre-written data based on the inverted programming flag data.
[0012] Optionally, in one embodiment of this application, the readback module includes: a reading unit, configured to read the current resistance state of each inverted program in the target resistive random access memory, and convert the current resistance state into corresponding binary bit data, so as to determine the readback data based on the binary bit data.
[0013] Optionally, in one embodiment of this application, the comparison module includes: a counting unit, configured to sequentially compare bit data at the same position between the readback data and the pre-written data, and increment a preset counter by one each time a bit data at the same position is determined to be the same, so as to obtain the number of identical bits between the readback data and the pre-written data; and a calculation unit, configured to obtain the total number of bits of the pre-written data, calculate half of the total number of bits, and determine the inversion programming threshold based on the half.
[0014] Optionally, in one embodiment of this application, the inversion programming module includes: a generation unit, configured to generate corresponding inversion programming flag data when the number of identical bits is less than the inversion programming threshold, and store the inversion programming flag data in the target inversion programming of the target resistive random access memory; a judgment unit, configured to determine the flag type of the inversion programming flag data during the writing process of the pre-written data; a reverse writing unit, configured to perform a reverse writing operation on the bit data of the pre-written data corresponding to the inversion programming flag data if the inversion programming flag data is a preset flag type, otherwise, perform a preset normal write operation on the bit data of the pre-written data corresponding to the inversion programming flag data; and a reverse reading unit, configured to obtain the inversion programming flag data stored in the target inversion programming during the reading process of the pre-written data, and perform an inversion operation on the read data when the inversion programming flag data is the preset flag, so as to obtain the final read data.
[0015] A third aspect of this application provides an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor. The processor executes the program to implement the RRAM data writing and reading method based on inverse programming as described in the above embodiments.
[0016] A fourth aspect of this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described method for writing and reading RRAM data based on inverse programming.
[0017] A fifth aspect of this application provides a computer program product, including a computer program that is executed to implement the above-described method for writing and reading RRAM data based on inverse programming.
[0018] Therefore, the embodiments of this application have the following beneficial effects: The embodiments of this application can obtain corresponding readback data by reading back the target resistive random access memory (RRAM) and determine the total number of bits of the pre-written data; perform a bit-by-bit comparison operation between the readback data and the pre-written data to obtain the number of identical bits between the readback data and the pre-written data, and determine the corresponding inversion programming threshold based on the total number of bits of the pre-written data; compare the number of identical bits with the inversion programming threshold, and if the number of identical bits is greater than or equal to the inversion programming threshold, perform a preset conventional read / write operation on the pre-written data; otherwise, generate inversion programming flag data corresponding to the target RRAM, and perform preset inversion write and inversion read operations on the pre-written data based on the inversion programming flag data. This application reduces the number of bits written to RRAM each time through inversion programming, thereby reducing the overall number of bits written in each write operation. From the perspective of the overall system, this increases the equivalent number of repeated erase / write operations of the RRAM device. Therefore, it solves the problems of existing technologies where the RRAM's repeated erase / write operations are limited and chip competitiveness is reduced by performing the overall write operation after judging the memory cell each time.
[0019] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description
[0020] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the following description of embodiments in conjunction with the accompanying drawings, in which: Figure 1 is a flowchart of an RRAM data writing and reading method based on inverted programming according to an embodiment of this application; Figure 2 is a schematic diagram of a circuit structure for 1T1R inverted programming of a resistive random access memory according to an embodiment of this application; Figure 3 is a schematic diagram of the execution logic of an RRAM data writing and reading method based on inverted programming according to an embodiment of this application; Figure 4 is an example diagram of an inverted programming circuit operation according to an embodiment of this application; Figure 5 is a schematic diagram of an existing RRAM data readback and rewrite process according to an embodiment of this application; Figure 6 is an example diagram of an RRAM data writing and reading device based on inverted programming according to an embodiment of this application; Figure 7 is a schematic diagram of the structure of an electronic device according to an embodiment of this application.
[0021] Among them, 10-RRAM data writing and reading device based on inversion programming; 100-readback module, 200-comparison module, 300-inversion programming module; 701-memory, 702-processor, 703-communication interface. Detailed Implementation
[0022] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.
[0023] The following describes a method and apparatus for writing and reading RRAM data based on inverted programming, according to embodiments of this application, with reference to the accompanying drawings. Addressing the problems mentioned in the background section, this application provides a method for writing and reading RRAM data based on inverted programming. In this method, the target resistive random access memory (RRAM) is read back to obtain corresponding readback data, and the total number of bits to be written is determined. A bit-by-bit comparison operation is performed between the readback data and the pre-written data to obtain the number of identical bits between them, and a corresponding inverted programming threshold is determined based on the total number of bits in the pre-written data. The number of identical bits is compared with the inverted programming threshold. If the number of identical bits is greater than or equal to the inverted programming threshold, a preset conventional read / write operation is performed on the pre-written data; otherwise, an inverted programming flag bit is generated corresponding to the target RRAM, and preset reverse write and reverse read operations are performed on the pre-written data based on the inverted programming flag bit data. This application reduces the number of bits written per RRAM operation through inverted programming, thereby reducing the overall number of bits written per write operation. From the perspective of the overall system, this increases the equivalent number of repeated erase / write cycles for the RRAM device. This solves the problem in existing technologies where the RRAM is limited in the number of times it can be repeatedly erased and rewritten, thus reducing the chip's competitiveness, by performing the overall write operation only after each memory cell is checked.
[0024] Specifically, Figure 1 is a flowchart of an RRAM data writing and reading method based on inverse programming provided in an embodiment of this application.
[0025] As shown in Figure 1, the RRAM data writing and reading method based on inverted programming includes the following steps: In step S101, the target resistive random access memory is read back to obtain the corresponding read-back data, and the total number of bits of the pre-written data is determined.
[0026] In the data writing process, embodiments of this application first perform a data readback operation on the resistive random access memory (RRAM) to obtain the readback data corresponding to the RRAM, and at the same time determine the length of the pre-written data, i.e. the total number of bits, thereby providing reliable data guidance and basis for the smooth execution of subsequent data read and write operations through inversion programming.
[0027] Optionally, in one embodiment of this application, reading back the target resistive random access memory to obtain the corresponding readback data and determining the total number of bits of pre-written data includes: reading the current resistance state of each inverted program in the target resistive random access memory and converting the current resistance state into corresponding binary bit data to determine the readback data based on the binary bit data.
[0028] It should be noted that the circuit structure of RRAM's 1T1R (one-transistor-one-resistance) inverting programming is shown in Figure 2. WL (Word Line), BL (Bit Line), and SL (Source Line) are three terminals. In this embodiment, different voltage pulses can be applied to these three terminals during "Forming," "Set," and "Reset" operations. As one possible approach, "Forming" is only performed after device fabrication is complete. Normal data writing only requires "Set" to write 1 and "Reset" to write 0. Specifically, in the "Set" operation: WL is turned on, BL is connected to a positive voltage, SL is connected to 0, and the RRAM becomes a low-resistance value. In the "Reset" operation: WL is turned on, SL is connected to a positive voltage, BL is connected to 0, and the RRAM becomes a high-resistance value.
[0029] Therefore, this embodiment of the application performs a resistance state reading operation on each inverting program and maps the current resistance state of each inverting program to the corresponding binary bit information, thereby completing the data readback, ensuring the accuracy of the readback data, and providing a reliable basis for the analysis of the subsequent readback data.
[0030] In step S102, a bit-by-bit comparison operation is performed on the readback data and the pre-written data to obtain the number of identical bits between the readback data and the pre-written data, and the corresponding inversion programming threshold is determined based on the total number of bits in the pre-written data.
[0031] Furthermore, embodiments of this application also require bit-by-bit analysis and comparison (i.e., comparison by storage unit) of the readback data and the pre-written data to obtain the number of identical bits between the readback data and the pre-written data. At the same time, based on the total number of bits of the pre-written data, the inversion programming threshold is determined, thereby providing an important basis for whether to read data based on inversion programming in the future, and ensuring the realization of efficient data reading and writing in the future.
[0032] Optionally, in one embodiment of this application, a bit-by-bit comparison operation is performed on the readback data and the pre-written data to obtain the number of identical bits between the readback data and the pre-written data, and the corresponding inversion programming threshold is determined based on the total number of bits in the pre-written data. This includes: sequentially comparing the bit data at the same position between the readback data and the pre-written data, and incrementing a preset counter by one each time a bit data at the same position is determined to be identical, to obtain the number of identical bits between the readback data and the pre-written data; obtaining the total number of bits in the pre-written data, calculating half of the total number of bits, and determining the inversion programming threshold based on the half.
[0033] In actual execution, the RRAM has an internal counter. In this embodiment, when a data write operation is to be performed, the corresponding positions of the readback data and the pre-written data are compared bit by bit. If a single bit of data is the same at a certain position (i.e., the corresponding position) between the readback data and the pre-written data, the counter is incremented by one, thereby obtaining the number of identical bits between the readback data and the pre-written data.
[0034] Furthermore, embodiments of this application may also calculate half of the total number of bits (i.e., N / 2, where N is the total number of bits of pre-written data) and use this half as the corresponding inversion programming threshold.
[0035] Therefore, the embodiments of this application compare the readback data and the pre-written data bit by bit to count the number of identical bits, and combine the total number of bits of the pre-written data to determine the inversion programming threshold, thereby providing a reliable basis for subsequent inversion programming and improving the efficiency of data read and write operations.
[0036] In step S103, the number of identical bits and the inversion programming threshold are compared. If the number of identical bits is greater than or equal to the inversion programming threshold, a preset regular read / write operation is performed on the pre-written data. Otherwise, inversion programming flag data corresponding to the target resistive random access memory is generated, so that preset inversion write and inversion read operations are performed on the pre-written data based on the inversion programming flag data.
[0037] Subsequently, embodiments of this application can compare the number of identical bits with the inversion programming threshold. If the number of identical bits is not less than the inversion programming threshold, a preset normal read / write operation is performed on the pre-written data. That is, when the number of identical bits is greater than or equal to the inversion programming threshold, embodiments of this application can perform a normal write operation on the pre-written data. Before each data write, the current RRAM data is read first, and then the inversion programming is performed to determine whether the pre-written data is the same as the current RRAM data. If the pre-written data is the same as the current RRAM data, the corresponding inversion programming does not perform the write operation; if the pre-written data is different from the current RRAM data, the corresponding inversion programming performs the write operation. After all memory cells have been determined, the overall write operation is performed.
[0038] If the number of identical bits is less than the inversion programming threshold, inversion programming flag data corresponding to the target resistive random access memory is generated, and preset inversion write and read operations are performed on the pre-written data based on this flag data. Therefore, the embodiments of this application can flexibly select between conventional read / write or inversion programming modes through threshold determination, and by relying on the inversion programming flag, ensure the targeting of data read / write operations, improving the adaptability and reliability of resistive random access memory data read / write.
[0039] Optionally, in one embodiment of this application, inverting programming flag data corresponding to the target resistive random access memory is generated to perform preset reverse write and reverse read operations on the pre-written data based on the inverting programming flag data. This includes: generating corresponding inverting programming flag data when the number of identical bits is less than the inverting programming threshold, and storing the inverting programming flag data in the target inverting programming of the target resistive random access memory; determining the flag type of the inverting programming flag data during the writing process of the pre-written data; if the inverting programming flag data is a preset flag type, performing a reverse write operation on the bit data of the pre-written data corresponding to the inverting programming flag data; otherwise, performing a preset normal write operation on the bit data of the pre-written data corresponding to the inverting programming flag data; during the reading process of the pre-written data, obtaining the inverting programming flag data stored in the target inverting programming, and performing an inversion operation on the read data when the inverting programming flag data is a preset flag, to obtain the final read data.
[0040] In the specific implementation process, as shown in Figure 3, after all bit data comparisons are completed, this embodiment of the application can compare the counter value CNT with N / 2. If CNT is greater than or equal to N / 2, it means that at least half of the data does not need to be operated during this write operation, so normal read and write (i.e., regular read and write) operations can be performed, and the same data position does not need to be written. If CNT is less than N / 2, it means that more than half of the data needs to be reversed during this write operation (including writing 1 from 0 or writing 0 from 1). At this time, a reverse write flag bit (i.e., reverse programming flag bit data) can be generated, and the data can be reversed. During reverse writing, at least half of the data does not need to be operated during this write operation. When reading data, reverse reading can be performed according to the reverse programming flag bit data (i.e., reading in reverse or inverting the read data).
[0041] Figure 4 is an example diagram of the operation of the inverting programming circuit. As shown in Figure 4, in one possible implementation, each time data is written to the RRAM array, the data is first read back, and then a data comparison and counting operation is performed in CTRL. Secondly, the embodiment of this application can generate an inverting programming flag bit based on the comparison result of CNT and N / 2, and write it to the RRAM array together. A column of RRAM inverting programming can be used to store the inverting programming flag bit. When the flag bit is 1 (i.e., the preset flag), it indicates that the row has been written inverted; when the flag bit is 0, it indicates that a normal data writing operation can be performed. When reading data, the embodiment of this application can read out the inverting programming flag bit together, and determine whether to invert the read data based on the flag bit.
[0042] It should be noted that, in actual implementation, those skilled in the art can also store the inverted programming flag data in a set of latches, generate a write latch each time data is written, and determine whether to read inverted data based on the flag bits in the latches when reading data; alternatively, the inverted programming flag can be stored in a column of SRAM, written to SRAM each time data is written, and determine whether to read inverted data based on the flag bits read from SRAM when reading data; in addition, there are many different ways to implement the circuit for inverted writing and reading, which are not specifically limited here.
[0043] Figure 5 is a schematic diagram of the existing RRAM data read-back and rewrite process. As shown in Figure 5, the number of bits written to the RRAM each time in the existing method is N-CNT. The RRAM data write and read method based on inverse programming proposed in this application embodiment reduces the number of bits written to the RRAM each time to N-CNT if CNT is greater than or equal to N / 2; if CNT is less than N / 2, the number of bits written to the RRAM each time is CNT. Compared with the existing method, this application embodiment reduces the number of bits written by N-2*CNT (if CNT < N / 2). The smaller CNT is, the greater the reduction in the number of bits written.
[0044] Therefore, the embodiments of this application can effectively reduce the total number of bits written in each write operation, and from the perspective of the overall system, increase the equivalent number of repeated erase and write operations of the RRAM device, and the execution logic of this application can be extended to other memories.
[0045] According to the RRAM data writing and reading method based on inverted programming proposed in this application, the target resistive random access memory is read back to obtain the corresponding read-back data, and the total number of bits of the pre-written data is determined. A bit-by-bit comparison operation is performed between the read-back data and the pre-written data to obtain the number of identical bits between them, and the corresponding inverted programming threshold is determined based on the total number of bits of the pre-written data. The number of identical bits is compared with the inverted programming threshold. If the number of identical bits is greater than or equal to the inverted programming threshold, a preset conventional read / write operation is performed on the pre-written data; otherwise, an inverted programming flag bit data corresponding to the target resistive random access memory is generated, and a preset inverted write and read / write operation is performed on the pre-written data based on the inverted programming flag bit data. This application reduces the number of bits written to RRAM each time through inverted programming, thereby reducing the overall number of bits written per write operation. From the perspective of the overall system, this increases the equivalent number of repeated erase / write cycles of the RRAM device.
[0046] Secondly, the RRAM data writing and reading apparatus based on inverse programming according to embodiments of this application is described with reference to the accompanying drawings.
[0047] Figure 6 is a block diagram of an RRAM data writing and reading device based on inverse programming according to an embodiment of this application.
[0048] As shown in Figure 6, the RRAM data writing and reading device 10 based on inversion programming includes: a readback module 100, a comparison module 200, and an inversion programming module 300.
[0049] The readback module 100 is used to read back the target resistive random access memory to obtain the corresponding readback data and determine the total number of bits of the pre-written data.
[0050] The comparison module 200 is used to perform a bit-by-bit comparison operation between the readback data and the pre-written data to obtain the number of identical bits between the readback data and the pre-written data, and to determine the corresponding inversion programming threshold based on the total number of bits in the pre-written data.
[0051] The inversion programming module 300 is used to compare the number of identical bits with the inversion programming threshold. If the number of identical bits is greater than or equal to the inversion programming threshold, a preset regular read / write operation is performed on the pre-written data. Otherwise, inversion programming flag data corresponding to the target resistive random access memory is generated, so that preset inversion write and inversion read operations are performed on the pre-written data based on the inversion programming flag data.
[0052] Optionally, in one embodiment of this application, the readback module 100 includes: a reading unit, configured to read the current resistance state of each inverted program in the target resistive random access memory, and convert the current resistance state into corresponding binary bit data, so as to determine the readback data based on the binary bit data.
[0053] Optionally, in one embodiment of this application, the comparison module 200 includes a counting unit and a calculation unit.
[0054] The counting unit is used to compare the bits at the same position between the readback data and the pre-written data in sequence, and increment the preset counter by one each time a bit at the same position is determined to be the same, so as to obtain the number of identical bits between the readback data and the pre-written data.
[0055] The calculation unit is used to obtain the total number of bits of the data to be written, calculate half of the total number of bits, and determine the inversion programming threshold based on the half of the total number of bits.
[0056] Optionally, in one embodiment of this application, the inversion programming module 300 includes: a generation unit, a judgment unit, an inversion writing unit, and an inversion reading unit.
[0057] The generation unit is used to generate corresponding inversion programming flag data when the number of the same bits is less than the inversion programming threshold, and to store the inversion programming flag data in the target inversion programming of the target resistive random access memory.
[0058] The judgment unit is used to determine the flag type of the inverted programming flag bit data during the writing process of the pre-written data.
[0059] The reverse write unit is used to reverse write the bit data of the pre-written data corresponding to the reverse programming flag data if the reverse programming flag data is a preset flag type, otherwise, to perform a preset normal write operation on the bit data of the pre-written data corresponding to the reverse programming flag data.
[0060] The reverse read unit is used to obtain the reverse programming flag data stored in the target reverse programming during the pre-written data reading process, and to invert the read data when the reverse programming flag data is a preset flag, so as to obtain the final read data.
[0061] It should be noted that the foregoing explanation of the embodiment of the RRAM data writing and reading method based on inversion programming also applies to the RRAM data writing and reading device based on inversion programming in this embodiment, and will not be repeated here.
[0062] The RRAM data writing and reading device based on inverted programming proposed in this application includes a readback module 100 for reading back the target resistive random access memory (RRAM) to obtain corresponding readback data and determine the total number of bits of the pre-written data; a comparison module 200 for performing a bit-by-bit comparison operation between the readback data and the pre-written data to obtain the number of identical bits between the readback data and the pre-written data, and determining the corresponding inverted programming threshold based on the total number of bits of the pre-written data; and an inverted programming module 300 for comparing the number of identical bits with the inverted programming threshold, and performing a preset conventional read / write operation on the pre-written data if the number of identical bits is greater than or equal to the inverted programming threshold; otherwise, generating inverted programming flag data corresponding to the target RRAM, and performing preset inverted write and read operations on the pre-written data based on the inverted programming flag data. This application reduces the number of bits written to RRAM each time through inverted programming, thereby reducing the overall number of bits written in each write operation. From the perspective of the overall system, this increases the equivalent number of repeated erase / write cycles of the RRAM device.
[0063] Figure 7 is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. The electronic device may include: a memory 701, a processor 702, and a computer program stored in the memory 701 and executable on the processor 702.
[0064] When the processor 702 executes the program, it implements the RRAM data writing and reading method based on inverse programming provided in the above embodiments.
[0065] Furthermore, the electronic device also includes a communication interface 703 for communication between the memory 701 and the processor 702.
[0066] The memory 701 is used to store computer programs that can run on the processor 702.
[0067] The memory 701 may include high-speed RAM memory, and may also include non-volatile memory, such as at least one disk storage device.
[0068] If the memory 701, processor 702, and communication interface 703 are implemented independently, they can be interconnected via a bus to communicate with each other. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of representation, only one thick line is used in Figure 7, but this does not indicate that there is only one bus or one type of bus.
[0069] Optionally, in a specific implementation, if the memory 701, processor 702, and communication interface 703 are integrated on a single chip, then the memory 701, processor 702, and communication interface 703 can communicate with each other through an internal interface.
[0070] The processor 702 may be a central processing unit (CPU), an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of this application.
[0071] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the above-described RRAM data writing and reading method based on inverse programming.
[0072] This application also provides a computer program product, including a computer program, which, when executed, is used to implement the above-described RRAM data writing and reading method based on inverse programming.
[0073] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
[0074] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0075] Any process or method described in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or N executable instructions for implementing custom logic functions or processes, and the scope of the preferred embodiments of this application includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as should be understood by those skilled in the art to which embodiments of this application pertain.
[0076] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.
[0077] It should be understood that the various parts of this application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, the N steps or methods can be implemented using software or firmware stored in memory and executed by a suitable instruction execution system. If implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.
[0078] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiments.
[0079] Furthermore, the functional units in the various embodiments of this application can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.
[0080] The storage medium mentioned above can be a read-only memory, a disk, or an optical disk, etc. Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of this application.
Claims
1. A method for writing and reading RRAM data based on inverse programming, characterized in that, Includes the following steps: The target resistive random access memory is read back to obtain the corresponding readback data and to determine the total number of bits of data to be written. A bit-by-bit comparison operation is performed on the readback data and the pre-written data to obtain the number of identical bits between the readback data and the pre-written data, and the corresponding inversion programming threshold is determined based on the total number of bits of the pre-written data. The number of identical bits is compared with the inversion programming threshold. If the number of identical bits is greater than or equal to the inversion programming threshold, a preset regular read / write operation is performed on the pre-written data. Otherwise, inversion programming flag data corresponding to the target resistive random access memory is generated, so that preset inversion write and inversion read operations are performed on the pre-written data based on the inversion programming flag data.
2. The method according to claim 1, characterized in that, The step of reading back the target resistive random access memory to obtain the corresponding readback data and determine the total number of bits of pre-written data includes: reading the current resistance state of each inverted program in the target resistive random access memory and converting the current resistance state into corresponding binary bit data, so as to determine the readback data based on the binary bit data.
3. The method according to claim 1, characterized in that, The step of performing a bit-by-bit comparison operation between the readback data and the pre-written data to obtain the number of identical bits between the readback data and the pre-written data, and determining the corresponding inversion programming threshold based on the total number of bits in the pre-written data, includes: sequentially comparing the bits at the same positions between the readback data and the pre-written data, and incrementing a preset counter each time a bit at the same position is determined to be identical, to obtain the number of identical bits between the readback data and the pre-written data; obtaining the total number of bits in the pre-written data, calculating half of the total number of bits, and determining the inversion programming threshold based on the half.
4. The method according to claim 1, characterized in that, The step of generating the inverted programming flag data corresponding to the target resistive random access memory (RRAM) to perform preset reverse write and reverse read operations on the pre-written data based on the inverted programming flag data includes: generating corresponding inverted programming flag data when the number of identical bits is less than the inverted programming threshold, and storing the inverted programming flag data in the target inverted programming of the target RRAM; determining the flag type of the inverted programming flag data during the writing process of the pre-written data; if the inverted programming flag data is a preset flag type, performing a reverse write operation on the bit data of the pre-written data corresponding to the inverted programming flag data; otherwise, performing a preset normal write operation on the bit data of the pre-written data corresponding to the inverted programming flag data; and during the reading process of the pre-written data, acquiring the inverted programming flag data stored in the target inverted programming, and performing an inverted operation on the read data when the inverted programming flag data is the preset flag type to obtain the final read data.
5. A device for writing and reading RRAM data based on inverted programming, characterized in that, include: The readback module is used to read back the target resistive random access memory to obtain the corresponding readback data and determine the total number of bits of data to be written. The comparison module is used to perform a bit-by-bit comparison operation between the readback data and the pre-written data to obtain the number of identical bits between the readback data and the pre-written data, and to determine the corresponding inversion programming threshold based on the total number of bits of the pre-written data. The inversion programming module is used to compare the number of identical bits with the inversion programming threshold, and if the number of identical bits is greater than or equal to the inversion programming threshold, then a preset regular read / write operation is performed on the pre-written data; otherwise, inversion programming flag data corresponding to the target resistive random access memory is generated, so as to perform preset inversion write and inversion read operations on the pre-written data based on the inversion programming flag data.
6. The apparatus according to claim 5, characterized in that, The readback module includes a reading unit, used to read the current resistance state of each inverted program in the target resistive random access memory, and convert the current resistance state into corresponding binary bit data, so as to determine the readback data based on the binary bit data.
7. The apparatus according to claim 5, characterized in that, The comparison module includes: a counting unit, used to sequentially compare the bit data at the same position between the readback data and the pre-written data, and increment a preset counter by one each time a bit data at the same position is determined to be the same, so as to obtain the number of identical bits between the readback data and the pre-written data; and a calculation unit, used to obtain the total number of bits of the pre-written data, calculate half of the total number of bits, and determine the inversion programming threshold based on the half.
8. An electronic device, characterized in that, include: A memory, a processor, and a computer program stored in the memory and executable on the processor, the processor executing the program to implement the RRAM data writing and reading method based on inverse programming as described in any one of claims 1-4.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that, The program is executed by the processor to implement the RRAM data writing and reading method based on inversion programming as described in any one of claims 1-4.
10. A computer program product, comprising a computer program, characterized in that, The computer program is executed to implement the RRAM data writing and reading method based on inverse programming as described in any one of claims 1-4.