VCn binding and unbinding implementation method and device

Abstract

The invention discloses a VCn binding and unbinding implementation method and device. The group binding method comprises the following steps: converging business data streams of a plurality of VC channels to the same output port in a crossing manner and mapping the business data streams to the same VCn channel; combining a plurality of low bit width VC data streams into a high bit width parallel data stream through bit width conversion, only reserving an initial channel frame header in the conversion, and controlling a data arrangement phase according to an initial bit label to realize envelope discretization; and finally, performing parallel-serial conversion to form a serial VCn service data stream. The unbinding method is an inverse process, and comprises the following steps of: performing cache scheduling and serial-parallel conversion on the serial VCn stream, and recovering the serial VCn stream into a plurality of VC streams through bit width conversion and channel demapping. According to the method, flexible binding and unbinding of any VC channel are supported, the downstream cache requirement is remarkably reduced through the envelope shaping technology, and low-delay and low-resource-consumption fine-grained optical channel management is achieved through cross scheduling and shared cache design.

Description

Methods and apparatus for VCn binding and unbinding Technical Field

[0001] This application relates to the field of communication technology, specifically to a method and apparatus for binding and unbinding VCN groups. Background Technology

[0002] Against the backdrop of the continuous evolution of Optical Transport Network (OTN) technology, fine-grained optical transport network (fgOTN) has emerged to meet the stringent bandwidth flexibility requirements of diverse services in the power, finance, and government sectors. fgOTN aims to improve network resource utilization and service deployment flexibility by more finely dividing and scheduling transmission bandwidth. One key technology for achieving fine-grained bandwidth management is binding multiple low-order virtual containers (VCs, such as VC-12, VC-3, and VC-4) into a single cascaded VCn channel for unified transmission. During chip design, at least multiple VC channels and arbitrary VC channel cross-binding must be supported; however, this requirement presents significant challenges in technical implementation. Summary of the Invention

[0003] This application provides a method and apparatus for binding and unbinding VCn channels, which can solve the technical problem of insufficient flexibility in the cross-binding of multiple VC channels and arbitrary VC channels in the prior art.

[0004] In a first aspect, embodiments of this application provide a method for implementing VCn grouping, the method comprising: cross-connecting the service data streams of multiple virtual container VC channels to the same output port; mapping the service data streams of multiple VC channels cross-connected to the same output port to the same virtual container cascaded VCn channels; performing bit-width conversion and parallel-to-serial conversion on the service data streams of multiple VC channels mapped to the same VCn channel to form and output a serial VCn service data stream.

[0005] In conjunction with the first aspect, in one implementation, the step of cross-connecting the service data streams of multiple input virtual container (VC) channels to the same output port includes: copying the service data stream of each input VC channel multiple times and storing them in multiple storage units respectively; based on cross-configuration information, reading the service data streams of the multiple VC channels from the storage unit corresponding to the target output port, and cross-connecting the read service data streams to different channels inside the target output port, wherein the cross-configuration information defines the correspondence between each VC channel and the output port and the channels inside the output port.

[0006] In conjunction with the first aspect, in one implementation, mapping the service data streams of multiple VC channels that cross over to the same output port to the same virtual container cascaded VCn channel includes: mapping the service data streams of multiple VC channels that cross over to the same output port to the same virtual container cascaded VCn channel based on channel mapping configuration information, wherein the channel mapping configuration information defines the correspondence between each VC channel and the VCn channel.

[0007] In conjunction with the first aspect, in one implementation, performing bit-width conversion and parallel-to-serial conversion on service data streams of multiple VC channels mapped to the same VCn channel to form and output a single serial VCn service data stream includes: merging the low-bit-width service data streams of multiple VC channels mapped to the same VCn channel into a high-bit-width parallel data stream; during the conversion process, retaining only the frame header indication of one VC channel designated as the starting channel and deleting the frame header indications of the remaining VC channels; controlling the arrangement phase of the low-bit-width service data streams of each VC channel in the high-bit-width parallel data stream according to the start bit tag configured for each VC channel, thereby discretizing the output data packet network; and converting the high-bit-width parallel data stream into a single serial VCn service data stream and outputting it through a buffering and scheduling mechanism.

[0008] Secondly, embodiments of this application provide a method for unbinding VCn, which includes: buffering and scheduling the received serial VCn service data stream to absorb data network jitter and output it evenly; performing serial-to-parallel conversion on the buffered serial VCn service data stream and distributing it to multiple parallel ports; performing bit-width conversion on the VCn service data streams distributed to each parallel port to restore them from high-bit-width data streams to low-bit-width data streams; and demapping each low-bit-width data stream originating from the same VCn channel to the corresponding VC channel according to the channel demapping configuration to restore the original service data streams of multiple VC channels.

[0009] In conjunction with the second aspect, in one implementation, buffering and scheduling the received serial VCn service data stream includes: writing the received serial VCn service data stream into a shared buffer with a chained structure; controlling the rhythm of reading data from the shared buffer based on a scheduling table to achieve uniform data output, wherein the scheduling table is configured according to the rate and group size of the serial VCn service data stream.

[0010] In conjunction with the second aspect, in one implementation, the scheduling table includes a sub-scheduling table for each parallel port to control data sent to the same parallel port to have predetermined intervals.

[0011] In conjunction with the second aspect, in one implementation, performing bit-width conversion on the VCn service data stream distributed to each parallel port to restore it from a high-bit-width data stream to a low-bit-width data stream includes: identifying frame header position markers in the VCn service data stream distributed to each parallel port; and based on the frame header position markers, parsing the high-bit-width VCn service data stream into multiple consecutive low-bit-width data streams.

[0012] Thirdly, embodiments of this application provide an implementation apparatus for VCn binding groups. The VCn binding group implementation apparatus includes: a cross-connect module, used to cross-connect the service data streams of multiple virtual container VC channels to the same output port; an interleaving module, used to map the service data streams of multiple VC channels crossed to the same output port to the same virtual container cascaded VCn channels; and to perform bit-width conversion and parallel-to-serial conversion on the service data streams of multiple VC channels mapped to the same VCn channel to form and output a serial VCn service data stream.

[0013] Fourthly, embodiments of this application provide an apparatus for unbinding VCn data. The apparatus includes: a buffer module for buffering and scheduling the received serial VCn service data stream to absorb data network jitter and output it evenly; a serial-to-parallel conversion module for converting the buffered serial VCn service data stream into a serial-to-parallel stream and distributing it to multiple parallel ports; a bit-width conversion module for converting the bit-width of the VCn service data stream distributed to each parallel port, restoring it from a high-bit-width data stream to a low-bit-width data stream; and a demapping module for demapping each low-bit-width data stream originating from the same VCn channel to its corresponding VC channel according to the channel demapping configuration, thereby restoring the original service data streams of the multiple VC channels.

[0014] The beneficial effects of the technical solution provided in this application include: in this application embodiment, the service data streams of multiple input virtual container (VC) channels are cross-connected to the same output port; the service data streams of multiple VC channels cross-connected to the same output port are mapped to the same virtual container cascaded VCn channel; bit-width conversion and parallel-to-serial conversion are performed on the service data streams of multiple VC channels mapped to the same VCn channel to form and output a single serial VCn service data stream. Through this application embodiment, a complete binding logic from the cross-connection and mapping of multiple independent VC service data streams to the formation of a single serial VCn service data stream is defined, improving the flexibility of cross-binding multiple VC channels and arbitrary VC channels. Attached Figure Description

[0015] Figure 1 is a schematic diagram of the binding and unbinding system involved in this application; Figure 2 is a block diagram of the binding design; Figure 3 is a schematic diagram of the input bus structure; Figure 4 is a schematic diagram of VCn envelope shaping; Figure 5 is a block diagram of the unbinding design; Figure 6 is a flowchart of an embodiment of the VCn binding method of this application; Figure 7 is a flowchart of an embodiment of the VCn unbinding method of this application; Figure 8 is a functional module schematic diagram of an embodiment of the VCn binding device of this application; Figure 9 is a functional module schematic diagram of an embodiment of the VCn unbinding device of this application. Detailed Implementation

[0016] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.

[0017] First, some of the technical terms used in this application will be explained to help those skilled in the art understand this application.

[0018] Referring to Figure 1, which is a schematic diagram of the binding and unbinding system involved in this application, the system mainly consists of the following five core modules: 1. VC cross-connect module: realizes the full cross-connect and replication functions of VC services, and supports flexible channel allocation and protection switching.

[0019] 2. VCn Interleaving: Enables the interleaving and grouping of VC business to VCn, supporting the binding of multiple VC channels.

[0020] 3. VCN Shared Cache: Implements cache management for VCN services, supporting service requirements at different speeds.

[0021] 4. VCn deinterleaving: Completes the deinterleaving function from VCn to VC, restoring the original VC channel.

[0022] 5. Central Controller: Controls the above four modules, enabling the binding and unbinding of any VC member to VCn.

[0023] This application addresses two purposes: binding VC to VCn and unbinding VCn to VC. Referring to Figure 2, which is a block diagram of the binding design, the binding design is primarily accomplished by the cooperation of the VC crossover module and the VCn interleaving module.

[0024] The VC cross-connect module mainly consists of a storage unit, a port selection unit, and a configuration unit. The storage unit uses an A / B table design, with each table divided into M storage units (corresponding to the number of output ports). The input data is copied M times and stored in the M storage units. Each storage unit has N storage addresses, corresponding to the N input channels. As shown in Figure 3, which illustrates the input bus structure, channels 0 to N-1 correspond to storage unit addresses 0 to N-1. The port selection unit consists of M selectors. The input of each selector is determined by the number of input ports. If there are 16 input ports, each selector selects one port from the other. The configuration unit is the control center of the entire module. First, it reads the required output channel data from the storage unit through channel configuration. Then, based on the port selection configuration, it selects the corresponding port data, thus realizing the VC cross-connect.

[0025] The VCn interleaving module mainly consists of four modules: channel mapping, bit width conversion, parallel-to-serial conversion, and configuration unit. Specifically: Channel mapping maps multiple VC channels that need to be grouped to the same VCn channel; Bit width conversion converts the data bit width from 8 bits (preferably 8 bits, as the unit of data interleaving is 8 bits, or 1 byte) to 64 bits, while retaining the frame header indicator of the first VC channel and deleting the frame header indicators of other VC channels. Through envelope shaping technology, the start bit is tagged (as shown in Figure 4), discretizing the output envelope and reducing the scheduling buffer requirements, with the maximum buffer size reduced to 1 / 8 of the original. Figure 4 is a schematic diagram of VCn envelope shaping. For example, taking VC-12 as an example, if channels 0-7 are continuously configured as VCn channels 0-7, and the group size is 1, then after 8 cycles, channels 0-7 will output continuously, forming a data burst. If each of these 8 channels is configured with a start bit—channel 0 configured with 0, then channel 0 will output in the first cycle; channel 1 configured with 1, then channel 1 will output in the second cycle, and so on. This distributes the eight consecutive data outputs across eight cycle outputs.

[0026] Parallel-to-serial conversion: Converting parallel data into a single serial bus for output. The design method involves storing all parallel data in separate buffers, and then reading the data from each FIFO using a round-robin scheduling approach.

[0027] Configuration Unit: This is the control center for the entire module. First, it maps multiple VC channels that need to be grouped to the same VCn channel through channel mapping configuration. Then, it discretizes the output envelope through start bit configuration. Finally, it outputs the data through parallel-to-serial conversion.

[0028] Referring to Figure 5, which is a block diagram of the debinding design, the debinding design mainly consists of four parts: shared cache, bus conversion, bit width conversion, and channel demapping. 1. Shared Cache: Absorbs jitter from the VCN envelope using a chained cache design. Resources can be configured according to the VCN rate to support different rate service requirements. Then, data is read out through scheduling and evenly distributed to downstream modules, saving storage resources for the downstream modules.

[0029] 2. Port Distribution: The serial VCn is distributed to M parallel ports through configuration information (as shown in the port distribution configuration figure), converting it into a parallel-serial bus.

[0030] 3. Bit width conversion: Convert 64-bit data to 8-bit data. Divide the shared buffer's scheduling table into M sub-tables, interleaving them into a large scheduling table to ensure that the data sent to each port is at least 8 clock cycles apart, saving GearBox buffer space.

[0031] 4. Channel demapping: With an 8-bit width, one clock cycle corresponds to one channel. Channel demapping is used to achieve the deinterleaving function from VCn to VC.

[0032] The innovations of this application are as follows: 1. Architectural innovation: The design of combining cross and mapping cleverly realizes the binding and unbinding functions of VCN.

[0033] 2. Parallel-Serial Combined Bus Design: By combining parallel and serial bus design, the position of the output channel can be flexibly controlled to form an interleaved data bus.

[0034] 3. Low latency design: VC crossover processing latency is about 1 cycle, VCn interleaving processing latency is about 8 cycles, and the total processing latency is about 9 cycles. For the STM32 format bus, when the clock frequency is 1GHz, the total latency is only 288ns.

[0035] 4. Envelope Shaping Technology: By using start bit labeling technology, continuous envelopes are discretized, reducing scheduling buffer requirements and improving data uniformity in downstream modules.

[0036] 5. Resource optimization design: The shared cache and scheduling table design significantly reduces logic resource consumption, thereby reducing chip cost and wafer fabrication risk.

[0037] The beneficial effects of this application are as follows: 1. Flexibility: It supports the binding and unbinding of any VC member to VCn, meeting a variety of business needs.

[0038] 2. Low latency: Extremely low processing latency, meeting the requirements of high-performance transmission.

[0039] 3. Resource savings: Innovative design significantly reduces cache and logic resource consumption, thereby reducing chip cost and wafer fabrication risk.

[0040] 4. Compatibility: Supports multiple business formats such as VC-12 / VC-3 / VC-4, and has wide applicability.

[0041] This application, through innovative design architecture and optimized implementation methods, successfully solves several technical challenges in VCn binding and unbinding, providing an efficient, flexible, and low-resource-consumption solution for chip design, and has significant engineering application value.

[0042] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0043] In a first aspect, embodiments of this application provide a method for implementing VCN binding groups.

[0044] In one embodiment, referring to Figure 6, which is a flowchart illustrating an embodiment of the VCn binding method of this application, the VCn binding method includes: step S10, cross-connecting the service data streams of multiple input virtual container (VC) channels to the same output port; in this embodiment, for example, the service data streams of the four input VC channels [(0, 1), (1, 100), (2, 2), (3, 1)] are cross-connected to output port 0. The format is (port, channel number), for example, (0, 1) indicates that the port number of the input port corresponding to the VC channel is 0 and the channel number is 1.

[0045] Further, in one embodiment, step S10 includes: copying the service data stream of each ingress VC channel multiple times and storing them in multiple storage units respectively; based on cross-configuration information, reading the service data stream of the multiple VC channels from the storage unit corresponding to the target output port, and cross-connecting the read service data stream to different channels inside the target output port, wherein the cross-configuration information defines the correspondence between each VC channel and the output port and the channels inside the output port.

[0046] In this embodiment, the service data stream of each ingress VC channel is copied multiple times (M copies, where M equals the number of output ports) and stored in M ​​independent storage units (such as a cache using an A / B dual-table design). The address space of each storage unit covers all ingress channels; for example, addresses 0 to N-1 correspond to channels 0 to N-1.

[0047] Based on the pre-configured cross-configuration information, the service data streams of multiple VC channels that need to be bound are read from the storage unit corresponding to the target output port (e.g., port 0). The cross-configuration information defines a series of mapping relationships such as (ingress port 0, channel 1) - (output port 0, internal channel 0).

[0048] The multiple VC service data streams read are cross-placed into different channel positions (such as internal channels 0~3) inside the target output port (port 0) through a multiplexer (MUX) array.

[0049] In this embodiment, a non-blocking, low-latency (approximately one cycle) full cross-connect scheduling of any channel is achieved through an architecture of data replication + port-specific storage + configuration-based reading. The replication storage design avoids multi-port read conflicts, while configuration-based reading provides extremely high flexibility.

[0050] Step S20: Map the service data streams of multiple VC channels that cross over to the same output port to the same virtual container cascaded VCn channel; in this embodiment, the data of internal channels 0~3 on port 0 are logically identified as belonging to VCn channel 10.

[0051] Further, in one embodiment, step S20 includes: mapping the service data streams of multiple VC channels that cross over to the same output port to the same virtual container cascaded VCn channel based on channel mapping configuration information, wherein the channel mapping configuration information defines the correspondence between each VC channel and the VCn channel.

[0052] In this embodiment, a channel mapping table is configured, which defines the attribution relationship between the internal channels of the output port and the VCn channel. For example, the configuration entry indicates that internal channels 0, 1, 2, and 3 of output port 0 are all mapped to VCn channel 10. During system operation, the interleaving module uses this table to identify data from these internal channels as belonging to the same logical entity—VCn channel 10.

[0053] In this embodiment, the flexible association between physical and logical channels is achieved through configurable channel mapping configuration information. This allows adjustments to the grouping relationship to be made without modifying the hardware connection, requiring only an update of the configuration, which greatly enhances the configurability and adaptability of the system.

[0054] Step S30: Perform bit width conversion and parallel-to-serial conversion on the service data streams of multiple VC channels mapped to the same VCn channel to form and output a serial VCn service data stream.

[0055] In this embodiment, the service data streams of multiple VC channels mapped to VCn channel 10 undergo bit-width conversion and parallel-to-serial conversion. Specifically, multiple 8-bit wide VC data streams are merged into a single 64-bit wide parallel data stream, and then this parallel data stream is converted into a single high-speed serial VCn service data stream for output.

[0056] Further, in one embodiment, step S30 includes: merging low-bit-width service data streams of multiple VC channels mapped to the same VCn channel into a high-bit-width parallel data stream; during the conversion process, retaining only the frame header indication of one VC channel designated as the starting channel among the multiple VC channels, and deleting the frame header indications of the remaining VC channels; controlling the arrangement phase of the low-bit-width service data streams of each VC channel in the high-bit-width parallel data stream according to the start bit tag configured for each VC channel, so as to discretize the output data packet network; and converting the high-bit-width parallel data stream into a single serial VCn service data stream and outputting it through a buffering and scheduling mechanism.

[0057] In this embodiment, the low-bit-width data streams of multiple VC channels mapped to the same VCn channel are merged and converted into high-bit-width parallel data streams. During this process, two key operations are performed: (1) Frame header processing: only the frame header indication of the VC channel designated as the starting channel (e.g., internal channel 0) is retained as the frame header of the entire VCn data stream, and the frame header indications of the remaining VC channels are deleted.

[0058] (2) Envelope Shaping: A start bit tag (e.g., upi_start_period value, range 0~7) is configured for each VC channel. During conversion, a global counter (cycled from 0 to 7) is used in conjunction with the start bit tag to control the insertion position of the 8-bit data of each VC channel in the 64-bit parallel data frame. For example, the data of the channel with a start bit of 0 is output when the counter is 0, and the data with a start bit of 1 is output when the counter is 1. This makes the data that might have been bursty and continuous evenly distributed across 8 cycles, thus achieving envelope discretization.

[0059] The multiple 64-bit parallel data streams (potentially corresponding to multiple VCn channels) obtained after the above processing are written into multiple FIFOs respectively. Then, a channel polling scheduling mechanism is used to read data from these FIFOs sequentially and merge them into a single higher-speed serial VCn service data stream for output.

[0060] This embodiment utilizes "frame header processing + envelope shaping" technology to significantly smooth the output data stream while completing the bit width conversion, reducing the maximum downstream buffer required to 1 / 8 of the original (taking 8-way VC bonding as an example), thus greatly saving chip storage resources. The entire bonding group processing latency is extremely low, approximately 9 cycles (1 cycle for crossover + 8 cycles for interleaving).

[0061] Secondly, embodiments of this application provide a method for unbinding VCN.

[0062] In one embodiment, referring to Figure 7, which is a flowchart illustrating an embodiment of the VCn unbinding method of this application, the VCn unbinding method includes: step S40, buffering and scheduling the received serial VCn service data stream to absorb data network jitter and output it evenly; step S50, converting the serial VCn service data stream after buffering and scheduling into a serial-to-parallel stream and distributing it to multiple parallel ports; step S60, performing bit-width conversion on the VCn service data stream distributed to each parallel port to restore it from a high-bit-width data stream to a low-bit-width data stream; and step S70, according to the channel demapping configuration, demapping each low-bit-width data stream originating from the same VCn channel to the corresponding VC channel to restore the original service data streams of multiple VC channels.

[0063] In this embodiment, the received serial VCn service data stream is the serial VCn service data stream output in step S30 of the first aspect. The received serial VCn service data stream is buffered and scheduled to absorb the envelope jitter generated during transmission and convert it into a uniformly output data stream. The uniformized serial VCn service data stream undergoes serial-to-parallel conversion and is distributed to multiple parallel processing ports according to the configuration. The VCn service data stream on each parallel port undergoes bit-width conversion, restoring it from a high bit-width (e.g., 64 bits) to a low bit-width (e.g., 8 bits) data stream. According to the channel demapping configuration, the low bit-width data streams originating from the same VCn channel are sequentially demapped to multiple corresponding VC channels, thereby restoring the original multiple VC channel service data streams.

[0064] It is easy to understand that the method of VCn unbinding is the reverse process of the method of VCn binding, which realizes the lossless and low jitter recovery from the high-speed serial VCn stream to the original multi-channel VC stream.

[0065] Further, in one embodiment, step S40 includes: writing the received serial VCn service data stream into a shared buffer with a chain structure; controlling the rhythm of reading data from the shared buffer based on a scheduling table to achieve uniform data output, wherein the scheduling table is configured according to the rate and group size of the serial VCn service data stream.

[0066] In this embodiment, a chained shared buffer is used to receive the serial VCn stream, and each storage block in the chain can store multiple 64-bit data. The number of buffer blocks (e.g., 2 blocks) is dynamically allocated based on the VCn stream rate and bundle size (e.g., 4 VC bundles) to absorb data bursts of a specific size. A configurable scheduling table controls the pace of data reading from the buffer, ensuring uniform output data and avoiding instantaneous pressure on downstream modules.

[0067] This embodiment uses a chained shared cache to dynamically allocate resources according to business needs, resulting in high efficiency. Active scheduling achieves data uniformity, saving cache resources (GearBox cache) for the subsequent bit-width conversion module.

[0068] Furthermore, in one embodiment, the scheduling table includes a sub-scheduling table for each parallel port to control data sent to the same parallel port to have predetermined intervals.

[0069] In this embodiment, the scheduling table is designed as an interleaved combination of multiple sub-tables, with each sub-table corresponding to a parallel port. For example, dividing the scheduling table into 8 sub-tables (corresponding to 8 ports) and interleaving them into a large table ensures that there is at least an 8-clock-cycle interval between data read from the shared buffer and sent to the same port. This design directly creates favorable conditions for subsequent bit-width conversion.

[0070] This embodiment uses an interleaving scheduler to enforce the data interval sent to the same port, allowing the downstream bit-width conversion module to complete the 64-bit to 8-bit conversion with just a simple counter, eliminating the need for a large-capacity cache for rate matching and further optimizing resource utilization.

[0071] Further, in one embodiment, step S60 includes: identifying frame header position markers in the VCn service data streams distributed to each parallel port; and based on the frame header position markers, parsing the high-bit-width VCn service data stream into multiple consecutive low-bit-width data streams.

[0072] In this embodiment, the frame header position marker in the VCn service data stream is identified, which serves as the basis for correct data segmentation. Based on the identified frame header, the 64-bit VCn service data stream is parsed into eight consecutive 8-bit data units. This process is smoothly and orderly thanks to the data intervals guaranteed by the scheduling table.

[0073] This embodiment, combined with previous scheduling optimizations, achieves efficient and low-resource bit-width reverse conversion, accurately restoring VC-level data granularity.

[0074] Furthermore, in one embodiment, taking VC-12 service as an example, the total service capacity is 20G, requiring support for the binding and unbinding functions of 8064 VC-12 services to VCn, supporting any binding group from 1 to 63. The parallel-serial bus is designed in STM16 format, with each STM16 bus supporting 1008 VC-12 services and supporting 8 parallel STM16 buses. Based on this example, the binding and unbinding are implemented as follows: I. Implementation process of VCn binding (refer to Figure 2): 1. VC cross-connection implementation: The 16 parallel data from the ingress are concatenated into 128-bit wide data, and then copied 8 times and stored in 8 caches respectively. Each channel is stored in the corresponding address. When the channel number is equal to 0, the A / B table is switched (the cache is divided into A table and B table, and the depth of each cache is consistent with the channel number of the business. For example, Au4 has 32 channels, and the depth of all caches is also 32. The data of each channel is stored in the corresponding cache address. The input channel is 0~31 in a cycle. When the A table is full, the table needs to be switched, and then the data is written to the B table. That is, the table is switched when the input channel number = 0).

[0075] When configuring the cross-connect configuration table, channels bound to a single VCn need to be cross-connected to the same port. For example, (port, chan) represents the location of an ingress VC service, where port represents the port number and chan represents the channel number. Assume four ingress VC services [(0, 1), (1, 100), (2, 2), (3, 1)] need to be bound to a single VCn channel 10. In this case, a cross-connect configuration table can be configured to map the ingress VCs (0, 1), (1, 100), (2, 2), (3, 1) to the egress channels (0, 0), (0, 1), (0, 2), (0, 3). During operation, the circuit reads the data from the corresponding location (1, 100, 2, 1) according to the configuration information, and then selects the corresponding port (0, 1, 2, 3) via the MUX to achieve the cross-connect function.

[0076] 2. Channel Mapping Implementation: Configure a channel mapping table to map VC services after VC crossover to VCn channels. For example: map 4 VC services ((0,0), (0, 1), (0, 2), (0, 3)) to VCn channel 10.

[0077] 3. GearBox Implementation: Convert 8b data to 64b data. The specific steps are as follows: Mark the frame header of (0, 0) as the frame header of the group and erase the other frame header information; concatenate the data of the input channel 10 in a circular shift manner and store it in a 7*8bit buffer; design a counter (range 0~7), and when the count value is equal to the upi_start_period of the channel, output 64-bit data.

[0078] 4. Parallel-to-serial conversion implementation: The 8 parallel data streams are stored in 8 FIFOs respectively, and then the data in the 8 FIFOs are scheduled and output to the 64-bit VCn serial bus in a channel polling manner to be sent to the downstream module.

[0079] II. Implementation process of VCn unbinding (refer to Figure 5): 1. Shared cache implementation: The shared cache adopts a linked list data cache. Each block in the linked list can store 8 64-bit data. The VCn rate of 4 VC binding groups can be allocated 2 blocks, which can absorb bursts of 8 consecutive data. When configuring the scheduling table, the scheduling is divided into 8 sub-tables (corresponding to 8 ports respectively), and then interleaved into a large scheduling table to ensure that the VCn data read from the shared cache and sent to the same port are spaced 8 times apart.

[0080] 2. Bus Conversion Implementation: Configure the port distribution table to distribute services from VCn channel 10 to port 0, thus converting the serial VCn channel to a parallel-to-serial VCn channel. Note that the bandwidth of a port sent to a single port cannot exceed 2.5G.

[0081] 3. Bit Width Conversion Implementation: 64-bit data is converted to 8-bit data. The scheduling module ensures a data interval of at least 8 clock cycles for each port. Only one counter is needed to output the 64-bit data in 8 clock cycles to achieve the bit width conversion function. The position of the VCN frame header must be marked during the conversion.

[0082] 4. Channel Demapping Implementation: Configure the channel demapping table for VCn. Assume the demapped VC channels are (0, 0), (0, 1), (0, 2), and (0, 3). Configure the demapping table to have 4 members, with the first 4 demapped channels being 0, 1, 2, and 3. Based on the VCn frame header marker, the first data is demapped to channel 0, followed by channels 1, 2, and 3, and this process is repeated periodically to complete the demapping of all data.

[0083] Thirdly, embodiments of this application also provide an apparatus for implementing VCN binding groups.

[0084] In one embodiment, referring to FIG8, FIG8 is a functional block diagram of an embodiment of the VCn binding group implementation device of this application. As shown in FIG8, the VCn binding group implementation device includes: a cross-connect module 10, used to cross-connect the service data streams of multiple virtual container VC channels to the same output port; an interleaving module 20, used to map the service data streams of multiple VC channels crossed to the same output port to the same virtual container cascaded VCn channel; and to perform bit width conversion and parallel-to-serial conversion on the service data streams of multiple VC channels mapped to the same VCn channel to form and output a serial VCn service data stream.

[0085] Furthermore, in one embodiment, the cross-connect module 10 is used to: copy the service data stream of each ingress VC channel multiple times and store them in multiple storage units respectively; based on the cross-connect configuration information, read the service data stream of the multiple VC channels from the storage unit corresponding to the target output port, and cross-connect the read service data stream to different channels inside the target output port, wherein the cross-connect configuration information defines the correspondence between each VC channel and the output port and the channels inside the output port.

[0086] Furthermore, in one embodiment, the interleaving module 20 is used to: map the service data streams of multiple VC channels interleaved to the same output port to the same virtual container cascaded VCn channel based on channel mapping configuration information, wherein the channel mapping configuration information defines the correspondence between each VC channel and the VCn channel.

[0087] Further, in one embodiment, the interleaving module 20 is configured to: merge low-bit-width service data streams of multiple VC channels mapped to the same VCn channel into a high-bit-width parallel data stream; during the conversion process, retain only the frame header indication of one VC channel designated as the starting channel among the multiple VC channels, and delete the frame header indications of the remaining VC channels; control the arrangement phase of the low-bit-width service data streams of each VC channel in the high-bit-width parallel data stream according to the start bit tag configured for each VC channel, so as to discretize the output data packet network; and convert the high-bit-width parallel data stream into a single serial VCn service data stream and output it through a buffering and scheduling mechanism.

[0088] The functions of each module in the above-mentioned VCn binding group implementation device correspond to the steps in the above-mentioned VCn binding group implementation method embodiment, and their functions and implementation processes will not be described in detail here.

[0089] Fourthly, embodiments of this application also provide an apparatus for unbinding VCN.

[0090] In one embodiment, referring to FIG9, FIG9 is a functional block diagram of an embodiment of the VCn unbinding implementation device of this application. As shown in FIG9, the VCn unbinding implementation device includes: a buffer module 30, used to buffer and schedule the received serial VCn service data stream to absorb data packet jitter and output it evenly; a serial-to-parallel conversion module 40, used to convert the serial VCn service data stream after buffer scheduling into a serial-to-parallel stream and distribute it to multiple parallel ports; a bit width conversion module 50, used to convert the bit width of the VCn service data stream distributed to each parallel port and restore it from a high bit width data stream to a low bit width data stream; and a demapping module 60, used to demapping each low bit width data stream originating from the same VCn channel to the corresponding VC channel according to the channel demapping configuration, so as to restore the original service data streams of multiple VC channels.

[0091] Furthermore, in one embodiment, the cache module 30 is used to: write the received serial VCn service data stream into a shared cache with a chain structure; and control the rhythm of reading data from the shared cache based on a scheduling table to achieve uniform data output, wherein the scheduling table is configured according to the rate and group size of the serial VCn service data stream.

[0092] Furthermore, in one embodiment, the scheduling table includes a sub-scheduling table for each parallel port to control data sent to the same parallel port to have predetermined intervals.

[0093] Furthermore, in one embodiment, the bit-width conversion module 50 is used to: identify the frame header position marker in the VCn service data stream distributed to each parallel port; and based on the frame header position marker, parse the high-bit-width VCn service data stream into multiple consecutive low-bit-width data streams.

[0094] The functions of each module in the above-mentioned VCN unbinding device correspond to the steps in the above-mentioned VCN unbinding method embodiment, and their functions and implementation processes will not be described in detail here.

[0095] It should be noted that the sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0096] The terms "comprising" and "having," and any variations thereof, in the specification, claims, and accompanying drawings of this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus. The terms "first," "second," and "third," etc., are used to distinguish different objects, etc., and do not indicate a sequence, nor do they limit "first," "second," and "third" to different types.

[0097] In the description of the embodiments of this application, terms such as "exemplary," "for example," or "for instance" are used to indicate examples, illustrations, or explanations. Any embodiment or design described as "exemplary," "for example," or "for instance" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary," "for example," or "for instance" is intended to present the relevant concepts in a concrete manner.

[0098] In the description of the embodiments of this application, unless otherwise stated, " / " means "or". For example, A / B can mean A or B. The "and / or" in the text is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist simultaneously, and B exists alone. In addition, in the description of the embodiments of this application, "multiple" means two or more.

[0099] In some processes described in the embodiments of this application, multiple operations or steps are included in a specific order. However, it should be understood that these operations or steps may not be executed in the order they appear in the embodiments of this application, or they may be executed in parallel. The sequence number of the operation is only used to distinguish different operations, and the sequence number itself does not represent any execution order. In addition, these processes may include more or fewer operations, and these operations or steps may be executed sequentially or in parallel, and these operations or steps may be combined.

[0100] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) as described above, and includes several instructions to cause a terminal device to execute the methods described in the various embodiments of this application.

[0101] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A method for implementing VCN binding groups, characterized in that, The method for implementing the VCn grouping includes: cross-connecting the service data streams of multiple virtual container VC channels to the same output port; mapping the service data streams of multiple VC channels cross-connected to the same output port to the same virtual container cascaded VCn channel; performing bit width conversion and parallel-to-serial conversion on the service data streams of multiple VC channels mapped to the same VCn channel to form and output a serial VCn service data stream.

2. The method for implementing VCN binding as described in claim 1, characterized in that, The step of cross-connecting the service data streams of multiple input virtual container (VC) channels to the same output port includes: copying the service data stream of each input VC channel multiple times and storing them in multiple storage units respectively; based on the cross-connection configuration information, reading the service data streams of the multiple VC channels from the storage unit corresponding to the target output port, and cross-connecting the read service data streams to different channels inside the target output port, wherein the cross-connection configuration information defines the correspondence between each VC channel and the output port and the channels inside the output port.

3. The method for implementing VCN binding as described in claim 1, characterized in that, The step of mapping the service data streams of multiple VC channels that cross over to the same output port to the same virtual container cascaded VCn channel includes: based on channel mapping configuration information, mapping the service data streams of multiple VC channels that cross over to the same output port to the same virtual container cascaded VCn channel, wherein the channel mapping configuration information defines the correspondence between each VC channel and the VCn channel.

4. The method for implementing VCN binding as described in claim 1, characterized in that, Performing bit-width conversion and parallel-to-serial conversion on service data streams from multiple VC channels mapped to the same VCn channel to form and output a single serial VCn service data stream includes: merging the low-bit-width service data streams from multiple VC channels mapped to the same VCn channel into a high-bit-width parallel data stream; during the conversion process, retaining only the frame header indication of the VC channel designated as the starting channel, and deleting the frame header indications of the remaining VC channels; controlling the arrangement phase of the low-bit-width service data streams of each VC channel in the high-bit-width parallel data stream according to the start bit tag configured for each VC channel, thereby discretizing the output data packet network; and converting the high-bit-width parallel data stream into a single serial VCn service data stream and outputting it through a buffering and scheduling mechanism.

5. A method for unbinding VCN, characterized in that, The method for unbinding VCn includes: buffering and scheduling the received serial VCn service data stream to absorb data network jitter and output it evenly; converting the buffered serial VCn service data stream from serial to parallel and distributing it to multiple parallel ports; performing bit-width conversion on the VCn service data streams distributed to each parallel port to restore them from high-bit-width data streams to low-bit-width data streams; and, according to the channel demapping configuration, demapping each low-bit-width data stream originating from the same VCn channel to the corresponding VC channel to restore the original service data streams of multiple VC channels.

6. The method for unbinding VCN as described in claim 5, characterized in that, The buffer scheduling of the received serial VCn service data stream includes: writing the received serial VCn service data stream into a shared buffer with a chain structure; controlling the rhythm of reading data from the shared buffer based on a scheduling table to achieve uniform data output, wherein the scheduling table is configured according to the rate and group size of the serial VCn service data stream.

7. The method for unbinding VCN as described in claim 6, characterized in that, The scheduling table includes a sub-scheduling table for each parallel port to control the data sent to the same parallel port to have a predetermined interval.

8. The method for unbinding VCN as described in claim 5, characterized in that, Performing bit-width conversion on the VCn service data stream distributed to each parallel port to restore it from a high-bit-width data stream to a low-bit-width data stream includes: identifying the frame header position marker in the VCn service data stream distributed to each parallel port; and based on the frame header position marker, parsing the high-bit-width VCn service data stream into multiple consecutive low-bit-width data streams.

9. A device for implementing VCN binding groups, characterized in that, The device for implementing the VCn binding group includes: a cross-connect module for cross-connecting the service data streams of multiple virtual container VC channels to the same output port; an interleaving module for mapping the service data streams of multiple VC channels cross-connected to the same output port to the same virtual container cascaded VCn channel; and bit-width conversion and parallel-to-serial conversion of the service data streams of multiple VC channels mapped to the same VCn channel to form and output a serial VCn service data stream.

10. A device for unbinding VCN, characterized in that, The VCn unbinding implementation device includes: a buffer module for buffering and scheduling the received serial VCn service data stream to absorb data packet jitter and output it evenly; a serial-to-parallel conversion module for converting the buffered serial VCn service data stream into a serial-to-parallel stream and distributing it to multiple parallel ports; a bit-width conversion module for converting the bit-width of the VCn service data stream distributed to each parallel port, restoring it from a high bit-width data stream to a low bit-width data stream; and a demapping module for demapping each low bit-width data stream originating from the same VCn channel to the corresponding VC channel according to the channel demapping configuration, so as to restore the original service data streams of multiple VC channels.

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