Circuit device and head-up display

By using the distortion correction circuit in the circuit device to determine and process the coordinates of the output image, the problem of redundant display is solved, and image display with no or little distortion is achieved, thus improving the user experience.

CN121967916APending Publication Date: 2026-05-01SEIKO EPSON CORP
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SEIKO EPSON CORP
Filing Date
2025-10-28
Publication Date
2026-05-01

AI Technical Summary

Technical Problem

In display devices that project images using multiple optical systems, existing technologies may lead to undesirable results after image distortion correction, such as redundant displays, causing discomfort to users.

Method used

The distortion correction circuit in the circuit device uses a buffer memory and a distortion correction table to determine whether the coordinates of the output image belong to a specific input area. If they do not, the pixel data is set to the specified color data to eliminate unnecessary display.

Benefits of technology

It effectively eliminates redundant displays, providing image display with no or minimal distortion, thus improving the user experience.

✦ Generated by Eureka AI based on patent content.

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Abstract

A circuit device and a head-up display are provided. The circuit device includes: a buffer memory that stores input image data; and a distortion correction circuit that performs distortion correction of the input image. The output image includes a first output-side region projected by the first optical system and a second output-side region projected by the second optical system. The distortion correction circuit converts the output-side coordinates into input-side coordinates. When the output-side coordinates are included in the first output-side region and the input-side coordinates do not belong to the first input-side region, the distortion correction circuit sets the pixel data of the output image data at the output-side coordinates as predetermined color data. When the output-side coordinates are included in the second output-side region and the input-side coordinates do not belong to the second input-side region, the distortion correction circuit sets the pixel data of the output image data at the output-side coordinates as predetermined color data.
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Description

Circuit device and head-up display Technical Field

[0001] This invention relates to circuit devices, head-up displays, etc. Background Technology

[0002] Patent Document 1 discloses an image generation apparatus for correcting distortion in images captured by a wide-angle lens. The image after distortion correction is used as the object image. An indeterminate semi-circular region without an image is formed around the periphery of the object image. The image generation apparatus defines a rectangular mask region covering the ends of the object image containing the indeterminate region, and fills the mask region with a predetermined color.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2017-045312

[0004] When multiple distortion parameters are used to correct distortion in multiple regions of an image, the distortion correction in a particular region is referenced to the images of its neighboring regions. This can potentially lead to undesirable display issues between the regions. Such issues may cause discomfort to the user. Summary of the Invention

[0005] One aspect of this disclosure relates to a circuit device that controls a display device projecting images through a first optical system and a second optical system. The circuit device includes: a buffer memory storing input image data as image data of an input image; and a distortion correction circuit that performs distortion correction on the input image and outputs output image data as image data of an output image. The output image includes a first output-side region projected by the first optical system and a second output-side region projected by the second optical system. The distortion correction circuit converts the output-side coordinates of the output image into the input-side coordinates of the input image, wherein the output-side coordinates are included in the first output-side region projected by the first optical system and the second output-side region projected by the second optical system. In the case of a first output side region, it is determined whether the input side coordinates belong to a first input side region corresponding to the first output side region. If the input side coordinates do not belong to the first input side region, the pixel data of the output image data at the output side coordinates is set to a specified color data. If the output side coordinates are included in the second output side region, it is determined whether the input side coordinates belong to a second input side region corresponding to the second output side region. If the input side coordinates do not belong to the second input side region, the pixel data of the output image data at the output side coordinates is set to the specified color data.

[0006] Furthermore, other aspects of this disclosure relate to a head-up display comprising: the aforementioned circuitry; and a display device that projects the output image using the first optical system and the second optical system. Attached Figure Description

[0007] Figure 1 shows a structural example of the display device included in a HUD.

[0008] Figure 2 illustrates distortion correction in a HUD that uses multiple optical systems.

[0009] Figure 3 is an explanatory diagram that is redundantly displayed.

[0010] Figure 4 shows the first structural example of a head-up display.

[0011] Figure 5 shows a detailed structural example of a distortion correction circuit.

[0012] Figure 6 is an example of a region set using region setting information.

[0013] Figure 7 shows an example of the processing flow of the distortion correction circuit.

[0014] Figure 8 shows an example of the processing flow for region determination, distortion processing, and pixel data generation.

[0015] Figure 9 shows an example of the processing flow for region determination, distortion processing, and pixel data generation.

[0016] Figure 10 is an illustrative diagram of an example of display areas arranged vertically.

[0017] Figure 11 shows a detailed structural example of the distortion correction circuit in the second structural example of the HUD.

[0018] Figure 12 shows a structural example of the circuit device in the third structural example of a HUD.

[0019] Figure 13 shows a detailed structural example of the distortion correction circuit in the third structural example of a HUD.

[0020] Figure 14 is a diagram illustrating the operation of the distortion correction circuit in the third structural example.

[0021] Label Explanation

[0022] 10: Screen; 100: Circuit device; 110: Input interface circuit; 120: Image selection circuit; 130: Buffer memory; 140: Distortion correction circuit; 141: Pixel interpolation unit; 142: Filling unit; 143: Address conversion unit; 144: Coordinate correction unit; 145: Distortion processing unit; 146: Coordinate counter; 147: Table selection unit; 148: Area setting information selection unit; 149: Area determination unit; 150: Output interface circuit; 160: Storage circuit; 161: Area setting information; 162: Distortion correction table; 171: Area out-of-area determination unit; 200: Display device; 210: Display controller; 221, 222: Display Driver; 231, 232: Light source; 241, 242: Liquid crystal display panel; 251: First reflector; 252: Second reflector; 300: Processing device; 500: Head-up display; ARI1: First input side area; ARI2: Second input side area; ARI3: Third input side area; ART1: First conversion area; ARQ1: First output side area; ARQ2: Second output side area; ARQ3: Third output side area; BG1~BG4: Redundant display; IMA: Input image data; IMB: Output image data; TB1: First distortion correction table; TB2: Second distortion correction table; TB3: Third distortion correction table. Detailed Implementation

[0023] The preferred embodiments of this disclosure will now be described in detail. Furthermore, the embodiments described below are not intended to unduly limit the scope of the claims, and not all structures described in these embodiments are necessarily essential structural elements. For example, an example of applying the distortion correction method of this disclosure to a head-up display (HUD) is shown below. However, the distortion correction method of this disclosure can be applied to any display system that projects images through multiple optical systems, such as a projector. Additionally, the term "head-up display" will sometimes be abbreviated as "HUD" below.

[0024] 1. Example of the first structure

[0025] Figure 1 shows a structural example of the display device 200 included in the HUD. The display device 200 includes a display controller 210, display drivers 221 and 222, a light source 231 and 232, a liquid crystal display panel 241 and 242, a first reflector 251, and a second reflector 252.

[0026] The display controller 210 receives output image data from the circuit device 100 and outputs image data and timing control signals for the display driver 221 and for the display driver 222. The display driver 221 drives the liquid crystal display panel 241 according to the image data and timing control signals received from the display controller 210. The display driver 222 drives the liquid crystal display panel 242 according to the image data and timing control signals received from the display controller 210.

[0027] Light source 231 emits light, which passes through liquid crystal display panel 241. A first reflector 251 projects this transmitted light onto screen 10. Screen 10 is, for example, a windshield of a moving object. Screen 10 reflects light, which enters the user's eye 1. Thus, the user can see a first image 21 through screen 10. Similarly, light source 232 emits light, which passes through liquid crystal display panel 242. A second reflector 252 projects this transmitted light onto screen 10. The second reflector 252 is, for example, a reflector or lens. Screen 10 reflects light, which enters the user's eye 1. Thus, the user can see a second image 22 through screen 10. The combined image of the first image 21 and the second image 22 becomes the display image projected by the HUD.

[0028] Furthermore, the display image projected by the HUD can also be projected by three or more optical systems. For example, in the case where the display image is projected by three reflectors, three sets of liquid crystal display panels, light sources, and reflectors are provided, and the display image is divided into a first image, a second image, and a third image.

[0029] Figure 2 illustrates distortion correction in a HUD using multiple optical systems. Distortion correction refers to applying image distortion that is the opposite of the image distortion when the image is projected onto the HUD screen. Thus, the distortion caused by distortion correction cancels out the distortion caused by projection, resulting in an image display with little or no distortion. Image distortion caused by projection includes distortion caused by the curvature of the projection surface (such as the screen), image distortion caused by the optical system, or a combination of both. Hereinafter, we assume that the image is projected and displayed through three mirrors.

[0030] The input image input to the circuit device 100 includes a first display area BI1 projected by a first reflector, a second display area BI2 projected by a second reflector, and a third display area BI3 projected by a third reflector. The first display area BI1 of the input image is distorted by a first distortion correction table to become the first display area BQ1 of the output image. The first distortion correction table is a table that assigns distortion opposite to that produced by projection using the first reflector. The second display area BI2 of the input image is distorted by a second distortion correction table to become the second display area BQ2 of the output image. The second distortion correction table is a table that assigns distortion opposite to that produced by projection using the second reflector. The third display area BI3 of the input image is distorted by a third distortion correction table to become the third display area BQ3 of the output image. The third distortion correction table is a table that assigns distortion opposite to that produced by projection using the third reflector.

[0031] The first display area BQ1, the second display area BQ2, and the third display area BQ3 of the generated output image are projected by the first reflector, the second reflector, and the third reflector, respectively. This causes the distortion caused by projection to cancel out the distortion caused by distortion correction. Therefore, the user can see a distortion-free display image on screen 10, identical to the input image.

[0032] Figure 2 above is an example of a case with ideal distortion correction, but in a HUD that uses multiple mirrors, it is possible to produce redundant displays as shown in Figure 3 below.

[0033] In distortion correction, when the pixel coordinates of the output image are (U, V), (U, V) are converted to coordinates (X, Y) of the input image based on the distortion correction table. Furthermore, the pixel data of the output image at coordinates (U, V) is constructed based on the pixel data of the input image at coordinates (X, Y). At this time, the first output-side region ARQ1 in the output image, which includes the first display region BQ1, is converted to the first transformed region ART1 in the input image through distortion correction. The first transformed region ART1 becomes a shape that has undergone inverse distortion correction of the first output-side region ARQ1, and therefore includes not only the first display region BI1 of the input image but also a portion of its adjacent second display region BI2. Thus, an extra display BG1 is generated in the output image by referring to the pixel data of the second display region BI2.

[0034] Similarly, when generating the second display area BQ2 of the output image during distortion correction, redundant display BG2 is generated by referencing pixel data of the first display area BI1, and redundant display BG3 is generated by referencing pixel data of the third display area BI3. When generating the third display area BQ3 of the output image during distortion correction, redundant display BG4 is generated by referencing pixel data of the second display area BI2.

[0035] Figure 4 shows a first structural example of a head-up display 500 including the circuit device 100 of this embodiment. The head-up display 500 includes the circuit device 100, the display device 200, and the processing device 300.

[0036] The processing device 300 sends the image data of the input image, i.e., the input image data IMA, to the circuit device 100. The processing device 300 is a so-called SoC, such as a CPU or a processor like a microcomputer. SoC is an abbreviation for System on Chip. CPU is an abbreviation for Central Processing Unit.

[0037] The circuit device 100 includes an input interface circuit 110, a buffer memory 130, a distortion correction circuit 140, an output interface circuit 150, and a storage circuit 160. The circuit device 100 is, for example, an integrated circuit device in which multiple circuit elements are integrated on a semiconductor substrate.

[0038] The input interface circuit 110 receives input image data (IMA) from the processing device 300. The input interface circuit 110 can be an interface circuit for various image communication standards; for example, it can be a receiver circuit for LVDS, DVI, a display port, GMSL, or GVIF. LVDS stands for Low Voltage Differential Signaling, DVI for Digital Visual Interface, GMSL for Gigabit Multimedia Serial Link, and GVIF for Gigabit Video Interface.

[0039] Storage circuit 160 stores region setting information 161 and distortion correction table 162. Storage circuit 160 may include non-volatile memory such as EEPROM or OTP memory, volatile memory such as SRAM or DRAM, or registers based on trigger circuits, etc. Region setting information 161 and distortion correction table 162 may also be stored in different types of storage circuits. For example, region setting information 161 may be stored in a register, and distortion correction table 162 may be stored in volatile or non-volatile memory. Region setting information 161 may also be written to storage circuit 160 from processing device 300 via an interface not shown. Alternatively, if storage circuit 160 is non-volatile memory, region setting information 161 may be pre-written to storage circuit 160. The same applies to distortion correction table 162.

[0040] Buffer memory 130 temporarily stores the input image data (IMA). Buffer memory 130 can be a line buffer that stores image data for multiple scan lines, or a frame memory that stores image data for one frame. Buffer memory 130 is, for example, a volatile memory such as SRAM or DRAM.

[0041] The distortion correction circuit 140 performs distortion correction on the input image based on the distortion correction table 162, and outputs output image data IMB as the output image data. At this time, the distortion correction circuit 140 determines the output side coordinates that cause the aforementioned redundant display based on the region setting information 161, and sets the pixel data of those coordinates as specified color data. The distortion correction table 162 is a table that associates the input side coordinates (X, Y) of the input image with the output side coordinates (U, V) of the output image. The distortion correction table 162 is also referred to as distortion parameters. Specified color data is color data that becomes transparent in the HUD display, such as black data.

[0042] The output interface circuit 150 sends the output image data IMB to the display device 200. The output interface circuit 150 can be an interface circuit for various image communication standards, such as LVDS, DVI, display port, GMSL, or GVIF.

[0043] Furthermore, the distortion correction circuit 140 is a logic circuit. Part or all of the logic circuit can also be implemented using a processor such as a DSP (Digital Signal Processor). In this case, the program and command set describing the functions of each circuit are stored in memory, and the processor executes the program and command set to implement the functions of each circuit.

[0044] The display device 200 displays a virtual image in the user's field of view based on the output image data IMB received from the circuit device 100. An example of the display device 200 is shown in FIG. 1, but it is not limited thereto. For example, the circuit device 100 may also incorporate the functions of the display controller 210. Alternatively, there may be one display driver and one liquid crystal display panel, and multiple reflectors. In this case, images displayed on multiple areas of the liquid crystal display panel are projected by corresponding reflectors. Alternatively, the optical system for projection is not limited to reflectors; for example, it may be a lens. Alternatively, an image display device may be used instead of a liquid crystal display panel and reflectors, and multiple such image display devices may be provided. The image display device may also be a laser light source, a reflector reflecting the laser, and an actuator driving the reflector to scan the laser. Alternatively, the image display device may also be a digital reflector device comprising a laser light source, an array of micro-reflectors, and actuators driving each micro-reflector.

[0045] Figure 5 shows a detailed structural example of the distortion correction circuit 140. The distortion correction circuit 140 includes a pixel interpolation unit 141, a coloring unit 142, an address conversion unit 143, a distortion processing unit 145, a coordinate counter 146, a region setting information selection unit 148, a table selection unit 147, a region determination unit 149, and a region out-of-region determination unit 171. Hereinafter, the operation of each unit will be explained using Figures 6 to 9.

[0046] Figure 6 shows an example of regions defined by region setting information 161. In the input image, a first input-side region ARI1, a second input-side region ARI2, and a third input-side region ARI3 are defined. The first input-side region ARI1 includes the first display region BI1 but excludes the second and third display regions BI2 and BI3. The second input-side region ARI2 includes the second display region BI2 but excludes the first and third display regions BI1 and BI3. The third input-side region ARI3 includes the third display region BI3 but excludes the first and second display regions BI1 and BI2.

[0047] In the output image, define a first output-side region ARQ1, a second output-side region ARQ2, and a third output-side region ARQ3. The first output-side region ARQ1 includes the first display region BQ1 but excludes the second and third display regions BQ2 and BQ3. The second output-side region ARQ2 includes the second display region BQ2 but excludes the first and third display regions BQ1 and BQ3. The third output-side region ARQ3 includes the third display region BQ3 but excludes the first and second display regions BQ1 and BQ2.

[0048] Additionally, in Figure 6, rectangles represent the display areas of the input image, but the shape of each display area can be arbitrary. Figure 6 also shows an example where adjacent display areas in the input image are separated, but adjacent display areas can also be adjacent. Furthermore, Figure 6 shows an example where adjacent input-side areas are adjacent, but even when adjacent display areas are separated, adjacent input-side areas can still be separated. Similarly, adjacent output-side areas can also be separated. Additionally, Figure 6 shows an example where the input-side area is larger than the display area, but each input-side area can also be the same area as the display area it encompasses.

[0049] As shown in Figure 5, the region setting information 161 includes information SARI1 for setting the first input-side region ARI1, information SARI2 for setting the second input-side region ARI2, and information SARI3 for setting the third input-side region ARI3. Additionally, the region setting information 161 includes information SARQ1 for setting the first output-side region ARQ1, information SARQ2 for setting the second output-side region ARQ2, and information SARQ3 for setting the third output-side region ARQ3. Each piece of information defines the position and shape of the region. Each piece of information can also be the coordinates of all the vertices of the region. When the region is rectangular, each piece of information can be the coordinates of the rectangle's reference position, its horizontal width, and its vertical width. The reference position can be any vertex of the rectangle or its center point.

[0050] Distortion correction table 162 includes a first distortion correction table TB1, a second distortion correction table TB2, and a third distortion correction table TB3. The first distortion correction table TB1 maps the output-side coordinates (U, V) within the first output-side region ARQ1 to the input-side coordinates (X, Y) of the input image. The second distortion correction table TB2 maps the output-side coordinates (U, V) within the second output-side region ARQ2 to the input-side coordinates (X, Y) of the input image. The third distortion correction table TB3 maps the output-side coordinates (U, V) within the third output-side region ARQ3 to the input-side coordinates (X, Y) of the input image.

[0051] Figure 7 illustrates a processing flow example of the distortion correction circuit 140. In step S1, the coordinate counter 146 outputs the output side coordinates (U, V) by counting coordinates. Specifically, the coordinate counter 146 initially outputs (U, V) = (0, 0) in the frame, and increments the coordinates in each loop starting from S3. When (U, V) reaches the last pixel of the frame, the horizontal coordinate U and the vertical coordinate V are reset. In each loop increment, the coordinate counter 146 first increments the horizontal coordinate U, and when U reaches the horizontal pixel count, U is reset and the vertical coordinate V is incremented, repeating this process until the last pixel of the frame.

[0052] In step S2, the distortion correction circuit 140 performs region determination, distortion processing, and pixel data generation. Details are illustrated in Figures 8 and 9.

[0053] In step S3, the distortion correction circuit 140 determines whether all coordinates of the output side coordinates (U, V) have been counted. If all coordinates have been counted, the distortion correction circuit 140 terminates the process; otherwise, it returns to step S1.

[0054] Figures 8 and 9 are examples of the processing flow for region determination, distortion processing, and pixel data generation in step S2.

[0055] In step S11, the region determination unit 149 determines whether the output side coordinates (U, V) belong to the first output side region ARQ1 based on the setting information SARQ1 of the first output side region ARQ1.

[0056] If it is determined in step S11 that the output-side coordinates (U, V) belong to the first output-side region ARQ1, then in step S12, the table selection unit 147 selects the first distortion correction table TB1. The distortion processing unit 145 refers to the selected first distortion correction table TB1 and converts the output-side coordinates (U, V) into input-side coordinates (X, Y).

[0057] In step S13, the region setting information selection unit 148 selects the setting information SARI1 of the first input side region ARI1 based on the information determined by the region determination unit 149 as the first output side region ARQ1. The region outside determination unit 171 determines whether the input side coordinates (X, Y) belong to the first input side region ARI1 based on the setting information SARI1.

[0058] When it is determined in step S13 that the input-side coordinates (X, Y) belong to the first input-side region ARI1, the distortion correction circuit 140 generates pixel data for the output-side coordinates (U, V) in step S14. The address conversion unit 143 converts the input-side coordinates (X, Y) into an address in the buffer memory 130. Specifically, the address conversion unit 143 outputs the addresses of multiple pixels surrounding (X, Y) in the specified input image. The pixel interpolation unit 141 reads the pixel data of the multiple pixels from this address in the buffer memory 130, performs pixel interpolation using the pixel data, and thereby generates pixel data for the output image (U, V).

[0059] When it is determined in step S13 that the input side coordinates (X, Y) do not belong to the first input side region ARI1, in step S22, the coloring unit 142 sets the pixel data of the output image (U, V) to a specified color data. The specified color data is, for example, black data.

[0060] If it is determined in step S11 that the output side coordinates (U, V) do not belong to the first output side region ARQ1, in step S15, the region determination unit 149 determines whether the output side coordinates (U, V) belong to the second output side region ARQ2 based on the setting information SARQ2 of the second output side region ARQ2.

[0061] If it is determined in step S15 that the output-side coordinates (U, V) belong to the second output-side region ARQ2, then in step S16, the table selection unit 147 selects the second distortion correction table TB2. The distortion processing unit 145 refers to the selected second distortion correction table TB2 and converts the output-side coordinates (U, V) into input-side coordinates (X, Y).

[0062] In step S17, the region setting information selection unit 148 selects the setting information SARI2 of the second input side region ARI2 based on the information determined by the region determination unit 149 as the second output side region ARQ2. The region outside determination unit 171 determines whether the input side coordinates (X, Y) belong to the second input side region ARI2 based on the setting information SARI2.

[0063] When it is determined in step S17 that the input-side coordinates (X, Y) belong to the second input-side region ARI2, the distortion correction circuit 140 generates pixel data for the output-side coordinates (U, V) in step S14. When it is determined in step S17 that the input-side coordinates (X, Y) do not belong to the second input-side region ARI2, the coloring unit 142 sets the pixel data of the output image (U, V) to a specified color in step S22.

[0064] If it is determined in step S15 that the output side coordinates (U, V) do not belong to the second output side region ARQ2, in step S18, the region determination unit 149 determines whether the output side coordinates (U, V) belong to the third output side region ARQ3 based on the setting information SARQ3 of the third output side region ARQ3.

[0065] If it is determined in step S18 that the output-side coordinates (U, V) belong to the third output-side region ARQ3, then in step S19, the table selection unit 147 selects the third distortion correction table TB3. The distortion processing unit 145 refers to the selected third distortion correction table TB3 and converts the output-side coordinates (U, V) into input-side coordinates (X, Y).

[0066] In step S20, the region setting information selection unit 148 selects the setting information SARI3 of the third input side region ARI3 based on the information determined by the region determination unit 149 as the third output side region ARQ3. The region outside determination unit 171 determines whether the input side coordinates (X, Y) belong to the third input side region ARI3 based on the setting information SARI3.

[0067] When it is determined in step S20 that the input-side coordinates (X, Y) belong to the third input-side region ARI3, the distortion correction circuit 140 generates pixel data for the output-side coordinates (U, V) in step S14. When it is determined in step S20 that the input-side coordinates (X, Y) do not belong to the third input-side region ARI3, the coloring part 142 sets the pixel data of the output image (U, V) to the specified color data in step S22.

[0068] If, in step S18, it is determined that the output-side coordinates (U, V) do not belong to the third output-side region ARQ3, then in step S21, the region determination unit 149 determines that the output-side coordinates (U, V) are outside the region. In step S22, the coloring unit 142 sets the pixel data of the output image (U, V) to the specified color data. Through the above processing, the output image data IMB is composed of the pixel data output by the pixel interpolation unit 141 and the coloring unit 142.

[0069] Figure 10 is an explanatory diagram of an example of vertically arranged display areas. In the input image, the first display area BI1, the second display area BI2, and the third display area BI3 are arranged vertically. In the output image, the first display area BQ1, the second display area BQ2, and the third display area BQ3 are displayed vertically. Therefore, when the buffer memory 130 is a row buffer, the storage capacity of the row buffer is saved.

[0070] This method can also be used, but from the viewpoint of synchronizing display timing, it is advantageous to arrange three display areas horizontally in the input image as shown in Figure 6. That is, since the input image is displayed sequentially from top to bottom, the output image is displayed in the order of the first display area BQ1, the second display area BQ2, and the third display area BQ3, with the display timing of the display areas staggered. On the other hand, as shown in Figure 6, when three display areas are arranged horizontally in the input image, all three display areas are displayed simultaneously in the output image.

[0071] In this embodiment, the circuit device 100 controls the display device 200 that projects images through the first optical system and the second optical system. The circuit device 100 includes a buffer memory 130 and a distortion correction circuit 140. The buffer memory 130 stores image data of the input image, namely input image data IMA. The distortion correction circuit 140 performs distortion correction on the input image and outputs output image data IMB as image data of the output image. The output image includes a first output-side region ARQ1 projected by the first optical system and a second output-side region ARQ2 projected by the second optical system. The distortion correction circuit 140 converts the output-side coordinates (U, V) of the output image into the input-side coordinates (X, Y) of the input image. When the output-side coordinates (U, V) are included in the first output-side region ARQ1, the distortion correction circuit 140 determines whether the input-side coordinates (X, Y) belong to the first input-side region ARI1, which is set corresponding to the first output-side region ARQ1. When the input-side coordinates (X, Y) do not belong to the first input-side region ARI1, the distortion correction circuit 140 sets the pixel data of the output image data IMB at the output-side coordinates (U, V) to the specified color data. When the output-side coordinates (U, V) are included in the second output-side region ARQ2, the distortion correction circuit 140 determines whether the input-side coordinates (X, Y) belong to the second input-side region ARI2, which is set corresponding to the second output-side region ARQ2. When the input-side coordinates (X, Y) do not belong to the second input-side region ARI2, the distortion correction circuit 140 sets the pixel data of the output image data IMB at the output-side coordinates (U, V) to the specified color data.

[0072] As illustrated in Figure 3, images of multiple display areas are projected through multiple optical systems. The first and second display areas are taken as examples below. During distortion correction, since the output image is generated by referencing the images in adjacent display areas BI1 and BI2 of the input image, redundant displays BG1 and BG2 may be generated between the display areas BQ1 and BQ2 of the output image. According to this embodiment, as explained in Figure 6, etc., the regions in the first output-side region ARQ1, which includes the first display area BQ1 of the output image, that correspond to the first input-side region ARI1, which includes the first display area BI1 of the input image, are subjected to normal distortion correction. Regions in the first output-side region ARQ1 that do not correspond to the first input-side region ARI1 are filled with a specified color. The same applies to other output-side regions. Therefore, during distortion correction, the images of adjacent display areas in the input image are no longer referenced, and thus redundant displays BG1 and BG2 are no longer generated. If there are extra displays, it may cause a sense of disharmony to the user of the display device 200. However, according to this embodiment, a display without a sense of disharmony can be provided to the user.

[0073] Furthermore, in the example of Figure 1, the first optical system corresponds to the first reflector 251, and the second optical system corresponds to the second reflector 252. Alternatively, as described above, the image display device may also consist of a laser light source, a reflector or a micro-reflector array, and an actuator. In this case, the first optical system may correspond to the first image display device, and the second optical system may correspond to the second image display device.

[0074] Furthermore, in this embodiment, the circuit device 100 may also include a storage circuit 160. The storage circuit 160 may also store region setting information 161 for setting the first output-side region ARQ1, the first input-side region ARI1, the second output-side region ARQ2, and the second input-side region ARI2. The distortion correction circuit 140 may also determine, based on the region setting information 161, whether the output-side coordinates (U, V) belong to the first output-side region ARQ1, whether the input-side coordinates (X, Y) belong to the first input-side region ARI1, whether the output-side coordinates (U, V) belong to the second output-side region ARQ2, and whether the input-side coordinates (X, Y) belong to the second input-side region ARI2.

[0075] According to this embodiment, the input-side region and output-side region corresponding to the display area projected by each optical system can be set via the region setting information 161. Then, the distortion correction circuit 140 performs region determination based on the region setting information 161, and selects either normal distortion correction or full coverage based on specified color data according to the determination result, thereby eliminating redundant display.

[0076] Furthermore, comparing Figures 3 and 6, it can be seen that the first transformed region ART1, obtained by transforming the first output-side region ARQ1 to the input side, can also overlap with a portion of the first input-side region ARI1 and the second input-side region ARI2. Similarly, the second transformed region, obtained by transforming the second output-side region ARQ2 to the input side, can also overlap with a portion of the second input-side region ARI2 and the first input-side region ARI1.

[0077] Because a portion of the first conversion region ART1 overlaps with a portion of the second input-side region ARI2, an extra display BG1 is generated in the first output-side region ARQ1 due to the display of the second input-side region ARI2. According to this embodiment, the portion of the first output-side region ARQ1 where the first conversion region ART1 and the second input-side region ARI2 overlap is filled with a specified color data. Therefore, the extra display BG1 is not generated. Similarly, regarding the portion of the second output-side region ARQ2 where the second conversion region overlaps with a portion of the first input-side region ARI1, a specified color data is filled with the specified color data. Therefore, the extra display BG2 is not generated.

[0078] Alternatively, in this embodiment, if the output-side coordinates (U, V) are contained within the first output-side region ARQ1, the distortion correction circuit 140 selects the first distortion correction table TB1 corresponding to the first optical system and uses the first distortion correction table TB1 to convert the output-side coordinates (U, V) into input-side coordinates (X, Y). Alternatively, if the output-side coordinates (U, V) are contained within the second output-side region ARQ2, the distortion correction circuit 140 selects the second distortion correction table TB2 corresponding to the second optical system and uses the second distortion correction table TB2 to convert the output-side coordinates (U, V) into input-side coordinates (X, Y).

[0079] According to this embodiment, the distortion correction circuit 140 can determine which coordinate (X, Y) of the input image is used as a reference to generate the pixel data of each pixel in the first output-side region ARQ1 projected by the first optical system. Therefore, the distortion correction circuit 140 can make the pixel data conform to a specified color even when it is a reference source that generates redundant displays.

[0080] Alternatively, in this embodiment, the distortion correction circuit 140 can also use the distortion correction table 162 to convert the output-side coordinates (U, V) into input-side coordinates (X, Y). The distortion correction table 162 can also be a table that maps the output-side coordinates (U, V) belonging to the first output-side region ARQ1 to the input-side coordinates (X, Y) to form distortion correction corresponding to the first optical system, and maps the output-side coordinates (U, V) belonging to the second output-side region ARQ2 to the input-side coordinates (X, Y) to form distortion correction corresponding to the second optical system.

[0081] According to this embodiment, the distortion correction circuit 140 can use the distortion correction table 162 to perform distortion correction corresponding to the first optical system and distortion correction corresponding to the second optical system. In such distortion correction, redundant display as described above may occur, but according to this embodiment, no redundant display is generated.

[0082] In addition, in this embodiment, the first output side region ARQ1 and the second output side region ARQ2 may be arranged in a horizontal direction, and the first input side region ARI1 and the second input side region ARI2 may be arranged in a horizontal direction.

[0083] As shown in Figure 10, although display areas BQ1 and BQ2 are arranged horizontally in the output image, they are not simultaneously displayed in the output image when display areas BI1 and BI2 are arranged vertically in the input image. According to this embodiment, both the output-side area and the input-side area, which include each display area, are arranged horizontally. Therefore, display areas BI1 and BQ2 are displayed simultaneously in the output image.

[0084] Alternatively, in this embodiment, the display device 200 may also use the first optical system and the second optical system to project the output image onto the projection surface. Distortion correction can also correct image distortion caused by distortion of the first optical system and the second optical system or distortion of the projection surface.

[0085] When the display device 200 uses the first optical system and the second optical system to project the output image onto the projection surface, redundant displays as described above may occur. According to this embodiment, as described above, redundant displays can be eliminated.

[0086] In addition, in this embodiment, the specified color data may also be color data that becomes transparent when displayed by the display device 200.

[0087] According to this embodiment, the areas in the first output-side region ARQ1 that do not correspond to the first input-side region ARI1 are filled with a transparent color. The same applies to other output-side regions. As a result, the redundant display portions BG1 and BG2 are filled with the same transparent color as the transparent areas without display objects, and no redundant display is generated.

[0088] Furthermore, in this embodiment, the head-up display 500 includes: any of the circuit devices 100 described above; and a display device 200 that projects an output image using a first optical system and a second optical system.

[0089] 2. Example of the second structure

[0090] The following mainly describes the parts that differ from the first structural example, omitting the parts that are the same as the first structural example.

[0091] Figure 11 shows a detailed structural example of the distortion correction circuit 140 in the second structural example of the HUD. The distortion correction circuit 140 includes a pixel interpolation unit 141, a coloring unit 142, an address conversion unit 143, a distortion processing unit 145, a coordinate counter 146, a region setting information selection unit 148, a region determination unit 149, and a region out determination unit 171.

[0092] Distortion correction table 162 is a table that maps the output-side coordinates (U, V) of the first output-side region ARQ1, the second output-side region ARQ2, and the third output-side region ARQ3 to the input-side coordinates (X, Y). Specifically, distortion correction table 162 is a table that combines the first distortion correction table TB1, the second distortion correction table TB2, and the third distortion correction table TB3 of Figure 5 into a single table. The first output-side region ARQ1, the second output-side region ARQ2, and the third output-side region ARQ3 are non-overlapping, so even when the tables are combined into one, the coordinate transformation for distortion processing is uniquely determined.

[0093] 3. Example of the third structure

[0094] The following mainly explains the parts that differ from the first structural example, omitting the explanations of the parts that are the same as the first structural example. Additionally, the third structural example can be combined with the second structural example.

[0095] Figure 12 shows a structural example of the circuit device 100 in the third structural example of the HUD. The circuit device 100 includes an input interface circuit 110, an image selection circuit 120, a buffer memory 130, a distortion correction circuit 140, an output interface circuit 150, and a storage circuit 160.

[0096] The image selection circuit 120 selects selected image data IMS from the input image data IMA as the selection area based on the area setting information 161. The selection area is the first input-side area ARI1, the second input-side area ARI2, and the third input-side area ARI3, which is a region narrower than the entire input image. The image selection circuit 120 writes the selected image data IMS into the buffer memory 130.

[0097] The distortion correction circuit 140 generates output image data IMB for the region corresponding to the selected image in the output image based on the region setting information 161 and the selected image data IMS, and sets the output image data IMB for the regions other than the selected image to the specified color data.

[0098] Figure 13 shows a detailed structural example of the distortion correction circuit 140 in the third structural example of the HUD. The distortion correction circuit 140 includes a pixel interpolation unit 141, a coloring unit 142, an address conversion unit 143, a coordinate correction unit 144, a distortion processing unit 145, a coordinate counter 146, a region setting information selection unit 148, a table selection unit 147, and a region determination unit 149.

[0099] Here, we define a first input-side region ARI1 and a second input-side region ARI2 in the input image, and a first output-side region ARQ1 and a second output-side region ARQ2 in the output image. The region setting information includes setting information SARI1, setting information SARI2, setting information SARQ1, and setting information SARQ2. Distortion correction table 162 includes a first distortion correction table TB1 and a second distortion correction table TB2.

[0100] The operation of the distortion correction circuit 140 in the third structural example is explained using Figure 14. Furthermore, in Figure 14, the coordinates (X, Y) = (100, 100) are recorded as (X: 100 Y: 100).

[0101] Assume the input image has 800 horizontal pixels and 400 vertical pixels. Define the first input-side region ARI1 and the second input-side region ARI2 as selection areas. Set the reference point for each region to the top-left vertex. The reference point for the first input-side region ARI1 in the input image is (X: 100 Y: 100), with 100 horizontal and 100 vertical pixels. The reference point for the second input-side region ARI2 in the input image is (X: 500 Y: 100), with 100 horizontal and 100 vertical pixels.

[0102] The selected image stored in buffer memory 130 has 100 + 100 = 200 horizontal pixels and 100 vertical pixels. The coordinates in the selected image within buffer memory 130 are marked as the selected coordinates (Xs, Ys). Within buffer memory 130, the reference point of the first input-side region ARI1 is set to coordinates (Xs: 0, Ys: 0), and the reference point of the second input-side region ARI2 is set to coordinates (Xs: 100, Ys: 0).

[0103] Assume the region determination unit 149 determines that the output-side coordinates (U, V) belong to the first output-side region ARQ1. In this case, the distortion processing unit 145 uses the first distortion correction table TB1 to convert the output-side coordinates (U, V) into input-side coordinates (X, Y). The coordinate correction unit 144 determines whether the input-side coordinates (X, Y) are within the range of (X: 100 Y: 100) to (X: 200 Y: 200), i.e., whether they belong to the first input-side region ARI1.

[0104] If the input-side coordinates (X, Y) are determined to belong to the first input-side region ARI1, the coordinate correction unit 144 sets the selected coordinates to (Xs, Ys) = (X-100, Y-100). That is, the coordinate correction unit 144 shifts the reference point (X: 100 Y: 100) of the first input-side region ARI1 to (Xs: 0 Ys: 0). The address conversion unit 143 converts (Xs, Ys) into an address in the buffer memory 130. The pixel interpolation unit 141 performs pixel interpolation using the pixel data read from this address in the buffer memory 130 to generate pixel data for the (U, V) of the output image.

[0105] When the coordinate correction unit 144 determines that the input side coordinates (X, Y) do not belong to the first input side region ARI1, the coloring unit 142 sets the pixel data of the output image (U, V) to the specified color data.

[0106] Assume the region determination unit 149 determines that the output-side coordinates (U, V) belong to the second output-side region ARQ2. In this case, the distortion processing unit 145 uses the second distortion correction table TB2 to convert the output-side coordinates (U, V) into input-side coordinates (X, Y). The coordinate correction unit 144 determines whether the input-side coordinates (X, Y) are within the range of (X: 500 Y: 100) to (X: 600 Y: 200), i.e., whether they belong to the second input-side region ARI2.

[0107] If the input-side coordinates (X, Y) are determined to belong to the second input-side region ARI2, the coordinate correction unit 144 calculates the coordinates (Xs', Ys') = (X-500, Y-100). Then, the coordinate correction unit 144 sets the selected coordinates to (Xs, Ys) = (Xs'+100, Ys'+0). That is, the coordinate correction unit 144 temporarily shifts the reference point of the second input-side region ARI2 from (X:500 Y:100) to (Xs':0 Ys':0), and further shifts it to (Xs:100 Ys:0). The address conversion unit 143 converts (Xs, Ys) into an address in the buffer memory 130. The pixel interpolation unit 141 performs pixel interpolation using the pixel data read from this address in the buffer memory 130 to generate pixel data for the (U, V) of the output image.

[0108] When the coordinate correction unit 144 determines that the input side coordinates (X, Y) do not belong to the second input side region ARI2, the coloring unit 142 sets the pixel data of the output image (U, V) to the specified color data.

[0109] In this embodiment, the circuit device 100 includes an image selection circuit 120. The image selection circuit 120 selects image data of the first input-side region ARI1 and the second input-side region ARI2 from the input image data IMA and stores them in the buffer memory 130.

[0110] According to this embodiment, image data of the first input-side region ARI1 and the second input-side region ARI2, which are narrower than the input image, are stored in the buffer memory 130. Therefore, compared to the case of directly buffering the input image, the buffer size in distortion correction is reduced. Consequently, the chip size of the circuit device 100 is reduced, or the cost of the circuit device 100 is lowered.

[0111] Furthermore, while this embodiment has been described in detail above, those skilled in the art will readily understand that various modifications can be made without substantially departing from the new aspects and effects of this disclosure. Therefore, all such modifications are included within the scope of this disclosure. For example, in the specification or drawings, a term described at least once with a broader or synonymous term can be replaced with that different term anywhere in the specification or drawings. Additionally, all combinations of this embodiment and its modifications are also included within the scope of this disclosure. Furthermore, the structure and operation of input interface circuits, image selection circuits, buffer memories, distortion correction circuits, output interface circuits, storage circuits, circuit devices, processing devices, display devices, head-up displays, etc., are not limited to those described in this embodiment, and various modifications can be implemented.

Claims

1. A circuit device, characterized in that, The circuit device controls a display device that projects images through a first optical system and a second optical system. The circuit device includes: a buffer memory that stores input image data as input image data; and a distortion correction circuit that performs distortion correction on the input image and outputs output image data as output image data. The output image includes a first output-side region projected by the first optical system and a second output-side region projected by the second optical system. The distortion correction circuit converts the output-side coordinates of the output image to the input-side coordinates of the input image. The distortion correction circuit is located within the first output-side region. In the case where the input-side coordinates belong to a first input-side region corresponding to the first output-side region, the distortion correction circuit determines whether the input-side coordinates belong to a second input-side region corresponding to the second output-side region when the output-side coordinates are included in the second output-side region. In the case where the input-side coordinates do not belong to the second input-side region, the pixel data of the output image data at the output-side coordinates is set to the specified color data.

2. The circuit device according to claim 1, characterized in that, The circuit device includes a storage circuit that stores region setting information for the first output side region, the first input side region, the second output side region, and the second input side region. The distortion correction circuit determines, based on the region setting information, whether the output side coordinates belong to the first output side region, whether the input side coordinates belong to the first input side region, whether the output side coordinates belong to the second output side region, and whether the input side coordinates belong to the second input side region.

3. The circuit device according to claim 1, characterized in that, The first transformed region, obtained by transforming the coordinates of the first output side region to the input side, overlaps with a portion of the second input side region and the first input side region. The second transformed region, obtained by transforming the coordinates of the second output side region to the input side, overlaps with a portion of the first input side region and the second input side region.

4. The circuit device according to claim 1, characterized in that, When the output-side coordinates are contained within the first output-side region, the distortion correction circuit selects a first distortion correction table corresponding to the first optical system and uses the first distortion correction table to convert the output-side coordinates into the input-side coordinates. When the output-side coordinates are contained within the second output-side region, the distortion correction circuit selects a second distortion correction table corresponding to the second optical system and uses the second distortion correction table to convert the output-side coordinates into the input-side coordinates.

5. The circuit device according to claim 1, characterized in that, The distortion correction circuit uses a distortion correction table to convert the output-side coordinates into the input-side coordinates. The distortion correction table is as follows: the output-side coordinates belonging to the first output-side region are mapped to the input-side coordinates to form a distortion correction corresponding to the first optical system, and the output-side coordinates belonging to the second output-side region are mapped to the input-side coordinates to form a distortion correction corresponding to the second optical system.

6. The circuit device according to claim 1, characterized in that, The circuit device includes an image selection circuit that selects image data of the first input side region and image data of the second input side region from the input image data and stores them in the buffer memory.

7. The circuit device according to claim 1, characterized in that, The first output side region and the second output side region are arranged in a horizontal direction, and the first input side region and the second input side region are arranged in the same horizontal direction.

8. The circuit device according to claim 1, characterized in that, The display device uses the first optical system and the second optical system to project the output image onto the projection surface, and the distortion correction corrects the image distortion caused by the distortion of the first optical system and the second optical system or the distortion of the projection surface.

9. The circuit device according to claim 1, characterized in that, The specified color data is the color data that becomes transparent when displayed by the display device.

10. A head-up display, characterized in that, The head-up display includes: a circuit arrangement as described in any one of claims 1 to 9; and the display device that projects the output image using the first optical system and the second optical system.

Citation Information

Patent Citations

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    JP2017045312A