Electrostatic chuck
By setting helium outer and inner holes on the ceramic substrate of the electrostatic chuck and connecting them through a first channel, helium can flow directionally to the wafer edge, solving the problems of heat accumulation at the wafer edge and side etching buildup, thus improving the cooling efficiency and reliability of the electrostatic chuck.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- HUBEI XINTAO TECHNOLOGY CO LTD
- Filing Date
- 2026-01-13
- Publication Date
- 2026-05-01
AI Technical Summary
Existing electrostatic chucks cannot effectively cool the wafer edge area, leading to heat accumulation, and the sides are easily affected by plasma etching and polymer buildup, which affects the adsorption effect.
Helium external and internal holes are set on the ceramic substrate of the electrostatic chuck and connected through a first channel. Helium flows directionally from the side to the edge of the wafer, forming an airflow protection wall to prevent polymer accumulation and etching.
It effectively reduces the temperature difference between the wafer edge and center, prevents side etching and polymer buildup, and improves the cooling efficiency and reliability of the electrostatic chuck.
Smart Images

Figure CN121969104A_ABST
Abstract
Description
electrostatic chuck Technical Field
[0001] This application relates to the field of electrostatic chuck technology, and more particularly to an electrostatic chuck. Background Technology
[0002] In the semiconductor manufacturing industry, precision wafer fabrication is a core process that determines chip performance and yield. Key processes such as plasma etching, thin film deposition, and ion implantation all require stable and reliable wafer fixation while ensuring that the wafer temperature remains within a precisely controllable range. Electrostatic chucks (ESCs), as a core component of wafer fabrication equipment, have been widely used in semiconductor manufacturing.
[0003] However, in actual operating conditions, due to the slight warpage of the wafer itself, when the wafer is attached to the surface of an electrostatic chuck, its edge region cannot achieve a tight fit with the chuck's attachment surface, thus forming a tiny gap. This gap obstructs the heat transfer path, causing the thermal conductivity of the edge region to decrease compared to the center region. Simultaneously, processes such as plasma etching and thin film deposition generate a significant amount of heat, which cannot be quickly dissipated through the edge gap, leading to a continuous rise in temperature at the wafer edge region, ultimately resulting in a temperature difference of 3–8°C between the edge and the center.
[0004] To address the aforementioned heat dissipation issues, existing technologies incorporate water-cooling or liquid-cooling channels within the ceramic substrate, using circulating coolant to remove heat generated by the electrostatic chuck and wafer. However, this approach still has significant limitations. The layout of the cooling channels is constrained by the structural design of the ceramic substrate, preventing them from being too dense or close to the edges, thus limiting cooling efficiency and hindering effective cooling of the high-temperature areas at the wafer edges. Furthermore, this approach only cools the interior of the ceramic substrate and cannot effectively protect the side areas of the electrostatic chuck. In the processing environment, active ions in the plasma easily etch the sides of the bonding layer, and polymers generated during the process tend to accumulate on the surface and edges of the electrostatic chuck, affecting subsequent adsorption effects.
[0005] In summary, developing an electrostatic chuck technology that can simultaneously solve the problems of wafer edge thermal runaway and electrostatic chuck side protection is a pressing technical need in the current semiconductor manufacturing equipment field. Summary of the Invention
[0006] This application provides an electrostatic chuck in which helium gas can flow directionally from the side of the electrostatic chuck to the wafer edge, forming an upward-sloping airflow protective wall on the side of the electrostatic chuck. This compensates for helium gas loss in the gap between the wafer edge and the electrostatic chuck, while preventing the accumulation of materials generated during the process from etching the side of the electrostatic chuck. It simultaneously solves the problems of wafer edge thermal runaway and electrostatic chuck side protection.
[0007] In a first aspect, this application provides an electrostatic chuck, the electrostatic chuck comprising, from top to bottom, a ceramic substrate, an adhesive layer, and a base, including:
[0008] The ceramic substrate includes at least two helium external holes and at least two helium internal holes. The helium external holes are formed on the side surface of the ceramic substrate, and the helium internal holes are formed inside the ceramic substrate. The helium external holes and the helium internal holes are connected one-to-one.
[0009] The ceramic substrate further includes at least two first channels, the two ends of a single first channel being connected to the edges of a single helium external hole and a single helium internal hole, respectively, the radial line of the first channel closest to the base being the bottom edge line, and the angle between the bottom edge line and the upper surface of the ceramic substrate being 5~45°.
[0010] In one possible implementation, the angle between the bottom edge line and the upper surface of the ceramic substrate is 25-35°.
[0011] In one possible implementation, the helium inner hole and the helium outer hole are arranged in parallel, and the axial distance between the helium inner hole and the helium outer hole is 2~5mm.
[0012] In one possible implementation, the diameter of the helium outer hole is 0.6~0.8mm, the diameter of the helium inner hole is 0.3~0.5mm, and the ratio of the diameters of the helium outer hole and the helium inner hole is 1.5~2.0.
[0013] In one possible implementation, the distance between the center point of the helium gas external hole and the upper surface of the ceramic substrate is 2~3.5mm.
[0014] In one possible implementation, the at least two helium external holes and the at least two helium internal holes are all evenly spaced along the circumference of the ceramic substrate.
[0015] In one possible implementation, the distance between the centers of two adjacent helium gas external holes along the circumferential direction of the ceramic substrate is 4~4.5mm.
[0016] In one possible implementation, the ceramic substrate further includes a second channel disposed inside the ceramic substrate, the second channel being arranged circumferentially around the ceramic substrate, and the second channel communicating with the at least two helium gas pores.
[0017] In one possible implementation, the ceramic substrate further includes a sealing membrane disposed on the inner wall of the first channel and the second channel, the sealing membrane having a thickness of 2~5μm.
[0018] In one possible implementation, the sealing film is formed by sputtering Al2O3 / TiN in a volume ratio of 2:1.
[0019] In the above technical solution, the ceramic substrate includes a helium outer hole, a helium inner hole, and a first channel. The helium outer hole is located on the side surface of the ceramic substrate, and the helium inner hole is located inside the ceramic substrate. A single first channel connects a single helium outer hole and a single helium inner hole, allowing helium to flow out of the electrostatic chuck from the helium outer hole. The radial line of the first channel closest to the base is the bottom edge line, and the angle θ between the bottom edge line and the upper surface of the ceramic substrate is 5~45°. This guides the helium to flow directionally towards the wafer edge, directly replenishing the helium loss in the gap between the wafer edge and the electrostatic chuck, significantly reducing the difference in thermal conductivity between the edge and the center, eliminating the temperature difference between the wafer edge region and the center region, and fundamentally solving the edge thermal runaway problem. Simultaneously, an upward-sloping airflow protective wall can be formed on the side of the electrostatic chuck, preventing active ions in the plasma from etching the side of the bonding layer, or preventing polymers generated during the process from accumulating on the side edge of the electrostatic chuck. Attached Figure Description
[0020] Figure 1 is a schematic diagram of the ceramic substrate, adhesive layer, base and air intake channel of the electrostatic chuck of this application;
[0021] Figure 2 shows a cross-section of the ceramic substrate of the electrostatic chuck of this application at the second channel, and a schematic cross-sectional view and a partial enlarged view of the helium outer hole, the first channel and the helium inner hole projected onto the cross-section;
[0022] Figure 3 is a schematic diagram showing the positional relationship between the helium outer hole, the first channel, and the helium inner hole of the electrostatic chuck of this application.
[0023] Figure 4 is a schematic diagram showing the positional relationship between the helium outer hole, the first channel, and the helium inner hole of the electrostatic chuck of this application inside the ceramic matrix.
[0024] Figure label:
[0025] 10-Ceramic substrate, 11-Helium gas external pore, 12-Helium gas internal pore, 13-First channel, 131-Bottom edge line, 14-Second channel;
[0026] 20 - Base; 30 - Adhesive layer; 40 - Air intake channel. Detailed Implementation
[0027] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below. Where specific conditions are not specified in the embodiments, conventional conditions or conditions recommended by the manufacturer shall apply. Reagents or instruments whose manufacturers are not specified are all conventional products that can be purchased commercially.
[0028] It should be understood that the term "and / or" as used in this application specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.
[0029] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0030] It should be noted that the following embodiments are examples of this application and are used only to illustrate this application, and are not intended to limit this application. Other combinations and various modifications within the scope of this application are possible without departing from the spirit or scope of this application.
[0031] The electrostatic chuck provided in this application will be described in detail below.
[0032] The electrostatic chuck of this embodiment includes a ceramic substrate 10, an adhesive layer 30, and a base 20 arranged sequentially from top to bottom, as shown in Figures 1 and 3. The ceramic substrate 10 and the base 20 are bonded together by the adhesive layer 30. The ceramic substrate 10 includes at least two helium external holes 11, at least two helium internal holes 12, and at least two first channels 13. The helium external holes 11 are formed on the side surface of the ceramic substrate 10, and the helium internal holes 12 are formed inside the ceramic substrate 10. The helium external holes 11 and the helium internal holes 12 are connected one-to-one. The two ends of a single first channel 13 are connected to the edges of a single helium external hole 11 and a single helium internal hole 12, respectively. That is, a single first channel 13 connects a single helium external hole 11 and a single helium internal hole 12.
[0033] Specifically, during wafer fabrication, helium gas enters the helium gas inner hole 12 from the helium gas delivery system, flows through the first channel 13, and then exits the electrostatic chuck from the helium gas outer hole 11 into the vacuum chamber. Simultaneously, a vacuum pump system is connected to the vacuum chamber to efficiently pump out the gas, ensuring the electrostatic chuck maintains a stable high-vacuum working environment. The helium gas flowing out from the helium gas outer hole 11 carries away heat from the wafer edge, effectively cooling the high-temperature area at the wafer edge and eliminating the temperature difference between the wafer edge and center areas.
[0034] As shown in Figures 1 and 3, the radial line of the first channel 13 closest to the base 20 is the bottom edge line 131. The angle θ between the bottom edge line 131 and the upper surface of the ceramic substrate 10 is 5~45°, meaning that the helium outer hole 11 is closer to the upper surface of the ceramic substrate 10 than the helium inner hole 12. The first channel 13 is inclined towards the upper surface of the ceramic substrate 10. This can guide the helium to flow directionally towards the wafer edge, directly replenishing the helium loss in the gap between the wafer edge and the electrostatic chuck, significantly reducing the difference in thermal conductivity between the edge and the center, eliminating the temperature difference between the wafer edge region and the center region, and fundamentally solving the problem of edge thermal runaway.
[0035] Meanwhile, in the processing environment, as helium gas is blown out of the electrostatic chuck along the first channel 13, a ring of upward-sloping airflow protective wall is formed on the side of the electrostatic chuck, which can prevent active ions in the plasma from etching the side of the adhesive layer 30, or prevent polymer generated during the process from accumulating on the side edge of the electrostatic chuck.
[0036] If the angle θ between the bottom edge line 131 and the upper surface of the ceramic substrate 10 is too small, the flow direction of helium will be approximately parallel to the upper surface of the electrostatic chuck, making it difficult for nitrogen to reach the edge region of the wafer, thus making it difficult to eliminate the temperature difference between the wafer edge region and the center region. If the angle θ between the bottom edge line 131 and the upper surface of the ceramic substrate 10 is too large, the flow direction of helium will be nearly perpendicular to the upper surface of the electrostatic chuck, and helium will easily form eddies in the gap between the wafer edge and the electrostatic chuck. Some helium will leak rapidly from the warped gap at the wafer edge, making it difficult to eliminate the temperature difference between the wafer edge region and the center region; and it will also result in a smaller wall thickness between the first channel 13 and the side of the ceramic substrate 10, weakening the structural protection of the ceramic substrate 10.
[0037] Preferably, the angle θ between the bottom edge line 131 and the upper surface of the ceramic substrate 10 is 25~35°, which can accurately guide the helium gas to flow towards the wafer edge. This avoids the problem of large flow resistance at small angles and the aggravation of eddies and leakage at large angles, and prolongs the residence time of helium gas at the wafer edge, thereby effectively eliminating the temperature difference between the wafer edge region and the center region.
[0038] As shown in Figure 1, the electrostatic chuck also includes an air inlet channel 40, which penetrates the adhesive layer 30 and the base 20. A portion of the air inlet channel 40 is located inside the ceramic substrate 10, and it communicates with the helium gas inner hole 12. Specifically, during wafer fabrication, helium gas passes through the air inlet channel 40, through the helium gas inner hole 12, flows through the first channel 13, and then exits the electrostatic chuck from the helium gas outer hole 11.
[0039] The number of air intake channels 40 can be one or more. When there are multiple air intake channels 40, they are evenly spaced around the ceramic substrate 10 in the circumference, ensuring that the helium flow rate and pressure in different helium gas inner holes 12 are the same. This avoids insufficient helium flow rate and pressure in helium gas inner holes 12 located far from the air intake channels 40, which would result in less helium gas and slower heat dissipation in that area of the wafer, thus preventing temperature deviations in the circumferential direction of the wafer. Preferably, the number of air intake channels 40 is 1 to 4, which, while ensuring uniform helium flow rate and pressure in the helium gas inner holes 12, avoids the sintering difficulties and insufficient structural strength caused by a large number of inner holes in the ceramic substrate 10 and the base 20. More preferably, the number of air intake channels 40 is 4, evenly spaced around the circumference of the ceramic substrate 10.
[0040] The inlet channel 40, the first channel 13, the helium inner hole 12, and the helium outer hole 11 together form a side helium gas path, which is used to cool the edge region of the wafer. Additionally, the electrostatic chuck also includes a central helium gas path, which is used to cool the central region of the wafer. In this application, the side helium gas path and the central helium gas path are supplied independently, and this application does not impose restrictions on the channel design and orifice position of the central helium gas path.
[0041] Specifically, the helium gas supply from the side path is at a pressure of Pe, and the helium gas supply from the center path is at a pressure of Pc, where 1.0 ≤ Pe / Pc ≤ 1.5. This compensates for helium loss due to leakage between the wafer edge and the electrostatic chuck, reduces the difference in thermal conductivity between the wafer edge and center, and prevents excessive helium leakage into the chamber, thus avoiding increased vacuum pump load. Simultaneously, because the helium thrust and electrostatic adsorption forces at the wafer edge create opposing forces, controlling the pressure supplied by the side path helium gas supply can prevent stress concentration at the wafer edge, reducing the risk of wafer chipping and breakage.
[0042] By including a helium outer hole 11, a helium inner hole 12, and a first channel 13 in the ceramic substrate 10, the helium outer hole 11 is formed on the side surface of the ceramic substrate 10, and the helium inner hole 12 is formed inside the ceramic substrate 10. A single first channel 13 connects a single helium outer hole 11 and a single helium inner hole 12, allowing helium to flow out of the electrostatic chuck from the helium outer hole 11, carrying away heat from the wafer edge and effectively cooling the high-temperature area at the wafer edge. The radial line of the first channel 13 closest to the base 20 is the bottom edge line 131, and the angle θ between the bottom edge line 131 and the upper surface of the ceramic substrate 10 is 5~45°, which can guide the helium to flow directionally towards the wafer edge, directly replenishing the helium loss in the gap between the wafer edge and the electrostatic chuck, significantly reducing the difference in thermal conductivity between the edge and the center, eliminating the temperature difference between the wafer edge region and the center region, and fundamentally solving the problem of edge thermal runaway. At the same time, an upward-sloping airflow protection wall can be formed on the side of the electrostatic chuck, which can prevent active ions in the plasma from etching the side of the adhesive layer 30, or prevent polymer generated during the process from accumulating on the side edge of the electrostatic chuck.
[0043] In one possible implementation, as shown in Figures 3 and 4, the helium inner hole 12 and the helium outer hole 11 are arranged in parallel, so that the flow path of helium in the helium inner hole 12, the first channel 13 and the helium outer hole 11 is straight, which helps to reduce the flow resistance of helium in the channel and reduce eddy current loss.
[0044] The axial distance ∆L between the helium inner hole 12 and the helium outer hole 11 is 2~5mm. Compared with an axial distance ∆L less than 2mm, this avoids stress concentration on the side of the ceramic substrate 10 caused by excessively thin hole walls, which could lead to microcracks in the actual processing environment. By keeping the hole wall within a suitable thickness range, the structural damage to the substrate from the channel can be dispersed, improving the impact and deformation resistance of the ceramic substrate 10, thus adapting it to the high-load conditions of semiconductor mass production. In addition, if the axial distance between the helium inner hole 12 and the helium outer hole 11 is too small, the flow distance of helium in the first channel 13 is short, and the velocity of the airflow from the helium outer hole 11 will be greater, making the helium flow out of the electrostatic chuck more rapid and prone to generating eddies.
[0045] Compared to an axial spacing ∆L greater than 5mm, this avoids excessively long channels that would occupy too much internal space in the ceramic substrate 10. Furthermore, excessively long channels would result in a longer flow distance for helium within the first channel 13, leading to reduced helium flow rate, pressure loss, and an inability to precisely and directionally supply helium to the wafer edge.
[0046] In one possible implementation, as shown in Figures 2 and 3, the diameter D1 of the helium outer hole 11 is 0.6~0.8mm, and the diameter D2 of the helium inner hole 12 is 0.3~0.5mm. The smaller diameter D2 of the helium inner hole 12 creates a throttling and pressurizing effect, increasing the pressure of the helium before it enters the outer hole from the inner hole. This precisely guides the high-pressure helium to the micro-gap at the wafer edge, effectively compensating for helium leakage loss caused by wafer edge warping. If the diameter D2 of the helium inner hole 12 is too small, the helium flow will be insufficient, failing to meet heat dissipation requirements, and the small diameter is easily blocked by impurities. Simultaneously, processing extremely small diameter holes generates a large amount of residual stress, exacerbating damage to the ceramic substrate 10. If the diameter D2 of the helium inner hole 12 is too large, the throttling and pressurizing effect will disappear, failing to accurately compensate for edge helium leakage, making it difficult to solve the edge thermal runaway problem.
[0047] Meanwhile, the diameter D1 of the helium outer hole 11 is larger than the diameter D2 of the helium inner hole 12. By designing a stepped diameter, the diameter change at the connection between the helium outer hole 11, the helium inner hole 12, and the first channel 13 is gradual, avoiding sharp stress abrupt changes. This effectively disperses the pressure impact on the hole wall during helium flow, preventing microcracks from forming at the connection. If the diameters of the helium outer hole 11 and the helium inner hole 12 are the same, or if the diameter D1 of the helium outer hole 11 is smaller than the diameter D2 of the helium inner hole 12, turbulent impacts will occur at the connection, exacerbating stress concentration on the hole wall and causing the ceramic substrate 10 to crack in the actual processing environment.
[0048] The aperture ratio of the helium outer hole 11 to the helium inner hole 12 is 1.5~2.0. This results in a smaller aperture D2 of the helium inner hole 12, creating a throttling effect on the helium and meeting the helium supply requirements of the micro-gap at the wafer edge. The aperture D1 of the helium outer hole 11 is 1.5~2.0 times the aperture D2 of the helium inner hole 12, which facilitates the smooth discharge of pressurized helium and avoids helium stagnation or turbulent impact. If the aperture ratio is too small, the expansion of the helium outer hole 11 relative to the helium inner hole 12 is insufficient, resulting in greater resistance to helium flow. This can easily lead to excessively high pressure in the helium inner hole 12 and insufficient flow in the helium outer hole 11, failing to effectively compensate for edge helium leakage. If the aperture ratio is too large, the expansion of the helium outer hole 11 is too large, and the throttling and pressurizing effect of the helium inner hole 12 will be quickly offset, resulting in excessively rapid helium pressure decay and the inability to completely solve the edge thermal runaway problem.
[0049] In one possible implementation, as shown in Figure 4, the distance H between the center point of the helium gas external hole 11 and the upper surface of the ceramic substrate 10 is 2~3.5mm, allowing helium gas to enter the micro-gap at the wafer edge along the shortest path, quickly compensating for edge helium leakage loss. Simultaneously, this ensures that the wall thickness between the helium gas external hole 11 and the upper surface of the ceramic substrate 10 is within a safe range, avoiding insufficient structural strength due to excessively thin walls.
[0050] If the spacing H is too large, the distance between the helium gas outer hole 11 and the upper surface of the ceramic substrate 10 will be too far. The helium gas will need to travel a longer path to reach the micro-gap at the edge of the wafer. Furthermore, the helium gas will dissipate during transport, and there will not be enough helium gas to carry away the heat at the edge of the wafer. The problem of edge thermal runaway will be difficult to solve.
[0051] If the spacing H is too small, the distance between the helium gas external hole 11 and the upper surface of the ceramic substrate 10 will be too close. The helium gas external hole 11 will be too close to the upper surface of the ceramic substrate 10, and the wall thickness between the helium gas external hole 11 and the upper surface of the ceramic substrate 10 will be too thin. This will result in weak structural strength of the ceramic substrate 10, making it difficult to adapt to the high-load conditions of semiconductor mass production. At the same time, the excessively close distance will lead to local stress concentration, causing microcracks to appear in the ceramic substrate 10.
[0052] In one possible implementation, as shown in Figures 1 and 2, at least two external helium gas holes 11 and at least two internal helium gas holes 12 are evenly spaced along the circumference of the ceramic substrate 10. This ensures that the helium gas is uniformly dispersed along the circumference of the ceramic substrate 10, preventing localized accumulation of helium gas on the wafer. This avoids situations where some areas have more helium gas and dissipate heat quickly, while other areas have less helium gas and experience concentrated heat, leading to temperature deviations along the wafer's circumference. Furthermore, the uniform circumferential spacing improves the structural reliability of the ceramic substrate 10 and prevents stress superposition caused by dense localized pores.
[0053] Optionally, the center-to-center distance between two adjacent helium gas external holes 11 along the circumference of the ceramic substrate 10 is 4~4.5mm, so that helium gas can be delivered to the wafer edge without dead angles and at equal intervals along the circumference of the ceramic substrate 10, ensuring that the edge area of any position of the wafer can obtain stable helium gas supply, avoiding gas supply blind spots in the circumference of the wafer, and effectively controlling the temperature difference of the entire wafer.
[0054] If the distance between two adjacent helium gas external holes 11 is too close, the helium gas in the adjacent channels will cause airflow interference at the edge gap, generating local eddies. At the same time, if the channels are too dense, the local wall thickness of the ceramic substrate 10 will be too thin, significantly enhancing the stress concentration effect and making the ceramic substrate 10 prone to cracking. If the distance between two adjacent helium gas external holes 11 is too far, the channel layout will be too sparse, resulting in gas supply blind spots at the wafer edge. This will lead to insufficient helium gas in local areas of the wafer, causing temperature deviations in the circumferential direction of the wafer.
[0055] In one possible implementation, as shown in Figure 2, the ceramic substrate 10 further includes a second channel 14 disposed inside the ceramic substrate 10. The second channel 14 is arranged circumferentially around the ceramic substrate 10 and connects to at least two helium gas inlets 12. Specifically, during wafer fabrication, helium gas enters the second channel 14 through the gas inlet channel 40, then passes through the helium gas inlets 12, flows through the first channel 13, and then exits the electrostatic chuck from the helium gas outlet 11.
[0056] By circumferentially arranging the second channel 14 around the ceramic substrate 10 and connecting it to at least two helium gas boreholes 12, helium gas entering the second channel 14 first forms a stable and uniform pressure field within the annular cavity before being synchronously delivered to the connected helium gas boreholes 12. This facilitates uniform helium pressure distribution and eliminates circumferential gas supply differences. Furthermore, since the second channel 14 connects to at least two helium gas boreholes 12, the helium gas delivery system outside the electrostatic chuck only needs to deliver nitrogen gas to the second channel 14 to achieve helium gas delivery to all helium gas boreholes 12, simplifying the delivery path and improving delivery efficiency.
[0057] In one possible implementation, the ceramic substrate 10 further includes a sealing film disposed on the inner wall of the first channel 13 and the second channel 14, with a thickness of 2-5 μm. Since the ceramic substrate 10 is sintered from aluminum nitride (AlN) powder, nano- to micron-sized pores and microcracks inevitably form inside. If the inner walls of the first channel 13 and the second channel 14 lack a sealing film, helium molecules, being small in size, can easily penetrate into the ceramic substrate 10 through these micropores, resulting in helium waste and affecting the cooling effect on the wafer edge region.
[0058] Meanwhile, the sealing membrane can also resist the erosion of trace impurities in helium gas, preventing the inner walls of the first channel 13 and the second channel 14 from peeling or cracking due to corrosion; the thickness of 2~5μm balances the protective effect and flexibility, and the sealing membrane will not peel off from the inner walls of the first channel 13 and the second channel 14 due to thermal expansion and contraction, and can be adapted to the long-term stable operation of the electrostatic chuck under high temperature conditions of 200~400℃.
[0059] Optionally, the sealing membrane is formed by spraying Al2O3 / TiN at a volume ratio of 2:1. Al2O3 has extremely high density and insulation properties, and as the main body, it can fill the micropores and microcracks in the inner wall of the ceramic substrate 10 channels to form a continuous, pore-free sealing membrane that prevents helium molecules from penetrating. TiN has excellent metallic ductility and adhesion, which can improve the bonding strength between the sealing membrane and the ceramic substrate 10 and prevent the sealing membrane from peeling off due to thermal expansion and contraction.
[0060] Although the embodiments of this application have been disclosed above, they are not limited to the applications listed in the specification and embodiments. They can be applied to various fields suitable for this application. For those skilled in the art, other modifications can be easily made. Therefore, without departing from the general concept defined by the claims and their equivalents, this application is not limited to the specific details and embodiments shown and described herein.
Claims
1. An electrostatic chuck, the electrostatic chuck comprising a ceramic substrate, an adhesive layer, and a base arranged sequentially from top to bottom, characterized in that, include: The ceramic substrate includes at least two helium external holes and at least two helium internal holes. The helium external holes are formed on the side surface of the ceramic substrate, and the helium internal holes are formed inside the ceramic substrate. The helium external holes and the helium internal holes are connected one-to-one. The ceramic substrate also includes at least two first channels. The two ends of a single first channel are respectively connected to the edges of a single helium external hole and a single helium internal hole. The radial line of the first channel closest to the base is the bottom edge line. The angle between the bottom edge line and the upper surface of the ceramic substrate is 5~45°.
2. The electrostatic chuck according to claim 1, characterized in that, The angle between the bottom edge line and the upper surface of the ceramic substrate is 25~35°.
3. The electrostatic chuck according to claim 1 or 2, characterized in that, The helium inner hole and the helium outer hole are arranged in parallel, and the axial distance between the helium inner hole and the helium outer hole is 2~5mm.
4. The electrostatic chuck according to claim 1 or 2, characterized in that, The diameter of the outer helium orifice is 0.6~0.8mm, the diameter of the inner helium orifice is 0.3~0.5mm, and the ratio of the diameters of the outer and inner helium orifices is 1.5~2.
0.
5. The electrostatic chuck according to claim 1 or 2, characterized in that, The distance between the center point of the helium gas external hole and the upper surface of the ceramic substrate is 2~3.5mm.
6. The electrostatic chuck according to claim 1 or 2, characterized in that, The at least two helium external holes and the at least two helium internal holes are all evenly spaced along the circumference of the ceramic substrate.
7. The electrostatic chuck according to claim 6, characterized in that, The distance between the centers of two adjacent helium gas external holes along the circumference of the ceramic substrate is 4~4.5mm.
8. The electrostatic chuck according to claim 1 or 2, characterized in that, The ceramic substrate further includes a second channel, which is disposed inside the ceramic substrate and is arranged circumferentially around the ceramic substrate. The second channel connects to the at least two helium gas pores.
9. The electrostatic chuck according to claim 8, characterized in that, The ceramic substrate further includes a sealing membrane disposed on the inner wall of the first channel and the second channel, and the thickness of the sealing membrane is 2~5μm.
10. The electrostatic chuck according to claim 9, characterized in that, The sealing membrane is formed by spraying Al2O3 / TiN with a volume ratio of 2:1.