Network interface card and method for network interface card comprising controller and local memory

Abstract

The network interface card (NIC) comprises a controller and a local memory, and the network interface card (NIC) comprises the controller and the local memory. The controller is used for receiving a data message. The data packet includes a data payload, a header, and metadata. The controller is further configured to select a 0 copy buffer from a 0 copy descriptor ring having a host physical address (HPA), and to select a 0 copy buffer from a 0 copy descriptor ring having a host physical address (HPA). The controller is further configured to write the data payload of the data packet to the 0 copy buffer. The controller is also configured to parse the data packet to identify a virtual destination. The controller is also to select a virtual buffer with a virtual address from a descriptor ring of the virtual destination. The controller is also configured to map the virtual address of the selected virtual buffer to the HPA of the 0 copy buffer.

Description

Technical Field

[0001] This invention generally relates to the field of network computing, and more specifically, to a network interface card and a method for using the network interface card, the network interface card including a controller and local memory. Background Technology

[0002] In the field of network computing, receiving (R) X The stream plays a crucial role in the lifecycle of a data frame, from R X The flow originates from the line and enters the physical layer (PHY) of the network interface card (NIC), where it is transmitted as data packets to the end consumer software. X A data stream typically involves three main phases: storing the frame, analyzing the frame, and transmitting the frame to the host. To achieve line-rate transmission, frames are initially placed in memory on the NIC's system-on-chip (SoC) or in external double data rate (DDR) memory on the motherboard. The NIC's firmware or hardware then initiates a data packet analysis process to determine the packet's destination consumer. Once analysis is complete, the firmware triggers the transmission of the packet to its destination queue, typically via data transfer operations on the peripheral component interconnect (PCI) bus.

[0003] In a virtualization scenario, a single physical NIC on a host system can be divided into multiple virtual NICs or virtual functions (VFs). Each VF presents and behaves as an independent network interface with its own unique MAC address and configuration. These VFs can then be assigned to specific virtual machines (VMs) running on the host. When a data frame arrives at the physical NIC, the firmware (or hardware) needs to determine which VF the incoming frame should be forwarded to based on factors such as the destination MAC address in the packet header or the virtual network identifier (VNI) in the Virtual Extensible LAN (VXLAN) header.

[0004] However, a problem associated with existing receive streams is that placing frames in temporary storage locations for analysis requires additional space on the NIC's SoC or external DDR, leading to increased computation time and cost. Furthermore, the process of storing frames for analysis introduces latency and consumes additional computing power, which can impact the overall performance of network computing.

[0005] Traditionally, dedicated hardware has been used to optimize packet processing. This hardware is designed to process data packets at line rate, thus providing high-performance packet processing capabilities. However, the development and manufacturing costs of dedicated hardware designed to operate at line rate and provide superior performance are high. Furthermore, once dedicated to a specific task of optimizing packet processing, dedicated hardware cannot be reused for other functions or different aspects of network communication. Therefore, a technical challenge exists in how to store frames and reduce the overall computation time, cost, and latency generated during RX streams within traditional data flow control techniques in NICs.

[0006] Therefore, in light of the above discussion, it is necessary to overcome the aforementioned drawbacks associated with traditional data flow control techniques in NICs. Summary of the Invention

[0007] This invention provides a network interface card (NIC) and a method for using the NIC, the NIC including a controller and local memory. The invention provides a solution to a prior art problem: how to store frames and reduce the overall computation time, cost, and latency generated during RX streams in conventional data flow control techniques in NICs. The object of this invention is to provide a solution that at least partially overcomes the problems encountered in the prior art, and to provide an improved NIC and a method for using the NIC, the NIC including a controller and local memory, for example by providing a method for receiving packets with zero copies using remapping.

[0008] One or more objects of the invention are achieved by means of the solutions provided in the appended independent claims. Advantageous implementations of the invention are further defined in the dependent claims.

[0009] In one aspect, the present invention provides a network interface card (NIC). The NIC includes a controller and local memory. The controller is configured to receive data packets. The data packets include a data payload, a header, and metadata. The controller is further configured to select a zero-copy buffer from a zero-copy descriptor ring having a host physical address (HPA). The controller is further configured to write the data payload of the data packet into the zero-copy buffer. The controller is further configured to parse the data packet to identify a virtual destination. The controller is further configured to select a virtual buffer with a virtual address from the descriptor ring of the virtual destination. The controller is further configured to map the virtual address of the selected virtual buffer to the HPA of the zero-copy buffer.

[0010] The NIC may not store the entire frame in the system-on-chip (SoC) memory, thus saving significant time during packet processing. By writing the data payload directly to a zero-copy buffer, packet processing time is greatly reduced. Reducing packet processing time accelerates data processing and improves overall network performance. Furthermore, due to the use of a zero-copy buffer, the required buffer size in the SoC is very small, allowing the remaining memory space to be used for other purposes or, in some cases, eliminated entirely. Utilizing this remaining memory space enables efficient resource allocation within the NIC and potentially reduces production costs. Moreover, while SoC memory may be limited in size and cost, this invention supports the use of host memory, which, unlike SoC memory, is generally more affordable and may have unlimited capacity. By accessing larger buffers in host memory, the NIC can process larger frames, supporting higher data volumes and smoother data transmission. Utilizing multiple buffers to store incoming frames allows the NIC to process more frames in parallel. Enhanced parallel processing improves throughput and network efficiency because the NIC can process a greater number of packets simultaneously, reducing data bottlenecks.

[0011] In one implementation, the controller is also used for RDMA applications. The virtual buffer is selected from the receive queue (RQ) of the virtual destination, and the address of the virtual buffer is the address of the virtual destination.

[0012] In this implementation, configuring the NIC for RDMA applications allows for efficient direct data transfer to the virtual destination's RQ, simplifying the data flow in remote direct memory access scenarios.

[0013] In another implementation, the controller is also configured to parse the data packet when the data packet is stored in the host's memory.

[0014] Advantageously, parsing data packets reduces processing overhead and enhances data packet analysis when the data packets are stored in the host's memory.

[0015] In another implementation, the controller is further configured to copy the header of the data packet to the memory of the host, and then parse the data packet.

[0016] In this implementation, because the controller copies the header to the host memory and then parses the data packet, the controller may be able to reduce the processing load of the NIC and optimize data parsing.

[0017] In another implementation, the controller is also configured to update the virtual address to the HPA by causing the virtual machine monitor to perform an update.

[0018] In this implementation, the controller can use the virtual machine monitor to update the virtual address to the HPA, which reduces the workload of the task and may optimize address management.

[0019] In another implementation, the controller is further configured to map the virtual address of the selected virtual buffer to the HPA of the zero-copy descriptor buffer by performing a mapping.

[0020] In this implementation, the controller can map the virtual address of the selected virtual buffer to the HPA of the zero-copy descriptor buffer, thereby enhancing buffer management for efficient data transfer.

[0021] In another aspect, the present invention provides a method for a NIC, the NIC including a controller and local memory. The method includes receiving a data packet, the data packet including a data payload, a header, and metadata. The method further includes selecting a zero-copy buffer from a zero-copy descriptor ring having a host physical address (HPA). The method further includes writing the data payload of the data packet into the zero-copy buffer. The method further includes parsing the data packet to identify a virtual destination. The method further includes selecting a virtual buffer having a virtual address from the descriptor ring of the virtual destination. The method further includes mapping the virtual address of the selected virtual buffer to the HPA of the zero-copy buffer.

[0022] The disclosed method achieves all the advantages and technical effects of the network interface card of the present invention.

[0023] It should be noted that all devices, elements, circuits, units, and modules described in this application can be implemented by software or hardware elements or any combination thereof. The steps performed by the various entities described in this application, and the functions to be performed by the various entities described, are intended to indicate that each entity is suitable for or used to perform the corresponding steps and functions. Even in the description of the following specific embodiments, if a particular function or step to be performed by an external entity is not reflected in the description of the specific detailed elements of the entity performing that particular step or function, it will be clear to those skilled in the art that these methods and functions can be implemented in the corresponding software or hardware elements, or in any combination of such elements. It should be understood that the features of the present invention are readily combined in various combinations without departing from the scope of the invention as defined by the appended claims.

[0024] Additional aspects, advantages, features and objects of the invention will become apparent from the accompanying drawings and the detailed description of illustrative implementations as explained in conjunction with the following appended claims. Attached Figure Description

[0025] The above-described invention and the following detailed description of illustrative embodiments can be better understood when read in conjunction with the accompanying drawings. Exemplary structures of the invention are shown in the drawings to illustrate the invention. However, the invention is not limited to the specific methods and tools disclosed herein. Furthermore, those skilled in the art will understand that the drawings are not drawn to scale. Where possible, similar elements are represented by the same numbers.

[0026] The following figures will now be used as examples to describe embodiments of the present invention, wherein: Figure 1 This is a block diagram of a network system implementing a network interface card according to an embodiment of the present invention; Figure 2 This is a flowchart of a method for a network interface card provided in an embodiment of the present invention; Figure 3 This is a diagram illustrating an exemplary implementation of the network architecture provided in embodiments of the present invention; Figure 4 This is a diagram illustrating the initialization phase of a network interface card provided in an embodiment of the present invention.

[0027] In the accompanying diagrams, underlined numbers indicate the item in which the underlined number appears or the item adjacent to the underlined number. Ununderlined numbers are associated with the item identified by the line that links the ununderlined number to the item. When a number is ununderlined and accompanied by an associated arrow, the ununderlined number is used to identify the general item that the arrow points to. Detailed Implementation

[0028] The following detailed description illustrates embodiments of the present invention and ways in which these embodiments can be implemented. While some modes of implementing the invention have been disclosed, those skilled in the art will recognize that other embodiments for implementing or practicing the invention may also exist.

[0029] Figure 1 This is a block diagram of a network system implementing a network interface card according to an embodiment of the present invention. (See reference) Figure 1 This diagram illustrates a network system 100 for implementing a network interface card (NIC) 102. The NIC 102 includes a controller 104 and local memory 106. The NIC 102 is implemented on a host 128. The host 128 also includes host memory 130.

[0030] Host 128 can be a master server or main unit, which is part of a data center and controls an array of other cloud servers that are communicatively coupled to it for load balancing, running custom applications, and efficient data management. Examples of host 128 may include, but are not limited to, cloud servers, application servers, data servers, or electronic data processing equipment.

[0031] Network interface card 102 refers to a hardware component used to receive and process data packets within the RX stream of network communication in network system 100. Examples of network interface card 102 may include, but are not limited to, computer ports, network sockets, network interface controllers, and any other network interface devices.

[0032] Controller 104 corresponds to a processor for receiving data packets 112, which include a data payload 114, a header 116, and metadata 118. Examples of implementations of controller 104 may include, but are not limited to, a central data processing device, a microprocessor, a microcontroller, a complex instruction set computing (CISC) processor, an application-specific integrated circuit (ASIC) processor, a reduced instruction set (RISC) processor, a very long instruction word (VLIW) processor, a state machine, and other processors or control circuits.

[0033] Local memory 106 is used to store the header 116 and metadata 118 of data packet 112. Local memory 106 includes a zero-copy descriptor ring 108. Local memory 106 can be described as volatile memory. Examples of implementations of local memory 106 may include, but are not limited to, electrically erasable programmable read-only memory (EEPROM), random access memory (RAM), read-only memory (ROM), hard disk drive (HDD), flash memory, solid-state drive (SSD), persistent memory, remote direct memory access (RDMA), or CPU cache memory.

[0034] The zero-copy descriptor ring 108 refers to a dedicated memory structure and data storage technology that optimizes data transmission and processing within the network interface card (NIC) 102. The zero-copy descriptor ring 108 corresponds to the circular data structure used in the network interface to manage and control the flow of data packets 112. The term "zero-copy" in the zero-copy descriptor ring 108 indicates the fact that data is not copied or duplicated during packet processing, which helps reduce processing overhead and improve data transmission efficiency. The zero-copy descriptor ring 108 lists pointers to buffers (e.g., zero-copy buffer 110 located in host memory 130).

[0035] Host memory 130 is used to store data packets 112. Host memory 130 includes a zero-copy buffer 110. The zero-copy buffer 110 corresponds to a dedicated memory area or zone for temporarily storing data packets during data packet processing within the network interface card 102. The term "zero-copy" in zero-copy buffer 110 indicates the fact that data is not copied or duplicated when placed in zero-copy buffer 110.

[0036] Data packet 112 corresponds to the basic data unit transmitted within network system 100. Data payload 114 corresponds to the actual data that needs to be sent from the source device to network interface card 102. Data payload 114 can include, but is not limited to, any type of information, such as text, images, video, or any other digital content. Header 116 corresponds to a portion of data packet 112, which includes control information that facilitates the correct routing and processing of data packet 112 throughout the network. Header 116 can include, but is not limited to, detailed information such as source and destination addresses, packet sequence number, error checksum, and other relevant information. Metadata 118 corresponds to additional information related to the data payload. Metadata 118 can include, but is not limited to, detailed information about data access permissions and licenses, ensuring appropriate security and control over who can view, modify, or delete data, information about data storage, data types, encoding, compression, and other technical aspects of enabling data operation and interoperability, and information about data quality, accuracy, and validity.

[0037] Network interface card 102 is connected to virtual destination 120 via communication network 126. Virtual destination 120 refers to a computer device or a group of computer devices capable of performing computing and processing tasks within network system 100. Implementations of virtual destination 120 range from individual computing units to larger systems, such as servers, clusters, distributed computing nodes, or cloud computing instances. Virtual destination 120 can be part of a local computing environment or geographically distributed across a network.

[0038] Virtual destination 120 includes a descriptor ring 122. The descriptor ring 122 also includes a virtual buffer 124. The descriptor ring 122 refers to a dedicated memory structure and data storage technology optimized for data transfer and processing within virtual destination 120. The virtual buffer 124 corresponds to a dedicated storage area or region used for temporarily storing data packets during data packet processing within virtual destination 120.

[0039] The communication network 126 includes a medium (e.g., a communication channel) through which the NIC 102 communicates with the virtual destination 120. The communication network 126 can be a wired or wireless communication network. Examples of the communication network 126 may include, but are not limited to, the Internet, a local area network (LAN), a wireless personal area network (WPAN), a wireless local area network (WLAN), a wireless wide area network (WWAN), a cloud network, a long-term evolution (LTE) network, a plain old telephone service (POTS), a metropolitan area network (MAN), and / or the Internet. In one implementation, the NIC 102 is virtualized via the communication network 126. Specifically, virtual input / output (VirtIO) is implemented in the host 128 to share host memory 130 with the virtual destination 120 via the communication network 126.

[0040] In operation, controller 104 is used to receive data packets 112. Furthermore, data packet 112 refers to a data unit transmitted over the network, which includes a data payload 114, a header 116, and metadata 118. In one implementation, the data payload 114 corresponds to the actual data being transmitted, such as a file, message, etc., and the metadata 118 is additional information about data packet 112, providing context or detailed information about the data payload 114 or the data packet 112 itself, such as packet size, transmission time, data type, and similar information helpful for processing or managing data packet 112.

[0041] According to one embodiment, controller 104 is configured to write the header 116 of data packet 112 to local memory 106. The information stored in the header 116 is used to route data packet 112 to a specific destination within the network. According to another embodiment, controller 104 is configured to write metadata 118 of data packet 112 to local memory 106. First, controller 104 is configured to receive data packet 112. Then, controller 104 is configured to write the metadata 118 of data packet 112 to local memory 106. As a result, controller 104 is configured to efficiently utilize and manage relevant information within data packet 112, which improves efficiency and reduces overall data processing time.

[0042] Controller 104 is also configured to select a zero-copy buffer 110 from the zero-copy descriptor ring 108 having a host physical address (HPA). Controller 104 is also configured to write the data payload 114 of datagram 112 into the zero-copy buffer 110. HPA refers to a physical memory address in the host memory 130 of NIC 102, at which the selected zero-copy buffer 110 is located. The HPA uniquely identifies the memory location where the data payload 114 of datagram 112 is written. In one implementation, controller 104 is configured to examine the zero-copy descriptor ring 108 to find an available descriptor entry corresponding to a free or unallocated zero-copy buffer 110. In this implementation, controller 104 is also configured to identify descriptor entries with a valid HPA associated with the descriptor ring, indicating that the buffer is available. Once a suitable buffer, such as zero-copy buffer 110, is found, controller 104 is also configured to select zero-copy buffer 110 for writing the data payload 114 of received datagram 112. In this implementation, the data payload 114 is not copied or duplicated during writing, which further helps to reduce data processing overhead, improve data transmission efficiency, and shorten latency.

[0043] Controller 104 is also used to parse data packet 112 to identify virtual destination 120. In one example, data packet 112 is parsed to extract relevant information and organize it in a structured manner. By parsing data packet 112 and identifying virtual destination 120, controller 104 uses this information to appropriately route or process data packet 112, ensuring that the data packet reaches its intended destination within the network or system. The ability to extract and organize relevant data from data packet 112 enables controller 104 to process virtual destinations efficiently and accurately.

[0044] According to one embodiment, controller 104 is used to parse data packet 112 when it is stored in host memory 130 of host 128. In other words, the data packet is stored in host memory 130 of host 128 belonging to network system 100. By parsing data packet 112 in host memory 130, controller 104 can efficiently retrieve necessary information without additional data transmission or latency, thereby supporting fast and simplified processing of data packet 112 within host 128. Therefore, the overall performance and throughput of NIC 102 are improved.

[0045] According to one embodiment, controller 104 is further configured to copy the header 116 of data packet 112 to host memory 130 of host 128, and then parse data packet 112. In this embodiment, data packet 112 is parsed to identify the address of the specified destination in the header 116 of data packet 112. First, data packet 112 is received, and controller 104 is configured to copy the header 116 of data packet 112 to host memory 130 of host 128. Afterward, controller 104 is configured to parse the entire data packet 112. Therefore, controller 104 ensures that critical header information is readily available in host memory for fast access and processing, supporting efficient and effective parsing of data packet 112, thereby optimizing the overall performance and data processing capabilities of NIC 102.

[0046] In this embodiment, controller 104 copies the header 116 of data packet 112 to host memory 130 of host 128 for parsing data packet 112. By copying the header 116 to host memory 130 before parsing data packet 112, controller 104 ensures efficient access to critical header information, thereby simplifying the overall parsing process and enhancing the performance of NIC 102.

[0047] Controller 104 is also configured to select a virtual buffer 124 with a virtual address from the descriptor ring 122 of the virtual destination 120. In one embodiment, the virtual buffer 124 is selected from the receive queue (RQ) of the virtual destination 120. In this embodiment, the virtual buffer address is the address of the virtual destination 120. Selecting the virtual buffer 124 supports efficient data processing and storage within the NIC 102 because the virtual buffer 124 provides a temporary location for data packets 112 to be analyzed, routed, or further processed before reaching their designated virtual destination within the network. The use of the descriptor ring 122 and the virtual buffer 124 optimizes data processing and enhances the overall performance of the NIC 102.

[0048] According to another embodiment, virtual destination 120 corresponds to a destination virtual function (VF). Virtual buffer 124 refers to a VF buffer selected from the descriptor ring 122 associated with the destination VF. In this embodiment, the virtual buffer address is a guest physical address (GPA). In other words, virtual destination 120 points to a destination virtual function (VF), and virtual buffer 124 is selected from the descriptor ring 122 associated with the destination VF. The virtual buffer address is then represented by the guest physical address (GPA), which is the memory address used to access data in the memory space of a guest VM within the virtualization environment. Therefore, NIC 102 is used to facilitate efficient data processing and communication within the virtualized network infrastructure.

[0049] According to one embodiment, controller 104 is used for remote direct memory access (RDMA) applications. As a result, controller 104 enables direct data transfer between local memory 106 and virtual buffer 124 without involving the central processing unit (CPU). NIC 102 supports high-speed, low-latency data communication between the host and virtual destination 120 over a network, making it suitable for applications requiring efficient and fast data transfer.

[0050] According to one embodiment, controller 104 is also configured to update the virtual address to the HPA by performing an update. By updating the virtual address to the HPA, controller 104 ensures that data can be accessed and processed efficiently and accurately within the host's physical memory, thereby enabling seamless communication between the virtualization environment and the underlying hardware for efficient data processing and management.

[0051] In this embodiment, controller 104 is used to update the virtual address to the HPA by causing the virtual machine monitor to perform an update. In other words, the virtual machine monitor is used to update the virtual address to the HPA of NIC 102. A virtual machine monitor is the software or firmware that creates and manages virtual machines (e.g., virtual destination 120 on a host). Therefore, the virtual machine monitor enables multiple operating systems (OS) or instances to run in parallel on a single physical machine, each OS in its isolated virtual environment.

[0052] Controller 104 is also configured to map the virtual address of the selected virtual buffer 124 to the HPA of the zero-copy buffer 110. According to one embodiment, controller 104 is configured to map the virtual address of the selected virtual buffer 124 to the HPA of the zero-copy buffer 110 by performing the mapping. In this embodiment, controller 104 is configured to map the virtual address (GPA) of the selected virtual buffer 124 to the HPA of the zero-copy buffer 110 by having the virtual machine monitor perform the mapping. In other words, the virtual machine monitor is configured to perform the mapping from GPA to HPA of the zero-copy buffer 110.

[0053] By using a zero-copy buffer 110 and directly writing the data payload 114 of the incoming datagram 112 to host memory 130, NIC 102 significantly reduces its need for intermediate storage in its local memory 106. Reducing the need for intermediate storage in NIC 102's local memory 106 enables faster packet processing because it eliminates the time-consuming step of storing the entire packet in local memory 106. Using the zero-copy buffer 110 allows NIC 102 to process datagram 112 more efficiently, thereby reducing latency and increasing overall data throughput.

[0054] The ability of NIC 102 to parse incoming datagram 112 and identify virtual destination 120 enables efficient processing within a virtualized environment. By selecting a virtual buffer 124 from the descriptor ring 122 associated with virtual destination 120 and mapping the virtual address of virtual buffer 124 to the host physical address (HPA) of the selected zero-copy buffer 110, NIC 102 simplifies the process of transmitting datagram 112 to the specified virtual destination. Enhanced virtual destination processing ensures that datagram 112 is efficiently routed to its appropriate virtual machine or user-space application, thereby improving the overall performance and responsiveness of the virtualized network.

[0055] Using a zero-copy buffer 110 reduces the need for a large local memory 106 on NIC 102, which in turn saves on hardware design and manufacturing costs. By utilizing host memory 130 to store data packets 112, the NIC can take advantage of the potentially large and cost-effective memory resources of host 128, thereby eliminating the need for expensive dedicated memory on the NIC 102 itself. Therefore, efficient use of memory resources and simplified packet processing in the design of NIC 102 contribute to a more resource-efficient and cost-effective network interface scheme.

[0056] Figure 2This is a flowchart describing a method for a network interface card (NIC) provided by an embodiment of the present invention, wherein the NIC includes a controller and local memory. Figure 2 Combination Figure 1 The components are described. (Refer to...) Figure 2 , shows the use of ( Figure 1 The flowchart of method 200 of NIC 102. Method 200 includes steps 202 to 212. Furthermore, ( Figure 1 NIC 102 is used to execute method 200.

[0057] A method 200 is provided for a network interface card (NIC) 102, the network interface card 102 including ( Figure 1 The controller 104 and ( Figure 1 Local memory 106. At step 202, method 200 includes receiving a data packet 112, the data packet 112 including a data payload 114, a header 116, and metadata 118. In one implementation, when a controller 104 configured in NIC 102 receives the data packet 112, the controller 104 analyzes the incoming data packet 112 to identify the components of the data packet 112, namely the data payload 114, the header 116, and the metadata 118.

[0058] At step 204, method 200 further includes selecting a zero-copy buffer 110 with a host physical address (HPA) from the zero-copy descriptor ring 108. The HPA refers to a physical memory address in the local memory 106 of the NIC 102, at which the selected zero-copy buffer 110 is located. The HPA uniquely identifies the memory location of the data payload 114 written to the datagram 112.

[0059] At step 206, method 200 further includes writing the data payload 114 of datagram 112 to zero-copy buffer 110. In this implementation, controller 104 is also configured to identify a descriptor entry with a valid HPA associated with the descriptor ring, indicating that the buffer is available. Once a suitable buffer, such as zero-copy buffer 110, is found, controller 104 is also configured to select zero-copy buffer 110 for writing the data payload 114 of the received datagram 112. In this implementation, the data payload 114 is not copied or duplicated during writing, which further helps to reduce data processing overhead and improve data transmission efficiency.

[0060] At step 208, method 200 further includes parsing data packet 112 to identify the virtual function (VF) of virtual destination 120. In one example, data packet 112 is parsed to extract relevant information from data packet 112 and organize the relevant information in a structured manner.

[0061] At step 210, method 200 further includes selecting a virtual buffer 124 with a virtual address from the descriptor ring 122 of the virtual destination 120. In one implementation, the virtual buffer 124 is selected from the receive queue (RQ) of the virtual destination 120. In this embodiment, the virtual buffer address is the address of the virtual destination 120. Selecting the virtual buffer 124 supports efficient data processing and storage within the NIC 102 because the virtual buffer 124 provides a temporary location for data packets 112 to be analyzed, routed, or further processed before reaching their designated virtual destination within the network. Using the descriptor ring 122 and the virtual buffer 124 helps optimize data processing and enhance the overall performance of the NIC 102.

[0062] At step 212, method 200 further includes mapping the virtual address of the selected virtual buffer 124 to the HPA of the zero-copy buffer 110. In one implementation, controller 104 is configured to map the virtual address of the selected virtual buffer 124 to the HPA of the zero-copy buffer 110 by performing the mapping. In this embodiment, controller 104 is configured to map the virtual address (GPA) of the selected virtual buffer 124 to the HPA of the zero-copy buffer 110 by having the virtual machine monitor perform the mapping. In other words, the virtual machine monitor is configured to perform the mapping from GPA to HPA of the zero-copy buffer 110.

[0063] Method 200, by using a zero-copy buffer 110 and directly writing the data payload 114 of the incoming datagram 112 to host memory 130, significantly reduces the need for intermediate storage in its local memory 106 for the NIC 102. Reducing the need for intermediate storage in the NIC 102's local memory 106 enables faster packet processing because it eliminates the time-consuming step of storing the entire packet in local memory 106. Using the zero-copy buffer 110 allows the NIC 102 to process the datagram 112 more efficiently, thereby reducing latency and increasing overall data throughput.

[0064] Steps 202 to 212 are merely illustrative, and other alternatives may be provided, in which one or more steps are added, one or more steps are deleted, or one or more steps are provided in a different order, without departing from the scope of the claims herein.

[0065] A computer program product is also provided, including program instructions for performing method 200 when executed by one or more processors in a network. The computer program product is implemented as an algorithm and embedded in software stored in a non-transitory computer-readable storage medium. The non-transitory computer-readable storage module may include, but is not limited to, electronic storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the foregoing. Examples of implementations of the computer-readable storage medium are, but are not limited to, electrically erasable programmable read-only memory (EEPROM), random access memory (RAM), read-only memory (ROM), hard disk drive (HDD), flash memory, secure digital (SD) cards, solid-state drives (SSDs), computer-readable storage media, and / or CPU cache memory.

[0066] Figure 3 This is an exemplary scenario describing the architecture of the network interface card (NIC) provided in the embodiments of the present invention. Figure 3 Combination Figure 1 The components are described. (Refer to...) Figure 3 Figure 300 illustrates an exemplary diagram describing the architecture of NIC 102.

[0067] In an exemplary scenario, host 128 is shown to include host memory (physical memory) 130. Host memory 130 includes multiple memory pages, such as first memory page 304A, second memory page 304B, third memory page 304C, fourth memory page 304D, fifth memory page 304E, and sixth memory page 304F. Each memory page in host memory 130 refers to a fixed-size block of contiguous memory locations. Each memory page is the smallest unit of memory used by the operating system and hardware for memory management purposes. Each memory page has a unique address.

[0068] The host memory 130 also includes multiple buffers, such as a first buffer 306A, a second buffer 306B, and a third buffer 306C. Each of the multiple buffers refers to a temporary storage area used to store data or instructions before processing data or transferring data to a specified destination.

[0069] The virtual destination includes guest physical memory 302. Guest physical memory 302 includes multiple virtual memory pages, such as a first virtual memory page 308A, a second virtual memory page 308B, and a third virtual memory page 308C. Guest physical memory 302 also includes multiple virtual buffers, such as a first virtual buffer 310A, a second virtual buffer 310B, and a third virtual buffer 310C.

[0070] Figure 3 The solid arrows in the diagram represent client-to-host mappings. In one example, the first virtual memory page 308A is mapped to the first memory page 304A, the second virtual memory page 308B is mapped to the second memory page 304B, the third virtual memory page 308C is mapped to the third memory page 304C, the first virtual buffer 310A is mapped to the fourth memory page 304D, the second virtual buffer 310B is mapped to the fifth memory page 304E, and the third virtual buffer 310C is mapped to the sixth memory page 304F.

[0071] Host 128 and virtual destination 120 provide multiple buffers to NIC 102 (such as...) Figure 3 (As shown by the solid arrow in the image). In one example, when datagram 112 arrives at virtual destination 120, the mapping is changed (as shown by the solid arrow in the image). Figure 3 (As shown by the dashed arrow in the image). The first virtual buffer 310A is mapped to the first buffer 306A that received data packet 112. Optionally, the fourth memory page 304D previously pointed to by the first virtual buffer 310A is added to the list of buffers available for future use by NIC 102 (e.g., ...). Figure 3 (As indicated by the dashed arrow). The use of virtual destination 120 in this example is for demonstration purposes only. Virtual destination 120 can also be a user-space application, such as an RDMA application.

[0072] Figure 4 This is a diagram illustrating the initialization phase of a network interface card provided in an embodiment of the present invention. Figure 4 Combination Figure 1 , Figure 2 and Figure 3 The components are described. (Refer to...) Figure 4 Figure 400 shows a description of the initialization phase of NIC 102.

[0073] The client-to-host mapping is shown in tabular form. During the preparation phase, host 128 allocates zero-copy buffer 110 to the network device. Furthermore, during the receive phase, datagram 112 enters through the line and is received by the physical layer (PHY) of host 128. NIC 102 obtains zero-copy buffer 110 from zero-copy descriptor ring 108. NIC 102 writes datagram 112 into zero-copy buffer 110 via a peripheral component interconnect (PCI) transaction. NIC 102 parses datagram 112. While parsing datagram 112, it places it on host memory 130. NIC 102 copies the header 116 of the datagram to local memory 106 for internal processing. NIC 102 retains the header 116 locally and does not place it on host memory 130.

[0074] NIC 102 identifies the virtual destination 120 by parsing datagram 112. NIC 102 operates on the header 116 of datagram 112 to determine how to process datagram 112, for example, which virtual destination 120 needs to be selected to send datagram 112. Optionally, NIC 102 copies the header 116 from host memory 130. The header 116 is a small portion of the data, much smaller than the entire datagram 112. NIC 102 retains the header 116; that is, the NIC only copies the data payload 114 to the host buffer and copies the header 116 to local memory 106. As a possible optimization, the header 116 is never copied to the host buffer, and the necessary metadata 118 is extracted, placed on the zero-copy descriptor ring 108 or the zero-copy buffer 110, and processed by the driver.

[0075] ( Figure 1NIC 102 retrieves virtual buffer 124 from descriptor ring 122 and records the GPA and virtual CPU ID (vCPU ID). The GPA of virtual buffer 124 is denoted as GPA1. NIC 102 updates the guest-to-physical memory mapping. NIC 102 notifies host 128 to change the physical memory mapping of the buffer provided on the regular queue to point to host-provided zero-copy buffer 110. Optionally, physical memory mapping is accomplished by NIC 102 placing virtual destination 120 or queue information on the buffer and notifying host 128. The host then reads the next descriptor for the given queue (or the queue connected to virtual destination 120) and changes the physical memory mapping. Host 128 is notified via an interrupt. Optionally, NIC 102 reads the guest physical address (GPA) of the next descriptor in the regular queue of the virtual destination. NIC 102 then transmits the GPA to host 128 to perform guest-to-physical memory mapping. Host 128 is notified via an interrupt. Optionally, NIC 102 reads the client's physical address for the next descriptor and updates the MMU's page table itself. Virtual destination 120 is notified directly via an interrupt, without first going through host 128.

[0076] The physical address of GPA1 (obtainable via guest-to-physical memory mapping) is denoted as HPA2. NIC 102 remaps GPA1 to point to HPA1 and updates the zero-copy descriptor 108, which points to HPA1, to now point to HPA2. In one exemplary scenario, the above operations can be performed in NIC 102 or in the virtual machine monitor, depending on hardware support.

[0077] This invention discloses a novel method for implementing data processing in a network system 100 with a SmartNIC (e.g., 1823) and RDMA applications, particularly in the context of virtual machine and cloud network implementations. NIC 102 relates to a host 128 that provides a descriptor ring pointing to host-owned buffers (referred to as “zero-copy buffers”). When a datagram is received, it is written directly to one of these zero-copy buffers without being stored in device memory along the path. Subsequently, the application’s regular buffers (e.g., VMs) are mapped to the filled zero-copy buffer, thereby optimizing data transmission and reducing data processing overhead in the network system 100.

[0078] Modifications to the embodiments of the invention described above may be made without departing from the scope of the invention as defined in the appended claims. Expressions such as “comprising,” “integrating,” “having,” “is,” etc., used to describe and claim the invention are intended to be interpreted in a non-exclusive manner, including items, components, or elements not explicitly described. Singular references should also be interpreted in relation to the plural. The term “exemplary” as used herein means “as an example, illustration, or description.” Any embodiment described as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments, or does not exclude features in combination with other embodiments. The term “optionally” as used herein means “provided in some embodiments and not in others.” It should be understood that certain features of the invention described in the context of a single embodiment for clarity may also be provided in combination in a single embodiment. Conversely, various features of this disclosure described in the context of a single embodiment for clarity may also be provided individually or in any suitable combination or as embodiments of any other described herein.

Claims

1. A network interface card (NIC) (102), characterized in that, Includes a controller (104) and a local memory (106), wherein the controller (104) is used for: Receive a data packet (112), the data packet (112) including a data payload (114), a header (116) and metadata (118). Select a zero-copy buffer (110) from the zero-copy descriptor ring (108) with the host physical address (HPA); Write the data payload (114) of the data packet (112) into the zero copy buffer (110). The data packet (112) is parsed to identify the virtual destination (120); Select a virtual buffer (124) with a virtual address from the descriptor ring (122) of the virtual destination (120); The virtual address of the selected virtual buffer (124) is mapped to the HPA of the zero-copy buffer (110).

2. The NIC (102) according to claim 1, characterized in that, The controller (104) is also used in RDMA applications, wherein, The virtual buffer (124) is selected from the receive queue (RQ) of the virtual destination (120), and The virtual buffer address is the address of the virtual destination (120).

3. The NIC (102) according to claim 1, characterized in that, The virtual destination (120) is a virtual function (VF). The virtual buffer (124) is a VF buffer selected from the descriptor ring (122) of the destination VF. The virtual buffer address is the guest physical address (GPA).

4. The NIC (102) according to any one of the preceding claims, characterized in that, The controller (104) is also configured to write the metadata (118) of the data packet (112) into the local memory (106).

5. The NIC (102) according to any one of the preceding claims, characterized in that, The controller (104) is also configured to write the header (116) of the data packet (112) into the local memory (106).

6. The NIC (102) according to any one of claims 1 to 5, characterized in that, The controller (104) is also configured to parse the data packet (112) when the data packet (112) is stored in the memory (130) of the host (128).

7. The NIC (102) according to any one of claims 1 to 5, characterized in that, The controller (104) is also configured to copy the header (116) of the data packet (112) to the memory (130) of the host (128) and then parse the data packet (112).

8. The NIC (102) according to any one of claims 1 to 5, characterized in that, The controller (104) is also configured to copy the header (116) of the data packet (112) to the local memory (106) and then parse the data packet (112).

9. The NIC (102) according to any one of the preceding claims, characterized in that, The controller (104) is also configured to update the virtual address to the HPA by performing an update.

10. The NIC (102) according to any one of claims 1 to 8, characterized in that, The controller (104) is also configured to update the virtual address to the HPA by causing the virtual machine monitor to perform the update.

11. The NIC (102) according to any one of the preceding claims, characterized in that, The controller (104) is also configured to map the virtual address of the selected virtual buffer (124) to the HPA of the zero-copy descriptor buffer (110) by performing a mapping.

12. The NIC (102) according to any one of claims 1 to 10, characterized in that, The controller (104) is also configured to map the virtual address GPA of the selected virtual buffer (124) to the HPA of the zero-copy descriptor buffer (110) by having the virtual machine monitor perform the mapping.

13. The NIC (102) according to any one of the preceding claims, characterized in that, The controller (104) is also used for: Copy the data payload (114) of the data packet (112) to the host memory (130). The header (116) of the data packet (112) is copied to the local memory (106).

14. A method (200) for a network interface card (NIC) (102), characterized in that, Including a controller (104) and local memory (106), the method (200) includes: Receive a data packet (112), the data packet (112) including a data payload (114), a header (116) and metadata (118). Select a zero-copy buffer (110) from the zero-copy descriptor ring (108) with the host physical address (HPA); Write the data payload (114) of the data packet (112) into the zero copy buffer (110). Parse the data packet (112) to identify the virtual destination (120) virtual function (VF); Select a virtual buffer (124) with a virtual address from the descriptor ring (122) of the virtual destination (120); The virtual address of the selected virtual buffer (124) is mapped to the HPA of the zero-copy buffer (110).

15. A computer program product, characterized in that, Includes program instructions for performing the method (200) according to claim 14 when executed by one or more processors in the network.

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