Signaling enhancement of SEI processing order in video bitstream

Abstract

A mechanism for processing video data is disclosed. The mechanism processes sequential SEI messages for supplemental enhancement information (SEI), determines that an SEI prefix indication (in the presence) is signaled in units of bits, where the SEI prefix indication of a particular SEI payloadType is a bit string following an SEI load syntax corresponding to a value of the payloadType, and the SEI prefix indication of the payloadType corresponds to the SEI load syntax of the value of the payloadType. And the bit string contains a number of complete syntax elements starting from the first syntax element in the SEI load. A conversion between the visual media data and the bitstream is performed based on the SEI processing sequence SEI message.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority and benefit to U.S. Provisional Patent Application No. 63 / 587,297, filed October 2, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to the generation, storage, and use of digital audio and video media information in file formats. Background Technology

[0004] Digital video accounts for the largest share of bandwidth used on the internet and other digital communication networks. As the number of connected user devices capable of receiving and displaying video increases, the bandwidth demand for digital video is likely to continue to grow. Summary of the Invention

[0005] The first aspect relates to a method for processing video data, comprising: determining, for a Supplemental Enhancement Information (SEI) processing order SEI message, that the corresponding derived value is equal to 0, such that signaling avoids the preferred processing order of the 0th SEI message type; and performing a conversion between visual media data and a bitstream based on the 0th SEI message type.

[0006] The second aspect relates to an apparatus for processing video data, including a processor and a non-transitory memory having instructions thereon, wherein the instructions, when executed by the processor, cause the processor to perform any of the aforementioned aspects.

[0007] The third aspect relates to a non-transitory computer-readable medium comprising a computer program product for use by a video codec device, the computer program product including computer-executable instructions stored on the non-transitory computer-readable medium, such that when executed by a processor, the computer-executable instructions cause the video codec device to perform the methods of any of the preceding aspects.

[0008] The fourth aspect relates to a non-transitory computer-readable recording medium storing a bitstream of video generated by a method performed by a video processing apparatus, wherein the method includes: determining, for a Supplemental Enhancement Information (SEI) processing order SEI message, a corresponding derived value equal to 0, such that signaling avoids a preferred processing order of the 0th SEI message type; and generating a bitstream based on the determination.

[0009] The fifth aspect relates to a method for storing a bitstream of video, comprising: determining, for a Supplemental Enhancement Information (SEI) processing order SEI message, that the corresponding derived value is equal to 0, such that signaling avoids a preferred processing order of the 0th SEI message type; generating a bitstream based on the determination; and storing the bitstream in a non-transitory computer-readable recording medium.

[0010] The sixth aspect relates to the methods, apparatus, or systems described in this disclosure.

[0011] For clarity, any of the embodiments described above may be combined with one or more other embodiments described above to create new embodiments within the scope of this disclosure.

[0012] These and other features will become clearer from the following detailed description in conjunction with the accompanying drawings and claims. Attached Figure Description

[0013] For a more complete understanding of this disclosure, reference is now made to the following brief description, which is taken in conjunction with the accompanying drawings and detailed description, wherein the same reference numerals denote the same parts.

[0014] Figure 1 This is a block diagram illustrating an example video processing system.

[0015] Figure 2 This is a block diagram of an example video processing device.

[0016] Figure 3A and Figure 3B This is a flowchart of an example method for video processing.

[0017] Figure 4 This is a block diagram illustrating an example video codec system.

[0018] Figure 5 This is a block diagram showing an example encoder.

[0019] Figure 6 This is a block diagram showing an example decoder.

[0020] Figure 7 This is a schematic diagram of an example encoder. Detailed Implementation

[0021] First, it should be understood that although illustrative implementations of one or more embodiments are provided below, the disclosed systems and / or methods can be implemented using any number of techniques, whether currently known or yet to be developed. This disclosure should not be limited in any way to the illustrative implementations, drawings, and embodiments described below, including the exemplary designs and implementations described herein, but modifications can be made within the scope of the appended claims and their equivalents.

[0022] Chapter headings are used in this disclosure for ease of understanding and not to limit the applicability of the techniques and embodiments disclosed in each chapter to that chapter only. Furthermore, H.266 terminology is used in some descriptions merely for ease of understanding and not to limit the scope of the disclosed embodiments. Therefore, the embodiments described herein are also applicable to other video codec protocols and designs. In this disclosure, edits to text are indicated by bold italics to represent deleted text and bold text to represent added text, relative to the Multi-Functional Video Codec (VVC) specification and / or the VSEI message (VSEI) standard for encoding and decoding video bitstreams.

[0023] 1. Preliminary Discussion

[0024] This disclosure relates to image / video codec techniques. Specifically, this disclosure relates to signaling enhancements to the SEI processing order in Supplemental Enhancement Information (SEI) messages. These ideas can be applied individually or in various combinations to video bitstreams encoded or decoded by any codec, such as the VVC standard and / or the Versatile SEI Message (VSEI) standard for encoding and decoding video bitstreams.

[0025] 2. Abbreviation

[0026] This disclosure includes the following abbreviations: Adaptive Parameter Set (APS), Access Unit (AU), Codec Layer Video Sequence (CLVS), Codec Layer Video Sequence Start (CLVSS), Cyclic Redundancy Check (CRC), Codec Video Sequence (CVS), Finite Impulse Response (FIR), Intra-Frame Random Access Point (IRAP), Network Abstraction Layer (NAL), Picture Parameter Set (PPS), Picture Unit (PU), Random Access Skip Before (RASL) Picture, Supplemental Enhancement Information (SEI), Stepped Temporal Sublayer Access (STSA), Video Codec Layer (VCL), Multifunctional Supplemental Enhancement Information (VSEI) described in Recommendation ITU-T H.274 | ISO / IEC 23002-7, Video Availability Information (VUI), and Multifunctional Video Codec (VVC) described in Recommendation ITU-T H.266 | ISO / IEC 23090-3.

[0027] 3. Further discussion

[0028] 3.1 Video Coding and Decoding Standards

[0029] Video coding standards have evolved primarily through the development of standards by the International Telecommunication Union (ITU) Telecommunication Standardization Department (ITU-T) and the International Organization for Standardization (ISO) / International Electrotechnical Commission (IEC). ITU-T developed the H.261 and H.263 standards, ISO / IEC developed the Moving Picture Experts Group (MPEG)-1 and MPEG-4 Vision, and the two organizations jointly developed the H.262 / MPEG-2 video standard, the H.264 / MPEG-4 Advanced Video Coding (AVC) standard, and the H.265 / High Efficiency Video Coding (HEVC) standard [1]. Starting with H.262, video coding standards are based on a hybrid video coding structure, which utilizes temporal prediction plus transform coding.

[0030] The Multi-Functional Video Coding (VVC) standard (ITU-T H.266 | ISO / IEC 23090-3) [2] and the related Multi-Functional Supplemental Enhancement Information (VSEI) standard (ITU-T H.274 | ISO / IEC 23002-7) [3] are designed for use in the widest range of applications, including simple uses such as television broadcasting, video conferencing or playback from storage media, as well as more advanced use cases such as adaptive bitrate streaming, video region extraction, synthesis and merging of content from multiple encoded video bitstreams, multi-view video, scalable layered coding and decoding and viewport adaptive 360° immersive media.

[0031] 3.2 General SEI Messages and SEI Messages in VVC

[0032] SEI messages assist in processes related to decoding, display, or other purposes. However, SEI messages are not essential for constructing luma or chroma samples during the decoding process. Standard-compliant decoders do not need to process this information to achieve output order consistency. Some SEI messages are necessary for checking bitstream consistency and output timing decoder consistency. Other SEI messages are not necessary for checking bitstream consistency.

[0033] Appendix D of VVC specifies the syntax and semantics of SEI message payloads for some SEI messages, and specifies the use of SEI messages and VUI parameters with syntax and semantics specified in ITU-TH.SEI | ISO / IEC 23002-7.

[0034] 3.3 SEI Processing Order (SPO) SEI Messages

[0035] JVET-AE2027 [4] includes a specification for SEI messages called SEI Processing Order (SPO) SEI messages, which carry information indicating the preferred processing order of different types of SEI messages determined by the encoder (content producer) for codec video sequences (CVS) that may exist in the bitstream.

[0036] The specification for SPO SEI messages in JVET-AE2027 is as follows.

[0037] 3.3.1 General SEI Load Syntax

[0038]

[0039] 3.3.2 SEI Processing Order and SEI Message Syntax

[0040]

[0041] 3.3.3 SEI Processing Order and SEI Message Semantics

[0042] SEI Processing Order: SEI messages carry information indicating the preferred processing order for different types of SEI messages that may exist in CVS, as determined by the encoder (i.e., the content producer).

[0043] When an SEI processing order SEI message exists in any access unit of a CVS, it must be present in the first access unit of the CVS. SEI processing order SEI messages continue from the current access unit in decoding order to the end of the CVS. When multiple SEI processing order SEI messages exist in a CVS, they must have the same content.

[0044] The requirement for bitstream consistency is that within the SEI processing order SEI message, there must be at least two pairs of syntax elements po_sei_payload_type[i] and po_sei_processing_order[i], and there must be at least two unequal po_sei_processing_order[i] values.

[0045] SEI processing order: SEI messages can carry one or more SEI prefix indicators for a specific payloadType. Each SEI prefix indicator is a byte string that follows the SEI payload syntax corresponding to the value of the payloadType, and the byte string contains a certain number of complete syntax elements starting from the first syntax element in the SEI payload, and may be followed by bits that do not represent any complete syntax elements of the SEI payload.

[0046] These SEI prefixes should provide sufficient information to determine the specific processing order of SEI messages with the same payloadType value but different preferred processing orders.

[0047] po_num_sei_messages_minus2 plus 2 indicates the number of SEI messages with the processing order indicated in the SEI message.

[0048] po_sei_importance_flag[i] indicates the importance of the SEI message at index i, as determined by the encoder.

[0049] If the decoding system cannot interpret or does not support any SEI message with a po_sei_importance_flag[i] equal to 1, it should ignore the entire SEI processing order SEI message.

[0050] The `reserved_alignment_6bits` parameter is meaningless and must be equal to 0 in a bitstream conforming to this version of the specification. The decoder must allow this syntax element to have other values ​​and must ignore such values.

[0051] If po_sei_wrapping_flag[i] equals 0, then the SEI message should exist outside the SEI processing order, where payloadType equals po_sei_payload_type[i]. However, if po_sei_wrapping_flag[i] equals 0 and no SEI message with payloadType equal to po_sei_payload_type[i] exists, then the following applies:

[0052] - If po_sei_importance_flag[i] equals 1, the decoder should ignore the entire SEI processing order SEI message;

[0053] Otherwise, the decoder must ignore all data associated with the loop variable value i.

[0054] Note 1 - `po_sei_wrapping_flag[i]` equal to 1 enables the carrying of SEI messages within SEI messages processed in the SEI processing order, preventing such SEI messages from being misinterpreted by decoders that do not process SEI messages processed in the SEI processing order. Therefore, `po_sei_wrapping_flag[i]` equal to 1 is intended to be used when `po_sei_wrapping_flag[i]` equal to 0 would lead to undesirable results from such decoders.

[0055] A value of 1 for po_sei_prefix_flag[i] indicates the existence of po_num_prefix_bytes[i]. A value of 0 for po_sei_prefix_flag[i] indicates the non-existence of po_num_prefix_bytes[i].

[0056] `po_sei_payload_type[i]` specifies the `payloadType` value for the `i`-th SEI message type, providing preferred processing order information in the SEI processing order for that `i`-th SEI message type. For any two distinct non-negative integer values ​​`m` and `n`, the values ​​of `po_sei_payload_type[m]` and `po_sei_payload_type[n]` should not be the same unless both `po_sei_prefix_flag[m]` and `po_sei_prefix_flag[n]` are equal to 1.

[0057] SeiProcessingOrderSeiList is set to consist of payloadType values ​​as specified in entry D.2.1, except for the values ​​137, 144, 147, 148, 179, 180, 200, 201, 208, and 213. When po_sei_payload_type[i] is not equal to any value in SeiProcessingOrderSeiList, the value of po_sei_prefix_flag[i] must be equal to 0.

[0058] po_num_prefix_bytes[i] (if present) specifies the number of bytes associated with the i-th SEI message, providing preferred processing order information for that i-th SEI message in the SEI processing order. When it does not exist, the value of po_num_prefix_bytes[i] is presumed to be 0.

[0059] po_prefix_byte[i][j] (if present) specifies the value of the j-th byte of the i-th SEI message.

[0060] po_sei_processing_order[i] indicates the preferred processing order for the i-th SEI message type, providing preferred processing order information in the SEI processing order SEI message for that i-th SEI message type. For any two distinct integer values ​​m and n greater than or equal to 0, po_sei_processing_order[m] less than po_sei_processing_order[n] indicates that any SEI message type with payloadType equal to po_sei_payload_type[m] and bytes po_prefix_byte[m][p] (if present) ranging from 0 to po_num_prefix_bytes[m] - 1 (inclusive) must be processed before any SEI message type with payloadType equal to po_sei_payload_type[n] and bytes po_prefix_byte[n][q] (if present), ranging from 0 to po_num_prefix_bytes[n] - 1 (inclusive). Furthermore, po_sei_processing_order[m] equal to po_sei_processing_order[n] indicates that there is no preferred processing order among the SEI message types. When there are multiple SEI messages with the same values ​​of po_sei_payload_type[i], po_num_prefix_bytes[i], and j ranging from 0 to po_num_prefix_bytes[i] - 1 (inclusive), they must have the same value of po_sei_processing_order[i].

[0061] po_sei_processing_order[0] must be equal to 0, and for i greater than 0, po_sei_processing_order[i] must be equal to po_sei_processing_order[i-1] or po_sei_processing_order[i-1]+1.

[0062] The value of po_sei_processing_order[ po_num_sei_messages_minus2 + 1 ] should not be equal to 0.

[0063] 4. Technical problems solved by the disclosed embodiments

[0064] The example design for processing sequential SEI messages has the following problems.

[0065] First, according to the constraint, po_sei_processing_order[0] must be equal to 0. Therefore, signaling using 8 bits of po_sei_processing_order[0] is a waste of bits. Instead, signaling for the preferred processing order of the 0th SEI message type can be avoided.

[0066] Second, according to the constraint, for i greater than 0, po_sei_processing_order[i] must be equal to po_sei_processing_order[i-1] or po_sei_processing_order[i-1] + 1. Therefore, when i is greater than 0, only 1 bit (instead of 8 bits) is sufficient for signaling the preferred processing order of the i-th SEI message type.

[0067] Third, the SEI prefix indicator is transmitted via signaling in bytes; therefore, the SEI prefix indicator can include bits at the end that do not represent any complete syntax element of the SEI payload. However, syntax parsing may encounter problems when bits that do not represent any complete syntax element of the SEI payload are present.

[0068] Fourth, when there are two or more Color Transform Information (CTI) SEI messages with a preferred processing order via signal transmission SEI processing order, each SEI prefix indication of the CTI SEI message must include at least all bits of the colour_transform_id syntax element of the CTI SEI message. However, such a constraint is lacking.

[0069] Fifth, when there are two or more Neural Network Post-Processing Filter Feature (NNPFC) SEI messages that transmit SEI processing order via signal transmission, each SEI prefix indication of the NNPFC SEI message must include at least all bits of the nnfpc_id syntax element of the NNPFC SEI message. However, such a constraint is lacking.

[0070] 5. List of solutions and implementation examples

[0071] To address the aforementioned problems, the methods and embodiments outlined below are disclosed. These aspects should be considered as examples for interpreting general concepts and not interpreted in a narrow sense. Furthermore, these examples can be applied individually or in any combination.

[0072] 1) To address the first problem mentioned above, in the SEI processing order SEI message, the signaling for the preferred processing order of the 0th SEI message type is avoided, and this value is derived to be equal to 0.

[0073] 2) To address the second problem mentioned above, in the SEI processing order SEI message, when i is greater than 0, the preferred processing order of the i-th SEI message type is transmitted via signal using only 1 bit, where 1 bit is a flag indicating whether the preferred processing order of the i-th SEI message type is equal to the preferred processing order of the (i-1)-th SEI message type plus 1, or whether it is the same as the preferred processing order of the (i-1)-th SEI message type.

[0074] 3) To address the third issue mentioned above, in the SEI processing sequence SEI message, the SEI prefix indication (if present) is transmitted by signal in bits, and the SEI prefix indication for a specific SEI payloadType must be a bit string that follows the SEI payload syntax corresponding to the value of that payloadType, and the bit string contains a certain number of complete syntax elements starting from the first syntax element in the SEI payload.

[0075] 4) To address the fourth issue mentioned above, the constraint requires that the SEI prefix indication transmitted via signaling in the SEI processing order SEI message of the Color Transform Information (CTI) SEI message must include at least all bits of the colour_transform_id syntax element of the CTI SEI message.

[0076] 5) To address the fifth issue mentioned above, the constraint requires that the SEI prefix indication transmitted via signaling in the Neural Network Post-Processing Filter Characteristics (NNPFC) SEI message must include at least all bits of the nnfpc_id syntax element of the NNPFC SEI message.

[0077] 6. Examples

[0078] The following are some example embodiments of the aspects outlined in Section 5 above.

[0079] 6.1 Example 1

[0080] The most relevant parts that have been added or modified are shown in bold, and some of the deleted parts are shown in bold italics. There may be other changes that are editable in nature and therefore not indicated.

[0081] 6.1.1. SEI Processing Order SEI Message Syntax

[0082]

[0083] 6.1.2. SEI Processing Order and SEI Message Semantics

[0084] SEI Processing Order: SEI messages carry information indicating the preferred processing order for different types of SEI messages that may exist in CVS, as determined by the encoder (i.e., the content producer).

[0085]

[0086] When an SEI processing order SEI message exists in any access unit of a CVS, it must be present in the first access unit of the CVS. SEI processing order SEI messages continue from the current access unit in decoding order to the end of the CVS. When multiple SEI processing order SEI messages exist in a CVS, they must have the same content.

[0087]

[0088]

[0089] These SEI prefixes indicate that sufficient information must be provided to determine the specific processing order of SEI messages that have the same payloadType value but different preferred processing orders.

[0090]

[0091] po_sei_importance_flag[i] indicates the importance of the SEI message at index i, as determined by the encoder.

[0092] If the decoding system cannot interpret or does not support any SEI message indicating that po_sei_importance_flag[i] equals 1, then it must ignore the entire SEI processing order SEI message.

[0093] The `reserved_alignment_6bits` parameter is meaningless and must be equal to 0 in a bitstream conforming to this version of the specification. The decoder must allow this syntax element to have other values ​​and must ignore such values.

[0094] When po_sei_wrapping_flag[i] equals 0, the SEI message should exist outside the SEI message processing order, where payloadType equals po_sei_payload_type[i]. However, when po_sei_wrapping_flag[i] equals 0 and no SEI message with payloadType equal to po_sei_payload_type[i] exists, the following applies:

[0095] - If po_sei_importance_flag[i] equals 1, the decoder should ignore the entire SEI processing order SEI message;

[0096] Otherwise, the decoder must ignore all data associated with the loop variable value i.

[0097] Note 1 - `po_sei_wrapping_flag[i]` equal to 1 enables the carrying of SEI messages within SEI messages processed in the SEI processing order, preventing such SEI messages from being misinterpreted by decoders that do not process SEI messages processed in the SEI processing order. Therefore, `po_sei_wrapping_flag[i]` equal to 1 is intended to be used when `po_sei_wrapping_flag[i]` equal to 0 would lead to undesirable results from such decoders.

[0098]

[0099]

[0100] A value of 1 for po_sei_prefix_flag[i] indicates the existence of po_num_prefix_bits_minus1[i]. A value of 0 for po_sei_prefix_flag[i] indicates the non-existence of po_num_prefix_bits_minus1[i].

[0101] For any two distinct non-negative integer values ​​m and n, the values ​​of po_sei_payload_type[m] and po_sei_payload_type[n] should not be the same unless po_sei_prefix_flag[m] and po_sei_prefix_flag[n] are both equal to 1.

[0102] SeiProcessingOrderSeiList is set to consist of payloadType values ​​as specified in entry D.2.1, except for the values ​​137, 144, 147, 148, 179, 180, 200, 201, 208, and 213. When po_sei_payload_type[i] is not equal to any value in SeiProcessingOrderSeiList, the value of po_sei_prefix_flag[i] must be equal to 0.

[0103]

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[0117] 7. References

[0118] [1] ITU-T and ISO / IEC, “High efficiency video coding”, Rec. ITU-TH.265 | ISO / IEC 23008-2 (in force edition).

[0119] [2] ITU-T and ISO / IEC, “Versatile Video Coding”, Rec. ITU-T H.266 | ISO / IEC 23090-3.

[0120] [3] ITU-T and ISO / IEC, “Versatile Supplemental EnhancementInformation Messages for Coded Video Bitstreams”, Rec. ITU-T Rec. H.274 | ISO / IEC 23002-7.

[0121] [4] S. McCarthy, MM Hannuksela, and Y.-K. Wang (eds), JVET-AE2027, "SEI processing order SEI message in VVC (draft 5)".

[0122] Figure 1 This is a block diagram illustrating an example video processing system 4000 in which various embodiments disclosed herein may be implemented. Various implementations may include some or all of the components of system 4000. System 4000 may include an input 4002 for receiving video content. The video content may be received in a raw or uncompressed format, such as 8 or 10-bit multi-component pixel values, or in a compressed or encoded format. Input 4002 may represent a network interface, a peripheral bus interface, or a storage interface. Examples of network interfaces include wired interfaces (such as Ethernet, Passive Optical Networking (PON), etc.) and wireless interfaces (such as Wi-Fi or cellular interfaces).

[0123] System 4000 may include an encoding component 4004 capable of implementing the various encoding / decoding or encoding methods described in this disclosure. Encoding component 4004 can reduce the average bit rate from the video input 4002 to the output of encoding component 4004 to produce an encoded representation of the video. Encoding techniques are therefore sometimes referred to as video compression or video transcoding techniques. The output of encoding component 4004 may be stored or transmitted via a communication connection such as that represented by component 4006. The bitstream (or encoded) representation of the video received at input 4002, whether stored or communicated, can be used by component 4008 to generate pixel values ​​or transmit as displayable video to display interface 4010. The process of generating user-visible video from the bitstream representation is sometimes referred to as video decompression. Furthermore, although some video processing operations are referred to as “encoding” operations or tools, it is understood that encoding tools or operations are used at the encoder, and corresponding decoding tools or operations that inversely reproduce the encoded result will be performed by the decoder.

[0124] Examples of peripheral bus interfaces or display interfaces may include Universal Serial Bus (USB), High Definition Multimedia Interface (HDMI), or DisplayPort. Examples of storage interfaces include Serial Advanced Technology Attachment (SATA), Peripheral Component Interconnect (PCI), Integrated Drive Electronics (IDE), etc. The embodiments described in this disclosure can be embodied in a variety of electronic devices, such as mobile phones, laptops, smartphones, or other devices capable of performing digital data processing and / or video display.

[0125] Figure 2 This is a block diagram of an example video processing apparatus 4100. Apparatus 4100 can be used to implement one or more methods described herein. Apparatus 4100 can be embodied in a smartphone, tablet, computer, Internet of Things (IoT) receiver, etc. Apparatus 4100 may include one or more processors 4102, one or more memories 4104, and video processing circuitry 4106. The processors 4102(s) may be configured to implement one or more methods described herein. The memories 4104(s) may be used to store data and code for implementing the methods and embodiments described herein. The video processing circuitry 4106 may be used to implement some embodiments described herein in hardware circuitry. In some embodiments, the video processing circuitry 4106 may be at least partially included in the processor 4102, for example, a graphics coprocessor.

[0126] Figure 3AThis is a flowchart of an example method 4200 for video processing. Method 4200 includes step 4202: determining a derived value equal to 0 for the SEI processing order SEI message, thereby avoiding signaling for the preferred processing order of the 0th SEI message type. In step 4204, performing a conversion between visual media data and a bitstream based on the 0th SEI message type. The conversion may include encoding at the encoder, decoding at the decoder, or a combination thereof.

[0127] Figure 3B This is a flowchart of an example method 4250 for video processing. Method 4250 includes step 4252: For an SEI processing sequence SEI message, determining that an SEI prefix indication (if present) is transmitted via signaling in bits. The SEI prefix indication for a specific SEI payloadType is a bit string that follows the bit string of the SEI payload syntax corresponding to the value of that payloadType, and that the bit string contains a certain number of complete syntax elements starting from the first syntax element in the SEI payload. In step 4254, a conversion between visual media data and a bitstream is performed based on the SEI processing sequence SEI message. The conversion may include encoding at the encoder, decoding at the decoder, or a combination thereof.

[0128] It should be noted that methods 4200 and 4250 can be implemented in a means for processing video data, including a processor and a non-transitory memory having instructions thereon, such as a video encoder 4400, a video decoder 4500, and / or an encoder 4600. In this case, the instructions, when executed by the processor, cause the processor to perform methods 4200 and / or 4250. Furthermore, methods 4200 and / or 4250 can be executed by a non-transitory computer-readable medium, which includes a computer program product for use by a video encoding / decoding device. The computer program product includes computer-executable instructions stored on the non-transitory computer-readable medium, causing the video encoding / decoding device to perform methods 4200 and / or 4250 when executed by a processor.

[0129] Figure 4 This is a block diagram illustrating an example video encoding / decoding system 4300 that can utilize embodiments of the present disclosure. The video encoding / decoding system 4300 may include a source device 4310 and a target device 4320. The source device 4310 generates encoded video data, and this source device 4310 may be referred to as a video encoding device. The target device 4320 can decode the encoded video data generated by the source device 4310, and this target device 4320 may be referred to as a video decoding device.

[0130] Source device 4310 may include video source 4312, video encoder 4314, and input / output (I / O) interface 4316. Video source 4312 may include sources such as video capture devices, interfaces for receiving video data from video content providers, and / or sources of computer graphics systems used to generate video data, or combinations of these sources. Video data may include one or more pictures. Video encoder 4314 encodes the video data from video source 4312 to generate a bitstream. The bitstream may include a sequence of bits forming a codec representation of the video data. The bitstream may include codec pictures and associated data. Codec pictures are codec representations of pictures. Associated data may include sequence parameter sets, picture parameter sets, and other syntax structures. I / O interface 4316 may include a modulator / demodulator (modem) and / or a transmitter. Encoded video data may be transmitted directly to target device 4320 via network 4330 through I / O interface 4316. Encoded video data may also be stored on storage medium / server 4340 for access by target device 4320.

[0131] Target device 4320 may include I / O interface 4326, video decoder 4324, and display device 4322. I / O interface 4326 may include a receiver and / or a modem. I / O interface 4326 may acquire encoded video data from source device 4310 or storage medium / server 4340. Video decoder 4324 may decode the encoded video data. Display device 4322 may display the decoded video data to a user. Display device 4322 may be integrated with target device 4320 or may be external to target device 4320, wherein target device 4320 may be configured to interface with an external display device.

[0132] The video encoder 4314 and the video decoder 4324 can operate according to video compression standards, such as the High Efficiency Video Codec (HEVC) standard, the Multi-Functional Video Codec (VVC) standard, and other existing and / or further standards.

[0133] Figure 5 This is a block diagram illustrating an example of a video encoder 4400, which can be... Figure 4 The system 4300 shown includes a video encoder 4314. The video encoder 4400 can be configured to perform any or all embodiments of this disclosure. The video encoder 4400 includes multiple functional components. The embodiments described in this disclosure can be shared among the various components of the video encoder 4400. In some examples, a processor can be configured to perform any or all embodiments described in this disclosure.

[0134] The functional components of the video encoder 4400 may include a segmentation unit 4401; a prediction unit 4402, which may include a mode selection unit 4403, a motion estimation unit 4404, a motion compensation unit 4405, and an intra-frame prediction unit 4406; a residual generation unit 4407; a transform processing unit 4408; a quantization unit 4409; an inverse quantization unit 4410; an inverse transform unit 4411; a reconstruction unit 4412; a buffer 4413; and an entropy coding unit 4414.

[0135] In other examples, the video encoder 4400 may include more, fewer, or different functional components. In one example, the prediction unit 4402 may include an intra-block copy (IBC) unit. The IBC unit can perform prediction in an IBC mode, where at least one reference picture is the picture in which the current video block is located.

[0136] Furthermore, some components such as the motion estimation unit 4404 and the motion compensation unit 4405 can be highly integrated, but for illustrative purposes, these components are represented separately in the example of the video encoder 4400.

[0137] The segmentation unit 4401 can segment an image into one or more video blocks. The video encoder 4400 and the video decoder 4500 can support various video block sizes.

[0138] The mode selection unit 4403 can select one of several encoding / decoding modes (intra-frame encoding / decoding or inter-frame encoding / decoding), for example, based on error results, and provide the resulting intra-frame or inter-frame encoded / decoded block to the residual generation unit 4407 to generate residual block data, and to the reconstruction unit 4412 to reconstruct the coded block for use as a reference image. In some examples, the mode selection unit 4403 can select an intra-frame / inter-frame joint prediction (CIIP) mode, where prediction is based on inter-frame prediction signals and intra-frame prediction signals. In the case of inter-frame prediction, the mode selection unit 4403 can also select a resolution for the block based on motion vectors (e.g., sub-pixel precision or integer pixel precision).

[0139] To perform inter-frame prediction on the current video block, motion estimation unit 4404 can generate motion information for the current video block by comparing one or more reference frames from buffer 4413 with the current video block. Motion compensation unit 4405 can determine the predicted video block for the current video block based on the motion information and decoded samples of images from buffer 4413 other than the image associated with the current video block.

[0140] The motion estimation unit 4404 and the motion compensation unit 4405 can perform different operations on the current video block, for example, depending on whether the current video block is in an I-band, P-band, or B-band.

[0141] In some examples, motion estimation unit 4404 can perform unidirectional prediction on the current video block, and can search for reference images in list 0 or list 1 to find a reference video block for the current video block. Motion estimation unit 4404 can then generate a reference index indicating the reference image containing the reference video block in list 0 or list 1, and a motion vector indicating the spatial displacement between the current video block and the reference video block. Motion estimation unit 4404 can output the reference index, prediction direction indicator, and motion vector as motion information for the current video block. Motion compensation unit 4405 can generate a predicted video block for the current block based on the reference video block indicated by the motion information of the current video block.

[0142] In other examples, motion estimation unit 4404 can perform bidirectional prediction on the current video block. Motion estimation unit 4404 can search for reference images in list 0 to find a reference video block for the current video block, and can also search for reference images in list 1 to find another reference video block for the current video block. Motion estimation unit 4404 can then generate reference indices indicating the reference images containing the reference video blocks in lists 0 and 1, and motion vectors indicating the spatial displacement between the reference video blocks and the current video block. Motion estimation unit 4404 can output the reference index and motion vector of the current video block as motion information for the current video block. Motion compensation unit 4405 can generate a predicted video block for the current video block based on the reference video blocks indicated by the motion information of the current video block.

[0143] In some examples, the motion estimation unit 4404 can output a complete set of motion information for use in the decoder's decoding process. In some examples, the motion estimation unit 4404 may not output a complete set of motion information for the current video. Instead, the motion estimation unit 4404 can reference the motion information of another video block to transmit the motion information of the current video block via a signal. For example, the motion estimation unit 4404 may determine that the motion information of the current video block is sufficiently similar to the motion information of neighboring video blocks.

[0144] In one example, the motion estimation unit 4404 may indicate a value to the video decoder 4500 in the syntax structure associated with the current video block, which indicates that the current video block has the same motion information as another video block.

[0145] In another example, motion estimation unit 4404 may identify another video block and motion vector difference (MVD) in the syntax structure associated with the current video block. The motion vector difference indicates the difference between the motion vector of the current video block and the motion vector of the indicated video block. Video decoder 4500 may use the motion vector of the indicated video block and the motion vector difference to determine the motion vector of the current video block.

[0146] As discussed above, the video encoder 4400 can transmit motion vectors via signaling in a predictive manner. Two examples of predictive signaling techniques that can be implemented by the video encoder 4400 include Advanced Motion Vector Prediction (AMVP) and Merge Pattern Signaling.

[0147] Intra-prediction unit 4406 can perform intra-prediction on the current video block. When intra-prediction unit 4406 performs intra-prediction on the current video block, it can generate prediction data for the current video block based on decoded samples from other video blocks in the same frame. The prediction data for the current video block can include the predicted video block and various syntax elements.

[0148] The residual generation unit 4407 can generate residual data for the current video block by subtracting (or more) predicted video blocks from the current video block. The residual data for the current video block can include residual video blocks corresponding to different sample components in the current video block.

[0149] In other examples, such as in skip mode, there may be no residual data for the current video block, and the residual generation unit 4407 may not perform subtraction operations.

[0150] The transform processing unit 4408 can generate one or more transform coefficient video blocks for the current video block by applying one or more transforms to the residual video blocks associated with the current video block.

[0151] After the transform processing unit 4408 generates a transform coefficient video block associated with the current video block, the quantization unit 4409 can quantize the transform coefficient video block associated with the current video block based on one or more quantization parameter (QP) values ​​associated with the current video block.

[0152] The inverse quantization unit 4410 and the inverse transform unit 4411 can apply inverse quantization and inverse transform to the transform coefficient video block respectively to reconstruct the residual video block from the transform coefficient video block. The reconstruction unit 4412 can add the reconstructed residual video block to the corresponding sample points of one or more predicted video blocks generated by the prediction unit 4402 to generate a reconstructed video block associated with the current block and store it in the buffer 4413.

[0153] After the video block is reconstructed by reconstruction unit 4412, a loop filtering operation can be performed to reduce video block artifacts.

[0154] The entropy encoding unit 4414 can receive data from other functional components of the video encoder 4400. When the entropy encoding unit 4414 receives data, it can perform one or more entropy encoding operations to generate entropy-encoded data and output a bitstream including the entropy-encoded data.

[0155] Figure 6 This is a block diagram illustrating an example of a video decoder 4500, which can be... Figure 4 The system 4300 shown includes a video decoder 4324. The video decoder 4500 can be configured to perform any or all embodiments of this disclosure. In the example shown, the video decoder 4500 includes multiple functional components. The embodiments described in this disclosure can be shared among the various components of the video decoder 4500. In some examples, a processor can be configured to perform any or all embodiments described in this disclosure.

[0156] In the example shown, the video decoder 4500 includes an entropy decoding unit 4501, a motion compensation unit 4502, an intra-frame prediction unit 4503, an inverse quantization unit 4504, an inverse transform unit 4505, a reconstruction unit 4506, and a buffer 4507. In some examples, the video decoder 4500 can perform a decoding process that is generally contrasted with the encoding process described with respect to the video encoder 4400.

[0157] The entropy decoding unit 4501 can retrieve the encoded bitstream. The encoded bitstream may include entropy-encoded video data (e.g., encoded video data blocks). The entropy decoding unit 4501 can decode the entropy-encoded video data, and based on the entropy-decoded video data, the motion compensation unit 4502 can determine motion information including motion vectors, motion vector precision, reference image list index, and other motion information. The motion compensation unit 4502 can determine this information, for example, by executing AMVP and Merge modes.

[0158] The motion compensation unit 4502 can generate motion compensation blocks and can perform interpolation based on an interpolation filter. The identifier of the interpolation filter to be used, with sub-pixel accuracy, can be included in the syntax element.

[0159] The motion compensation unit 4502 can use the interpolation filter used by the video encoder 4400 during the encoding of video blocks to calculate the interpolation for sub-integer pixels of the reference block. The motion compensation unit 4502 can determine the interpolation filter used by the video encoder 4400 based on the received syntax information, and the motion compensation unit 4502 can use the interpolation filter to generate the prediction block.

[0160] The motion compensation unit 4502 may use some syntax information to determine the size of the blocks of (multiple) frames and / or (multiple) stripes used to encode the encoded video sequence, segmentation information describing how each macroblock of the picture of the encoded video sequence is segmented, a mode indicating how each segment is encoded, one or more reference frames (and a list of reference frames) for each inter-frame codec block, and other information for decoding the encoded video sequence.

[0161] Intra-prediction unit 4503 can use, for example, an intra-prediction mode received in the bitstream to form prediction blocks from spatially adjacent blocks. Inverse quantization unit 4504 performs inverse quantization (i.e., dequantization) on the quantized video block coefficients provided in the bitstream and decoded by entropy decoding unit 4501. Inverse transform unit 4505 applies the inverse transform.

[0162] The reconstruction unit 4506 can add the residual block to the corresponding predicted block generated by the motion compensation unit 4502 or the intra-frame prediction unit 4503 to form a decoded block. If necessary, a deblocking filter can also be used to filter the decoded block to eliminate block artifacts. The decoded video block is then stored in a buffer 4507, which provides a reference block for subsequent motion compensation / intra-frame prediction, and the buffer 4507 also generates decoded video for presentation on a display device.

[0163] Figure 7 This is a schematic diagram of an example encoder 4600. Encoder 4600 is suitable for implementing VVC techniques. Encoder 4600 includes three loop filters: a deblocking filter (DF) 4602, a sample adaptive compensation (SAO) 4604, and an adaptive loop filter (ALF) 4606. Unlike DF 4602, which uses predefined filters, SAO 4604 and ALF 4606 utilize the original samples of the current image and reduce the mean square error between the original and reconstructed samples by adding an offset and by applying a finite impulse response (FIR) filter, respectively. The side information of the encoding and decoding is transmitted via the offset and filter coefficients. ALF 4606 is located in the last processing stage of each image and can be thought of as a tool to attempt to capture and repair artifacts caused by previous stages.

[0164] The encoder 4600 also includes an intra-frame prediction component 4608 and a motion estimation / compensation (ME / MC) component 4610 configured to receive input video. The intra-frame prediction component 4608 is configured to perform intra-frame prediction, while the ME / MC component 4610 is configured to perform inter-frame prediction using reference images obtained from a reference image buffer 4612. Residual blocks from inter-frame or intra-frame prediction are fed into a transform (T) component 4614 and a quantization (Q) component 4616 to generate quantized residual transform coefficients, which are then fed into an entropy coding component 4618. The entropy coding component 4618 entropy-codes the prediction results and the quantized transform coefficients and transmits them toward a video decoder (not shown). The quantized components output from the quantization component 4616 can be fed into an inverse quantization (IQ) component 4620, an inverse transform component 4622, and a reconstruction (REC) component 4624. REC component 4624 is able to output images to DF 4602, SAO 4604 and ALF 4606 for filtering before these images are stored in reference image buffer 4612.

[0165] The following is a list of some preferred solutions.

[0166] The following solutions illustrate examples of the embodiments discussed herein.

[0167] 1. A method for processing media data, comprising: for a Supplemental Enhancement Information (SEI) processing order SEI message, determining that the corresponding derived value is equal to 0, such that signaling avoids the preferred processing order of the 0th SEI message type; and performing a conversion between visual media data and a bitstream based on the 0th SEI message type.

[0168] 2. According to the method of Solution 1, wherein in the SEI processing order SEI message, when i is greater than 0, the preferred processing order of the i-th SEI message type is transmitted by signal using only 1 bit, and the 1 bit is a flag indicating whether the preferred processing order of the i-th SEI message type is equal to the preferred processing order of the (i-1)-th SEI message type plus 1, or whether it is the same as the preferred processing order of the (i-1)-th SEI message type.

[0169] 3. The method according to solution 1 or 2, wherein in the SEI processing sequence SEI message, the SEI prefix indication (if present) is transmitted by signal in bits, and the SEI prefix indication for a specific SEI payloadType must be a bit string that follows the SEI payload syntax corresponding to the value of the payloadType, and the bit string contains a certain number of complete syntax elements starting from the first syntax element in the SEI payload.

[0170] 4. The method according to any one of solutions 1-3, wherein the constraint requires that the SEI prefix indication transmitted by signal in the SEI processing order SEI message of the Color Transform Information (CTI) SEI message must include at least all bits of the colour_transform_id syntax element of the CTI SEI message.

[0171] 5. The method of claim 4, wherein the SEI prefix indication transmitted via signaling in the SEI processing order SEI message of the Neural Network Post-Processing Filter Feature (NNPFC) SEI message must include at least all bits of the nnfpc_id syntax element of the NNPFC SEI message.

[0172] 6. An apparatus for processing video data, comprising a processor and a non-transitory memory having instructions thereon, wherein the instructions, when executed by the processor, cause the processor to perform the method of any one of solutions 1-5.

[0173] 7. A non-transitory computer-readable medium comprising a computer program product for use by a video codec device, the computer program product comprising computer-executable instructions stored on the non-transitory computer-readable medium, such that when executed by a processor, the computer-executable instructions cause the video codec device to perform the method of any one of solutions 1-5.

[0174] 8. A non-transitory computer-readable recording medium storing a bitstream of video generated by a method performed by a video processing apparatus, wherein the method comprises: determining, for a Supplemental Enhancement Information (SEI) processing order SEI message, a corresponding derived value equal to 0, such that a signaling avoids a preferred processing order of the 0th SEI message type; and generating a bitstream based on the determination.

[0175] 9. A method for storing a bitstream of video, comprising: determining, for a Supplemental Enhancement Information (SEI) processing order SEI message, a corresponding derived value equal to 0, such that signaling avoids a preferred processing order of the 0th SEI message type; generating a bitstream based on the determination; and storing the bitstream in a non-transitory computer-readable recording medium.

[0176] 10. The methods, apparatus or systems described in this disclosure.

[0177] In the described solution, the encoder conforms to the format rules by generating an encoded representation based on those rules. In the described solution, the decoder parses the syntax elements in the encoded representation using known information about their presence or absence, based on the format rules, to generate the decoded video.

[0178] In this disclosure, the term "video processing" can refer to video encoding, video decoding, video compression, or video decompression. For example, a video compression algorithm can be applied during the conversion from a pixel representation of a video to a corresponding bitstream representation, and vice versa. For example, the bitstream representation of the current video block can correspond to bits at co-positions or propagated at different positions in the bitstream defined by the syntax. For example, a macroblock can be encoded based on the error residual value after transformation and encoding / decoding, and also using bits from the header and other fields in the bitstream. Furthermore, during the conversion, the decoder can, based on this determination, parse the bitstream knowing whether some fields may or may not be present, as described in the solutions above. Similarly, the encoder can determine whether to include or exclude specific syntax fields and generate an encoded / decoded representation accordingly by including or excluding syntax fields from the encoded / decoded representation.

[0179] The solutions and other solutions, examples, embodiments, modules, and functional operations described in this disclosure can be implemented in digital electronic circuits, or in computer software, firmware, or hardware, including the structures disclosed in this disclosure and their structural equivalents, or in combinations of one or more of them. The disclosed embodiments and other embodiments can be implemented as one or more computer program products, i.e., one or more computer program instruction modules encoded on a computer-readable medium for execution by or control of the operation of a data processing apparatus. The computer-readable medium can be a machine-readable storage device, a machine-readable storage substrate, a storage device, a material composition affecting machine-readable propagation signals, or a combination of one or more of them. The term "data processing apparatus" includes all means, devices, and machines for processing data, including, for example, a programmable processor, a computer, or multiple processors or computers. In addition to hardware, the apparatus may also include code that creates an execution environment for the computer program in question, for example, code constituting processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them. Propagation signals are artificially generated signals, such as machine-generated electrical signals, optical signals, or electromagnetic signals, which are generated to encode information to be transmitted to a suitable receiver device.

[0180] Computer programs (also known as programs, software, software applications, scripts, or code) can be written in any programming language, including compiled or interpreted languages, and can be deployed in any form, including standalone programs or modules, components, subroutines, or other units suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple co-located files (e.g., a file storing one or more modules, subroutines, or code portions). A computer program can be deployed to execute on one computer or on multiple computers located at a single site or distributed across multiple sites and interconnected by a communications network.

[0181] The processing and logic flows described in this disclosure can be executed by one or more programmable processors that execute one or more computer programs to perform functions by manipulating input data and generating outputs. The processing and logic flows can also be executed by special-purpose logic circuitry, and the apparatus can also be implemented as special-purpose logic circuitry, such as field-programmable gate arrays (FPGAs) or application-specific integrated circuits (ASICs).

[0182] Processors suitable for executing computer programs include, for example, general-purpose and special-purpose microprocessors, and any one or more processors of any type of digital computer. Typically, a processor receives instructions and data from read-only memory or random access memory, or both. The basic components of a computer are a processor that executes instructions and one or more storage devices that store the instructions and data. Typically, a computer will also include one or more mass storage devices for storing data, such as magnetic disks, magneto-optical disks, or optical disks, or receive data from or transfer data to one or more mass storage devices via operative coupling, or both. However, a computer does not necessarily have such devices. Computer-readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media, and storage devices, including, for example, semiconductor storage devices such as EPROM, EEPROM, and flash memory devices; magnetic disks, such as internal hard disks or removable hard disks; magneto-optical disks; and CD-ROMs and DVD-ROMs. Processors and memory may be supplemented by or incorporated into special-purpose logic circuitry.

[0183] While this disclosure contains numerous details, these details should not be construed as limiting any subject matter or the scope of the claims, but rather as descriptions of features specific to particular embodiments of this disclosure. Certain features described in the context of individual embodiments in this disclosure may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented separately in multiple embodiments, or in any suitable sub-combination. Furthermore, although features may function in certain combinations as described above, and even were originally claimed in this manner, in some cases one or more features in a claimed combination may be removed from that combination, and the claimed combination may be for sub-combinations or variations thereof.

[0184] Similarly, although operations are depicted in a specific order in the accompanying drawings, this should not be construed as requiring such operations to be performed sequentially in the particular order or sequence shown, or requiring all shown operations to be performed in order to achieve the desired result. Furthermore, the partitioning of various system components in the embodiments described in this disclosure should not be construed as requiring such partitioning in all embodiments.

[0185] Only a few implementations and examples are described, and other implementations, improvements and variations may be made based on what is described and shown in this disclosure.

[0186] When there are no intermediate components other than a line, trace, or other medium between the first and second components, the first component is directly coupled to the second component. When there are intermediate components other than a line, trace, or other medium between the first and second components, the first component is indirectly coupled to the second component. The term "coupled" and its variations include direct coupling and indirect coupling. The use of the term "about" means including a range of ±10% of the following figures, unless otherwise specified.

[0187] While several embodiments have been provided in this disclosure, it should be understood that the disclosed systems and methods may be embodied in many other specific forms without departing from the spirit or scope of this disclosure. The present examples are intended to be illustrative rather than restrictive and are not intended to be limited to the details set forth herein. For example, various elements or components may be combined or integrated into another system, or certain features may be omitted or not implemented.

[0188] Furthermore, the discrete or separate embodiments, systems, subsystems, and methods described and illustrated in the various embodiments can be combined or integrated with other systems, modules, embodiments, or methods without departing from the scope of this disclosure. Other items shown or discussed as couplings can be directly connected or indirectly coupled or communicated through some interface, device, or intermediate component, whether electrical, mechanical, or otherwise. Other examples of variations, substitutions, and modifications can be determined by those skilled in the art and can be made without departing from the spirit and scope of this disclosure.

Claims

1. A method for processing media data, comprising: For Supplemental Enhancement Information (SEI) processing order SEI messages, the SEI prefix indication (if present) is determined to be transmitted via signaling in bits, wherein the SEI prefix indication for a specific SEI payloadType is a bit string that follows the SEI payload syntax corresponding to the value of that payloadType, and the bit string contains a certain number of complete syntax elements starting from the first syntax element in the SEI payload; and Based on the SEI processing order, SEI messages perform the conversion between visual media data and bitstream.

2. The method as described in claim 1, wherein, In the SEI processing order SEI message, the corresponding value of the preferred processing order of the 0th SEI message type is derived to be equal to 0. The preferred processing order of the 0th SEI message type is not transmitted by signal in the bitstream, and the conversion between the visual media data and the bitstream is performed based on the 0th SEI message type.

3. The method as described in claim 1 or 2, wherein, In the SEI processing order SEI message, when i is greater than 0, the preferred processing order of the i-th SEI message type is transmitted via signal using only 1 bit. The 1 bit is a flag indicating whether the preferred processing order of the i-th SEI message type is equal to the preferred processing order of the (i-1)-th SEI message type plus 1, or whether it is the same as the preferred processing order of the (i-1)-th SEI message type.

4. The method according to any one of claims 1-3, wherein, The constraint requires that the SEI prefix indication transmitted via signaling in the Color Transform Information (CTI) SEI message must include at least all bits of the colour_transform_id syntax element of the CTI SEI message.

5. The method of claim 4, wherein, The constraint is imposed based on the SEI processing order of the CTI SEI message, the payloadType of the SEI message, and the prefix flag.

6. The method according to any one of claims 1-5, wherein, In the Neural Network Post-Processing Filter Characteristics (NNPFC) SEI message, the SEI prefix indication transmitted via signaling must include at least all bits of the nnfpc_id syntax element of the NNPFC SEI message.

7. The method according to any one of claims 1-6, wherein, The conversion includes encoding the visual media data into the bitstream.

8. The method according to any one of claims 1-6, wherein, The conversion includes decoding the visual media data from the bitstream.

9. An apparatus for processing video data, comprising a processor and a non-transitory memory having instructions thereon, wherein, When executed by the processor, the instructions cause the processor to perform the method as described in any one of claims 1-8.

10. A non-transitory computer-readable medium comprising a computer program product for use with a video encoding / decoding device, wherein, The computer program product includes computer-executable instructions stored on the non-transitory computer-readable medium, such that when executed by a processor, the computer-executable instructions cause the video codec device to perform the method as described in any one of claims 1-8.

11. A non-transitory computer-readable recording medium storing a bitstream of video generated by a method performed by a video processing apparatus, wherein, The method includes: For Supplemental Enhancement Information (SEI) processing order SEI messages, the SEI prefix indication (if present) is determined to be transmitted via signaling in bits, wherein the SEI prefix indication for a specific SEI payloadType is a bit string that follows the SEI payload syntax corresponding to the value of that payloadType, and the bit string contains a certain number of complete syntax elements starting from the first syntax element in the SEI payload; and Based on the determination, a bit stream is generated.

12. A method for storing a video bitstream, comprising: For the Supplemental Enhancement Information (SEI) processing order SEI message, the SEI prefix indication (if present) is determined to be transmitted by signal in bits, wherein the SEI prefix indication for a specific SEI payloadType is a bit string that follows the SEI payload syntax corresponding to the value of the payloadType, and the bit string contains a certain number of complete syntax elements starting from the first syntax element in the SEI payload. Based on the determination, a bit stream is generated; and The bit stream is stored in a non-transitory computer-readable recording medium.

Images