Display panel and display device

Abstract

The invention discloses a display panel and a display device, and the display panel comprises a silicon-based backboard which comprises a plurality of drive circuits and a plurality of output ends; the output end is configured to transmit a driving signal generated by the driving circuit; the plurality of light emitting structures are positioned on the first surface of the silicon-based back plate; the light-emitting structure comprises a plurality of light-emitting sub-structures which are arranged in a stacked mode. Each sub light-emitting structure comprises a first type of conducting layer, a second type of conducting layer and a light-emitting layer located between the first type of conducting layer and the second type of conducting layer; the light-emitting structure is provided with a step structure, the step structure comprises a plurality of table tops, and any one of the table tops is composed of a part of the surface of the first type conductive layer or the second type conductive layer. The orthographic projection of the step structure on the first surface is located in the edge area of the orthographic projection of the light-emitting structure on the first surface; and one end of the connecting structure is connected with at least one table surface in the step structure.

Description

A display panel, a display device

[0001] This disclosure relates to the field of display technology, and more particularly to a display panel and a display device.

[0002] Silicon-based display panels are a type of display panel with high pixel density; the higher the pixel density, the better the display effect.

[0003] Summary of the Invention

[0004] This disclosure provides a display panel and a display device to solve the aforementioned technical problems existing in the prior art.

[0005] In a first aspect, to solve the above-mentioned technical problems, embodiments of this disclosure provide a display panel, including:

[0006] A silicon-based backplane includes multiple driving circuits and multiple output terminals; the output terminals are configured to transmit driving signals generated by the driving circuits.

[0007] Multiple light-emitting structures are located on a first surface of the silicon-based backplane; each light-emitting structure includes multiple sub-light-emitting structures stacked together; each sub-light-emitting structure includes a first type conductive layer, a second type conductive layer, and a light-emitting layer located between the first type conductive layer and the second type conductive layer; each light-emitting structure has a stepped structure, the stepped structure including multiple mesa, any one of the multiple mesa being formed by a portion of the surface of the first type conductive layer or the second type conductive layer, and the orthographic projection of the stepped structure onto the first surface is located at the edge region of the orthographic projection of the light-emitting structure onto the first surface;

[0008] A connecting structure, one end of which is connected to at least one platform in the stepped structure.

[0009] In one possible implementation, the first type of conductive layer includes a first type of semiconductor layer and a first current spreading layer, the second type of conductive layer includes a second type of semiconductor layer and a second current spreading layer, the first current spreading layer is disposed away from the light-emitting layer relative to the first type of semiconductor layer, and the second current spreading layer is disposed away from the light-emitting layer relative to the second type of semiconductor layer.

[0010] One possible implementation of the stepped structure includes:

[0011] First-step structure and second-step structure;

[0012] Each of the mesa surfaces of the first stepped structure is composed of at least one of a portion of the surface of a first type semiconductor layer of a sub-light-emitting structure and a portion of the surface of the first current-spreading layer.

[0013] Each of the mesa surfaces of the second stepped structure is formed by a portion of the surface of a second type of semiconductor layer of a sub-light-emitting structure or a portion of the surface of the second current-spreading layer.

[0014] In one possible implementation, the first stepped structure and the second stepped structure are located on opposite sides of the light-emitting structure.

[0015] In one possible implementation, the silicon-based backplane further includes a common terminal;

[0016] The connection structure includes a first connection structure and a second connection structure;

[0017] Any platform of the first stepped structure is connected to the output end through the first connecting structure;

[0018] Each platform of the second stepped structure is connected to the common end via the second connecting structure.

[0019] In one possible implementation, at least two sub-light-emitting structures within the same light-emitting structure are configured to emit light of the same color. The plurality of connecting structures further include a third connecting structure, through which two adjacent mesa surfaces of the same stepped structure are connected. The two adjacent mesa surfaces are respectively a first type of conductive layer and a second type of conductive layer in two adjacent sub-light-emitting structures.

[0020] In one possible implementation, the film layers in the at least two sub-light-emitting structures have the same order, and the third connecting structure overlaps with the two adjacent mesa respectively.

[0021] In one possible implementation, in any sub-light-emitting structure of the same light-emitting structure, the first type of conductive layer is disposed further away from the first surface than the second type of conductive layer.

[0022] In one possible implementation, in the sub-light-emitting structure furthest from the first surface within the same light-emitting structure, the first type of conductive layer is disposed further away from the first surface than the second type of conductive layer; in the remaining sub-light-emitting structures other than the sub-light-emitting structure furthest from the first surface, the first type of conductive layer is disposed closer to the first surface than the second type of conductive layer.

[0023] In one possible implementation, at least two sub-light-emitting structures within the same light-emitting structure are configured to emit light of different colors.

[0024] In one possible implementation, a first bonding layer is further provided between any two adjacent sub-light-emitting structures in the same light-emitting structure; wherein, the first bonding layer is light-transmitting.

[0025] In one possible implementation, the display panel further includes:

[0026] The second bonding layer is located between the silicon-based backplane and the light-emitting structure.

[0027] In one possible implementation, the second bonding layer is transparent and insulating;

[0028] The display panel also includes:

[0029] A reflective layer is located between the first bonding layer and the silicon-based backplane.

[0030] In a second aspect, embodiments of this disclosure provide a display device, including a display panel and a power supply circuit as described in the first aspect, wherein the power supply circuit supplies power to a silicon-based backplane in the display panel.

[0031] Figure 1 is a schematic diagram of the structure of a display panel provided in an embodiment of this disclosure;

[0032] Figure 2 is a schematic diagram of another display panel provided in an embodiment of this disclosure;

[0033] Figure 3 is a schematic diagram of another display panel provided in an embodiment of this disclosure;

[0034] Figure 4 is a schematic diagram of the structure of another display panel provided in an embodiment of this disclosure;

[0035] Figure 5 is a schematic diagram of another display panel provided in an embodiment of this disclosure;

[0036] Figures 6 and 7 are schematic diagrams of another display panel provided in an embodiment of this disclosure;

[0037] Figure 8 is a schematic diagram of the structure of a display panel provided in an embodiment of this disclosure;

[0038] Figure 9 is a schematic diagram of the structure of a display panel provided in an embodiment of this disclosure;

[0039] Figure 10 is a schematic diagram of the structure of a display panel provided in an embodiment of this disclosure;

[0040] Figure 11 is a schematic diagram of another display panel provided in an embodiment of this disclosure;

[0041] Figure 12 is a schematic diagram of another display panel provided in an embodiment of this disclosure;

[0042] Figure 13 is a schematic diagram of another display panel provided in an embodiment of this disclosure;

[0043] Figure 14 is a schematic diagram of another display panel provided in an embodiment of this disclosure;

[0044] Figure 15 is a schematic diagram of the fabrication of a display panel according to an embodiment of this disclosure;

[0045] Figures 16 and 17 are schematic diagrams of forming a first wafer substrate according to an embodiment of the present disclosure.

[0046] Reference numerals: Silicon-based backplane 1, First surface 1a, Output terminal 11, Common terminal 12, Light-emitting structure 2, Sub-light-emitting structure 21, First type conductive layer 211, First type semiconductor layer 2111, First current spreading layer 2112, Light-emitting layer 212, Second type conductive layer 213, Second type semiconductor layer 2131, Second current spreading layer 2132, Step structure 2S, First step structure 2S1, Second step structure 2S2, Mesa 2Sa, Connecting structure 3, First connecting structure 31, Vertical part 311, Horizontal part 312, Second connecting structure 32, Horizontal connecting structure 32a, First bonding layer 22, First electrode 23, Second electrode 24, Sub-light-emitting structure group 21Z, Second bonding layer 4, Third bonding layer 25, Reflective layer 5, Filling layer 6, First via H1, Third connecting structure 33, Second via H2, Fourth connecting structure 7, Fifth connecting structure 8, Third via H3, Fourth via H4; First sub-bonding layer 41, second sub-bonding layer 42, first wafer substrate 01, substrate 011, third sub-bonding layer 221, fourth sub-bonding layer 222, sub-light-emitting structure substrate 021, temporary substrate 011', fifth sub-bonding layer 223, bottom substrate 021'.

[0047] This disclosure provides a display panel and a display device.

[0048] It should be understood that the specific structural and functional details disclosed in the embodiments of this disclosure are merely representative and are intended to describe exemplary embodiments of this disclosure. However, this disclosure can be implemented in many alternative forms and should not be construed as being limited solely to the embodiments set forth herein.

[0049] In the description of this disclosure, it should be understood that the terms "center," "lateral," "upper," "lower," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this disclosure. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this disclosure, unless otherwise stated, "a plurality of" means two or more. Additionally, the term "comprising" and any variations thereof are intended to cover non-exclusive inclusion.

[0050] In the description of this disclosure, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linkage" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this disclosure based on the specific circumstances.

[0051] The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments. Unless the context clearly indicates otherwise, the singular forms “a” and “an” as used herein are also intended to include the plural. It should also be understood that the terms “comprising” and / or “including” as used herein specify the presence of the stated features, integers, steps, operations, units, and / or components, without excluding the presence or addition of one or more other features, integers, steps, operations, units, components, and / or combinations thereof.

[0052] The term "and / or" in the embodiments of this disclosure is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0053] To make the above-described objects, features, and advantages of this disclosure more apparent and understandable, the disclosure will be further described below in conjunction with the accompanying drawings and embodiments. However, the exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided to make the disclosure more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the figures denote the same or similar structures, and therefore repeated descriptions of them will be omitted. Terms describing position and direction as described in this disclosure are illustrative of the accompanying drawings, but changes may be made as needed, and all such changes are included within the scope of protection of this disclosure. The accompanying drawings of this disclosure are for illustrative purposes only and do not represent actual scale.

[0054] It should be noted that specific details are set forth in the following description to provide a full understanding of this disclosure. However, this disclosure can be implemented in many ways other than those described herein, and those skilled in the art can make similar extensions without departing from the spirit of this disclosure. Therefore, this disclosure is not limited to the specific embodiments disclosed below. The following descriptions are preferred embodiments for carrying out this disclosure; however, these descriptions are for the purpose of illustrating the general principles of this disclosure and are not intended to limit the scope of this disclosure. The scope of protection of this disclosure shall be determined by the appended claims.

[0055] The following description, in conjunction with the accompanying drawings, details a display panel and display device provided in the embodiments of this disclosure.

[0056] Please refer to Figure 1, which is a schematic diagram of the structure of a display panel provided in an embodiment of this disclosure. The display panel includes:

[0057] The silicon-based backplane 1 has multiple driving circuits (not shown) and multiple output terminals 11; the output terminals 11 are configured to transmit driving signals generated by the driving circuits.

[0058] Multiple light-emitting structures 2 are located on the first surface 1a of the silicon-based backplane 1. The light-emitting structure 2 includes multiple sub-light-emitting structures 21 stacked together. The sub-light-emitting structure 21 includes a first type conductive layer 211, a second type conductive layer 213 stacked together, and a light-emitting layer 212 located between the first type conductive layer 211 and the second type conductive layer 213. The light-emitting structure 2 has a stepped structure 2S, which includes multiple mesas. Each mesa is formed by a portion of the surface of the first type conductive layer 211 or the second type conductive layer 213. The orthographic projection of the stepped structure 2S on the first surface 1a is located at the edge region of the orthographic projection of the light-emitting structure 2 on the first surface 1a. For example, the orthographic projection of the light-emitting structure 2 on the first surface 1a is a first shape (such as a rectangle). The region where the distance between the light-emitting structure 2 and the outer contour edge of the first shape is less than or equal to a preset value is the edge region. The preset value can be determined by the product of the average width W of the mesas and the number of mesas in the stepped structure. The value of W ranges from 0.5 μm to 2 μm.

[0059] Connection structure 3 is connected at one end to a platform 2Sa in the stepped structure 2S.

[0060] In the embodiments provided in this disclosure, by stacking multiple sub-light-emitting structures 21 of the light-emitting structure 2, the area occupied by the light-emitting structure 2 can be reduced, thereby increasing the pixel density of the display panel. The light-emitting structure 2 has a stepped structure 2S, and the orthographic projection of the stepped structure 2S onto the first surface 1a is located at the edge region of the orthographic projection of the light-emitting structure 2 onto the first surface 1a. The stepped structure 2S includes multiple mesa, and any one of the multiple mesa is formed by a portion of the surface of the first type conductive layer 211 or the second type conductive layer 213 in the sub-light-emitting structure 21. At the same time, one end of the connecting structure 3 is connected to one of the mesa 2Sa in the stepped structure 2S. In this way, during the use of the display panel, the driving circuit in the silicon-based backplane 1 can use the output terminal 11 to transmit a driving signal to the sub-light-emitting structure 21 in the light-emitting structure 2 through the connecting structure 2, so that the sub-light-emitting structure 21 emits light, thereby enabling the display panel with high pixel density provided in this disclosure to work normally.

[0061] As shown in Figure 1, the first type of conductive layer 211 may include a first type of semiconductor layer 2111, such as a P-type gallium nitride layer, and the second type of conductive layer 213 may include a second type of semiconductor layer 2131, such as an N-type gallium nitride layer.

[0062] Please refer to Figure 2, which is a schematic diagram of another display panel structure provided in an embodiment of this disclosure. Alternatively, the first type conductive layer 211 may include a first type semiconductor layer 2111 and a first current spreading layer 2112, and the second type conductive layer 213 may include a second type semiconductor layer 2131 and a second current spreading layer 2132. The first current spreading layer 2112 is disposed away from the light-emitting layer 212 relative to the first type semiconductor layer 2111, and the second current spreading layer 2132 is disposed away from the light-emitting layer 212 relative to the second type semiconductor layer 2131.

[0063] The first current spreading layer 2112 and the second current spreading layer 2132 are made of transparent conductive materials, such as ITO and IZO.

[0064] In some embodiments, the thickness range of the first current spreading layer 2112 and the second current spreading layer 2132, which are made of transparent conductive material, is [missing information].

[0065] In other embodiments, the materials of the first current spreading layer 2112 and the second current spreading layer 2132 can also be metallic. Typically, the thickness of the first current spreading layer 2112 and the second current spreading layer 2132, which are made of metallic material and need to be translucent, needs to be less than [a certain thickness]. This ensures that the first current extension layer 2112 and the second current extension layer 2132 are transparent.

[0066] By configuring the first type conductive layer 211 to include a first type semiconductor layer 2111 and a first current spreading layer 2112, and the second type conductive layer 213 to include a second type semiconductor layer 2131 and a second current spreading layer 2132, and by configuring the first current spreading layer 2112 on the side of the first type semiconductor layer 2111 away from the light-emitting layer 212 and the second current spreading layer 2132 on the side of the second type semiconductor layer 2131 away from the light-emitting layer 212 in the same sub-light-emitting structure 21, the current can be spread to the entire sub-light-emitting structure 21 through the first current spreading layer 2112 and the second current spreading layer 2132 when the sub-light-emitting structure 21 emits light, thereby improving the current uniformity and making the light emitted by the sub-light-emitting structure 21 uniform.

[0067] Please refer to Figure 2. The stepped structure 2S includes a first stepped structure 2S1 and a second stepped structure 2S2. For easy distinction, the platform 2Sa of the first stepped structure 2S1 is denoted as platform 2S1a, and the platform 2Sa of the second stepped structure is denoted as platform 2S2a.

[0068] Each of the mesa 2S1a of the first step structure 2S1 is composed of at least one of a portion of the surface of the first type semiconductor layer 2111 of a sub-light-emitting structure 21 and a portion of the surface of the first current spreading layer 2112.

[0069] Each of the mesa 2S2s of the second step structure 2S2 is formed by at least one of a portion of the surface of the second type semiconductor layer 2131 of the sub-light-emitting structure 21 and a portion of the surface of the second current spreading layer 2132.

[0070] As shown in Figure 2, the mesa 2S1a in the first stepped structure 2S1 can be formed by a portion of the surface of the first current extension layer 2112 in the sub-light-emitting structure 21, and the mesa 2S2a in the second stepped structure 2S2 are all formed by a portion of the surface of the second current extension layer 2132 in the sub-light-emitting structure 21. This allows the current to be quickly extended through the first current extension layer 2112 and the second current extension layer 2132 to the first type semiconductor layer 2111, the light-emitting layer 212 and the second type semiconductor layer 2131 when the sub-light-emitting structure 21 emits light.

[0071] Please refer to Figure 3, which is a schematic diagram of another display panel structure provided in the disclosed embodiment. Alternatively, the mesa 2S1a in the first stepped structure 2S1 can be formed by a portion of the surface of the first type semiconductor layer 2111 in the sub-light-emitting structure 21, and the mesa 2S2a in the second stepped structure 2S2 can be formed by a portion of the surface of the second type semiconductor layer 2131 in the sub-light-emitting structure 21.

[0072] Please refer to Figure 4, which is a schematic diagram of another display panel structure provided in an embodiment of this disclosure. The mesa 2S1a in the first stepped structure 2S1 can be composed of a portion of the surface of the first type semiconductor layer 2111 and a portion of the surface of the first current extension layer 2112 in the sub-light-emitting structure 21, and the mesa 2S2a in the second stepped structure 2S2 can be composed of a portion of the surface of the second type semiconductor layer 2131 and a portion of the surface of the second current extension layer 2132 in the sub-light-emitting structure 21.

[0073] In the embodiments provided in this disclosure, by making the stepped structure 2S in the light-emitting structure 2 include a first stepped structure 2S1 and a second stepped structure 2S2; and by making any one of the mesa 2S1a of the first stepped structure 2S1 constituted by at least one of the partial surface of the first type semiconductor layer 2111 and the partial surface of the first current spreading layer 2112 of a sub-light-emitting structure 21; and by making any one of the mesa 2S2a of the second stepped structure 2S2 constituted by at least one of the partial surface of the second type semiconductor layer 2131 and the partial surface of the second current spreading layer 2132 of a sub-light-emitting structure 21, the first stepped structure 2S2 can be made to have a more robust and efficient structure. Each mesa 2S1a of structure 2S1 is composed of a first type of conductive layer 211, and each mesa 2S2a of the second stepped structure 2S2 is composed of a second type of conductive layer 213. This facilitates the connection between the driving circuit in the silicon-based backplane 1 and the mesa 2S1a in the first stepped structure 2S1 and the mesa 2S2a in the second stepped structure 2S2 through the connection structure 3. This establishes a driving circuit between the driving circuit and the sub-light-emitting structure 21 and provides a driving signal to the sub-light-emitting structure 21, so that one driving circuit drives one sub-light-emitting structure 21 to emit light, thereby realizing the individual driving of each sub-light-emitting structure 21 in the light-emitting structure 2.

[0074] In some embodiments, at least two sub-light-emitting structures 21 in the same light-emitting structure 2 are configured to emit light of different colors.

[0075] At least two sub-light-emitting structures 21 may emit light of the same color but at different wavelengths. For example, light-emitting structure 2 includes two sub-light-emitting structures 21, one of which emits light with wavelength λ1 and the other emits light with wavelength λ2. Since λ1 and λ2 are both within the blue light band, the two sub-light-emitting structures 21 emit blue light with different wavelengths.

[0076] At least two sub-light-emitting structures 21 emit light of different colors, that is, the emitted light belongs to different color wavelengths. For example, the light-emitting structure 21 includes three sub-light-emitting structures 21. One sub-light-emitting structure 21 emits light with a wavelength of λ3, another sub-light-emitting structure emits light with a wavelength of λ4, and the third light-emitting structure 21 emits light with a wavelength of λ5. λ3 is in the blue light band, λ4 is in the green light band, and λ5 is in the red light band. Therefore, the three sub-light-emitting structures 21 in the light-emitting structure 2 emit light of multiple colors with different wavelengths. In this way, by controlling the light-emitting structure 2, light mixing and polychromatic light can be achieved, thereby realizing the color display of the display panel.

[0077] In some other embodiments, the same light-emitting structure 2 includes three sub-light-emitting structures 21, which emit red light, green light and blue light respectively. In this case, the sub-light-emitting structure that emits red light can be set at the position farthest from the silicon-based backplate 1.

[0078] Since the red sub-light-emitting structure 21 has the lowest luminous efficiency, by placing the red sub-light-emitting structure 21 at the position farthest from the silicon-based backplane 1, the luminous area of ​​the red sub-light-emitting structure 21 can be maximized, thereby improving the luminous efficiency of the red sub-light-emitting structure 21.

[0079] In some embodiments, the first step structure 2S1 and the second step structure 2S2 can be located on different sides of the light-emitting structure 2, which can reduce the wiring difficulty of setting corresponding connection structures 3 for the first step structure 2S1 and the second step structure 2S2, and reduce the influence between connection structures 3 connecting different step structures 2S.

[0080] As shown in Figures 2-4, the first step structure 2S1 and the second step structure 2S2 can also be located on opposite sides of the light-emitting structure 2, which facilitates the uniform distribution of current density in the sub-light-emitting structure 21, thereby improving the light emission uniformity of the sub-light-emitting structure 21.

[0081] Please refer to Figures 2-4. The silicon-based backplane 1 also includes a common terminal 12; the connection structure 3 includes a first connection structure 31 and a second connection structure 32; any platform 2S1a of the first stepped structure 2S1 is connected to the output terminal 11 through the first connection structure 31; any platform 2S2a of the second stepped structure 2S2 is connected to the common terminal 12 through the second connection structure 32.

[0082] The multiple first connection structures 31 that are respectively connected to each platform 2S1a of the first step structure 2S1 are insulated from each other;

[0083] As shown in Figures 2-4, the multiple second connection structures 32 that are respectively connected to each platform 2S2a of the second stepped structure 2S1 can be interconnected to form an integral structure through a common end 12. Please refer to Figure 5, which is a schematic diagram of another display panel structure provided in this embodiment. The multiple second connection structures 32 that are respectively connected to each platform 2S2a of the second stepped structure 2S1 can also be interconnected to the same common end 12 through the same horizontal connection structure 32a. Compared with setting a common end 12 for each sub-shading structure 21, the number of common ends 12 in the silicon-based backplane 1 can be reduced, which facilitates the arrangement of the second connection structures 32.

[0084] In the embodiments provided in this disclosure, by having the connection structure 3 include a first connection structure 31 and a second connection structure 32; any platform 2S1a of the first stepped structure 2S1 is connected to the output terminal 11 through the first connection structure 31; any platform 2S2a of the second stepped structure 2S2 is connected to the common terminal 12 through the second connection structure 32, an independent driving circuit between the driving circuit in the silicon-based backplane 1 and each sub-light-emitting structure 21 in the light-emitting structure 2 can be established through the first connection structure 31 and the second connection structure 32, which facilitates the independent driving of each sub-light-emitting structure 21 in the light-emitting structure 2.

[0085] Please refer to Figure 5. The first connecting structure 31 includes a vertical part 311 and a horizontal part 312. The vertical part 311 is connected between any platform 2S1a of the first stepped structure 2S1 and the horizontal part 312. The horizontal part 312 is connected to the output end 11.

[0086] By setting the first connecting structure 31 to include a vertical part 311 and a horizontal part 312, and connecting the vertical part 311 between any platform 2S1a of the first stepped structure 2S1 and the horizontal part 312, and connecting the horizontal part 312 to the output end 11, the alignment difficulty between the first connecting structure 31 and the output end 11 can be reduced.

[0087] As shown in Figure 5, in the first direction Y, the portion of the projected area of ​​the multiple sub-light-emitting structures 21 in the light-emitting structure 2 located on the first surface 1a within the stepped structure 2S decreases in a stepped manner. This allows the platform 2Sa of the stepped structure 2S to face the first surface 1a, thereby reducing the difficulty of arranging the connecting structure 3. Referring further to Figures 1-4, a first bonding layer 22 is also provided between any two adjacent sub-light-emitting structures 21 in the same light-emitting structure 2; wherein, the first bonding layer 22 is transparent. For example, the first bonding layer 22 can be SiO2.

[0088] In some embodiments, the thickness of the first bonding layer 22 ranges from [specific value]. This facilitates the bonding of the sub-light-emitting structures 21 together during the fabrication of the light-emitting structure 2.

[0089] By setting a light-transmitting first bonding layer 22 between two adjacent sub-light-emitting structures 21 in the same light-emitting structure 2, it is not only convenient to bond the two sub-light-emitting structures 21 when manufacturing the light-emitting structure 2, but also allows the sub-light-emitting structures 21 in the light-emitting structure 2 to be controlled independently during use, and allows light to pass through the first bonding layer 22 so that the light-emitting structure 2 can emit light normally.

[0090] As shown in Figures 1-4, the display panel also includes a filling layer 6, which is an insulating material used to protect other film layers in the light-emitting structure 2 and to fill the side of the light-emitting structure 2 closest to the silicon-based backplane 1. The filling layer 6 has vias with exposed platform 2Sa, and a connection structure 3 can be formed by filling the vias with conductive material. It is understood that in some embodiments, the surface of the filling layer 6 can be on the same plane as the film layer closest to the silicon-based backplane 1 in the light-emitting structure 2; in other embodiments, the filling layer 6 covers the film layer closest to the silicon-based backplane 1 in the light-emitting structure 2, meaning that all film layers in the light-emitting structure 2 are covered by the filling layer 6.

[0091] Please refer to Figures 6 and 7 for another structural schematic diagram of a display panel provided in an embodiment of this disclosure. The display panel further includes a second bonding layer 4, located between the silicon-based backplane 1 and the light-emitting structure 2.

[0092] As shown in Figure 6, the second bonding layer 4 can be conductive. It can be a metal bonding layer or a transparent conductive layer, such as ITO or IZO. The horizontal connection structure 32a and the horizontal portion 312 can be disposed on the same layer as the second bonding layer 4. As shown in Figure 6, when the second bonding layer 4 is conductive, the first type conductive layer 211 of the sub-light-emitting structure 21 closest to the silicon backplane 1 can be electrically connected to the output terminal 11. When the second bonding layer 4 is a metal bonding layer, its thickness is greater than... In this way, the second bonding layer 4 is conductive and opaque, and can reflect light by utilizing the reflective properties of metal. This gives the second bonding layer 4 a triple function of reflection, conductivity and bonding, which helps to reduce the number of film layers in the display panel and improve the light efficiency of the display panel.

[0093] As shown in Figure 7, the second bonding layer 4 can also be insulating, such as SiO2. When the second bonding layer 4 is insulating, it has a first via H1 and a second via H2. The vertical portion 311 at least partially overlaps with the orthographic projection of the first via H1 on the first surface 1a, and the horizontal portion 312 is located within the first via H1. The second via H2 at least partially overlaps with the orthographic projection of the second connecting structure 32 on the first surface 1a, and the horizontal connecting structure 32a is located within the second via H2.

[0094] In the embodiments provided in this disclosure, by providing a second bonding layer 4 between the silicon-based backplane 1 and the light-emitting structure 2, the stability of the bonding between the silicon-based backplane 1 and the light-emitting structure 2 can be improved. Making the second bonding layer 4 conductive simplifies the electrical connection relationship and film layer between the light-emitting structure 2 and the silicon-based backplane 1; while the second bonding layer 4 is an insulating material, the first connection structure 31 can be located at the horizontal portion 312 of the first via H1 provided in the second bonding layer 4 to connect the corresponding mesa 2S1a to the input terminal 11; the second connection structure 32 can be connected to the common terminal 12 through the horizontal connection structure 32a of the second via H2 located in the second bonding layer 4, thus allowing the sub-light-emitting structure 21 to be electrically connected to the driving circuit when using the display panel.

[0095] Please refer to Figure 8, which is a schematic diagram of another display panel provided in an embodiment of this disclosure. The second bonding layer 4 is insulating and light-transmitting. The display panel also includes:

[0096] The reflective layer 5 is located between the first bonding layer 22 and the silicon-based backplane 1. The reflective layer 5 has a third via H3 and a fourth via H4. The third via H3 is interconnected with the first via H1, and the fourth via H4 is interconnected with the second via H2. The reflective layer 5 can be a distributed Bragg reflector (DBR) layer.

[0097] The fourth connection structure 7 is filled in the third via H3, and the fourth connection structure 8 is connected between the first connection structure 31 and the output terminal 11.

[0098] The fifth connecting structure 8 is filled in the fourth through hole H4 and is connected between the horizontal connecting structure 32a and the common end 12.

[0099] Please refer to Figure 9, which is a schematic diagram of another display panel structure provided in an embodiment of this disclosure. After the light-emitting structure 2 is fabricated, the filling layer 6 and the second bonding layer 4 are fabricated sequentially. Then, a via is fabricated that penetrates both the filling layer 6 and the bonding layer 4 so that the corresponding mesa 2Sa is exposed in the via. This allows the first connecting structure 31 to be directly connected to the fifth connecting structure 8 through the via penetrating the second bonding layer 4 and the filling layer 6, and the second connecting structure 32 to be directly connected to the fourth connecting structure 7 through the via penetrating the second bonding layer 4. In this way, the fabrication process can be simplified.

[0100] It is important to understand that during the fabrication of the display panel, the original first wafer substrate containing the light-emitting structure 2 and the second wafer substrate containing the silicon-based backplane 1 need to undergo a bonding process and the removal of the substrate in the first wafer substrate to form the structure shown in Figure 9. Therefore, the second bonding layer 4 is essentially divided into two sub-bonding layers of the same shape and size before bonding, and is respectively disposed on the first wafer substrate and the second wafer substrate. Thus, the vias penetrating the second bonding layer 4 and the filling layer 6 shown in Figure 9 are actually divided into two parts. One part forms a sub-via penetrating the first sub-bonding layer and the filling layer 6 after the first sub-bonding layer is formed in the fabrication of the first wafer substrate, and the other part forms a sub-via penetrating the second sub-bonding layer at the corresponding position after the second sub-bonding layer is formed in the fabrication of the second wafer substrate. The formation methods of the corresponding first connection structure 31 and second connection structure 32 are similar to the above-mentioned methods of forming vias penetrating the second bonding layer 4 and the filling layer 6. The structure of the second bonding layer 4 in Figure 7 is similar. The first via H1, the second via H2, the horizontal portion 312, and the horizontal connection structure 32a are also formed in two parts in the first wafer substrate and the second wafer substrate, respectively. This can be deduced by analogy, and will not be repeated here.

[0101] In the embodiments provided in this disclosure, the material of the second bonding layer 4 is transparent and insulating, and a reflective layer 5 with high reflectivity is disposed between the second bonding layer 4 and the silicon-based backplane 1, which can improve the light emission efficiency of the display panel.

[0102] Please refer to Figure 4, in at least two adjacent sub-light-emitting structures 21 of the same light-emitting structure 2, the first type conductive layer 211 is disposed further away from the first surface 1a than the second type conductive layer 213.

[0103] As shown in Figure 5, in the two sub-light-emitting structures 21 closest to the first surface 1a in the light-emitting structure 2, the first type conductive layer 211 is positioned further away from the first surface 1a than the second type conductive layer 213.

[0104] Please refer to Figure 10, which is a schematic diagram of another display panel structure provided in an embodiment of this disclosure. In the three sub-light-emitting structures 21 included in the same light-emitting structure 2, the first type conductive layer 211 is disposed further away from the first surface 1a than the second type conductive layer 213. This ensures that the film layer order of each sub-light-emitting structure 21 in the light-emitting structure 2 is the same, all located in the first direction Y.

[0105] Since the first type conductive layer 211 is disposed further away from the first surface 1a than the second type conductive layer 213 in any sub-light-emitting structure 2 of the same light-emitting structure 2, each sub-light-emitting structure 21 in the same light-emitting structure 2 has the same film layer order, and the film layer order of each sub-light-emitting structure 21 is: first type conductive layer 211, light-emitting layer 212, second type conductive layer 213.

[0106] Please refer to Figure 5. In the sub-light-emitting structure 21 that is furthest from the first surface 1a in the same light-emitting structure 2, the first type conductive layer 211 is disposed further away from the first surface 1a than the second type conductive layer 213. In the other sub-light-emitting structures 21 except for the sub-light-emitting structure 21 that is furthest from the first surface 1a, the first type conductive layer 211 is disposed closer to the first surface 1a than the second type conductive layer 213.

[0107] As shown in Figure 5, in the first direction Y, the film layer order in the sub-light-emitting structure 21 that is furthest from the first surface 1a in the same light-emitting structure 2 is: second type conductive layer 213, light-emitting layer 212, and first type conductive layer 211, such that the first type conductive layer 211 is disposed further away from the first surface 1a than the second type conductive layer 213; the film layer order of the other two sub-light-emitting structures 21 is: first type conductive layer 211, light-emitting layer 212, and second type conductive layer 213, such that the first type conductive layer 211 is disposed closer to the first surface 1a than the second type conductive layer 213.

[0108] In the embodiments provided in this disclosure, by having the first type conductive layer 211 of the sub-light-emitting structure 21 furthest from the first surface 1a in the same light-emitting structure 2, and the first type conductive layer 211 of the sub-light-emitting structure 21 furthest from the first surface 1a in the other sub-light-emitting structures 21, the number of bonding operations can be reduced during the fabrication of the display panel.

[0109] Please refer to Figure 11, which is a schematic diagram of another display panel provided in an embodiment of this disclosure. At least two sub-light-emitting structures 21 in the same light-emitting structure 2 are configured to emit light of the same color. The connecting structure 3 also includes a third connecting structure 33. Two adjacent platforms 2Sa of the same stepped structure 2S are connected by the third connecting structure 33. The two adjacent platforms 2Sa are respectively the first type conductive layer 211 and the second type conductive layer 213 in the two adjacent sub-light-emitting structures 21.

[0110] For example, at least two sub-light-emitting structures 21 can emit any one of blue light, red light, or green light, without any restrictions.

[0111] In at least two sub-light-emitting structures 21, the film layer order of each sub-light-emitting structure 21 is the same, as shown in Figure 11. In the first direction Y, the film layer order of each sub-light-emitting structure 21 is: a first type conductive layer 211, a light-emitting layer 212, and a second type conductive layer 213. This facilitates the series connection of two adjacent sub-light-emitting structures 21. The structures of the first type conductive layer 211 and the second type conductive layer 213 can be referred to the description in the aforementioned related embodiments, and will not be repeated here.

[0112] At least two sub-light-emitting structures 21 in the light-emitting structure 2 are connected to different types of conductive layers of two adjacent sub-light-emitting structures 21 through a third connection structure 33, so that at least two sub-light-emitting structures 21 in the light-emitting structure 2 are connected in series. This allows the output terminal 11 and the common terminal 12 of the silicon-based backplane 1 to be connected to the conductive layer closest to the silicon-based backplane 1 and the conductive layer farthest from the silicon-based backplane 1 in the light-emitting structure 2, respectively. Thus, a single driving circuit in the silicon-based backplane 1 can drive at least two sub-light-emitting structures 21 connected in series in the light-emitting structure 2, thereby improving the brightness and luminous efficiency of the light-emitting structure 2 while reducing the power consumption of the silicon-based backplane 1.

[0113] It should be noted that the second bonding layer 4 in Figure 11 is conductive.

[0114] Please refer to Figure 11. The film layers in at least two sub-light-emitting structures 21 have the same order, and the third connecting structure 33 overlaps with the two adjacent mesa 2Sa respectively.

[0115] As shown in Figure 11, the film layer order of each sub-light-emitting structure 21 in the same light-emitting structure 2 is the same, and the third connecting structure 33 can be set to be horizontally folded and overlapped on two adjacent platforms 2Sa in the same stepped structure 2S.

[0116] Please refer to Figure 12, which is a schematic diagram of another display panel provided in an embodiment of the present invention. The film layer order of the two sub-light-emitting structures 21 closest to the silicon-based backplate 1 in the same light-emitting structure 2 is the same, and the film layer order of the sub-light-emitting structure 21 farthest from the silicon-based backplate 1 is different from the film layer order of the above two sub-light-emitting structures 21. The third connecting structure 33 corresponding to the stepped structure 2S on the left side of Figure 12 is set to overlap in a U-shape on two adjacent platforms 2Sa. The third connecting structure 33 corresponding to the stepped structure 2S on the right side of Figure 12 is set to overlap in an L-shape on two adjacent platforms 2Sa.

[0117] By having the same order of film layers in at least two sub-light-emitting structures 21 within the same light-emitting structure 2, and by having the third connecting structure 33 overlap with two adjacent mesa, at least two sub-light-emitting structures 21 within the same light-emitting structure 2 can be connected in series.

[0118] Please refer to Figure 13, which is a schematic diagram of another display panel provided in an embodiment of this disclosure.

[0119] The light-emitting structure 2 also includes:

[0120] The first electrode 23 is located on the side of the plurality of sub-light-emitting structures 21 facing the silicon-based backplate 1 and is electrically connected to the output terminal 11; the first electrode 23 is reused as the second bonding layer 4 between the silicon-based backplate 1 and the light-emitting structure 2.

[0121] The second electrode 24 is located on the side of the plurality of sub-light-emitting structures 21 away from the silicon-based backplate 1, and the second electrode 24 is electrically connected to the common terminal 12 in the silicon-based backplate 1.

[0122] The first electrode 23 can be a metal electrode, so that the first electrode 23 can not only be reused as the second bonding layer 4 between the silicon-based backplate 1 and the light-emitting structure 2, but also be reused as the reflective layer of the display panel to reflect the light emitted by the light-emitting structure 2. At the same time, it can be reused as an electrode of the light-emitting structure 2 to electrically connect the output terminal 11 of the silicon-based backplate 1 to the first type conductive layer 211 of the sub-light-emitting structure 21 closest to the silicon-based backplate 1.

[0123] The second electrode 24 can be made of a conductive and transparent material, such as ITO or IZO, and the second electrode 24 can extend toward the silicon-based backplane 1 on a side different from the stepped structure 2S and be electrically connected to the common terminal 12 of the silicon-based backplane 1.

[0124] In the embodiments provided in this disclosure, by providing a first electrode 23 and a second electrode 24 on the two sides of the light-emitting structure 2 facing and away from the silicon-based backplate 1 respectively, the current can be extended to the entire light-emitting structure 2 through the first electrode 23 and the second electrode 24, thereby improving the current uniformity.

[0125] In some embodiments, when multiple sub-light-emitting structures 21 in the light-emitting structure 2 are connected in series, the light emitted by the multiple sub-light-emitting structures 21 is of the same color, which can improve the brightness of the light-emitting structure 2.

[0126] Please refer to Figure 14, which is a schematic diagram of another display panel structure provided in an embodiment of this disclosure. The light-emitting structure 2 includes:

[0127] Multiple sub-light-emitting structure groups 21Z emit light of different colors. Each sub-light-emitting structure group 21Z includes multiple sub-light-emitting structures 21 connected in series, and the multiple sub-light-emitting structures 21 connected in series emit light of the same color.

[0128] As shown in Figure 14, there are three sub-light-emitting structure groups 21Z that emit red, blue, and green light respectively. Each sub-light-emitting structure group 21Z includes two sub-light-emitting structures 21 that emit the same color light. A first bonding layer 22 is provided between two adjacent sub-light-emitting structure groups 21Z. The first bonding layer 22 is transparent and insulating. A third bonding layer 25 is provided between two adjacent sub-light-emitting structures 21 in the sub-light-emitting structure group 21Z. The third bonding layer 25 is transparent and conductive. The third bonding layer 25 can be ITO or IZO. In this way, not only can the third bonding layer 25 be used to bond two adjacent sub-light-emitting structures 21 during manufacturing, but it can also be used to connect two adjacent sub-light-emitting structures 21 in series during use.

[0129] By setting the light-emitting structure 2 to include multiple sub-light-emitting structure groups 21Z, and allowing different sub-light-emitting structure groups 21Z to emit light of different colors, each sub-light-emitting structure group 21Z includes multiple sub-light-emitting structures 21 connected in series, and the multiple sub-light-emitting structures 21 connected in series emit light of the same color, the display panel can achieve both colorization and brightness while increasing the high pixel density.

[0130] Based on the same inventive concept, please refer to Figure 15, which is a schematic diagram of the manufacturing process of a display panel according to an embodiment of this disclosure. The manufacturing method includes:

[0131] S11: Forming a first wafer substrate 01; the first wafer substrate 01 includes a substrate 011 and a plurality of light-emitting structures 2 and a connecting structure 3 located on one side of the substrate 011. The light-emitting structure 2 includes a plurality of sub-light-emitting structures 21 stacked together; the sub-light-emitting structure 21 includes a first type conductive layer 211, a second type conductive layer 213 and a light-emitting layer 212 located between the first type conductive layer 211 and the second type conductive layer 213; the light-emitting structure 2 has a stepped structure 2S, the stepped structure 2S includes a plurality of mesas, any one of the plurality of mesas is formed by a portion of the surface of the first type conductive layer 211 or the second type conductive layer 213, and the orthographic projection of the stepped structure 2S onto the first surface 1a is located in the edge region of the orthographic projection of the light-emitting structure 2 onto the first surface 1a; one end of the connecting structure 3 is connected to one of the mesas 2Sa of the stepped structure 2S.

[0132] S12: Forming a second wafer substrate 02; the second wafer substrate 02 includes a silicon-based backplane 1, the silicon-based backplane 1 has multiple driving circuits and multiple output terminals 11, the output terminals 11 are configured to transmit driving signals generated by the driving circuits.

[0133] S13: Bond the first wafer substrate 01 and the second wafer substrate 02, and remove the substrate 011 to obtain the display panel.

[0134] Please refer to Figures 16 and 17 for a schematic diagram of forming a first wafer substrate according to an embodiment of this disclosure. The formation of the first wafer substrate 01 can be achieved in the following ways:

[0135] S21: Sub-light-emitting structure substrate 021 forming multiple sub-light-emitting structures 21; Sub-light-emitting structure substrate 021 includes substrate 011 and a second type conductive layer 213, a light-emitting layer 212, a first type conductive layer 211, and a third sub-bonding layer 221 sequentially stacked on one side of substrate 011.

[0136] The sub-light-emitting structure substrate 021 is formed on one side of the substrate 011 by sequentially forming a second type conductive layer 213, a light-emitting layer 212, a first type conductive layer 211, and a third sub-bonding layer 221.

[0137] S22: Multiple sub-light-emitting structure substrates 021 are sequentially bonded to the bottom substrate 021' until all sub-light-emitting structure substrates 021 are bonded, resulting in a first original wafer substrate; wherein, each time a sub-light-emitting structure substrate 021 is bonded, the substrate 011 of the newly bonded sub-light-emitting structure substrate 021 is removed, and a fourth sub-bonding layer 222 is formed at the location where the substrate 011 is removed; the bottom substrate 021' is one of the multiple sub-light-emitting structure substrates 021, or the bottom substrate 021' includes a temporary substrate 011' and a fifth sub-bonding layer 223 located on one side of the temporary substrate 011', and the bottom substrate 021' is removed after the last bonding of the sub-light-emitting structure substrate 021; the material used for the fifth sub-bonding layer 223 can be SiO2 or a conductive material, and the third sub-bonding layer 221 bonded to the fifth sub-bonding layer 223 uses the same material as the fifth sub-bonding layer 223.

[0138] S221: A sub-light-emitting structure substrate 021 is bonded to the bottom substrate 021' through a third sub-bonding layer 221;

[0139] If one of the sub-light-emitting structure substrates 021 is used as the bottom substrate 021', then the two third sub-bonding layers 221 after bonding constitute a first bonding layer 22.

[0140] S222: Remove the substrate 011 of the sub-light-emitting structure 21 that is furthest from the bottom substrate 021';

[0141] S223: A fourth sub-bonding layer 222 is formed on one side of the substrate 011 after the substrate is removed;

[0142] S224: Bond another sub-light-emitting structure 21 to a substrate having a fourth sub-bonding layer 222;

[0143] After bonding, the third sub-bonding layer 221 and the fourth sub-bonding layer 222 constitute another first bonding layer 22.

[0144] S225: Remove the substrate 011 of the sub-light-emitting structure 21 that is furthest from the bottom substrate 021';

[0145] S226: A first subbonding layer 41 is formed on one side of the substrate 011 after the substrate is removed.

[0146] Since the film layer order of the sub-light-emitting structures 21 in the first wafer substrate 01 in Figure 16 is different, after S226 is executed, the film layers of multiple sub-light-emitting structures 21 are bonded together, and the first original wafer substrate is obtained.

[0147] S23: Etch the first original wafer substrate and form the connection structure 3 to obtain the first wafer substrate 01; or, use the first original wafer substrate as the first wafer substrate 01.

[0148] When the display panel includes the second bonding layer 4 as shown in FIG. 6, S226 needs to be executed after completing S225. Correspondingly, the second wafer substrate 02 also includes a second sub-bonding layer, located on the side of the silicon-based backplane 1 close to the first wafer substrate 01. The first wafer substrate 01 and the second wafer substrate 02 can be bonded through the first sub-bonding layer 41 and the second sub-bonding layer, which can improve the bonding stability of the first wafer substrate 01 and the second wafer substrate 02. The first sub-bonding layer 41 and the second sub-bonding layer are bonded together to form the second bonding layer 4.

[0149] Figure 16, S221-S226, shows the film layer sequence of the sub-light-emitting structure 21 farthest from the substrate 011 in the first original wafer substrate, which is a fabrication schematic diagram that is different from the film layer sequence of other sub-light-emitting structures 21.

[0150] Figure 17, S221-S228, shows a schematic diagram of the fabrication process where all sub-light-emitting structures 21 in the first wafer substrate 01 have the same film layer sequence. S221-S226 in Figure 17 are the same as S221-S226 in Figure 16, except that the bottom substrate 021' used in S21 of Figure 17 is different from that in S21 of Figure 16. The bonding process of the sub-light-emitting structure substrate 021 is the same, so S221-S226 will not be described again. Since Figure 17 includes one more bonding process than Figure 16, it also includes S227-S228, in which the first original wafer substrate is obtained.

[0151] S227: Bond the last sub-light-emitting structure substrate 021 to the substrate having the fourth sub-bonding layer 222;

[0152] S228: Remove the bottom substrate 021' and form a first sub-bonding layer 41 at the location where the bottom substrate 021' has been removed to obtain the first original wafer substrate.

[0153] When the display panel includes the second bonding layer 4 shown in Figure 6, S228 needs to be executed after completing S227.

[0154] If the light emitted by each light-emitting layer 212 in the first original wafer substrate is of the same color, the display panel in Figure 2 can be made using the first original wafer substrate. The first original wafer substrate can be used as the first wafer substrate 01. After bonding the first wafer substrate 01 and the second wafer substrate and removing the substrate 011, the film layers corresponding to the multiple sub-light-emitting structures 21 in the bonded wafer substrate are etched to form the connection structure 3, thus obtaining the display panel.

[0155] If the colors of light emitted by each light-emitting layer 212 in the first original wafer substrate are different, then the above-described S23 is performed to pattern the first original wafer substrate and form a connection structure 3 to obtain the first wafer substrate 01.

[0156] In the embodiments provided in this disclosure, a first original wafer substrate is obtained by sequentially bonding multiple sub-light-emitting structure substrates 021 to a bottom substrate 021' until all sub-light-emitting structure substrates 021 are bonded; wherein, each time a sub-light-emitting structure substrate 021 is bonded, the substrate 011 of the newly bonded sub-light-emitting structure substrate 021 is removed, and a fourth sub-bonding layer 222 is formed at the location where the substrate 011 is removed; the bottom substrate 021' is one of the multiple sub-light-emitting structure substrates 021, or the bottom substrate 021' includes a temporary substrate 011' and a fifth sub-bonding layer 223 located on one side of the temporary substrate 011', and the bottom substrate 021' is removed after the last bonding of the sub-light-emitting structure substrates 021; the first original wafer substrate is etched and a connection structure 3 is formed to obtain a first wafer substrate 01; or, the first original wafer substrate is used as the first wafer substrate 01, and a first wafer substrate 01 with the same or different order of sub-light-emitting structure 21 film layers can be formed as needed.

[0157] When the film layer of the display panel is another film layer structure as described in the aforementioned structural embodiments, it can be modified and manufactured by referring to the above manufacturing method, and will not be described in detail here.

[0158] Based on the same inventive concept, this disclosure provides a display device, including a display panel and a power supply circuit as described above, wherein the power supply circuit supplies power to a silicon-based backplane in the display panel.

[0159] The power supply circuit can be a DC-to-DC power supply circuit or an AC-to-DC power supply circuit; there are no specific restrictions.

[0160] The display device can be a liquid crystal display device, an electroluminescent display device, etc., and can be used in AR and VR display products.

[0161] Although preferred embodiments of this disclosure have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this disclosure.

[0162] Obviously, those skilled in the art can make various modifications and variations to this disclosure without departing from its spirit and scope. Therefore, if such modifications and variations fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include such modifications and variations.

Claims

A display panel, wherein, include: The silicon-based backplane includes multiple driving circuits and multiple output terminals; The output terminal is configured to transmit the drive signal generated by the drive circuit. Multiple light-emitting structures are located on a first surface of the silicon-based backplane; each light-emitting structure includes multiple sub-light-emitting structures stacked together; each sub-light-emitting structure includes a first type conductive layer, a second type conductive layer, and a light-emitting layer located between the first type conductive layer and the second type conductive layer; each light-emitting structure has a stepped structure, the stepped structure including multiple mesa, any one of the multiple mesa being formed by a portion of the surface of the first type conductive layer or the second type conductive layer, and the orthographic projection of the stepped structure onto the first surface is located at the edge region of the orthographic projection of the light-emitting structure onto the first surface; A connecting structure, one end of which is connected to at least one platform in the stepped structure. The display panel as claimed in claim 1, wherein, The first type of conductive layer includes a first type of semiconductor layer and a first current spreading layer, and the second type of conductive layer includes a second type of semiconductor layer and a second current spreading layer. The first current spreading layer is disposed away from the light-emitting layer relative to the first type of semiconductor layer, and the second current spreading layer is disposed away from the light-emitting layer relative to the second type of semiconductor layer. The display panel as claimed in claim 2, wherein, The stepped structure includes: a first stepped structure and a second stepped structure; any one of the mesa surfaces of the first stepped structure is formed by at least one of a portion of a first type semiconductor layer of a sub-light-emitting structure and a portion of a portion of the first current spreading layer; any one of the mesa surfaces of the second stepped structure is formed by a portion of a second type semiconductor layer of a sub-light-emitting structure or a portion of the second current spreading layer. The display panel as claimed in claim 3, wherein, The first stepped structure and the second stepped structure are located on opposite sides of the light-emitting structure. The display panel as claimed in claim 4, wherein, The silicon-based backplane also includes a common terminal; the connection structure includes a first connection structure and a second connection structure; any platform of the first stepped structure is connected to the output terminal through the first connection structure; any platform of the second stepped structure is connected to the common terminal through the second connection structure. The display panel as described in any one of claims 1-4, wherein, At least two sub-light-emitting structures in the same light-emitting structure are configured to emit light of the same color. The plurality of connecting structures also include a third connecting structure, through which two adjacent mesa of the same stepped structure are connected. The two adjacent mesa are respectively a first type conductive layer and a second type conductive layer in two adjacent sub-light-emitting structures. The display panel as claimed in claim 6, wherein, The film layers in the at least two sub-light-emitting structures have the same order, and the third connecting structure overlaps with the two adjacent mesa respectively. The display panel as described in any one of claims 1-7, wherein, In any sub-light-emitting structure of the same light-emitting structure, the first type of conductive layer is disposed further away from the first surface than the second type of conductive layer. The display panel as claimed in claim 8, wherein, In the sub-light-emitting structure furthest from the first surface within the same light-emitting structure, the first type of conductive layer is disposed further away from the first surface than the second type of conductive layer; in the remaining sub-light-emitting structures other than the sub-light-emitting structure furthest from the first surface, the first type of conductive layer is disposed closer to the first surface than the second type of conductive layer. The display panel as described in any one of claims 1-9, wherein, At least two sub-light-emitting structures in the same light-emitting structure are configured to emit light of different colors. The display panel as described in any one of claims 1-10, wherein, A first bonding layer is further disposed between any two adjacent sub-light-emitting structures in the same light-emitting structure; wherein, the first bonding layer is light-transmitting. The display panel as described in any one of claims 1-11, wherein, The display panel further includes a second bonding layer located between the silicon-based backplane and the light-emitting structure. The display panel as claimed in claim 12, wherein, The second bonding layer is transparent and insulating; the display panel further includes a reflective layer located between the first bonding layer and the silicon-based backplane. A display device, wherein, include: The display panel and power supply circuit as described in any one of claims 1-13, wherein the power supply circuit supplies power to the silicon-based backplane in the display panel.

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