Firmware erasing method, firmware erasing device, electronic equipment and storage medium

Abstract

The invention provides a firmware erasing method, a firmware erasing device, electronic equipment and a computer readable storage medium, and the method comprises the following steps: in response to a received erasing instruction for target logic data, obtaining a mapping item corresponding to the target logic data; judging whether a mapping item corresponding to the target logic data is in an invalid marking state or not, and if the mapping item is not marked as invalid, executing an erasing operation of the target logic data; whether complementation logic data exists in the target logic data or not is judged, a mapping item of the complementation logic data points to a first section, and the sum of the complementation logic data and an erased data volume record corresponding to the first section is equal to the data volume of the first section; and if the completion logic data exists, marking the mapping item pointing to the first section as invalid. According to the embodiment of the invention, unnecessary time consumption of an erasing process can be reduced, and the overall operation efficiency and the user experience are effectively improved.

Description

Technical Field

[0001] This application relates to, but is not limited to, the field of storage technology, and particularly to a firmware erasure method, firmware erasure device, electronic device, and computer-readable storage medium. Background Technology

[0002] NAND flash memory maintains the mapping between logical addresses and physical addresses through a mapping table, thereby locating the actual storage location of data in the flash memory. The mapping table contains multiple entries, each corresponding to a logical data section. When the embedded multimedia controller (eMMC) receives an erase command for logical data smaller than one section, it directly erases the logical data without updating the corresponding mapping entry. This raises a problem: if a subsequent erase command for the same batch of logical data is received, the firmware, unable to recognize that it has already been erased through the mapping table, will perform a duplicate erase operation, resulting in unnecessary time consumption. Summary of the Invention

[0003] This application provides a firmware erasure method, firmware erasure device, electronic device, and computer-readable storage medium, which aim to reduce unnecessary erasure process time and effectively improve user experience.

[0004] In a first aspect, embodiments of this application provide a firmware erasure method, comprising the following steps: In response to receiving an erase command for target logical data, obtain the mapping item corresponding to the target logical data; Determine whether the mapping item corresponding to the target logical data is in an invalidation state. If it is not marked as invalid, then perform the erase operation on the target logical data. Determine whether the target logical data has complete logical data. The mapping item of the complete logical data points to the first section, and the sum of the complete logical data and the erased data records corresponding to the first section is equal to the data volume of the first section. If the completion logic data exists, the mapping item pointing to the first section will be marked as invalid.

[0005] The embodiments of this application include at least the following beneficial effects: In this embodiment, after receiving an erase command for the target logical data, the firmware first obtains the mapping item corresponding to the target logical data, then determines whether the mapping item is in an invalidation state. Only when it is not marked as invalid is the erase operation of the target logical data executed. Subsequently, it further determines whether there is any supplementary logical data for the target logical data. The mapping item for the supplementary logical data points to the first section, and the sum of the amount of erased data corresponding to the supplementary logical data and the first section equals the amount of data in the first section. If the supplementary logical data exists, all mapping items pointing to the first section are marked as invalid. This embodiment accumulates the amount of erased data in a single section, and only when the accumulated value reaches the capacity of the section are all mapping items corresponding to the involved logical data marked as invalid at once. Using this method, when the system subsequently receives an erase command for the same batch of logical data, it can directly identify that the data has been erased through the invalidation state of the mapping item, thereby avoiding repeated erase operations, significantly reducing unnecessary erase process time, and effectively improving overall operation efficiency and user experience.

[0006] In one possible implementation, determining whether the target logical data contains completion logical data includes: Obtain the first logical data in the target logical data that the mapping item points to the first section; If the first data volume corresponding to the first logical data is less than the data volume of the first section, then the first data volume is added to the second data volume to obtain the third data volume, where the second data volume represents the erased data volume record corresponding to the first section; If the third data volume is equal to the data volume of the first section, then the first logical data is used as the completion logical data.

[0007] In one possible implementation, if the third data volume is equal to the data volume of the first section, then the erased data volume record corresponding to the first section is updated to the third data volume.

[0008] In one possible implementation, if the first data volume corresponding to the first logical data is equal to the data volume of the first section, then the first logical data is used as the completion logical data.

[0009] In one possible implementation, the method further includes: obtaining the section pointed to by the mapping item corresponding to the remaining logical data, and updating the erased data volume record corresponding to the section, wherein the remaining logical data represents the part remaining after removing the supplementary logical data from the target logical data.

[0010] In one possible implementation, the mapping item corresponding to the target logical data is stored in a first-level mapping table, and the method further includes: If all mapping entries in the first-level mapping table are marked as invalid, the corresponding mapping entries in the first-level mapping table will be marked as invalid in the second-level mapping table. If all mapping entries in the second-level mapping table are marked as invalid, the corresponding mapping entries in the second-level mapping table will be marked as invalid in the third-level mapping table.

[0011] In one possible implementation, the method further includes: Write updated third-level mapping tables, updated second-level mapping tables, and updated first-level mapping tables to the flash memory; If the mapping entry corresponding to the first-level mapping table in the second-level mapping table is marked as invalid, then the writing to the first-level mapping table is skipped. If the mapping entry corresponding to the second-level mapping table in the third-level mapping table is marked as invalid, then the writing to the second-level mapping table is skipped.

[0012] Secondly, embodiments of this application also provide a firmware erasure device, the device comprising: The acquisition module is used to acquire the mapping item corresponding to the target logical data in response to receiving an erase command for the target logical data; The first processing module is used to determine whether the mapping item corresponding to the target logical data is in an invalid marking state. If it is not marked as invalid, the erase operation of the target logical data is performed. The first judgment module is used to determine whether the target logical data has complete logical data, wherein the mapping item of the complete logical data points to the first section, and the sum of the complete logical data and the erased data records corresponding to the first section is equal to the data volume of the first section; The second processing module is used to mark the mapping item pointing to the first section as invalid if the completion logic data exists.

[0013] Thirdly, embodiments of this application also provide an electronic device, including: at least one processor; at least one memory for storing at least one program; at least one program is executed by at least one processor to perform the firmware erasure method described in the first aspect above.

[0014] Fourthly, embodiments of this application also provide a computer-readable storage medium storing computer-executable instructions for performing the firmware erasure method described in the first aspect.

[0015] For a description of the beneficial effects of any of the second to fourth aspects, please refer to the description of the beneficial effects of the first aspect, which will not be repeated here.

[0016] It should be understood that the above general description and the following detailed description are merely exemplary and do not limit this application. Attached Figure Description

[0017] Figure 1a This is a schematic diagram of a section; Figure 1b An example diagram illustrating the erasure of multiple logical data entries within the same section under the existing mechanism. Figure 1c An example diagram illustrating the erasure of logical data within multiple sections under the existing mechanism; Figure 2 A schematic flowchart of a firmware erasure method provided in this application embodiment is shown below; Figure 3 A flowchart illustrating a firmware erasure method provided in this application embodiment. Figure 2 ; Figure 4 An example diagram illustrating logical data erasure provided in this application embodiment; Figure 5 A schematic diagram of a process for updating a mapping table provided in an embodiment of this application; Figure 6 This is a schematic diagram of an electronic device provided in an embodiment of this application. Detailed Implementation

[0018] To make the objectives, technical methods, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0019] It should be noted that although the flowchart shows a logical order, in some cases, the steps shown or described may be performed in a different order than that shown in the flowchart. In the description of the specification, claims, and the foregoing drawings, "at least one" means one or more; "more than" means two or more; "greater than," "less than," and "exceeding" are understood to exclude the stated number; "above," "below," and "within" are understood to include the stated number. The use of terms such as "first," "second," etc., is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly specifying the number of indicated technical features, or implicitly indicating the order of the indicated technical features.

[0020] In this embodiment, "and / or" describes the relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent the existence of A alone, the simultaneous existence of A and B, or the existence of B alone. A and B can be singular or plural. The character " / " generally indicates that the preceding and following associated objects are in an "or" relationship. "At least one of the following" and similar expressions refer to any combination of these items, including any combination of singular or plural items. For example, at least one of a, b, and c can represent: the existence of a alone, the existence of b alone, the existence of c alone, the simultaneous existence of a and b, the simultaneous existence of a and c, the simultaneous existence of b and c, or the simultaneous existence of a, b, and c, where a, b, and c can be single or multiple.

[0021] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0022] To better understand and explain the solutions of the embodiments of this application, some nouns and terms involved in the embodiments of this application will be explained below.

[0023] (1) NAND flash memory is a non-volatile storage technology, which means that it can retain data even when the power is off. The core of the storage chips in SSDs (solid-state drives), USB flash drives, SD cards and smartphones is NAND flash memory.

[0024] The core physical structure of NAND flash memory includes: Cell: The most basic unit of storage, which represents data (0 / 1) by the presence (or quantity) of electrons in a "floating grid".

[0025] Page: Multiple units make up a page. A page is the smallest unit for "read" and "write" operations in NAND flash memory. Typical page sizes are 4KB, 8KB, 16KB, etc.

[0026] Block: A block consists of multiple pages. A block is the smallest unit for "erasing" NAND flash memory. A block typically consists of 128 or 256 pages.

[0027] NAND has a physical characteristic of "cannot be overwritten," meaning that a page that has already been written with data cannot be directly rewritten with new data before the block it belongs to is erased. The entire block must be erased first before it can be written again.

[0028] The address mapping table is the "intelligent address navigation system" inside NAND flash memory. NAND flash memory maintains the mapping table to correspondence between logical addresses and physical addresses, thereby locating the actual storage location of data within the flash memory. Because flash memory cannot physically overwrite, when existing data needs to be updated, the controller does not directly modify the old data, but instead writes the new data to a completely new empty location. At this time, the address table, this "address book," is immediately updated, binding the logical address given by the system to this new physical address and marking the physical address where the old data was located as invalid. This process is completely transparent to the operating system, making it perceive it as a direct overwrite. It is through this dynamic redirection mechanism that the address mapping table cleverly masks the physical defects of NAND flash memory and, on this basis, implements advanced management functions such as wear leveling.

[0029] The mapping table contains multiple mapping entries, each corresponding to a logical data section. See also... Figure 1a This is a schematic diagram of a section, as shown below. Figure 1a As shown, a section consists of multiple blocks, and each mapping entry in the mapping table points to the logical data area corresponding to a section. Current NAND flash memory faces an efficiency bottleneck due to repeated erasures when processing frequent, fragmented logical data erasure operations within the same section. The root cause is that the existing mechanism, when executing an erase command with less data than a section, only clears the logical data but does not simultaneously mark its corresponding entry in the mapping table as invalid. This "only erase data, do not update the mapping" approach causes the mapping table to fail to accurately reflect the actual physical state of the logical data. When the device receives another erase command for this batch of erased data, the firmware, after querying the mapping table, will still mistakenly consider the data valid, thus triggering and executing a repeated erase process. This not only increases operational latency but also reduces the overall performance and response speed of the storage system.

[0030] Please see Figure 1bThis is an example diagram illustrating the erasure of multiple logical data entries within the same section under existing mechanisms. Figure 1b In the example, three blocks in the section are erased. Since the amount of logical data to be erased is small, less than a section, only the corresponding logical data is erased directly.

[0031] Please see Figure 1c This is an example diagram illustrating the erasure of logical data across multiple sections using existing mechanisms. Figure 1c In the example, the amount of logical data to be erased exceeds one section. In the first and third sections, the amount of logical data to be erased is less than one section, so only the corresponding logical data is erased directly. In the second section, the amount of logical data to be erased reaches one section, so the mapping item corresponding to the logical data in that section is set to invalid, and the updated mapping item in the cache is written to the flash memory, thereby completing the logical data erasure operation.

[0032] The embodiments of this application aim to solve the problem in the prior art that when erasing logical data that is less than one section, only the data is deleted and the corresponding mapping item is not marked as invalid, which leads to repeated erasure operations and increased unnecessary time consumption. To this end, a firmware erasure method, device, electronic device and computer-readable storage medium are provided to reduce unnecessary time consumption in the erasure process and thus improve the user experience.

[0033] The core technical idea of ​​this application embodiment is as follows: After responding to the erase command for the target logical data, first check whether its corresponding mapping item is in a valid state; if it is in a valid state, determine whether the mapping item corresponding to the target logical data is in an invalid mark state; if it is not marked as invalid, then perform the erase operation of the target logical data; determine whether the target logical data has complete logical data, the mapping item of the complete logical data points to the first section, and the sum of the erased data records corresponding to the complete logical data and the first section is equal to the data volume of the first section; if there is complete logical data, mark the mapping item pointing to the first section as invalid. In this way, by accumulating the erased data volume of a single section, it can be ensured that the invalidation mark of the corresponding mapping item is completed uniformly only when the accumulated value reaches the capacity of the section. If it is necessary to erase the processed logical data again in the future, its erased status can be directly confirmed through the mapping item, avoiding repeated operations.

[0034] The following describes a firmware erasure method provided by an embodiment of this application.

[0035] Please see Figure 2This is a schematic flowchart illustrating a firmware erasure method provided in this application. The method can be executed by any electronic device, such as a terminal; as an optional implementation, the method can be executed by a terminal in a firmware erasure system. For ease of description, the following descriptions of some optional embodiments will use a terminal as the execution subject of the method. Figure 2 As shown, the firmware erasure method provided in this embodiment includes the following steps: S101. In response to receiving an erase command for the target logical data, obtain the mapping item corresponding to the target logical data.

[0036] Specifically, when the terminal receives an erase command, it first queries the mapping table to locate the mapping item corresponding to the target logical data, thereby providing a basis for subsequent judgment and operation.

[0037] S102. Determine whether the mapping item corresponding to the target logical data is in an invalidation state. If it is not marked as invalid, then perform the erase operation of the target logical data.

[0038] In this step, the system checks whether the mapping item corresponding to the target logical data has been marked as invalid. If it is invalid, it indicates that the data has been previously erased, and the process can end directly to avoid repeated operations. Execution continues only when the mapping item is valid, and the erasure operation of the target logical data is performed.

[0039] S103. Determine whether the target logical data has complete logical data. The mapping item of the complete logical data points to the first section, and the sum of the number of erased data records corresponding to the complete logical data and the first section is equal to the number of data in the first section.

[0040] Specifically, the completion logic data is part or all of the data in the target logic data. The mapping item of the completion logic data points to the first section, and the sum of the data volume of the completion logic data itself and the erased data volume records of the first section is exactly equal to the fixed data volume of the first section.

[0041] S104. If there is complete logic data, mark the mapping item pointing to the first section as invalid.

[0042] When S103 determines that there is matching completion logic data, S104 will perform a targeted mapping item marking operation. At this time, the system does not only process the mapping items of the completion logic data, but also marks all mapping items whose mapping targets point to the first section as invalid. These mapping items include those corresponding to the completion logic data, as well as those corresponding to other logic data related to the first section that have been processed previously. Marking these mapping items as invalid is equivalent to sending a clear signal to the system that "all associated data in the first section has been completely erased". When the system receives erase instructions for this data in the future, it does not need to repeat the data volume verification or erase operation. It can directly determine that the data has been processed by the invalid status of the mapping items. At the same time, this "one-time determination and unified marking" method avoids multiple individual modifications to the mapping items associated with the same section, reduces the frequency of system operations on the storage mapping table, and further aligns with the technical goal of improving the overall storage operation efficiency.

[0043] In this embodiment, after receiving an erase command for the target logical data, the firmware first obtains the mapping item corresponding to the target logical data, then determines whether the mapping item is in an invalidation state. Only when it is not marked as invalid is the erase operation of the target logical data executed. Subsequently, it further determines whether there is any supplementary logical data for the target logical data. The mapping item for the supplementary logical data points to the first section, and the sum of the amount of erased data corresponding to the supplementary logical data and the first section equals the amount of data in the first section. If the supplementary logical data exists, all mapping items pointing to the first section are marked as invalid. This embodiment accumulates the amount of erased data in a single section, and only when the accumulated value reaches the capacity of the section are all mapping items corresponding to the involved logical data marked as invalid at once. Using this method, when the system subsequently receives an erase command for the same batch of logical data, it can directly identify that the data has been erased through the invalidation state of the mapping item, thereby avoiding repeated erase operations, significantly reducing unnecessary erase process time, and effectively improving overall operation efficiency and user experience.

[0044] In one possible embodiment of this application, after determining whether the mapping item corresponding to the target logical data is in an invalid marking state, the following steps are also performed: if the marking is invalid, skip the erasure operation of the target logical data.

[0045] In other words, if the mapping item corresponding to the target logical data is in an invalid flag state, it means that the logical data has been erased, and the erasure operation of the logical data can be skipped directly.

[0046] Please see Figure 3 This is a flowchart illustrating a firmware erasure method provided in an embodiment of this application. Figure 2 This method can be executed by any electronic device, such as a terminal; as an optional implementation, the method can be executed by a terminal in a firmware erasure system. For ease of description, the following descriptions of some optional embodiments will use a terminal as the subject of the method execution. Figure 3 As shown, the firmware erasure method provided in this embodiment includes the following steps: S201, Receive an erase command for the target logical data; S202. Determine whether the mapping item corresponding to the target logical data is invalid; if yes, end the process directly; if no, execute S203. S203. Determine whether the target logical data contains a portion that is less than one section; if not, execute S204 and end the process; if yes, execute S205. S204. Mark the mapping item corresponding to the target logical data as invalid; S205. Determine whether the portion that is less than a section can be combined with the recorded erased data to form a section; if yes, proceed to S206; if no, proceed to S207. S206. Mark all mapping items corresponding to the data in the section as invalid; S207. Directly erase logical data that is not combined into a section; S208, Record the logical data that was directly erased, and the process ends.

[0047] Upon receiving an erase command, this embodiment first checks the status of the mapping entries to avoid duplicate operations on already erased data. For data less than a section, its mapping entries are not immediately updated; instead, physical erasure is performed and recorded. Once the accumulated data reaches a section, the relevant mapping entries are batch-invalidated. This method fundamentally solves the defect of existing mechanisms that "only erase data, do not update mappings," ensuring that the mapping table accurately reflects the actual physical state of the logical data. When the device receives an erase command for the same data again, the firmware can quickly identify its invalid state through the mapping table and directly terminate the process without performing duplicate erasure. This completely eliminates the operational delay caused by redundant erasure, significantly improves the response efficiency of the storage system to duplicate erase commands, and thus optimizes overall performance.

[0048] For example, determining whether the target logical data has supplementary logical data includes: Obtain the first logical data in the target logical data that the mapping item points to in the first section; If the first data volume corresponding to the first logical data is less than the data volume of the first section, then the first data volume is added to the second data volume to obtain the third data volume. The second data volume represents the number of erased data records corresponding to the first section. If the amount of data in the third section is equal to the amount of data in the first section, then the first logical data will be used as the supplementary logical data.

[0049] Specifically, firstly, the first logical data in the target logical data, where the mapping item points to the first section, is obtained; then, the data volume of the first logical data is compared with the data volume of the first section. If the former is smaller, it is added to the erased data volume (second data volume) corresponding to the first section to obtain the third data volume; finally, it is determined whether the third data volume is equal to the data volume of the first section. If they are equal, then the first logical data is the completion logical data.

[0050] For example, if the third data volume is equal to the data volume of the first section, then the erased data volume record corresponding to the first section is updated to the third data volume.

[0051] Specifically, when the calculated third data volume is equal to the data volume of the first section itself, an update operation is performed to update the value of the erased data volume record corresponding to the first section to the current third data volume.

[0052] For example, if the first data volume corresponding to the first logical data is equal to the data volume of the first section, then the first logical data is used as the supplementary logical data.

[0053] Specifically: when the mapping item in the target logical data points to the first logical data of the first section, and the corresponding data volume (first data volume) is exactly equal to the data volume of the first section itself, the first logical data can be identified as the complete logical data.

[0054] For example, the embodiments of this application further include: obtaining the section pointed to by the mapping item corresponding to the remaining logical data, and updating the erased data volume record corresponding to the section, wherein the remaining logical data represents the part remaining after removing the supplementary logical data from the target logical data.

[0055] For example, the complete process of logical data judgment and updating the amount of erased data in the embodiments of this application. Preliminary assessment indicates the need to complete the logical data: Scenario 1: Obtain the first logical data in the first section pointed to by the mapping item in the target logical data. If the first data volume of the first logical data is equal to the data volume of the first section, directly use the first logical data as the complete logical data.

[0056] Scenario 2: Obtain the first logical data in the target logical data that the mapping item points to in the first section. If the first data volume is less than the data volume of the first section, add the first data volume to the erased data volume record (second data volume) corresponding to the first section to obtain the third data volume. If the third data volume is equal to the data volume of the first section, use the first logical data as the completion logical data and update the erased data volume record corresponding to the first section to the third data volume.

[0057] Processing remaining logical data: After determining the complete logical data, extract the remaining logical data after removing the complete logical data from the target logical data; obtain the section pointed to by the remaining logical data mapping item, and update the erased data volume records corresponding to these sections.

[0058] This embodiment provides a segmented processing mechanism for scenarios where the target logical data itself exceeds the capacity of a section. By splitting the excess data into a portion that "exactly fills a section" and the remaining portion, the system can immediately perform mapping item invalidation operations on the complete section unit without waiting for accumulation to complete. This approach effectively utilizes the portion of the current data that can directly constitute a complete section, releasing its mapping resources in a timely manner, while accurately recording the remaining data volume, providing a basis for the continuous accumulation of subsequent erasure operations.

[0059] Please refer to Figure 4, which is an example diagram of logical data erasure provided in an embodiment of this application. The specific erasure process is as follows: Pre1 stage: Three blocks in section1 need to be erased. Since the amount of data does not reach the capacity of a complete section, the erasure operation of these three blocks is performed first, and the status of the scattered erased data is recorded. Pre2 phase: Five blocks in section 1 and six blocks in section 2 need to be erased. The five blocks in section 1, together with the three blocks recorded in pre1 phase, can form a complete section; therefore, the mapping entries corresponding to these eight erased blocks in section 1 are directly marked as invalid. The six blocks in section 2, since they do not reach the capacity of a section, have their status recorded synchronously after the erase operation. The `cur` phase requires erasing two blocks from section 2 and eight blocks from section 3. The two blocks from section 2, together with the six blocks recorded in the `pre2` phase, form a complete section; therefore, the mapping entries corresponding to these eight erased blocks in section 2 are marked as invalid. The eight blocks from section 3 just reach the capacity of a section, so their corresponding mapping entries are directly marked as invalid.

[0060] In one possible embodiment of this application, the mapping entries corresponding to the target logical data are stored in a first-level mapping table, and the following steps are also performed: if all mapping entries in the first-level mapping table are marked as invalid, the mapping entries corresponding to the first-level mapping table are marked as invalid in the second-level mapping table; if all mapping entries in the second-level mapping table are marked as invalid, the mapping entries corresponding to the second-level mapping table are marked as invalid in the third-level mapping table.

[0061] By establishing a multi-level cascading invalidation mechanism for mapping entries, efficient reclamation and management of storage resources are achieved. When all data under the jurisdiction of a certain level mapping table becomes invalid, by directly marking its corresponding entry in the previous level mapping as invalid, the system can quickly identify the entire invalid data branch in subsequent operations, thereby avoiding access to or processing any underlying mapping tables under that branch. This not only reduces unnecessary mapping table lookups and loading overhead, significantly improving the execution efficiency of operations such as erasure and garbage collection, but also helps reduce the storage footprint of the invalid mapping tables themselves, optimizing the overall storage space utilization.

[0062] In one possible embodiment of this application, the following steps are also performed: writing an updated third-level mapping table, an updated second-level mapping table, and an updated first-level mapping table to the flash memory; if the mapping entry corresponding to the first-level mapping table in the second-level mapping table is marked as invalid, then skipping the writing of the first-level mapping table; if the mapping entry corresponding to the second-level mapping table in the third-level mapping table is marked as invalid, then skipping the writing of the second-level mapping table.

[0063] The aforementioned mapping table write mechanism effectively avoids unnecessary write operations to completely invalid mapping tables through conditional checks. When a higher-level mapping entry (such as a second- or third-level entry) has marked its lower-level mapping table as invalid, the system will directly skip writing to that invalid mapping table during persistent updates. This not only significantly reduces the amount of data actually written to flash memory, thereby reducing write amplification, improving write speed, and reducing NAND flash wear, but also saves storage space occupied by the mapping table itself. This mechanism works in conjunction with the cascading invalidation mechanism to further optimize the overall performance and lifespan of the storage system from the mapping table update stage.

[0064] Understandably, to avoid efficiency losses caused by repeated erasures during the erase operation, the system employs a top-down invalidity check mechanism. The specific process is as follows: When a data erase command for a logical region is received, the firmware does not immediately perform the underlying physical erase, but first queries the three-level mapping entry pointing to that region.

[0065] If the check finds that the corresponding third-level mapping item has been marked as invalid, it indicates that the entire large data area under its jurisdiction (including all subordinate second-level mapping tables and their corresponding first-level mapping tables and data blocks) has been completely erased and contains no valid data. Based on this, the system can immediately determine that the erase command is a redundant operation and directly terminate the process, thereby completely avoiding all access to the lower-level mapping tables and physical blocks, achieving "early termination" of the erase operation.

[0066] If the third-level mapping item is valid, the process continues, and the system will check its subordinate second-level mapping tables and first-level mapping tables in sequence. If any level of mapping table is found to have all invalid mapping items, further operations on that branch can be terminated at the corresponding level.

[0067] In summary, the inspection mechanism in this application, which starts with a three-level mapping item, can identify invalid regions at the earliest possible time. By utilizing the invalid information recorded in the mapping table, the system effectively avoids unnecessary and repetitive low-level accesses and erasure operations, significantly reducing operation time and improving storage efficiency.

[0068] Please see Figure 5 Figure 5 illustrates a flowchart of updating a mapping table according to an embodiment of this application. As shown in Figure 5, the process of updating the mapping table may include the following steps: S301. Determine whether all mapping entries in the first-level mapping table are invalid mapping entries. If not, proceed to step S302; if yes, proceed to step S303. S302, Write the first-level mapping table to the flash memory; S303. Mark the second-level mapping entries that point to this first-level mapping table as invalid; S304. Determine whether the first-level mapping table in the cache has been completely updated. If yes, proceed to step S305; otherwise, obtain the next first-level mapping table and return to execute S301. S305. Determine whether all mapping entries in the secondary mapping table are invalid. If not, proceed to step S306; if yes, proceed to step S307. S306. Write the secondary mapping table to the flash memory; S307. Mark the third-level mapping entry that points to the second-level mapping table as invalid; S308. Determine whether all the secondary mapping tables in the cache have been updated. If yes, end the process; otherwise, obtain the next secondary mapping table and return to execute S305.

[0069] This application effectively optimizes the write efficiency and storage space utilization of NAND flash memory. Specifically, when updating the mapping table, the system determines the process level by level: if all mapping entries in a certain level mapping table (such as the first-level mapping table) are invalid, the write operation of that mapping table itself is skipped, and instead, the mapping entries pointing to it in its parent level mapping table (such as the second-level mapping table) are marked as invalid. This logic is executed level by level upwards until the highest level. By avoiding writing a completely invalid mapping table to the flash memory, unnecessary write data is directly reduced. This not only improves the write speed but also reduces wear and tear on the NAND flash memory cells, helping to extend the device's lifespan.

[0070] In subsequent erase operations, when an erase command for a specific logical region is received, the firmware can directly begin checking from the highest-level mapping entry (such as a third-level mapping entry). If this highest-level mapping entry is marked as invalid, it can immediately determine that its corresponding next-level mapping table and all associated lower-level mapping tables and data are invalid. Therefore, it eliminates the need to access lower-level mapping tables level by level, thus terminating the erase process early. This "early termination" mechanism effectively avoids operational delays caused by redundant mapping table queries and invalid data erasure, enabling the system to respond to host commands more quickly, thereby improving the overall response speed and real-time performance of the storage system.

[0071] This application also provides a firmware erasure device, which includes: The acquisition module is used to acquire the mapping item corresponding to the target logical data in response to receiving an erase command for the target logical data; The first processing module is used to determine whether the mapping item corresponding to the target logical data is in an invalid marking state. If it is not marked as invalid, the erase operation of the target logical data is performed. The first judgment module is used to determine whether the target logical data has complete logical data. The mapping item of the complete logical data points to the first section, and the sum of the number of erased data records corresponding to the complete logical data and the first section is equal to the number of data in the first section. The second processing module is used to mark the mapping item pointing to the first section as invalid if there is complete logic data.

[0072] It should be noted that the firmware erasure device provided in this application embodiment is intended to implement the firmware erasure method described in the foregoing embodiments of this application. Therefore, the specific implementation method and beneficial effects of this device can be referred to the relevant description of the firmware erasure method above, and will not be repeated here.

[0073] Please see Figure 6 This application also provides an electronic device, the electronic device 1100 including: At least one processor 1101; At least one memory 1102 is used to store at least one program; At least one program is executed by at least one processor 1101 to implement the firmware erasure method of any of the foregoing embodiments.

[0074] This application also provides a computer program product, including a computer program or computer instructions, which are stored in a computer-readable storage medium. The processor of the electronic device reads the computer program or computer instructions from the computer-readable storage medium and executes the computer program or computer instructions, causing the electronic device to perform the firmware erasure method of any of the foregoing embodiments.

[0075] This application also provides a computer-readable storage medium storing computer-executable instructions for performing the firmware erasure method of any of the foregoing embodiments.

[0076] It should be understood that in the embodiments of this application, the processor can be a central processing unit (CPU), but it can also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor.

[0077] In addition, the processor may include one or more of the following: a central processing unit (CPU), a baseband processor, a digital signal processor (DSP), a microprocessor unit (MPU), a microcontroller unit (MCU), a graphics processing unit (GPU), a field programmable gate array (FPGA), an artificial intelligence processor (AI processor), or a neural processing unit (NPU).

[0078] It should also be understood that the memory in the embodiments of this application can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of random access memory (RAM) are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced synchronous SDRAM (ESDRAM), synchronous linked DRAM (SLDRAM), and direct rambus RAM (DR RAM). It should be noted that the memory used in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0079] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, as a computer program product. A computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more sets of available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium. A semiconductor medium can be a solid-state drive.

[0080] It should be understood that in the various embodiments of this application, the order of the above-mentioned processes does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0081] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0082] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0083] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs. Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. If the above functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory, random access memory, magnetic disks, or optical disks.

[0084] Finally, it should be noted that the above embodiments are merely specific implementations of this application, used to illustrate the technical solutions of this application, and not to limit them. The protection scope of this application is not limited thereto. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments within the scope of the technology disclosed in this application, or make equivalent substitutions for some of the technical features. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be covered within the protection scope of this application.

Claims

1. A firmware erasure method, characterized in that, The method includes the following steps: In response to receiving an erase command for target logical data, obtain the mapping item corresponding to the target logical data; Determine whether the mapping item corresponding to the target logical data is in an invalidation state. If it is not marked as invalid, then perform the erase operation on the target logical data. Determine whether the target logical data has complete logical data. The mapping item of the complete logical data points to the first section, and the sum of the complete logical data and the erased data records corresponding to the first section is equal to the data volume of the first section. If the completion logic data exists, the mapping item pointing to the first section will be marked as invalid.

2. The firmware erasure method according to claim 1, characterized in that, The step of determining whether the target logical data has complete logical data includes: Obtain the first logical data in the target logical data that the mapping item points to the first section; If the first data volume corresponding to the first logical data is less than the data volume of the first section, then the first data volume is added to the second data volume to obtain the third data volume, where the second data volume represents the erased data volume record corresponding to the first section; If the third data volume is equal to the data volume of the first section, then the first logical data is used as the completion logical data.

3. The firmware erasure method according to claim 2, characterized in that, If the third data volume is equal to the data volume of the first section, then the erased data volume record corresponding to the first section is updated to the third data volume.

4. The firmware erasure method according to claim 2, characterized in that, If the first data volume corresponding to the first logical data is equal to the data volume of the first section, then the first logical data is used as the completion logical data.

5. The method according to claim 1, characterized in that, The method further includes: Obtain the section pointed to by the mapping item corresponding to the remaining logical data, and update the erased data volume record corresponding to the section, wherein the remaining logical data represents the part remaining after removing the supplementary logical data from the target logical data.

6. The firmware erasure method according to claim 1, characterized in that, The mapping items corresponding to the target logical data are stored in a first-level mapping table, and the method further includes: If all mapping entries in the first-level mapping table are marked as invalid, the corresponding mapping entries in the first-level mapping table will be marked as invalid in the second-level mapping table. If all mapping entries in the second-level mapping table are marked as invalid, the corresponding mapping entries in the second-level mapping table will be marked as invalid in the third-level mapping table.

7. The firmware erasure method according to claim 6, characterized in that, The method further includes: Write updated third-level mapping tables, updated second-level mapping tables, and updated first-level mapping tables to the flash memory; If the mapping entry corresponding to the first-level mapping table in the second-level mapping table is marked as invalid, then the writing to the first-level mapping table is skipped. If the mapping entry corresponding to the second-level mapping table in the third-level mapping table is marked as invalid, then the writing to the second-level mapping table is skipped.

8. A firmware erasure device, characterized in that, The device includes: The acquisition module is used to acquire the mapping item corresponding to the target logical data in response to receiving an erase command for the target logical data; The first processing module is used to determine whether the mapping item corresponding to the target logical data is in an invalid marking state. If it is not marked as invalid, the erase operation of the target logical data is performed. The first judgment module is used to determine whether the target logical data has complete logical data, wherein the mapping item of the complete logical data points to the first section, and the sum of the complete logical data and the erased data records corresponding to the first section is equal to the data volume of the first section; The second processing module is used to mark the mapping item pointing to the first section as invalid if the completion logic data exists.

9. An electronic device, characterized in that, include: At least one processor; At least one memory for storing at least one program; At least one of the programs is executed by at least one of the processors to perform the method according to any one of claims 1 to 7.

10. A computer-readable storage medium storing computer-executable instructions, characterized in that, The computer-executable instructions are used to perform the method described in any one of claims 1 to 7.

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