A high-precision calculation method and device for a normalized arctangent function

Abstract

The application discloses a high-precision calculation method and device for a normalized arctangent function, and the method comprises the following steps: step S1: input floating-point data decomposition and preprocessing; the sign, the order code and the mantissa of the input floating-point data are obtained through data transformation, the order code is compared with a single-precision offset code to obtain a shift code; the input data used for a second-order polynomial calculation is obtained by using the shift code; step S2: simplifying the calculation interval by using the characteristics of an odd function; step S3: layering and segmenting the effective interval and selecting polynomial coefficients; step S4: second-order polynomial and fifth-order Taylor double-path parallel calculation; step S5: result formatting; and step S6: dynamically selecting output. The device is used for executing the above method. The application has the advantages of high precision, low delay, small area, low cost and the like.

Description

Technical Field

[0001] This invention mainly relates to the field of processors, specifically a high-precision calculation method and apparatus for the normalized arctangent function. Background Technology

[0002] The traditional arctangent function, arctan(x), has the following basic characteristics: its domain is (-∞, +∞), accepting any real number input; its range is (-π / 2, π / 2), and its output range is approximately (-1.5708, 1.5708) radians. The normalized arctangent function is achieved through the transformation: normalized_atan(x) = arctan(x) / (2π). Since the input x belongs to the interval [-1, 1], the output range of the arctangent function is normalized to the interval [-1 / 8, 1 / 8]. This transformation is crucial in motor control systems and digital communication systems. Even with normalization and input data interval compression, which significantly reduces the overflow risk of large numerical calculations and the need for lookup table capacity, most current arctangent function normalization implementations still struggle to meet accuracy and efficiency requirements.

[0003] The main methods for implementing the arctangent function include polynomial approximation, coordinate rotation (CORDIC), and lookup table methods, but all of them suffer from the technical challenge of balancing computational accuracy and efficiency. Polynomial approximation uses the same order across the entire domain, resulting in a simple implementation structure, but it cannot be optimized based on the characteristics of the arctangent function to guarantee computational accuracy in specific intervals. Coordinate rotation methods require more iterations for higher accuracy, increasing hardware overhead and latency. High-precision lookup tables require enormous storage space, increasing hardware design costs. Converting the normalized arctangent function into a hardware implementation also faces the same problems as traditional arctangent function implementations: the need to balance computational accuracy and efficiency.

[0004] The above analysis shows that traditional methods still have the following shortcomings:

[0005] 1. Polynomial approximation method: It can be used for functions of the same order across the entire domain, but cannot be optimized based on the characteristics of the function, and its accuracy is insufficient in specific intervals.

[0006] 2. CORDIC coordinate rotation method: Higher accuracy requires more iterations, resulting in higher hardware overhead and latency;

[0007] 3. High-precision table lookup method: requires huge storage and has high hardware costs.

[0008] In other words, when implementing the normalized arctangent function in hardware, it is impossible to simultaneously balance computational accuracy, operational efficiency, and hardware cost. Summary of the Invention

[0009] The technical problem to be solved by this invention is to provide a high-precision calculation method and apparatus for the normalized arctangent function that is high-precision, low-latency, small-area, and low-cost, in response to the technical problems existing in the prior art.

[0010] To solve the above-mentioned technical problems, the present invention adopts the following technical solution:

[0011] A high-precision calculation method for the normalized arctangent function includes:

[0012] Step S1: Input floating-point data decomposition and preprocessing; through data transformation, obtain the sign, exponent, and mantissa of the input floating-point data, then compare the exponent with the single-precision offset code to obtain the shift code used to shift the mantissa part; use the shift code to obtain the input data for second-order polynomial calculation;

[0013] Step S2: Simplify the calculation interval by utilizing the odd function property; Based on the odd function property of the arctangent function, normalization is performed. In implementation, only the [0,1] interval needs to be considered. The absolute value of the result of the other half interval is the same as that of the result of the [0,1] interval, and the difference is in the sign bit.

[0014] Step S3: Divide the effective interval into segments and select polynomial coefficients;

[0015] Step S4: Parallel computation of the second-order polynomial and the fifth-order Taylor series using two paths;

[0016] Step S5: Format the results;

[0017] Step S6: Dynamically select the output.

[0018] As a further improvement to the method of the present invention: the process of step S3 includes:

[0019] Step S301: Perform non-uniform segmentation in the interval [0,1] according to the function characteristics;

[0020] Step S302: Decode the address of the high-order bits of the shifted initial data;

[0021] Step S303: Determine the sub-interval to which the data belongs;

[0022] Step S304: Read from the coefficient lookup table based on the sub-interval address:

[0023] Second-order polynomial coefficients A0, A1, A2

[0024] Reference value xi for the starting point of the sub-interval;

[0025] Step S305: Output all parameters required for polynomial calculation.

[0026] As a further improvement to the method of the present invention: step S4 includes: path A: second-order polynomial approximation calculation and path B: fifth-order Taylor expansion calculation; wherein, path A includes:

[0027] Step A11: Perform subtraction: x - xi;

[0028] Step A12: Calculate the linear term: A1 (x-xi);

[0029] Step A13: Calculate the quadratic term: A2 (x-xi)²;

[0030] Step A14: Summation yields the polynomial result: R1 = A0 + A1 (x-xi) + A2 (x-xi)²;

[0031] Step A15: Hardware multiplexing of multipliers and Taylor paths;

[0032] Path B includes:

[0033] Step B11: Calculate the components: x, x³ / 3, x 5 / 5;

[0034] Step B12: Add or subtract according to the formula: R² = x - x³ / 3 + x 5 / 5;

[0035] Step B13: Perform normalization: R2 × (1 / 2π);

[0036] Step B14: Obtain the Taylor pathway normalization result.

[0037] As a further improvement to the method of the present invention: step S5 includes:

[0038] Step S501: For the second-order polynomial result: convert fixed-point to floating-point + normalize + round;

[0039] Step S502: For the fifth-order Taylor result: convert fixed-point to floating-point + normalize + round;

[0040] Step S503: Output standard IEEE 754 floating-point format to both channels;

[0041] Step S504: Ensure consistent output accuracy and format.

[0042] As a further improvement to the method of the present invention: step S6 includes:

[0043] Step S601: Make a judgment based on the selection signal generated in step S1;

[0044] Step S602: For medium-to-large data ranges, select the second-order polynomial result;

[0045] Step S603: For small data intervals, select the fifth-order Taylor result;

[0046] Step S604: Special values, directly output preset constants;

[0047] Step S605: Combine sign bit correction to output the final normalized arctangent function value.

[0048] The present invention further provides a high-precision calculation device for the normalized arctangent function, comprising:

[0049] The data preprocessing unit preprocesses the input floating-point data to obtain the sign, exponent, and mantissa of the input data; by processing the obtained sign, exponent, and mantissa, it obtains the preparation data and related selection signals required for second-order polynomial calculation and fifth-order Taylor expansion.

[0050] The second-order polynomial computation unit performs sub-interval decoding on the data mapped to the interval [0,1) when performing second-order polynomial path computation to obtain the corresponding sub-interval; then, through the obtained sub-interval, it generates the corresponding selection signal and obtains the coefficients for the second-order polynomial from the coefficient lookup table; based on the starting point of the sub-interval and the coefficients obtained from the coefficient table, it performs second-order polynomial operations to finally obtain the fixed-point format data of the second-order polynomial.

[0051] The fifth-order Taylor expansion calculation unit, when performing fifth-order Taylor expansion path calculation, multiplies the processed mantissas according to the fifth-order Taylor expansion form of arctan(x) to obtain the three components of the fifth-order Taylor expansion: X, X' ... 3 / 3、X 5 / 5; Then, according to the type of addition and subtraction operation in the expression, perform addition and subtraction operations on the individual data to obtain the fifth-order Taylor expansion result of the arctangent function; multiply the fifth-order Taylor expansion result by 1 / 2π to obtain the final normalized Taylor expansion form of the arctangent function;

[0052] The normalization processing unit performs normalization operations on the obtained second-order polynomial and fifth-order Taylor expansion fixed-point format data.

[0053] The result selection unit selects the floating-point format data corresponding to the second-order polynomial, fifth-order Taylor expansion, or constant term as the final logarithmic function result based on the data selection signal obtained during preprocessing.

[0054] As a further improvement of the device of the present invention: In the second-order polynomial calculation unit, the mantissa and the first hidden concatenated data are shifted by the judgment conditions of the exponent and the offset code to obtain the initial data for the second-order polynomial calculation; at the same time, the address decoding of the high-order part of the data is performed to determine the position of the input data mapped to the sub-interval in the [0,1] interval, and the corresponding coefficient is found from the coefficient lookup table by selecting the position of the sub-interval.

[0055] As a further improvement to the device of the present invention: the second-order polynomial calculation unit includes three multipliers, two adders, and one subtractor; the subtractor is used to implement the logic of x-xi, and the three multipliers are used to implement A1(x-xi) and A2(x-xi). 2 Two adders are used to perform addition operations on three components.

[0056] As a further improvement of the device of the present invention: in the fifth-order Taylor expansion calculation unit, after judging the magnitude of the separated exponent value with the first threshold and the second threshold, a selection signal for selecting the constant term or the fifth-order Taylor expansion is obtained; the initial data of the fifth-order Taylor expansion comes from the separated mantissa part and the first hidden concatenation value.

[0057] As a further improvement to the device of the present invention: the fifth-order Taylor expansion computation unit includes seven multipliers, one adder, one subtractor, and one divider; the first six multipliers are used to obtain X. 3 / 3、X 5 / 5; The subtractor is used to subtract X from X. 3 / 3; The adder is used to subtract X from X. 3 The value of / 3 plus X 5 / 5; The seventh multiplier is used to perform the normalization operation of the arctangent function: normalized_atan(x) = arctan(x) / (2π), thus obtaining the normalized fixed-point result of the Taylor expansion of the arctangent function.

[0058] Compared with the prior art, the advantages of the present invention are as follows:

[0059] The present invention provides a high-precision calculation method and apparatus for the normalized arctangent function. It is simple in principle, easy to implement, highly accurate, low in latency, small in area, and low in cost. It significantly improves the global calculation accuracy, and the approximation error meets the high-precision requirements of the hardware. It is iterative, has low latency, and has better hardware timing. It has small storage capacity, reuses logic resources, and greatly reduces the hardware area. It can be directly integrated into chips for motor control, communication, radar, etc., and has industrial applicability.

[0060] The present invention provides a high-precision calculation method and apparatus for the normalized arctangent function. When implementing the normalized floating-point arctangent function in hardware, it adopts a combination of second-order polynomial approximation and fifth-order Taylor expansion, which can achieve both efficiency and accuracy. Attached Figure Description

[0061] Figure 1 This is a flowchart illustrating the method of the present invention.

[0062] Figure 2 This is a schematic diagram of the overall structure and principle of the device of the present invention.

[0063] Figure 3 This is a schematic diagram illustrating the structural principle of the data preprocessing and polynomial coefficient, data, and fifth-order Taylor expansion data preparation part in a specific application example of the present invention.

[0064] Figure 4 This is a schematic diagram of the structural principle of the second-order polynomial calculation unit in a specific application example of the present invention.

[0065] Figure 5 This is a schematic diagram illustrating the structural principle of the fifth-order Taylor expansion computation unit and normalization operation of the present invention. Detailed Implementation

[0066] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0067] This invention addresses the hardware implementation of a normalized arctangent function. Specifically, it is an independent function implementation method and apparatus that solves engineering problems associated with hardware circuit implementation of the normalized arctangent function, such as low accuracy, large latency, high hardware overhead, and high storage costs. It calculates the normalized arctangent function by inputting an external floating-point number conforming to the IEEE 754 standard. This invention achieves hardware-friendly, high-precision, and high-efficiency normalized arctangent function calculation through floating-point data preprocessing, odd-function interval simplification, non-uniform hierarchical segmentation, dual-path parallel computation of second-order polynomials and fifth-order Taylor series, result formatting, and dynamic selection. This invention aims to resolve the technical contradiction of balancing computational efficiency, computational accuracy, hardware area, and timing performance on hardware platforms such as embedded processors, ASICs, and FPGAs, representing a typical industrial application problem. The overall solution of this invention is the engineering implementation of the method in hardware circuits, defining the specific execution steps, hardware structure, and data processing flow. All of the above methods are technical measures at the electronic circuit, data processing, and hardware architecture levels, and are technical solutions that can be repeatedly executed by hardware and stably output results.

[0068] like Figure 1 As shown, the present invention provides a high-precision calculation method for the normalized arctangent function, comprising:

[0069] Step S1: Input floating-point data decomposition and preprocessing;

[0070] Step S2: Simplify the calculation interval by utilizing the properties of odd functions;

[0071] Step S3: Divide the effective interval into segments and select polynomial coefficients;

[0072] Step S4: Parallel computation of the second-order polynomial and the fifth-order Taylor series using two paths;

[0073] Step S5: Format the results;

[0074] Step S6: Dynamically select the output.

[0075] In a specific application example, the process of step S1 may include:

[0076] Step S101: Receive an input floating-point number conforming to the IEEE 754 standard;

[0077] Step S102: Decompose the sign bit, exponent, and mantissa into three parts;

[0078] Step S103: Concatenate the mantissa with the hidden bit 1 to form the complete mantissa data;

[0079] Step S104: Compare the exponent with the single-precision offset code to generate the shift code;

[0080] Step S105: Shift the concatenated mantissa according to the shift code to obtain the initial calculation data;

[0081] Step S106: Generate special value selection signal and Taylor selection signal according to the exponent size.

[0082] In a specific application example, the process of step S2 may include:

[0083] Step S201: Determine the sign bit of the input data;

[0084] Step S202: Normalize the arctangent to preserve the odd function properties: negative input, inverted output;

[0085] Step S203: Perform core calculations only on the [0,1] interval;

[0086] Step S204: The interval [-1,0) is not calculated repeatedly, and the final result is only flipped.

[0087] In a specific application example, the process of step S3 may include:

[0088] Step S301: Perform non-uniform segmentation in the interval [0,1] according to the function characteristics;

[0089] Step S302: Decode the address of the high-order bits of the shifted initial data;

[0090] Step S303: Determine the sub-interval to which the data belongs;

[0091] Step S304: Read from the coefficient lookup table based on the sub-interval address:

[0092] Second-order polynomial coefficients A0, A1, A2

[0093] Reference value xi for the starting point of the sub-interval;

[0094] Step S305: Output all parameters required for polynomial calculation.

[0095] In a specific application example, the process of step S4 may include: path A: second-order polynomial approximation calculation and path B: fifth-order Taylor expansion calculation, wherein path A includes:

[0096] Step A11: Perform subtraction: x – xi;

[0097] Step A12: Calculate the linear term: A1 (x-xi);

[0098] Step A13: Calculate the quadratic term: A2 (x-xi)²;

[0099] Step A14: Summation yields the polynomial result: R1 = A0 + A1 (x-xi) + A2 (x-xi)²;

[0100] Step A15: Hardware reuse of multipliers and Taylor paths reduces area.

[0101] Path B includes:

[0102] Step B11: Calculate the components: x, x³ / 3, x 5 / 5;

[0103] Step B12: Add or subtract according to the formula: R² = x - x³ / 3 + x 5 / 5;

[0104] Step B13: Perform normalization: R2 × (1 / 2π);

[0105] Step B14: Obtain the Taylor pathway normalization result.

[0106] In a specific application example, the process of step S5 may include:

[0107] Step S501: For the second-order polynomial result: convert fixed-point to floating-point + normalize + round;

[0108] Step S502: For the fifth-order Taylor result: convert fixed-point to floating-point + normalize + round;

[0109] Step S503: Output standard IEEE 754 floating-point format to both channels;

[0110] Step S504: Ensure consistent output accuracy and format.

[0111] In a specific application example, the process of step S6 may include:

[0112] Step S601: Make a judgment based on the selection signal generated in step S1;

[0113] Step S602: For medium-to-large data ranges, select the second-order polynomial result;

[0114] Step S603: For small data intervals, select the fifth-order Taylor result;

[0115] Step S604: Special values, directly output preset constants;

[0116] Step S605: Combine sign bit correction to output the final normalized arctangent function value.

[0117] As can be seen from the above, in the method of the present invention, the sign, exponent, and mantissa of the input floating-point data are first obtained through data transformation. Then, the exponent is compared with a single-precision offset code to obtain a shift code for shifting the mantissa. Using the shift code obtained above, the mantissa is shifted with the first hidden concatenation data to obtain the input data for second-order polynomial calculation. Simultaneously, according to the characteristics of the arctangent function, the output result will increase or decrease with the input data, eventually stabilizing. Therefore, based on the magnitude of the exponent obtained above, special value preprocessing is performed to generate special value selection signals, including: a constant selection signal and a fifth-order Taylor expansion selection signal.

[0118] Then, based on the odd function characteristics of the arctangent function, the present invention, after normalization, still conforms to the characteristics of an odd function. Simultaneously, since the input data range is [-1, 1], due to symmetry, only the [0, 1] interval needs to be considered during implementation; the results for the other half of the interval have the same absolute value as the results for the [0, 1] interval, differing only in the sign bit. Next, the present invention divides the [0, 1] interval using a layered segmentation principle. Under the premise of satisfying the approximation error condition, the sizes of all segmented sub-intervals within the [0, 1] range are shown in the table below.

[0119]

[0120] Next, according to the expression of the second-order polynomial: R1 = A0 + A1(x - xi) + A2(x - xi) 2 The coefficients of the polynomial, A0, A1, A2, and xi, are generated and mapped to each sub-interval, as well as the sub-interval content in the sub-interval table in the above steps. Here, xi is the starting point of each sub-interval within the range of each interval in the table of step four. For example, the interval [2... -1 1) If a subinterval of the interval is [ai, ai+1), then xi is the corresponding ai. Simultaneously, the fifth-order Taylor expansion is performed according to the expression: R² = x - x 3 / 3 + x 5 / 5 is implemented step by step to obtain the data for each item: x, x 3 / 3、x 5 / 5.

[0121] Next, this invention determines sub-intervals within the [0,1] interval of the shifted data and selects the starting point of each sub-interval as a reference point xi. This part involves decoding the address of the high-order bits of the shifted data to generate corresponding coefficient selection signals, thereby obtaining the coefficients of the second-order polynomial: A0, A1, A2, and the value of xi. The obtained second-order polynomial is then used to approximate the coefficients required for calculation, and polynomial operations are performed together with the reference point: R1 = A0 + A1(x - xi) + A2(x - xi). 2 At the same time, the data terms obtained from the fifth-order Taylor expansion are summed together.

[0122] Finally, the present invention normalizes and rounds the result of the second-order polynomial operation to obtain the corresponding result; at the same time, it multiplies the result of the fifth-order Taylor expansion by 1 / 2π to satisfy its normalization implementation, and then normalizes and rounds the result of the division to obtain the corresponding fifth-order Taylor expansion result; and according to the selection signal obtained above, it selects the second-order polynomial result and the fifth-order Taylor result to obtain the final result.

[0123] The second-order polynomial expansion is as follows:

[0124] 1. Calculate the initial data based on the obtained second-order polynomial, and perform address decoding of the coefficient lookup table;

[0125] 2. Based on the obtained coefficient lookup table signal, obtain the coefficients of the second-order polynomial from the generated coefficient table, including: A0, A1, A2, and the value of xi;

[0126] 3. Based on the coefficients and reference point values ​​of the obtained second-order polynomial, perform second-order polynomial calculations to obtain the fixed-point results of the second-order polynomial calculations;

[0127] 4. Normalize and round the fixed-point result of the second-order polynomial to generate the corresponding floating-point result.

[0128] The fifth-order Taylor expansion is as follows:

[0129] 1. Component data for the fifth-order Taylor expansion: x 3 / 3、x 5 / 5, begin calculation. To reduce area, the multiplication of the initial data in the floating-point multiplier corresponding to this part of the data is reused with the multiplication logic in the second-order polynomial;

[0130] 2. For the components of the fifth-order Taylor expansion, start with the expression: R² = x - x 3 / 3 + x 5 The expression / 5 is used for addition and subtraction calculations;

[0131] 3. Multiply the result of adding or subtracting the terms in the fifth-order Taylor expansion by 1 / 2π;

[0132] 4. Multiply the fifth-order Taylor expansion by 1 / 2π and then normalize and round the result to generate the corresponding floating-point result.

[0133] The above-described implementation process for calculating the normalized arctangent function in this invention pertains to the chip processing end, specifically how to use hardware technology to meet the high-precision requirements after the arctangent function normalization operation, while also achieving optimal timing and small area. In other words, the calculation of the normalized arctangent function discussed in this invention is not a simple mathematical calculation, but rather a data processing based on a hardware platform.

[0134] like Figure 2 The diagram shown illustrates the structural principle of the high-precision calculation device for the normalized arctangent function according to the present invention. The high-precision calculation device for the normalized arctangent function of the present invention includes:

[0135] The data preprocessing unit preprocesses the input floating-point data to obtain the sign, exponent, and mantissa of the input data. By further processing the obtained sign, exponent, and mantissa, it obtains the necessary preparation data and related selection signals for second-order polynomial calculations and fifth-order Taylor expansions.

[0136] The second-order polynomial computation unit, when performing second-order polynomial path computation, performs sub-interval decoding on the data mapped to the interval [0,1) to obtain the corresponding sub-intervals. Then, based on the obtained sub-intervals, it generates corresponding selection signals and obtains the coefficients for the second-order polynomial from the coefficient lookup table. Second-order polynomial operations are performed based on the starting point of the sub-intervals and the coefficients obtained from the coefficient table, ultimately obtaining the fixed-point format data of the second-order polynomial.

[0137] The fifth-order Taylor expansion calculation unit, when performing fifth-order Taylor expansion path calculation, multiplies the processed mantissas according to the fifth-order Taylor expansion form of arctan(x) to obtain the three components of the fifth-order Taylor expansion: X, X' ... 3 / 3、X 5 / 5. Then, according to the type of addition and subtraction operation in the expression, the addition and subtraction operations are performed on the individual data to obtain the fifth-order Taylor expansion result of the arctangent function. Finally, in order to achieve the normalization operation of the arctangent function, the fifth-order Taylor expansion result is multiplied by 1 / 2π to obtain the final normalized Taylor expansion form of the arctangent function;

[0138] The normalization processing unit performs normalization operations on the obtained second-order polynomial and fifth-order Taylor expansion fixed-point format data, i.e., fixed-to-float conversion.

[0139] The result selection unit selects the floating-point format data corresponding to the second-order polynomial, fifth-order Taylor expansion, or constant term as the final logarithmic function result based on the data selection signal obtained during preprocessing.

[0140] In specific application examples, such as Figure 3 The diagram shown illustrates the principles of the data preprocessing unit, the second-order polynomial calculation unit, and the fifth-order Taylor expansion calculation unit of this invention; it includes:

[0141] 1. Separate the sign, exponent, and mantissa parts from the input data in the range [-1,1]. Then, compare the magnitudes of the exponent and the offset code to obtain the data required for the second-order polynomial and the fifth-order Taylor expansion.

[0142] 2. Second-order polynomial calculation unit: Based on the exponent and offset code conditions, the mantissa and the first hidden concatenated data are shifted to obtain the initial data for second-order polynomial calculation. Simultaneously, the higher-order bits of this data are decoded to determine the position of the input data mapped to a sub-interval within the [0,1] interval. Then, by selecting the position of the sub-interval, the corresponding coefficient is found from the coefficient lookup table.

[0143] 3. The fifth-order Taylor expansion calculation unit obtains the selection signal for selecting the constant term or the fifth-order Taylor expansion by comparing the separated exponent value with the first threshold and the second threshold. The initial data for the fifth-order Taylor expansion comes from the separated mantissa and the first hidden concatenation value.

[0144] In specific application examples, such as Figure 4 The diagram shown is a schematic representation of the structural principle of the second-order polynomial computation unit of this invention, wherein:

[0145] 1. Obtain the initial data for the second-order polynomial from the data preprocessing unit, and simultaneously separate the reference point value xi from the coefficient lookup table in advance to realize the second-order polynomial expression: R1 = A0 + A1(x - xi) + A2(x - xi) 2 The subtraction operation corresponding to x - xi in the equation;

[0146] 2. Based on the three coefficients required for the polynomial operation obtained from the stored coefficient table: A0, A1, and A2, and combined with the starting point ai of the subinterval [ai, ai+1) where the data is located, perform a second-order polynomial operation. The expression of the polynomial is as follows: R1 = A0 + A1(x - xi) + A2(x - xi) 2 Where xi is the starting point value of the corresponding sub-interval;

[0147] 3. This part of the logic contains three multipliers, two adders, and one subtractor. The subtractor is used to implement the logic for x - xi. The three multipliers are used to implement A1(x - xi) and A2(x - xi). 2 Two adders are used to perform addition operations on three components. Multiplier #1 in the diagram reuses the multiplier for the fifth-order Taylor expansion calculation, thus reducing the implementation area.

[0148] In specific application examples, such as Figure 5 The diagram shown is a schematic representation of the structural principle of the fifth-order Taylor expansion computational unit of this invention, wherein:

[0149] 1. By concatenating the mantissa separated during preprocessing with the first hidden element to form X, the initial data required for the fifth-order Taylor expansion is obtained. Then, according to the fifth-order Taylor expansion expression: R² = X - X 3 / 3 + X 5 / 5, to obtain the required fifth-order Taylor expansion components: X, X 3 / 3、X 5 / 5.

[0150] 2. This part of the logic contains seven multipliers, one adder, one subtractor, and one divider. The first six multipliers are used to obtain X. 3 / 3、X 5 / 5. The subtractor is used to subtract X from X. 3 / 3. Adders are used to subtract X from X. 3 The value of / 3 plus X 5 / 5. The seventh multiplier is used to perform the normalization operation of the arctangent function: normalized_atan(x) = arctan(x) / (2π), thus obtaining the normalized fixed-point result of the Taylor expansion of the arctangent function. Among them, multiplier #1 in the figure is a multiplier reused with the second-order polynomial calculation, which helps to reduce the implementation area.

[0151] This invention fundamentally solves the technical contradiction of traditional solutions in hardware implementation, which cannot simultaneously balance accuracy, latency, area, and resource consumption, through hardware circuit architecture design and algorithm co-optimization. The specific hardware-level technical effects are as follows:

[0152] First, it significantly reduces the hardware logic area and decreases chip resource consumption.

[0153] A multiplier hardware reuse mechanism is adopted to enable the second-order polynomial path and the fifth-order Taylor path to share the core multiplier, thereby avoiding the repeated instantiation of hardware units.

[0154] By replacing global equidistant segmentation with non-uniform hierarchical segmentation, the capacity of the coefficient lookup table (LUT) is significantly reduced, thus lowering storage overhead.

[0155] By adopting fixed-point arithmetic with post-normalization, a large amount of redundant logic caused by floating-point arithmetic is avoided, and the overall hardware area is reduced by 30%–50% compared with traditional solutions.

[0156] II. Significantly reduce computation latency and improve system timing performance;

[0157] It employs a dual-path parallel computing circuit, where polynomials and Taylor expansions are executed simultaneously, eliminating iteration waiting time.

[0158] It uses direct decoding of high-order address bits, eliminating the need for complex comparisons and judgments, and the coefficient addressing delay is less than 1 clock cycle.

[0159] It features no CORDIC-style loop iteration, a pure combinational logic / short pipeline computation path, reduces critical path latency by more than 50%, and can operate at higher clock frequencies.

[0160] Third, the accuracy across the entire range is uniformly improved, and the hardware output is more stable;

[0161] The hardware circuit is configured with polynomial coefficients piecewise according to the function characteristics, ensuring speed over large intervals and accuracy over small intervals, with consistent and controllable error across the entire range.

[0162] The hardware path for the fifth-order Taylor expansion is automatically switched in the small value range to avoid the polynomial error deterioration in the near-zero range, and the hardware output accuracy can reach the IEEE 754 single-precision floating-point standard.

[0163] Built-in hardware preprocessing for special values ​​directly outputs constants for extreme and boundary values, eliminating calculation errors and enhancing system robustness.

[0164] Fourth, the hardware structure is well-organized, making it easy to integrate with ASIC / FPGA and mass-produce;

[0165] All operations consist of adders, subtractors, multipliers, lookup tables, and multiplexers, without complex control state machines, and the circuit structure is regular.

[0166] The modular design of the data path allows it to be directly embedded as a functional unit within the processor core or as a hardware accelerator IP into motor control, communication, and radar chips.

[0167] The production line is configurable, compatible with different process nodes, with high tape-out success rate and low mass production cost.

[0168] Fifth, it reduces system power consumption, making it suitable for embedded and automotive applications.

[0169] With fewer logic gates and smaller storage capacity, dynamic power consumption and leakage power consumption are significantly reduced.

[0170] With a fixed number of calculation steps and no redundant flips, it is suitable for low-power hardware platforms such as battery-powered devices, automotive MCUs, and industrial SOCs.

[0171] VI. Standardized output format, seamless hardware integration with backend systems;

[0172] The circuit directly outputs IEEE754 standard floating-point numbers without additional format conversion, and can be directly sent to the motor control loop and communication phase correction unit.

[0173] The sign bit is processed independently by hardware, which is fully compatible with the backend data path and improves the overall system integration and reliability.

[0174] The above are merely preferred embodiments of the present invention. The scope of protection of the present invention is not limited to the above embodiments. All technical solutions falling within the scope of the present invention's concept are within the scope of protection of the present invention. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principles of the present invention should be considered within the scope of protection of the present invention.

Claims

1. A high-precision calculation method for the normalized arctangent function, characterized in that, include: Step S1: Input floating-point data decomposition and preprocessing; The sign, exponent, and mantissa of the input floating-point data are obtained through data transformation. Then, the exponent is compared with the single-precision offset code to obtain the shift code used to shift the mantissa part. The input data for second-order polynomial calculation is obtained using the shift code. Step S2: Simplify the calculation interval by utilizing the odd function property; Based on the odd function property of the arctangent function, normalization is performed. In implementation, only the [0,1] interval needs to be considered. The absolute value of the result of the other half interval is the same as that of the result of the [0,1] interval, and the difference is in the sign bit. Step S3: Divide the effective interval into segments and select polynomial coefficients; the specific process of step S3 includes: Step S301: Perform non-uniform segmentation in the interval [0,1] according to the function characteristics; Step S302: Decode the address of the high-order bits of the shifted initial data; Step S303: Determine the sub-interval to which the data belongs; Step S304: Read from the coefficient lookup table based on the sub-interval address: Second-order polynomial coefficients A0, A1, A2 Reference value xi for the starting point of the sub-interval; Step S305: Output all parameters required for polynomial calculation; Step S4: Parallel computation of second-order polynomial and fifth-order Taylor expansion via dual paths; Step S4 specifically includes: Path A: second-order polynomial approximation computation and Path B: fifth-order Taylor expansion computation; wherein, Path A includes: Step A11: Perform subtraction: x – xi; Step A12: Calculate the linear term: A1 (x-xi); Step A13: Calculate the quadratic term: A2 (x-xi)²; Step A14: Summation yields the polynomial result: R1 = A0 + A1 (x-xi) + A2 (x-xi)²; Step A15: Hardware multiplexing of multipliers and Taylor paths; Path B includes: Step B11: Calculate the components: x, x³ / 3, x 5 / 5; Step B12: Add or subtract according to the formula: R² = x - x³ / 3 + x 5 / 5; Step B13: Perform normalization: R2 × (1 / 2π); Step B14: Obtain the Taylor pathway normalization result; The path A is implemented using three multipliers, two adders, and one subtractor; the subtractor is used to implement the logic of x-xi, and the three multipliers are used to implement A1(x-xi) and A2(x-xi). 2 Two adders are used to perform addition operations on three components; Path B is implemented using seven multipliers, one adder, one subtractor, and one divider; the first six multipliers are used to obtain X. 3 / 3、X 5 / 5; The subtractor is used to subtract X from X. 3 / 3; The adder is used to subtract X from X. 3 The value of / 3 plus X 5 / 5; The seventh multiplier is used to implement the normalization operation of the arctangent function: normalized_atan(x) = arctan(x) / (2π), thus obtaining the normalized fixed-point result of the Taylor expansion of the arctangent function; Step S5: Result formatting; Step S5 specifically includes: Step S501: For the second-order polynomial result: convert fixed-point to floating-point + normalize + round; Step S502: For the fifth-order Taylor result: convert fixed-point to floating-point + normalize + round; Step S503: Output standard IEEE 754 floating-point format to both channels; Step S504: Ensure consistent output accuracy and format; Step S6: Dynamically select output; Step S6 specifically includes: Step S601: Make a judgment based on the selection signal generated in step S1; Step S602: For medium-to-large data ranges, select the second-order polynomial result; Step S603: For small data intervals, select the fifth-order Taylor result; Step S604: Special values, directly output preset constants; Step S605: Combine sign bit correction to output the final normalized arctangent function value.

2. A high-precision calculation device for the normalized arctangent function, characterized in that, include: The data preprocessing unit preprocesses the input floating-point data to obtain the sign, exponent, and mantissa of the input data. By processing the obtained sign, exponent, and mantissa, we obtain the necessary preparation data and related selection signals for second-order polynomial calculation and fifth-order Taylor expansion. The second-order polynomial computation unit performs sub-interval decoding on the data mapped to the interval [0,1) when performing second-order polynomial path computation to obtain the corresponding sub-interval; then, through the obtained sub-interval, it generates the corresponding selection signal and obtains the coefficients for the second-order polynomial from the coefficient lookup table; based on the starting point of the sub-interval and the coefficients obtained from the coefficient table, it performs second-order polynomial operations to finally obtain the fixed-point format data of the second-order polynomial. The fifth-order Taylor expansion calculation unit, when performing fifth-order Taylor expansion path calculation, multiplies the processed mantissas according to the fifth-order Taylor expansion form of arctan(x) to obtain the three components of the fifth-order Taylor expansion: X, X' ... 3 / 3、X 5 / 5; Then, based on the type of addition and subtraction operation in the expression, perform addition and subtraction operations on the individual data to obtain the fifth-order Taylor expansion result of the arctangent function; Multiplying the fifth-order Taylor expansion result by 1 / 2π, we obtain the final normalized Taylor expansion result of the arctangent function. The normalization processing unit performs normalization operations on the obtained second-order polynomial and fifth-order Taylor expansion fixed-point format data. The result selection unit selects the floating-point format data corresponding to the second-order polynomial, fifth-order Taylor expansion, or constant term as the final logarithmic function result based on the data selection signal obtained during preprocessing. In the second-order polynomial calculation unit, the mantissa and the first hidden concatenated data are shifted according to the judgment conditions of the exponent and the offset code to obtain the initial data for the second-order polynomial calculation; at the same time, the address decoding of the high-order part of the data is performed to determine the position of the input data mapped to the sub-interval in the [0,1] interval, and the corresponding coefficient is found from the coefficient lookup table by selecting the position of the sub-interval. The second-order polynomial computation unit contains three multipliers, two adders, and one subtractor; the subtractor is used to implement the logic of x-xi, and the three multipliers are used to implement A1(x-xi) and A2(x-xi). 2 Two adders are used to perform addition operations on three components; the multiplier and Taylor path are hardware-multiplexed. In the fifth-order Taylor expansion calculation unit, the selection signal for selecting the constant term or the fifth-order Taylor expansion is obtained by comparing the separated exponent value with the first threshold and the second threshold. The initial data of the fifth-order Taylor expansion comes from the separated mantissa part and the first hidden concatenation value. The fifth-order Taylor expansion computation unit contains seven multipliers, one adder, one subtractor, and one divider; the first six multipliers are used to obtain X. 3 / 3、X 5 / 5; The subtractor is used to subtract X from X. 3 / 3; The adder is used to subtract X from X. 3 The value of / 3 plus X 5 / 5; The seventh multiplier is used to implement the normalization operation of the arctangent function: normalized_atan(x) = arctan(x) / (2π), thus obtaining the normalized fixed-point result of the Taylor expansion of the arctangent function; Parallel computation of second-order polynomials and fifth-order Taylor series.

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