Flash memory horizontal direction multi-dimensional weight control circuit and method based on convolution operation, and flash memory

Abstract

The invention provides a flash memory horizontal direction multi-dimensional weight control circuit and method based on convolution operation, and a flash memory, and the circuit comprises a word line multiplexing transmission module which is connected with a flash memory array module, generates a word line selection signal to select a word line, and carries out the voltage application of a selected block in a horizontal direction; the block selection module is connected with the word line multiplexing transmission module and is used for generating a block channel control signal to control the word line multiplexing transmission module; and the latch module is connected with the block selection module and registers the enable signal of the voltage in the horizontal direction of the block. A latch module is added on the basis of an existing flash memory structure, and functions of a block selection module are optimized, so that word line voltage of a current block is kept by the latch module while the area and power consumption of a chip are not remarkably increased, and then voltage setting of the blocks is performed in sequence so as to realize flexible setting of multi-dimensional weights in the horizontal direction; the problem of how to flexibly adjust the multi-dimensional weight of the flash memory in the horizontal direction while the chip area and the power consumption are not obviously increased is solved.

Description

Technical Field

[0001] This invention relates to the field of circuit design technology, and in particular to a flash memory horizontal multidimensional weight control circuit and method based on convolution operation, and a flash memory. Background Technology

[0002] Convolution operations in flash memory refer to a computational method that utilizes the physical characteristics of flash memory devices to directly perform convolution operations within the storage cells. It is a cutting-edge application of Compute-in-Memory (CIM) technology. Its core idea is to store the weight parameters of a neural network in flash memory cells and use Ohm's law and Kirchhoff's current law in the analog domain to perform multiply-accumulate (MAC) operations. This avoids the bottleneck of "data movement" in the traditional von Neumann architecture, significantly improving energy efficiency and speed.

[0003] Currently, flash memory convolution calculations are performed by generating new functions based on two-dimensional functions. NAND flash memory inherently possesses two dimensions: the horizontal (X) direction and the vertical (Y) direction. The Y direction is related to the number of bit lines (BLs), naturally controlling dimensional information. The X direction is related to block (blk) selection; different blocks on the same plane correspond to the same number of bit lines. To achieve multi-dimensional weights in the X direction during convolution, simultaneous operation on different blocks is required, a process known as multi-blk operation.

[0004] However, existing flash multi-blk operations apply the same voltage to different blocks on the same word line (WL), meaning that the voltage of each block is the same. Therefore, it is not possible to flexibly adjust the weights in the X direction, which limits the application of flash convolution calculations. Moreover, to implement the traditional flash multi-blk operation of CIM, multiple control sources need to be used simultaneously to achieve voltage control, which occupies a large chip area and consumes a lot of power. Summary of the Invention

[0005] The purpose of this invention is to provide a flash memory horizontal multidimensional weight control circuit and method based on convolution operation, and a flash memory, so as to at least solve the problem of how to flexibly adjust the horizontal multidimensional weight of flash memory without significantly increasing chip area and power consumption.

[0006] To address the aforementioned technical problems, this invention provides a flash memory horizontal multidimensional weight control circuit based on convolution operations, comprising: Flash array module; A word line multiplexing transmission module is connected to the flash memory array module; the word line multiplexing transmission module is used to generate a word line selection signal to select a word line in the flash memory array module, and to apply a horizontal voltage to the selected block in the flash memory array module; wherein, the weight of the block varies depending on the applied voltage; A block selection module is connected to the word line multiplexing transmission module; the block selection module is used to generate a block path control signal based on the block selection signal to control the word line multiplexing transmission module to generate a word line selection signal. A latch module is connected to the block selection module; the latch module is used to store the enable signal of the horizontal voltage of the block in the flash array module.

[0007] Optionally, in the aforementioned flash memory horizontal multidimensional weight control circuit based on convolution operation, the latch module is further configured to generate a latch signal based on the block selection signal; the block selection module is configured to generate a block path control signal based on the block selection signal, the latch signal, and the mode enable signal.

[0008] Optionally, in the aforementioned flash memory horizontal multidimensional weight control circuit based on convolution operation, the block selection module includes AND gates, NOT gates, OR gates, and a first horizontal shifter. The two inputs of the AND gate are respectively connected to a latch signal and a mode enable signal, and the output is connected to one input of the OR gate; the input of the NOT gate is connected to a block selection signal, and the output is connected to the other input of the OR gate; the output of the OR gate is connected to the input of the first horizontal shifter; the output of the first horizontal shifter outputs a first block path control signal; the block path control signal includes the first block path control signal.

[0009] Optionally, in the flash memory horizontal multidimensional weight control circuit based on convolution operation, the block selection module further includes a second horizontal shifter; the input of the second horizontal shifter is connected to the block selection signal, and the output of the second horizontal shifter outputs a second block path control signal; the block path control signal further includes the second block path control signal.

[0010] Optionally, in the flash memory horizontal multidimensional weight control circuit based on convolution operation, the first horizontal shifter is connected to a first power supply voltage, the second horizontal shifter is connected to a second power supply voltage, and the first power supply voltage is lower than the second power supply voltage.

[0011] Optionally, in the aforementioned flash memory horizontal multidimensional weight control circuit based on convolution operation, the latch module includes a latch; the input of the latch is connected to a block selection signal, and the output of the latch signal is output.

[0012] Optionally, in the aforementioned flash memory horizontal multidimensional weight control circuit based on convolution operation, the word line multiplexing transmission module is connected to multiple bias signals. The corresponding bias signal is selected according to the block path control signal to generate the corresponding word line selection signal. The corresponding word line in the flash memory array module is selected according to the generated word line selection signal, and a horizontal voltage is applied to the selected block in the flash memory array module.

[0013] To address the aforementioned technical problems, this invention also provides a flash memory horizontal multidimensional weight control method based on convolution operations, applied to the flash memory horizontal multidimensional weight control circuit based on convolution operations as described in any of the preceding claims. The flash memory horizontal multidimensional weight control method based on convolution operations includes: Provide block selection signal; The block selection module generates a block path control signal based on the block selection signal; The word line multiplexing transmission module generates a word line selection signal based on the block path control signal to select word lines in the flash memory array module, and applies a horizontal voltage to the selected block in the flash memory array module; wherein, the weight of the block varies depending on the applied voltage. The latch module stores the enable signal of the horizontal voltage of the blocks in the flash memory array module.

[0014] Optionally, in the aforementioned flash memory horizontal multidimensional weight control method based on convolution operations, the flash memory horizontal multidimensional weight control method further includes: Repeat the above steps until the horizontal voltage is applied to all blocks in the flash array module; the voltage applied to each block is different.

[0015] To address the aforementioned technical problems, the present invention also provides a flash memory, including a flash memory horizontal multidimensional weight control circuit based on convolution operations as described in any of the preceding claims.

[0016] The present invention provides a flash memory horizontal multidimensional weight control circuit and method based on convolution operation, and a flash memory, comprising: a flash memory array module; a word line multiplexing transmission module connected to the flash memory array module; the word line multiplexing transmission module is used to generate a word line selection signal to select word lines in the flash memory array module, and to apply a horizontal voltage to the selected block in the flash memory array module; wherein, the weight of the block varies depending on the applied voltage; a block selection module connected to the word line multiplexing transmission module; the block selection module is used to generate a block path control signal according to the block selection signal to control the word line multiplexing transmission module to generate the word line selection signal; and a latch module connected to the block selection module; the latch module is used to register the enable signal of the horizontal voltage of the block in the flash memory array module. By adding a latch module and optimizing the block selection module on the basis of the existing flash memory structure, the word line voltage of the current block can be maintained by the latch module without significantly increasing the chip area and power consumption. Then, the voltage of the block can be set sequentially by the block selection module and the word line multiplexing transmission module to achieve flexible setting of horizontal multi-dimensional weights. This solves the problem of how to flexibly adjust the horizontal multi-dimensional weights of flash memory without significantly increasing the chip area and power consumption. Attached Figure Description

[0017] Figure 1 This is a block diagram of the flash memory horizontal multidimensional weight control circuit based on convolution operation provided in this embodiment; Figure 2 A schematic diagram of the specific circuit structure of the flash memory horizontal multidimensional weight control circuit based on convolution operation provided in this embodiment; Figure 3 This is a flowchart of a flash memory horizontal multidimensional weight control method based on convolution operations provided in this embodiment; Figure 4 The timing diagram is provided for the flash memory horizontal multidimensional weight control circuit based on convolution operation in this embodiment. Detailed Implementation

[0018] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a more comprehensive overview of the flash memory horizontal multidimensional weight control circuit and method based on convolution operations, and the flash memory itself, as proposed in this invention. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise scales, intended only to facilitate and clarify the illustration of the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structures. In particular, different figures may emphasize different aspects and thus may use different scales.

[0019] It should be noted that the terms "first," "second," etc., used in the specification, claims, and drawings of this invention are used to distinguish similar objects in order to describe embodiments of the invention, and are not used to describe a specific order or sequence. It should be understood that such uses of terminology are interchangeable where appropriate. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0020] This embodiment provides a flash memory horizontal multidimensional weight control circuit based on convolution operations, such as... Figure 1 As shown, it includes: Flash array module; A word line multiplexing transmission module is connected to the flash memory array module; the word line multiplexing transmission module is used to generate a word line selection signal to select a word line in the flash memory array module, and to apply a horizontal voltage to the selected block in the flash memory array module; wherein, the weight of the block varies depending on the applied voltage; A block selection module is connected to the word line multiplexing transmission module; the block selection module is used to generate a block path control signal based on the block selection signal to control the word line multiplexing transmission module to generate a word line selection signal. A latch module is connected to the block selection module; the latch module is used to store the enable signal of the horizontal voltage of the block in the flash array module.

[0021] The flash memory horizontal multidimensional weight control circuit provided in this embodiment adds a latch module and optimizes the function of the block selection module on the basis of the existing flash memory structure. This allows the latch module to maintain the word line voltage of the current block without significantly increasing the chip area and power consumption. Then, the block selection module and the word line multiplexing transmission module are used to set the voltage of the block in sequence to achieve flexible setting of the horizontal multidimensional weight. This solves the problem of how to flexibly adjust the horizontal multidimensional weight of flash memory without significantly increasing the chip area and power consumption.

[0022] Furthermore, in this embodiment, the latch module is also used to generate a latch signal based on the block selection signal; the block selection module is used to generate a block path control signal based on the block selection signal, the latch signal, and the mode enable signal.

[0023] Specifically, in this embodiment, such as Figure 2 As shown, the block selection module includes an AND gate, a NOT gate, an OR gate, and a first horizontal shifter LS1; wherein, The two inputs of the AND gate are respectively connected to the latch signal lat_out and the mode enable signal mode_en, and the output is connected to one input of the OR gate; the input of the NOT gate is connected to the block selection signal blk_sel, and the output is connected to the other input of the OR gate; the output of the OR gate is connected to the input of the first horizontal shifter LS1; the output of the first horizontal shifter LS1 outputs the first block path control signal blk_usel_mv; the block path control signal includes the first block path control signal blk_usel_mv.

[0024] Preferably, in this embodiment, such as Figure 2 As shown, the block selection module further includes a second horizontal shifter LS2; the input of the second horizontal shifter LS2 is connected to the block selection signal blk_sel, and the output of the second block path control signal blk_sel_hv is output; the block path control signal further includes the second block path control signal blk_sel_hv.

[0025] In practical applications, such as Figure 2 As shown, the first horizontal shifter LS1 is connected to a first power supply voltage Vm, and the second horizontal shifter LS2 is connected to a second power supply voltage Vh. The first power supply voltage Vm is lower than the second power supply voltage Vh. For example, the second power supply voltage Vh can be high voltage (full-amplitude voltage), and the first power supply voltage Vm can be medium voltage (half-amplitude voltage).

[0026] The block selection module provided in this embodiment optimizes the functionality of existing block selection modules, enabling it to utilize the latch signal lat_out output by the latch module in conjunction with the mode enable signal mode_en. Based on the block selection signal blk_sel, it generates a first block path control signal blk_usel_mv and a second path control signal blk_sel_hv. These two block path control signals are then used to control the word line multiplexing transmission module to generate corresponding word line selection signals, thereby applying different voltages in the horizontal direction to the selected blocks in the flash memory array module.

[0027] Furthermore, in this embodiment, as Figure 2 As shown, the latch module includes a latch; the input of the latch is connected to the block selection signal blk_sel, and the output is the latch signal lat_out.

[0028] In practical applications, the latch also has a reset terminal and a set terminal. The reset terminal is connected to the latch reset signal latch_rst, and the set terminal is connected to the latch set signal latch_set. The specific circuit structure and control method of the latch are well known to those skilled in the art, and will not be described in detail here.

[0029] This embodiment adds a latch, which uses its latching function to maintain the word line WL voltage of the current block. By utilizing the capacitance between the word line WL and the surrounding physical structure, the voltage applied to the block is stored for a certain period of time, thereby realizing multi-blk voltage settings to achieve flexible setting of horizontal multi-dimensional weights. Since only one latch is added (the circuit area occupied by the optimized logic gate in the block selection module is small and negligible), the area increase of the flash memory horizontal multi-dimensional weight control circuit based on convolution operation provided in this embodiment is controlled within 5% compared with existing circuits. This solves the problem of how to flexibly adjust the horizontal multi-dimensional weights of flash memory without significantly increasing chip area and power consumption.

[0030] And, in this embodiment, as Figure 2 As shown, the word line multiplexing transmission module is connected to multiple bias signals, such as wl_sel_reg, wl_usel_reg, tsg_sel_reg, tsg_usel_reg, bsg_sel_reg, and bsg_usel_reg. The word line multiplexing transmission module selects the corresponding bias signal based on the block path control signal to generate the corresponding word line selection signal. Specifically, the first block path control signal blk_usel_mv controls the word line multiplexing transmission module to open the tsg_usel_reg and bsg_usel_reg paths; the second path control signal blk_sel_hv controls the word line multiplexing transmission module to open the wl_sel_reg, wl_usel_reg, tsg_sel_reg, and bsg_sel_reg paths.

[0031] Preferably, the word line multiplexing transmission module is also connected to a selection path signal sw_sel_usel_hv, which is used to select wl_sel_reg or wl_usel_reg.

[0032] The word line multiplexing transmission module controls the opening of the corresponding signal path through the first path control signal blk_usel_mv and the second path control signal blk_sel_hv to access the corresponding bias signal and generate corresponding word line selection signals, such as tsg, bsg, wrn, wrn+1, wrn-1, wrn+, and wrn-. Then, according to the generated word line selection signal, the module selects the corresponding word line WL in the flash memory array module and applies a horizontal voltage to the selected block blk in the flash memory array module.

[0033] In practical applications, the word line multiplexing transmission module can completely adopt the existing circuit structure of the word line multiplexing transmission module. Its signal input, output and control methods are well known to those skilled in the art, and this application will not elaborate on them further.

[0034] And, in this embodiment, as Figure 2 As shown, the flash array module receives word line selection signals generated by the word line multiplexing transmission module, such as tsg, bsg, wrn, wrn+1, wrn-1, and wrn-, and selects word lines in the flash array module according to the word line selection signals, and applies a horizontal voltage to the selected block in the flash array module.

[0035] In practical applications, the flash memory array module can fully utilize existing flash memory arrays, such as NAND flash memory arrays, whose signal input, output and control methods are well known to those skilled in the art, and will not be described in detail here.

[0036] It should be noted that, based on the flash memory horizontal multidimensional weight control circuit structure based on convolution operation provided in this embodiment, any modifications and optimizations to the block selection module and latch module that do not violate the spirit of this application, such as replacing the NOT gate with any circuit structure that can invert the block selection signal blk_sel, should also fall within the protection scope of this application.

[0037] This embodiment also provides a flash memory horizontal multidimensional weight control method based on convolution operations, applied to the flash memory horizontal multidimensional weight control circuit based on convolution operations as described above, such as... Figure 3 As shown, the flash memory horizontal multidimensional weight control method based on convolution operations includes: S1 provides the block selection signal; S2, the block selection module generates a block path control signal based on the block selection signal; S3, the word line multiplexing transmission module generates a word line selection signal according to the block path control signal to select word lines in the flash array module, and applies a horizontal voltage to the selected block in the flash array module; wherein, the weight of the block varies depending on the applied voltage; S4 is the enable signal for the horizontal voltage of the blocks in the flash memory array module, which is stored in the latch module.

[0038] Specifically, repeat the above steps until the horizontal voltage is applied to all blocks in the flash array module; the page information of each block may be different, and the applied voltage may also be different.

[0039] The flash memory horizontal multidimensional weight control method provided in this embodiment uses a newly added latch module to maintain the word line voltage of the current block, and then uses an optimized block selection module and word line multiplexing transmission module to sequentially set the block voltage to achieve flexible setting of horizontal multidimensional weights. This achieves flexible adjustment of the horizontal multidimensional weights of flash memory without significantly increasing chip area and power consumption on the basis of existing flash memory structures, thus solving the problem of how to flexibly adjust the horizontal multidimensional weights of flash memory without significantly increasing chip area and power consumption.

[0040] Corresponding to the embodiment provided Figure 2 The flash memory horizontal multidimensional weight control circuit structure based on convolution operation is shown in the figure. This embodiment provides a specific control flow, taking the sample-and-hold operation of a single block as an example, and its signal timing diagram is as follows. Figure 4 As shown.

[0041] See Figure 4 First, the mode enable signal `mode_en` changes from invalid to valid to activate the block selection module and enter convolution mode; simultaneously, the latch reset signal `latch_rst` changes from valid to invalid to reset the latch. Then, the block selection signal `blk_sel` is made valid to apply voltages to WL and tsg. Here, the first power supply voltage `Vm` and the second power supply voltage `Vh` need to be valid. At this time, the second block path control signal `blk_sel_hv` follows the block selection signal `blk_sel`. Afterwards, the word line multiplexing transmission module makes tsg, wrn, wrn+1, wrn-1, wrn+, and wrn- valid according to the second block path control signal `blk_sel_hv`. Finally, the latch set signal `latch_set` records the voltage applied to the block.

[0042] When the block selection signal blk_sel is disabled, the already configured word line WL will float at the corresponding voltage, and tsg and bsg will be driven to the corresponding voltage. At this time, the first block path control signal blk_usel_mv becomes valid, where different wrns are selected according to different page information.

[0043] In practical applications, weights can be applied to different locations based on block (blk) addresses and page (page) addresses. After voltage application is completed for all blocks, multi-blk operations can be performed by sequentially designing weights according to user requirements.

[0044] Furthermore, this embodiment also provides a flash memory, including the flash memory horizontal multidimensional weight control circuit based on convolution operation as described above.

[0045] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to mutually. In addition, different parts between embodiments can also be combined with each other, and this invention does not limit this.

[0046] This embodiment provides a flash memory horizontal multidimensional weight control circuit and method based on convolution operations, and a flash memory, including: a flash memory array module; a word line multiplexing transmission module connected to the flash memory array module; the word line multiplexing transmission module is used to generate a word line selection signal to select word lines in the flash memory array module, and apply a horizontal voltage to the selected block in the flash memory array module; wherein, the weight of the block varies depending on the applied voltage; a block selection module connected to the word line multiplexing transmission module; the block selection module is used to generate a block path control signal according to the block selection signal to control the word line multiplexing transmission module to generate the word line selection signal; and a latch module connected to the block selection module; the latch module is used to store the enable signal of the horizontal voltage of the block in the flash memory array module. By adding a latch module and optimizing the block selection module on the basis of the existing flash memory structure, the word line voltage of the current block can be maintained by the latch module without significantly increasing the chip area and power consumption. Then, the voltage of the block can be set sequentially by the block selection module and the word line multiplexing transmission module to achieve flexible setting of horizontal multi-dimensional weights. This solves the problem of how to flexibly adjust the horizontal multi-dimensional weights of flash memory without significantly increasing the chip area and power consumption.

[0047] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A flash memory horizontal multidimensional weight control circuit based on convolution operation, characterized in that, include: Flash array module; A word line multiplexing transmission module is connected to the flash memory array module; the word line multiplexing transmission module is used to generate a word line selection signal to select a word line in the flash memory array module, and to apply a horizontal voltage to the selected block in the flash memory array module; wherein, the weight of the block varies depending on the applied voltage; A block selection module is connected to the word line multiplexing transmission module; the block selection module is used to generate a block path control signal based on the block selection signal to control the word line multiplexing transmission module to generate a word line selection signal. A latch module is connected to the block selection module; the latch module is used to store the enable signal of the horizontal voltage of the block in the flash array module.

2. The flash memory horizontal multidimensional weight control circuit based on convolution operation according to claim 1, characterized in that, The latch module is also used to generate a latch signal based on the block selection signal; the block selection module is used to generate a block path control signal based on the block selection signal, the latch signal and the mode enable signal.

3. The flash memory horizontal multidimensional weight control circuit based on convolution operation according to claim 2, characterized in that, The block selection module includes AND gates, NOT gates, OR gates, and a first horizontal shifter; The two inputs of the AND gate are respectively connected to a latch signal and a mode enable signal, and the output is connected to one input of the OR gate; the input of the NOT gate is connected to a block selection signal, and the output is connected to the other input of the OR gate; the output of the OR gate is connected to the input of the first horizontal shifter; the output of the first horizontal shifter outputs a first block path control signal; the block path control signal includes the first block path control signal.

4. The flash memory horizontal multidimensional weight control circuit based on convolution operation according to claim 3, characterized in that, The block selection module further includes a second horizontal shifter; the input of the second horizontal shifter is connected to the block selection signal, and the output of the second horizontal shifter is a second block path control signal; the block path control signal further includes the second path control signal.

5. The flash memory horizontal multidimensional weight control circuit based on convolution operation according to claim 4, characterized in that, The first horizontal shifter is connected to a first power supply voltage, and the second horizontal shifter is connected to a second power supply voltage, wherein the first power supply voltage is lower than the second power supply voltage.

6. The flash memory horizontal multidimensional weight control circuit based on convolution operation according to claim 2, characterized in that, The latch module includes a latch; the input of the latch is connected to a block selection signal, and the output of the latch signal is output.

7. The flash memory horizontal multidimensional weight control circuit based on convolution operation according to claim 1, characterized in that, The word line multiplexing transmission module is connected to multiple bias signals. It selects the corresponding bias signal according to the block path control signal to generate the corresponding word line selection signal. It selects the corresponding word line in the flash memory array module according to the generated word line selection signal and applies a horizontal voltage to the selected block in the flash memory array module.

8. A flash memory horizontal multidimensional weight control method based on convolution operation, applied to the flash memory horizontal multidimensional weight control circuit based on convolution operation as described in any one of claims 1 to 7, characterized in that, The flash memory horizontal multidimensional weight control method based on convolution operations includes: Provide block selection signal; The block selection module generates a block path control signal based on the block selection signal; The word line multiplexing transmission module generates a word line selection signal based on the block path control signal to select word lines in the flash memory array module, and applies a horizontal voltage to the selected block in the flash memory array module; wherein, the weight of the block varies depending on the applied voltage. The latch module stores the enable signal of the horizontal voltage of the blocks in the flash memory array module.

9. The flash memory horizontal multidimensional weight control method based on convolution operation according to claim 8, characterized in that, The flash memory horizontal multidimensional weight control method based on convolution operations also includes: Repeat the above steps until the horizontal voltage is applied to all blocks in the flash array module; the voltage applied to each block is different.

10. A flash memory, characterized in that, Includes the flash memory horizontal multidimensional weight control circuit based on convolution operation as described in any one of claims 1 to 7.

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