Processing method after etching of groove and through hole

By employing a three-step plasma treatment method in semiconductor manufacturing to form a carbon-based film within the same cavity, the damage problem of copper-low-k double damascus structure after etching is solved, the electromigration lifetime is improved and the dielectric constant drift is reduced, thus achieving efficient copper surface protection.

CN121985802APending Publication Date: 2026-05-05CHONGQING XINLIAN MICROELECTRONICS CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
CHONGQING XINLIAN MICROELECTRONICS CO LTD
Filing Date
2025-12-29
Publication Date
2026-05-05

AI Technical Summary

Technical Problem

In semiconductor manufacturing, after etching trenches and vias in copper-low k double damasceral structures, there are residual fluoropolymers and thin layers of copper oxide, which lead to increased contact resistance and shortened electromigration lifetime.

Method used

A three-step plasma treatment method is adopted. In the same vacuum chamber and at the same temperature, the first plasma treatment with CO and N2 removes etching byproducts, the second plasma treatment with N2 and H2 reduces copper oxide, and the third plasma treatment with CO and N2 forms a second carbon-based film, forming a 100-200 Å carbon-based film to protect the copper surface.

Benefits of technology

It effectively removes post-etching damage, reduces dielectric constant drift and copper contamination, improves electromigration lifetime, ensures the reliability of subsequent processes and production line compatibility, and avoids the risks of metal residue and re-oxidation caused by a single reducing gas.

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Abstract

The invention relates to the technical field of semiconductor manufacturing, and particularly discloses a method for processing a groove and a through hole after etching, which comprises the following steps of: providing a substrate, forming an interlayer dielectric layer on the surface of the substrate, forming the through hole and the groove which are obtained by etching in the interlayer dielectric layer, and exposing the surface of a copper interconnection structure at the bottom of the through hole; and performing first plasma treatment on the substrate to remove etching byproducts on the surfaces of the through hole, the groove and the copper interconnection structure, and forming a first carbon-based film on the surfaces of the through hole, the groove and the copper interconnection structure. According to the processing method after etching of the groove and the through hole, the second carbon-based film is formed on the surfaces of the groove and the through hole and serves as a protection structure before wet cleaning, even if the second carbon-based film is stored in the atmosphere for a long time, the oxygen content of the copper surface is almost not increased, and the effects of protection and water vapor isolation are really achieved; the problems that in the prior art, after etching, a low-dielectric-constant material is damaged, and front-layer metal is oxidized are solved.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, specifically to a method for processing trenches and vias after etching. Background Technology

[0002] As semiconductor manufacturing technology advances to deep submicron and nanometer nodes, copper-low-k double damask structures have become the mainstream interconnect solution. This technology uses dry etching of PET (Post Etch Treatment) to form trenches and vias in a low-dielectric-constant dielectric layer. However, as... Figure 4 As shown, after etching to form vias and trenches, the surfaces of these vias and trenches are simultaneously subjected to two types of contamination: firstly, residual fluoropolymers (CF_x) increase contact resistance; secondly, the formed copper oxide (CuO) thin layer leads to increased resistance, plating filling defects, and shortened electromigration lifetime. Therefore, how to mitigate the damage to ultra-low K materials and the oxidation of the preceding Cu metal layer after etching has become a problem that we need to solve. Summary of the Invention

[0003] The purpose of this invention is to provide a method for processing after etching trenches and vias, thereby passivating the exposed copper surface to solve the problems of damage caused by low dielectric constant materials and oxidation of the preceding copper metal after etching as mentioned in the background art.

[0004] To achieve the above objectives, the present invention provides the following technical solution: a method for processing trenches and through-holes after etching, comprising the following steps: S1: Provide a substrate, wherein an interlayer dielectric layer is formed on the surface of the substrate, and etched vias and trenches are formed in the interlayer dielectric layer, wherein the bottom of the vias exposes the surface of the front copper interconnect structure; S2: The substrate is subjected to a first plasma treatment to remove etching byproducts from the surfaces of the vias, trenches and copper interconnect structures, and to form a first carbon-based film on the surfaces of the vias, trenches and copper interconnect structures. The process gas for the first plasma treatment includes CO and N2. S3: Perform a second plasma treatment on the substrate to reduce the copper oxide on the surface of the copper interconnect structure. The process gas for the second plasma treatment includes N2 and H2. S4: The substrate is subjected to a third plasma treatment to form a second carbon-based film on the surface of the vias, trenches and copper interconnect structures. The process gases of the third plasma treatment include CO and N2.

[0005] Steps S1, S2, and S3 are performed sequentially within the same vacuum chamber and at the same process temperature.

[0006] The process temperature is 50 °C.

[0007] The specific process parameters for the third plasma treatment are as follows: process pressure 250–300 mT, high frequency (40 MHz) power 300–400 W, low frequency (13 MHz) power 0 W, CO flow rate 100 sccm, N2 flow rate 300–500 sccm, and treatment time 20–40 seconds.

[0008] The thickness of the second carbon-based film is 100–200 Å.

[0009] The specific process parameters for the first plasma treatment are as follows: process pressure 100–150 mT, high frequency (40 MHz) power 300–400 W, low frequency (13 MHz) power 50–100 W, CO flow rate 100–200 sccm, N2 flow rate 700–900 sccm, and treatment time 20–40 seconds.

[0010] The specific process parameters for the second plasma treatment are as follows: process pressure 250–350 mT; high frequency (40 MHz) power 300–400 W; low frequency (13 MHz) power 50–100 W; H2 flow rate 10–20 sccm; N2 flow rate 10–100 sccm; and treatment time 20–40 seconds.

[0011] The total duration of the first plasma treatment, the second plasma treatment, and the third plasma treatment is 70–90 seconds.

[0012] The interlayer dielectric layer has a multilayer structure, including stacked etch stop layers and low dielectric constant material layers.

[0013] Before filling the through holes and trenches with copper metal, the second carbon-based film is removed by wet cleaning.

[0014] Compared with the prior art, the beneficial effects of the present invention are: The post-etching treatment method for trenches and vias of this invention utilizes a 100-200Å second carbon-based film formed on the surface of the trenches and vias. This film acts as a protective structure before wet cleaning, ensuring that even after prolonged exposure to the atmosphere, the oxygen content on the copper surface hardly increases, effectively protecting against moisture. Furthermore, it leaves zero residue after cleaning, does not affect subsequent seed layer / electroplating, and balances reliability and production line compatibility. This reduces the on-chip RC increment, improves electromigration lifetime, and avoids the problems associated with existing processing methods that typically use a single reducing gas (H2 or CO), requiring separate chambers for polymer removal and CuO reduction, leading to easy re-oxidation upon vacuum breaking. It also avoids the risks of diffusion contamination from introducing foreign metals (Mn, Zn, etc.) for chemical reduction, which have a narrow process window and struggle to control damage in ultra-low k dielectric layers (≤2.7k).

[0015] The post-etching treatment method for trenches and vias of the present invention completes "cleaning-reduction-passivation" in the same cavity and at the same temperature without cooling, breaking the vacuum, or introducing foreign metal atoms. That is, all three steps are completed in the same cavity at 50°C. Low damage, low contamination, and low RC drift result in a lower ULK dielectric constant drift, a reduction of Cu contamination on the cavity wall by an order of magnitude, a lower RC increment, and an improved EM lifetime. Attached Figure Description

[0016] Figure 1 This is a flowchart of the post-etching treatment method for trenches and through holes according to the present invention; Figure 2 This is a schematic diagram of the process method of the present invention for eliminating the polymer after etching and forming a carbon-based film; Figure 3 This is a schematic diagram of the through-hole, trench etching of low dielectric constant material layer and interconnect metal layer after processing by the process steps of this invention; Figure 4 This is a schematic diagram illustrating the damage to the low dielectric constant material layer and its impact on the interconnect metal layer after through-hole and trench etching in the existing copper interconnect double damask process.

[0017] In the figure: 1. Titanium nitride layer; 2. Silicon oxynitride layer; 3. Low dielectric constant material layer; 4. Etching stop layer; 5. Copper oxide; 6. Etching byproduct; 7. First carbon-based film; 8. Second carbon-based film. Detailed Implementation

[0018] To further illustrate the technical means and effects of the present invention in achieving its intended purpose, the following detailed description of the specific implementation methods, structures, features, and effects of the present invention, in conjunction with the accompanying drawings and preferred embodiments, is provided below.

[0019] The following describes a method for processing trenches and through holes after etching according to the present invention, with reference to the accompanying drawings.

[0020] Example 1 like Figure 1 , Figure 2 As shown, a method for processing trenches and through-holes after etching includes the following steps: S1: A substrate is provided, on the surface of which an interlayer dielectric layer is formed. Through-holes and trenches are formed in the interlayer dielectric layer, and the bottom of the through-holes exposes the surface of the previous copper interconnect structure. The substrate can be a silicon wafer, or a SiGe, GaN, or SiC substrate, as long as the surface can be deposited with SiCOH and is compatible with double damascene etching. In this embodiment, a silicon wafer material is used.

[0021] S2: The substrate is subjected to a first plasma treatment to remove etching byproducts 6 from the surfaces of the vias, trenches, and copper interconnect structures, and to form a first carbon-based film on the surfaces of the vias, trenches, and copper interconnect structures. The process gases for the first plasma treatment include CO and N2. Specifically, the etching byproduct 6 is a fluoropolymer.

[0022] S3: The substrate is subjected to a second plasma treatment to reduce the copper oxide 5 on the surface of the copper interconnect structure, thereby reducing the copper oxide 5 on the copper surface to metallic copper. The process gases for the second plasma treatment include N2 and H2.

[0023] S4: The substrate is subjected to a third plasma treatment to form a second carbon-based film 8 on the surfaces of the vias, trenches, and copper interconnect structures. The process gases for the third plasma treatment include CO and N2. The second carbon-based film 8 serves only to isolate moisture before subsequent wet cleaning and is completely removed during wet cleaning.

[0024] Example 2 Based on the basic steps of Example 1, the following steps are added: Steps S1, S2, S3, and S4 are performed sequentially within the same vacuum chamber and at the same process temperature of 50°C, wherein: The specific process parameters for the first plasma treatment are: process pressure 100–150 mT, high-frequency (40 MHz) power 300–400 W, low-frequency (13 MHz) power 50–100 W, CO flow rate 100–200 sccm, N2 flow rate 700–900 sccm, and treatment time 20–40 seconds. By employing the above process, fluoropolymers can be broken down into volatile small molecules, while simultaneously pre-coating a first carbon-based film 7 onto copper.

[0025] The specific process parameters for the second plasma treatment are as follows: process pressure 250–350 mT; high-frequency (40 MHz) power 300–400 W, low-frequency (13 MHz) power 50–100 W, H2 flow rate 10–20 sccm, N2 flow rate 10–100 sccm, and treatment time 20–40 seconds. By employing the above process, insulating CuO is transformed into conductive pure copper, preparing for subsequent processes.

[0026] The specific process parameters for the third plasma treatment are as follows: process pressure 250–300 mT, high-frequency (40 MHz) power 300–400 W, low-frequency (13 MHz) power 0 W, CO flow rate 100 sccm, N2 flow rate 300–500 sccm, and treatment time 20–40 seconds. By employing the above process, the carbon film thickness is precisely between 100–200 Å (0.1–0.2 nm), sufficient to repel water yet thin enough to be easily washed off.

[0027] like Figure 3 As shown, the post-etching treatment method for trenches and vias of the present invention completes "cleaning-reduction-passivation" in the same cavity and at the same temperature without cooling, breaking the vacuum, or introducing foreign metal atoms. That is, all three steps are completed in the same cavity at 50°C. Low damage, low contamination, and low RC drift result in a lower ULK dielectric constant drift, a reduction of Cu contamination on the cavity wall by an order of magnitude, a lower RC increment, and an improved EM lifetime.

[0028] Example 3 Building upon the basic steps of Example 2, the total duration of the first, second, and third plasma treatments is controlled to 70–90 seconds, resulting in a lower on-chip RC increment and improved electromigration lifetime. Furthermore, the total treatment time is only 70–90 seconds, faster than conventional H2 annealing, yet it reduces the rate of increase in chip resistance-capacitance delay while improving electromigration lifetime. The presence of the second carbon-based film 8 ensures that even after prolonged storage in the atmosphere, the oxygen content on the copper surface hardly increases, effectively protecting against moisture.

[0029] The interlayer dielectric layer has a multilayer structure, including a stacked etch stop layer 4 and a low dielectric constant material layer 3. The etch stop layer 4 is a silicon carbide (SiCOH) layer, and the low dielectric constant material layer 3 is a porous SiCOH with a dielectric constant ≤ 2.7. After the formation of the second carbon-based film 8, the dielectric constant drift is small. That is, after the carbon film passivation process of this invention, the k-value of this SiCOH layer changes very little, with almost no damage, and the low-k performance is well preserved. Before filling the vias and trenches with copper metal, the second carbon-based film 8 can be removed by wet cleaning. At this time, there may be a small probability of some residual first carbon-based film 7, which has no impact and will be washed away along with the second carbon-based film 8.

[0030] The post-etching treatment method for trenches and vias of this invention utilizes a 100-200Å second carbon-based film 8 formed on the surface of the trenches and vias, which acts as a protective structure before wet cleaning. Even after prolonged storage in the atmosphere, the oxygen content on the copper surface hardly increases, effectively protecting against moisture. Furthermore, it leaves zero residue after cleaning, does not affect subsequent seed layer / electroplating, and balances reliability and production line compatibility. This reduces the on-chip RC increment, improves electromigration lifetime, and avoids the problems associated with existing processing methods that typically use a single reducing gas (H2 or CO), requiring separate chambers for polymer removal and CuO reduction, leading to easy re-oxidation upon vacuum breaking. It also avoids the risks of diffusion contamination from introducing foreign metals (Mn, Zn, etc.) for chemical reduction, which have a narrow process window and struggle to control damage in ultra-low k dielectric layers (≤2.7).

[0031] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0032] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

Claims

1. A method for processing trenches and through-holes after etching, characterized in that: Includes the following steps: S1: Provide a substrate, wherein an interlayer dielectric layer is formed on the surface of the substrate, and etched vias and trenches are formed in the interlayer dielectric layer, wherein the bottom of the vias exposes the surface of the front copper interconnect structure; S2: The substrate is subjected to a first plasma treatment to remove etching byproducts from the surfaces of the vias, trenches and copper interconnect structures, and to form a first carbon-based film on the surfaces of the vias, trenches and copper interconnect structures. The process gas for the first plasma treatment includes CO and N2. S3: Perform a second plasma treatment on the substrate to reduce the copper oxide on the surface of the copper interconnect structure. The process gas for the second plasma treatment includes N2 and H2. S4: The substrate is subjected to a third plasma treatment to form a second carbon-based film on the surface of the vias, trenches and copper interconnect structures. The process gases of the third plasma treatment include CO and N2.

2. The method for processing trenches and through-holes after etching according to claim 1, characterized in that: Steps S1, S2, S3, and S4 are performed sequentially within the same vacuum chamber and at the same process temperature.

3. The method for processing trenches and through-holes after etching according to claim 2, characterized in that: The process temperature is 50 °C.

4. The method for processing trenches and through-holes after etching according to claim 1 or 2, characterized in that: The specific process parameters for the third plasma treatment are as follows: process pressure 250–300 mT, high frequency (40 MHz) power 300–400 W, low frequency (13 MHz) power 0 W, CO flow rate 100 sccm, N2 flow rate 300–500 sccm, and treatment time 20–40 seconds.

5. The method for processing trenches and through-holes after etching according to claim 1, characterized in that: The thickness of the second carbon-based film is 100–200 Å.

6. The method for processing trenches and through-holes after etching according to claim 4, characterized in that: The specific process parameters for the first plasma treatment are as follows: process pressure 100–150 mT, high frequency (40MHz) power 300–400 W, low frequency (13MHz) power 50–100 W, CO flow rate 100–200 sccm, N2 flow rate 700–900 sccm, and treatment time 20–40 seconds.

7. The method for processing trenches and through-holes after etching according to claim 6, characterized in that: The specific process parameters for the second plasma treatment are as follows: process pressure 250–350 mT; high frequency (40 MHz) power 300–400 W; low frequency (13 MHz) power 50–100 W; H2 flow rate 10–20 sccm; N2 flow rate 10–100 sccm; and treatment time 20–40 seconds.

8. The method for processing trenches and through-holes after etching according to claim 7, characterized in that: The total duration of the first plasma treatment, the second plasma treatment, and the third plasma treatment is 70–90 seconds.

9. The method for processing trenches and through-holes after etching according to claim 1, characterized in that: The interlayer dielectric layer comprises stacked etch stop layers and low dielectric constant material layers.

10. The method for processing trenches and through-holes after etching according to claim 1, characterized in that: Before filling the through holes and trenches with copper metal, the second carbon-based film is removed by wet cleaning.