Mu-LED device and method for producing Mu-LED device
By combining microlenses and pixelation in µLEDs, and optimizing light output and charge carrier confinement through two mesa etching steps, the high brightness and optical crosstalk issues of µLEDs in AR and VR applications are solved, achieving higher internal quantum efficiency and light extraction efficiency.
Patent Information
- Application Number
- CN202480063469.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-10-02
- Filing Date
- 2024-09-26
- Publication Date
- 2026-05-05
AI Technical Summary
µLEDs face challenges in AR and VR applications, including high brightness, directionality, and optical crosstalk, especially in phosphide-based systems where large diffusion lengths lead to internal losses and low light extraction efficiency.
The design combines microlenses with pixelation, optimizes light output coupling and charge carrier confinement through two mesa etching steps, and uses different material systems and layer structures to reduce optical crosstalk and improve internal quantum efficiency.
It improves the overall efficiency and directionality of µLEDs, reduces optical crosstalk, enhances light output coupling and shaping capabilities, and is suitable for µLED devices with various material systems.
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Figure CN121986574A_ABST
Abstract
Description
[0001] This application claims priority to German application DE 10 2023 126 794.9, filed on October 2, 2023, the disclosure of which is incorporated herein by reference in its entirety. The present invention relates to a µLED device with integrated microlenses having improved performance, and a method for processing µLEDs with integrated microlenses. Background Technology
[0002] µLEDs are used in a variety of applications, including but not limited to projection display applications. In the case of VR or AR applications, the overall display size is relatively small, at most a few cm², which poses a challenge when achieving high resolutions such as HDr or even higher.
[0003] Therefore, µLEDs are used because they offer a very small size of only a few µm² while still providing sufficient brightness. However, in addition to achieving brightness across all the primary colors—red, blue, and green—high directivity and low or no optical crosstalk are also required. Depending on the design, µLEDs are either implemented as an integrated array of devices or placed individually on the surface of a circuit board wafer.
[0004] Typically, to achieve high brightness and reduce optical crosstalk, optoelectronic devices and µLEDs undergo mesa etching during processing to optically and electrically isolate the individual devices on the wafer. This process is suitable for both standalone devices and integrated arrays. However, mesa etching leads to nonradiative recombination (NRR) of charge carriers at the mesa edges due to defects (dangling bonds) generated in the optoelectronic device structure along the mesa edges, which act as NRR centers. The current diffusion in the layers above and below the active region, as well as through the active region, allows charge carriers to propagate along the pixel edge direction, where they then nonradiatively recombine at the defects, thus reducing the quantum efficiency of the µLED.
[0005] Due to the short diffusion length of charge carriers in this material system, this effect has relatively low relevance for optoelectronic devices based on nitride materials. However, for µ-LEDs based on phosphide materials, such as InGaP, InAlP, or indium gallium aluminum phosphite (InGaAlP), the diffusion length is significantly larger, and may even exceed the length of these devices. µ-LEDs based on such material systems are typically used for red to yellow emission; however, the emission wavelength can vary with composition.
[0006] In addition to the diffusion length, InGaAlP-based µLEDs (red emission) also have a high refractive index, resulting in high internal losses and low light extraction efficiency.
[0007] Therefore, the object of the present invention is to solve some of the above-mentioned problems in order to improve the overall efficiency and directionality of µLEDs intended for use in AR and VR applications. Summary of the Invention
[0008] This objective and other objectives are addressed by the subject matter of the independent claim. Features and additional aspects of the proposed principle are outlined in the dependent claims.
[0009] The inventors propose combining the formation of microlenses (μlenses) using semiconductor materials with pixelation processes to separate individual light-emitting layer stacks. In this way, improved light output coupling and charge carrier confinement for enhanced internal quantum efficiency can be combined in a single design. The proposed concept utilizes only two mesa etching steps from two opposite sides, where each step can be optimized separately from the others.
[0010] The proposed method is not limited to specific material systems or processing techniques. A wide variety of material systems, including phosphides, nitrides, and arsenides, can also be used. The design of the µLED can be chosen independently of the microlens design and optimized, for example, for high internal quantum efficiency. Microlenses can provide various functions depending on application requirements. To this extent, processing can be optimized and the overall structure can be post-processed to add further optical functions, such as, but not limited to, collimation, light shaping using optical band gaps, and even light conversion and mixing.
[0011] Therefore, the inventors have proposed a μLED device comprising a first layer having a first doping type and a second layer having a second doping type, and a stack of active layer structures between the first and second layers. The active layer structure may include a single pn junction, a quantum well, or a multi-quantum well structure. Depending on the design, different material compositions of the layers used for the active layer structure are possible; that is, different Al concentrations can be used to provide the barrier layer and quantum well layer in a multi-quantum well structure.
[0012] Similarly, the first and second doped layers may include one or more sublayers that facilitate various functions, such as charge carrier injection and charge carrier transport. The material composition may also vary, resulting in slightly different band gaps. These different band gaps can be used to improve the light-emitting device by reducing internal absorption. Various techniques and optimization methods are known in the art.
[0013] The μLED device according to the proposed principle also includes a first contact covering a surface of a first layer, the surface of which faces away from the active layer structure. The contact may also form a connection to a circuit chip that provides control and power signals to the μLED. According to the proposed principle, a semiconductor layer forming a microlens is deposited on a surface of a second layer, the surface of which faces away from the active layer structure. The layer stack now includes a first mesa etched sidewall extending from the first layer along the active layer structure toward the second layer. The semiconductor layer includes a second mesa etched sidewall that forms a microlens.
[0014] Therefore, the device includes sidewalls extending in different directions. When the sidewalls of the layer stack are tilted or do not extend from the first contact toward the active layer structure, the second sidewall, provided by the second mesa etching, forms a microlens for generating and emitting light in a semiconductor layer that is not part of the layer stack. However, both are monolithically integrated and have been processed from the same wafer. As a result of the proposed principle, alignment of the microlens material and the layer stack is not required, thereby not only reducing complexity but also enabling better output coupling and shaping of light with less distortion. The lens shape can be obtained through a photolithography step via photoresist shaping and by adjusting the plasma etching conditions during the second mesa etching process.
[0015] In some respects, the second mesa etched sidewalls each include an increased periphery in the direction toward the active layer structure. The first mesa etch includes either an increased periphery in the direction toward the active layer structure or a periphery that is substantially equal in the direction toward the active layer structure. Simply put, the two sidewall portions, the lower portion of the layer stack, and the upper portion of the microlens "open" toward the center of the structure.
[0016] In this respect, the two sidewall portions can include different dimensions. For example, in some aspects according to the proposed principles, the outermost periphery of the second mesa etched sidewall closest to the active layer structure is larger than the outermost periphery of the first mesa etched sidewall closest to the active layer structure. Simply put, this means that the microlens overlaps with the active layer structure and extends outward. This has the advantage that light emitted from the layer stack toward the side can still be collimated by the microlens or otherwise processed. Alternatively, the periphery of the second mesa etched sidewall includes a maximum value larger than the maximum value of the periphery of the first mesa etched sidewall. Similarly, the maximum periphery of the semiconductor layer is larger than either the periphery of the active layer structure or the maximum periphery of the first mesa etched sidewall.
[0017] In some aspects, the first mesa etched sidewall extends into a portion of the second layer. This first mesa etched sidewall may optionally expose a flat surface portion of the second layer adjacent to the sidewall. The flat surface may extend laterally to adjacent devices, allowing multiple devices to be arranged in a μLED array. The flat surface portion is covered by a regenerated layer or a dielectric material.
[0018] In some other aspects of the proposed principle, the second mesa etch sidewall extends into a portion of the second layer, optionally penetrating the second layer to reach the dielectric layer surrounding the layer stack. Thus, in some aspects, the second mesa etch can cut through the second doped layer and even through the regrown layer previously applied to the layer stack. This complete separation of the second doped layer prevents or significantly reduces any optical crosstalk of light entering adjacent μLEDs. The structure also includes a significantly smaller artificial pn interface between the regrown layer and the second doped layer. Consequently, the parasitic diode is smaller, and its impact is reduced.
[0019] Some other aspects involve a second contact portion, i.e., a contact portion that contacts the second doped layer. In some aspects, a conductive layer material, particularly one of a reflective metal and ITO, is deposited on a portion of the etched sidewall of the second mesa of the microlens to form the second contact portion. For example, a reflective metal is used if the light is not yet collimated or a narrower beam shape is required. In some aspects, a metal covers a portion of the sidewall of the second doped layer and a portion of the semiconductor layer forming the microlens. Depending on the base material system and the material used for the semiconductor layer, a metal composition or alloy or even a conductive transparent oxide such as ITO may be suitable.
[0020] To prevent short circuits or reduce any parasitic effects of artificially generated interfaces, in some aspects, a dielectric layer is deposited on a portion of the second mesa etched sidewall, the dielectric layer covering at least a portion of the second doped layer and optionally a portion of the regenerated layer exposed by the second mesa etch.
[0021] Depending on the underlying material, post-processing of the layer stack is necessary after forming the sidewalls. This is particularly relevant for phosphide and arsenide-based μLEDs due to their large diffusion lengths of several μm. In some aspects of the proposed principle, the first mesa etched sidewalls are covered by one or more regrown layers. These regrown layers extend onto the surface of the first layer facing away from the active layer structure, onto the sidewalls, and optionally onto the flat surface portion of the second doped layer adjacent to the sidewalls. They are typically applied after the mesa etching process. In some cases, the material is doped, and its thickness varies from several 100 nm to several 100 nm. One or more such regrown layers can be applied to provide carrier injection and transport capabilities. In some aspects, the regrown layers can also inject charge carriers from the sidewalls into the active layer structure.
[0022] In some aspects, the passivation and dielectric layers may cover the sidewalls and optionally the regrown layer (if present). The passivation layer extends from the sidewalls to the planar portion of the second doped layer adjacent to the sidewalls. In some aspects, the passivation layer also serves as an etch stop layer during the second mesa etching process. Thus, the passivation forms a direct interface with an additional passivation layer for the microlens, the second layer forming the microlens, or the semiconductor layer.
[0023] In some other aspects of the proposed principle, the semiconductor layer includes: a doped contact layer deposited on the second doped layer and optionally in contact with a metal layer forming a second contact portion; and a substantially undoped layer on the doped contact layer. The undoped layer may be made of a different material composition than the contact layer, including a lower refractive index and / or optionally a larger band gap than the doped contact layer. In some aspects, the first contact portion may include a reflective metal extending from the surface of the first layer to the sidewalls of the layer stack.
[0024] The proposed µLED is suitable for emitting light of various colors. Therefore, based on the proposed principle, different material systems can be used for µLEDs or µLED arrays. For example, in some aspects, the layer stack can be based on a phosphide material system, wherein the active layer structure comprises InGaAlP with different Al concentrations in its different sublayers; and wherein the semiconductor material comprises one of InGaAlP and InAlP. Alternatively, nitride material systems can be used, including but not limited to one or more of GaN, AlGaN, InGaN, and InGaAlN.
[0025] On the other hand, a method for processing μLEDs having an array of integrated microlenses and / or such devices is provided. In the method for processing the μLED device, a growth substrate having an optional buffer layer is provided. A semiconductor layer is epitaxially deposited on the growth substrate, and a layer stack is epitaxially deposited on the semiconductor layer. The layer stack includes a first layer of a first doping type and a second layer of a second doping type, and an active layer structure between the first and second layers, the second layer facing the semiconductor layer.
[0026] A first mesa etching process is then performed to expose the sidewalls of the first layer, the active layer structure, and optionally a portion of the second layer. The first mesa etching process creates an exposed surface of the second layer that is substantially parallel to the growth substrate. The exposed sidewalls may optionally be annealed or otherwise treated, depending on the base material used for the layer stack.
[0027] The first contact material is then deposited on the surface of the first layer and over the exposed sidewalls of the stacked layers, and optionally also on a flat surface adjacent to the sidewalls. The first contact material is electrically isolated from the sidewalls and the flat surface. Therefore, the first contact material directly electrically connects to the first layer, rather than all other layers.
[0028] The layer stack is then re-bonded, and the growth substrate is subsequently removed. Re-bonding exposes the semiconductor layer. A second mesa etch process in the semiconductor layer shapes a microlens that is substantially centered above the layer stack. The second contact is ultimately deposited on or along the periphery of the mesa etch sidewall of the semiconductor layer.
[0029] In some additional aspects, the sidewalls exposed during the first mesa etching process can be annealed or otherwise treated to reduce the density of nonradiative recombination centers. For this purpose, one or more regenerated layers can be deposited on the exposed sidewalls, comprising undoped or lightly p-doped material with a larger band gap than the material of the active layer structure. The regenerated layers generate an electric barrier that repels charge carriers from the surface of the sidewalls. Additionally or alternatively, a dielectric material is deposited on one or more regenerated layers, optionally covering the exposed surface of the second layer, substantially parallel to the growth substrate.
[0030] The proposed principle requires only two mesa etching steps, with the first step referred to as the shallow mesa etching step. The second mesa etching step is performed from a different direction and side. This differs from conventional techniques, which utilize two mesa steps from the same side for both shallow and deep mesa etching. As a result of the proposed principle, the slope or gradient of the sidewalls of the layer stack relative to the lateral dimension of the active layer structure is essentially constant. In other words, the tilted etched sidewalls generated during the first mesa etching process do not have edges.
[0031] A second mesa etching process is performed to form sloping sidewalls, and the slope of the semiconductor layer sidewalls relative to the lateral dimension of the active layer structure includes at least two different values. More specifically, the slope can be convex, parabolic, or any other form. Furthermore, the surfaces of the semiconductor layer stack can be further processed to have periodic recesses to generate photonic crystals or to roughen the surface. The first mesa etched sidewalls and / or the second mesa etched sidewalls each include an increased periphery in the direction toward the active layer structure.
[0032] In some other respects, the lateral dimension of the sidewalls generated during the first mesa etching is smaller than that of the sidewalls generated during the second mesa etching.
[0033] Several aspects define the steps for performing the second mesa etching process. For example, the semiconductor layer is etched down to a small portion of the doped semiconductor layer remaining on top of the second layer. In this embodiment, the second mesa etching process will therefore only etch a portion of the semiconductor layer. Alternatively, the semiconductor layer is etched until the second layer is reached. Furthermore, at least a portion of the second layer may be etched. Thus, in some cases, the second layer is etched from both sides.
[0034] In some aspects, the second mezzanine etching process completely etches through the second layer. The second mezzanine etching may stop at the etchant stop layer. Such a layer can be, for example, a passivation layer. In some cases, it is a passivation layer deposited after the first mezzanine etching process.
[0035] In some cases, a conductive layer material, particularly a reflective metal and ITO, is deposited on a portion of the second mesa etched sidewall, especially the second mesa etched sidewall adjacent to the periphery of the semiconductor layer, thereby forming a second contact. In the case of a reflective metal, light emitted in this direction is reflected into the layer stack. This can support the collimation of light associated with microlenses.
[0036] Depending on the depth of the second mezzanine etching process and the design of the layer stack (i.e., with a regrowth layer), portions of the regrowth layer are exposed. Therefore, it is advisable to deposit a dielectric layer material on the flat surface adjacent to the sidewalls exposed by the second mezzanine etching process. The dielectric layer may also cover the exposed portions of one of the second layer and one or more regrowth layers.
[0037] Several further aspects involve the semiconductor layer and the materials used to form the microlens. Depending on the material system, a high refractive index can present challenges. Therefore, in some aspects, it has been proposed to provide the semiconductor layer with several sublayers having different band gaps and / or refractive indices. Typically, the microlens material should have a band gap larger than that of the active layer structure to ensure that the generated light is substantially transparent. Simultaneously, this material can serve as a carrier injection layer and contact the second contact portion.
[0038] Therefore, in some aspects, a semiconductor layer is deposited on a growth substrate by first depositing a substantially undoped layer on a doped contact layer. A doped contact layer is then deposited on the substantially undoped layer, wherein the doped layer optionally includes a higher refractive index than the undoped layer and / or optionally includes a smaller band gap than the undoped contact layer. Attached Figure Description
[0039] Further aspects and implementations based on the proposed principles will become apparent relative to the various embodiments and examples described in detail with reference to the accompanying drawings, in which:
[0040] Figure 1A first embodiment of a µLED with integrated microlenses based on some aspects of the proposed principles is shown;
[0041] Figure 2 A second embodiment of a µLED with integrated microlenses, based on some aspects of the proposed principles, is shown;
[0042] Figure 3A and Figure 3B Two different implementations of µLEDs with integrated microlenses having additional optical functions, based on some aspects of the proposed principles, are shown.
[0043] Figures 4A to 4E Several method steps for processing µLEDs with integrated microlenses are shown, based on some aspects of the proposed principles;
[0044] Figures 5A to 5C Further steps are shown in the processing of the light-emitting side of a µLED with integrated microlenses, based on some aspects of the proposed principles;
[0045] Figure 6A and 6B Further processing steps for processing the light-emitting side of a µLED with integrated microlenses, based on some aspects of the proposed principles, are shown. Detailed Implementation
[0046] The following embodiments and examples disclose various aspects and combinations thereof based on the proposed principles. The embodiments and examples are not always drawn to scale. Similarly, different elements may be enlarged or reduced in size to emphasize various aspects. It is self-evident that the aspects of the embodiments and examples shown in the figures can be combined with each other without difficulty, which does not contradict the principles of the invention. Some aspects illustrate regular structures or forms. It should be noted that in practice, slight differences and deviations from the ideal form may occur; however, this will not contradict the inventive concept.
[0047] Furthermore, the various figures and aspects are not necessarily shown in precise dimensions, nor are the proportions between the elements substantially accurate. Some aspects are highlighted by showing them enlarged. However, terms such as "above," "over," "below," "under," "larger," and "smaller" are used precisely to indicate the elements in the figures. Therefore, such relationships between elements can be inferred based on the figures.
[0048] Figure 1A first embodiment of a µLED with a monolithically integrated microlens formed on a main emitting surface is shown. For simplicity, the surface of the microlens and the main emitting surface of the combination of the microlens and the µLED are referred to as the top surface, while the surface facing away from the main emitting surface is referred to as the bottom surface. Similarly, the surface facing the bottom surface faces downwards.
[0049] Figure 1 The illustrated µLED includes a substrate 10 on which the device is disposed. The substrate 10 can be a temporary carrier for further processing of the device or any final wafer including circuitry for controlling the device or supplying the necessary power to the device. In this respect, the temporary substrate 10 can be made of a semiconductor material such as SiO2 or another material different from the base material system of the corresponding µLED.
[0050] This embodiment relates to a phosphide-based µLED, including but not limited to InGaAlP, InAlP, and InGaP. The actual material composition can vary in different layers to obtain different electrical properties or examples. Phosphide material systems are suitable for emitting light in the orange to red portion of the visible spectrum. Based on the proposed principles, the µLED comprises a mesa-etched semiconductor layer stack based on such a material system. More specifically, the µLED comprises a first mesa-etched structure forming a layer stack from bottom to top surface and a second mesa-etched and contact layer from top to bottom corresponding to the region where the microlens 19 is generated.
[0051] More specifically, the µLED1 includes a contact metal layer 11 disposed on a carrier substrate 10. The contact layer 11 comprises a metal that also serves as a mirror interface facing the microlens 19 to reflect light generated in the active layer 17. A p-doped contact layer 13, such as doped InGaAlP (indium gallium aluminum phosphide) or other materials such as doped GaAs (gallium arsenide) or doped GaP (gallium phosphide), is disposed on the contact metal layer 11. The p-doped layer 13 on top of the contact layer 11 serves as a current distribution layer. Then, for example, a p-doped layer 14 epitaxially grown based on the same material system is disposed on top of the layer 13. Then, a thin p-doped barrier layer 15, such as made of InAlP (indium aluminum phosphide), is deposited on top. In addition to the contact layer 13, layers 14 and 15 also extend on the sidewalls, as explained in more detail below. Instead of the material of layer 13, the sidewalls are covered by a dielectric material 11.
[0052] Following layer 14 are several other p-doped layers (as depicted in 16) including an InGaAlP cladding layer, on which a multi-quantum-well structure 17 is disposed. The multi-quantum-well structure 17 comprises multiple InGaAlP (indium gallium aluminum phosphide) layers that serve as barrier layers and quantum well layers, respectively, in this embodiment. The layers of structure 17 are typically undoped (or have only a small dopant concentration) and contain alternating different aluminum concentrations. The different aluminum contents in the respective layers of the multi-quantum-well structure 17 cause variations in the band gaps in the barrier layers and quantum well layers, with the barrier layers comprising a higher band gap due to a higher aluminum content. Following the multi-quantum-well structure 17, an additional cladding layer (not shown herein) is deposited on the multi-quantum-well structure, and an n-doped layer material 18 is deposited thereon.
[0053] The stacked layers of layer 16, the cladding layer, layer structure 17, and the n-doped layer 18 are typically mesa etched during device processing to achieve separation between different devices. Mesa etch, also known as shallow mesa etch, is based on the material system that creates sloping sidewalls. In this case, with a phosphide material system, the sloping sidewalls are subsequently annealed, and in this particular case, the material of the p-doped barrier layer 15 is regrowth or overgrown. Similarly, the deposition of the p-doped layer 14 is accomplished using a regrowth process. The bottom surface of layer 14 on the sidewalls is covered with a passivation and dielectric layer, and only the bottom surface is covered with a p-doped contact layer.
[0054] The mesa etched surface of the stacked layers slopes at an angle from the bottom toward the n-doped layer 18, and then extends further outwards, substantially parallel to the main emission surface. Therefore, as... Figure 1 As shown, the active layer structure 17 is disposed within the mesa etched sidewall. A passivation and dielectric layer 12 is disposed on the sidewall of the p-doped layer 14 and extends on a flat surface adjacent to the sloping sidewall. This prevents current from flowing from the metal of the p-contact layer 11 into the n-doped layer 18 adjacent to the sloping sidewall or from the sidewall into the layer stack.
[0055] For example, an additional n-contact layer 19'' made of n-doped InGaAlP material is disposed on layer 18. A layer 19' forming a microlens is disposed on layer 19''. Both the contact layer 19'' and the lens layer 19'' are generated and form the microlens 19 during the second mesa etching process. The microlens layer 19'' covers the periphery of the active layer structure 17 in the mesa etch layer stack. More specifically, as shown by the vertical dashed line, the periphery of the microlens layer 19' follows the periphery of the mesa etch sidewall of the layer stack. Therefore, the active layer structure 17 includes dimensions equal to (in the case of vertical sidewalls) or slightly smaller than the corresponding microlens layer 19'' disposed on the n-contact layer 19'' and layer 18. The periphery of the microlens layer 19'' is now surrounded by contact metal 20 disposed on the surface of the contact layer 19''. The contact metal 20 is used for the n-side of the contact layer stack.
[0056] As presented herein, two mesa etching steps are required to form the corresponding combination of the layer stack of microlenses and µLED1. Therefore, the sloping sidewalls of the layer stack from bottom to top comprise essentially a single angle, whereas in conventional solutions using more mesa etching steps, various angles can occur. Furthermore, the first mesa etching, as shown herein, will leave a small portion of the n-doped layer 18 on the outer periphery intact and thus will not completely etch through the layer stack.
[0057] The remaining material as part of layer 18 and the additional material in the n-contact layer 19' surrounding the µLEDs can cause optical crosstalk in a monolithically integrated µLED array where several µLEDs are arranged adjacent to each other. This can slightly reduce the overall efficiency. Partly, this can be mitigated by etching through both layers at a greater distance from the periphery. However, such an approach requires more space between two adjacent µLEDs. On the other hand, the remaining material is essentially defect-free and therefore does not have a significant amount of nonradiative recombination centers. Therefore, in this solution, the internal quantum efficiency is increased.
[0058] Figure 2 An alternative solution is presented, in which optical crosstalk is further reduced at the cost of potential additional nonradiative recombination centers. The structure and design of the stacked layers 16, 17, and 18 are similar to the previous implementation. Similarly, the stacked layers are etched using shallow mesa etching, and then overgrown using barrier layer 15, epitaxial doped layer 14, and contact and passivation layers 13 and 12, respectively. To this extent, the structure is similar to Figure 1 The structure shown in the implementation method.
[0059] However, in subsequent processing steps, a second mesa etching is performed using contact materials 19' and 19'' to form a microlens, as described in more detail below. The mesa etching does not stop at the n-doped contact layer material 19', but continues until the passivation layer 12, deposited on the periphery in the previous processing step after regrowth and passivation, is reached. Therefore, the peripheral portion of the n-doped material layer 18 is completely etched through. Similarly, the planar portions of the periphery of the barrier layer 15 and the epitaxial layer 14 adjacent to the sloping sidewalls are also etched and completely removed until the passivation layer 12 is reached. However, the active layer 17 is overgrown by the p-doped epitaxial layer. The overall pn junction between the p-doped barrier layer 15 and the material layer 18 is reduced due to the second etching process.
[0060] After annealing the exposed sidewalls, a dielectric layer 21 is applied to the surfaces of the exposed portions of layers 18, 15, and 14 to cover the exposed n-doped regions of layer 18, as well as the potential p-doped regions of the barrier layer material 15 and the p-doped layer 14. A metal contact layer 20 is disposed on top of the passivation layer 21.
[0061] like Figure 2 As shown, the design and periphery of the microlens can be adjusted so that not only the contact materials of layers 19' and 19'' but also a portion of the n-doped layer 18 forms a microlens. To prevent or at least reduce light emission along the sidewalls of the µLED, the contact layer 20 is made of a reflective metal, or alternatively, of ITO, if the desired collimation or light emission characteristics have been achieved. Similarly, if the light emitted from the active layer toward the microlens differs, for example, due to the specific design of the contact metal layer 11, the application of the metal contact can be replaced by ITO, and vice versa.
[0062] and Figure 1 In comparison, µLEDs offer the advantage of reduced carrier leakage through a p-doped regrown layer at the periphery and the avoidance or reduction of artificial pn junctions along the periphery through additional deep mesa etching from the top side. Using a metal as the contact layer also suppresses any optical crosstalk between any adjacent µLEDs. Similar to previous embodiments, the active region of the layer structure 17 is located within the microlens region. Furthermore, the periphery of the active layer structure 17 includes a smaller region size than the corresponding bottom dimension of the microlens. This improves overall light extraction efficiency. Finally, the microlens geometry is adjusted so that it substantially corresponds to the pixel mesa structure, providing reduced far-field distortion.
[0063] continue Figure 3A and 3B The etched microlenses, or more generally, layers 19'' and 19', can provide additional optical functionality. A structure similar to the embodiment is shown below. Figure 3A Initially, a structured mask layer can be applied, followed by etching of portions of the contact layer of the microlens 19''. The resulting structure with periodic recesses causes adjustment of the photonic bandgap, which leads to narrowing and shaping of the far-field of the emitted light. By changing the geometry or applying slightly different materials in the corresponding recesses, the effective refractive index can be tuned to improve light extraction from high-refractive-index materials to lower or low-refractive-index materials. Additionally, the recesses can be filled with quantum dots or converter materials to provide mixing of light that generates mixed-color light.
[0064] Figure 3A and Figure 3B Two possible implementations of this additional treatment for microlenses following deep mesa etching are shown. Although in Figure 2 and Figure 3AIn this process, by setting appropriate parameters, the mesa etching process itself produces an adjustable surface with certain optical properties, but... Figure 3A The structure was created by a dedicated structured etching process following a second mesa etching from top to bottom. Figure 3A In this context, photonic crystals support the shaping of emitted light. Figure 3B In this process, multiple periodically arranged cones and / or cone-like structures are generated, which provides improved light extraction. Other shapes and arrangements can be added with any desired functionality.
[0065] Figures 4A to 4E Some processing steps of a method for fabricating µLEDs, or more generally, multiple µLEDs, based on the proposed principles are illustrated. While only the processing of a single µLED is shown herein, this method can be used to fabricate multiple monolithically integrated µLEDs on a corresponding wafer. These µLEDs can then be further processed via wafer-to-wafer bonding to directly apply the necessary power and control circuitry to the µLED array.
[0066] It should also be noted that various methodological steps can be adjusted or slightly modified depending on the chosen base material system and several design choices. In particular, this involves post-processing after the first shallow etching of the sidewalls of the active layer structure, which strongly affects the overall quantum efficiency. For example, in phosphide or arsenide material systems, overgrowth techniques can be specifically used to reduce nonradiative recombination centers. Such techniques are not required in nitride-based material systems, or can be implemented in a simpler manner because the diffusion length of charge carriers is shorter in such systems.
[0067] Figures 4A to 4E Several methodological steps for processing µLEDs according to the proposed principles are illustrated. The method for processing utilizes steps similar to those in conventional manufacturing techniques, beginning with a growth substrate 50 on a wafer level, which includes one or more buffer layers 51. The growth substrate and buffer layers 51 are selected based on the underlying material system in subsequent processing steps. Buffer layers 51 are typically used to homogenize and planarize the surface, and to cover any possible crystal defects from the growth substrate 50, to provide a smooth and defect-free surface.
[0068] On top of the buffer layer surface, multiple epitaxially deposited layers with different doping methods are performed. The deposition process can be carried out in various ways, including, for example, chemical vapor deposition (CVD), its derivatives such as MOCVD, PECVD, physical vapor deposition (PVD), etc. Various parameter settings, such as dopant concentration or base material system adjustments, can be used to provide the appropriate layer stacking. In addition to the phosphide material system used in this embodiment, material systems such as phosphide or nitride systems are also suitable for processing according to the proposed principles. Such material systems include, for example, gallium arsenide, GaAs or AlGaAs, GaP, AlGaP, InGaAlP, GaN, AlGaN, and InAlGaN.
[0069] In this embodiment, a first doped layer 19 is epitaxially deposited on the top surface of the buffer layer 51. Layer 19 also serves as a subsequent structure for the microlens and may include a thickness of several µm. For this purpose, it may include various dopant concentration settings and slight variations in material composition to tune reflectivity in order to improve output coupling of light into the air interface. In this regard, layer 19 may include one or more sublayers, such as an undoped 19' and an n-doped 19'' with different material compositions for refractive index matching.
[0070] On top of layer 19, where the n-contact layer subsequently forms, an n-doped layer 18 is epitaxially deposited. Compared to layer 19 and its sublayers, the n-doped layer 18 may include a slightly different material composition and is used for current distribution and current injection of charge carriers from layer 19 into the active layer structure 17. Layer 18 may also include one or more barrier layers, for example, made of indium aluminum phosphide (InAlP) or aluminum phosphide (AlP).
[0071] A first thin cladding layer 17' is deposited on top of layer 18, and the cladding layer is an undoped indium gallium aluminum phosphide layer. The cladding layer 17' is used to prevent dopant from diffusing from layer 19 or 18 into the active region of layer structure 17. In this embodiment, layer structure 17 includes a multi-quantum-well structure having multiple barrier layers and quantum-well layers, respectively. The active layer structure 17 is made of indium gallium aluminum phosphide composition, wherein the different layers serving as barrier layers and quantum-well layers are distinguished by different aluminum contents. More specifically, a higher aluminum content is typically used for barrier layers due to a slightly increased bandwidth. The number of barrier layers and quantum-well layers can vary and reach between 4 and 20, but may also include larger or smaller numbers. A second cladding layer 17'' is disposed on top of multi-quantum-well structure 17, and a p-doped layer structure 16 is disposed on top of the cladding layer.
[0072] Figure 4AThe layer stack shown corresponds to a conventional layer stack and is subsequently mesa-etched to provide a mesa-etched layer stack. For this purpose, a hard mask 30 is applied to the top surface of the p-doped layer 16, which is then structured to expose a portion of the top surface in region 31. The hard mask material is capable of withstanding subsequent etching processes, such as... Figure 4B As shown. Figure 4B As shown, the etching process removes various layers down to a small portion of the n-doped layer 18. The etching process exposes the sidewalls 32 of the p-doped layer 16, both the cladding layers 17' and 17'', and the multiple quantum well structure 17. The exposed flat surface of layer 18 is slightly recessed relative to the first cladding layer 17', so a small portion of layer 18 is etched by this process. However, in this particular example, the etching process can also be performed only to the level of approximately the cladding layer 17', thereby creating a recess 31.
[0073] Based on the corresponding material systems, further steps must now be taken to reduce the number of nonradiative recombination centers and clean exposed sidewalls, such as those of the cladding layers 17', 17'' and the multi-quantum-well structure 17. In particular, for phosphide material systems, various techniques have been developed, including, for example, quantum-well mixing along the sidewalls prior to etching. A different technique is shown here, utilizing the regrowth of several layers covering the sidewalls with semiconductor material to process the stack. Figure 4C The process is illustrated, in which a lightly p-doped thin layer 15 is regrowth along the top surface of layer 16 and on the exposed sidewalls. Depending on the design technique, layer 15 may comprise several sublayers. Layer 15 serves as a p-doped barrier layer, including, for example, indium aluminum phosphide (InAlP), which provides a larger bandgap than the active layer structure 17. This generates a bandgap potential that prevents charge carriers from reaching nonradiative recombination centers along the sidewalls. Layer 15 extends over the surface of layer 16, the sidewalls, and a portion of the top surface of the n-doped layer 18. However, due to its small thickness, layer 15 has a relatively high resistance, thus providing only a small leakage current through a pn junction artificially created at the interface between layer 18 and layer 15.
[0074] In subsequent steps, several more p-doped layers are deposited and regrowed on the corresponding top surface and sidewalls.
[0075] Figure 4D The result of the deposition process is shown, including an additional p-doped epitaxial layer 14 deposited on the barrier layer 15. In a subsequent step, a p-contact layer 13 (made of p-doped InGaAlP, p-doped GaAs, ITO, or p-doped GaP) is also deposited on the top surface and along the sidewalls. A photoresist layer (not shown herein) is then applied, followed by structuring. A subsequent etching process removes material from the sidewalls and the planar portion above the n-doped layer 18 of the contact layer 13. The material of layer 13 only covers the top of layer 14.
[0076] Finally, a dielectric insulating layer 12 is deposited on the top surface, side surfaces, and surrounding mesa etched portions of layer 13. The dielectric layer 12 may comprise SiO2, Al2O3, or any other dielectric material suitable for the design of µLEDs. It is fully embedded within the mesa etched layer stack and the regenerated layers. An additional photoresist layer (not shown herein) is then deposited and subsequently structured to cover the dielectric passivation layer 12 on the sidewalls and the mesa etched portions adjacent to the sidewalls in layer 18. Thus, the top surface of the passivation layer 12 is exposed and subsequently removed to expose the surface of the underlying p-contact layer 13. A contact material 11 is then deposited on the top surface of layer 13 and on the sidewalls of the layer stack. The contact material 11, such as a metal or metallic composition, provides charge carriers injected into layer 13 and subsequently into the active structure 17. Any current flowing through the artificial pn interface on the mesa etched portions is effectively suppressed in the passivation and dielectric layers 12 along the sidewalls and in the mesa etched portions adjacent to the sidewalls in layer 18.
[0077] The metallic material of layer 12 may include reflective properties; for example, gold can be used in the case of a phosphide material system. Reflective properties improve the operating efficiency of the device.
[0078] Figure 4E The resulting structure is essentially complete and can now be further processed by re-bonding the µLED or µLED array to a temporary or permanent substrate. For this purpose, any shallow mesa etched recesses can be filled with some additional dielectric material, and the structure can be completely re-bonded to a temporary substrate, for example, using wafer-to-wafer bonding techniques. Figure 5A The result of such a re-bonding process is shown. For simplicity, the dielectric material of the temporary substrate 10 fills the relative space in the shallow mesa etched portion and the bottom surface 11 to provide a flat surface. The dielectric material may include recesses filled with a conductive material forming contact areas thereon. Wafer-to-wafer bonding (not shown herein) is used to connect the µLED array to the circuit wafer.
[0079] The re-bonding process provides access to the growth substrate 50 and the buffer layer 51. The growth substrate 50 and buffer layer 51 are then removed to obtain access to the top surface of layer 19. Layer 19 contains material subsequently used for fabricating its microlenses. In a first step, multiple hard mask layers 40 are deposited thereon and subsequently structured as shown. In this embodiment, the hard mask layers 40 substantially cover a portion of the top surface of layer 19 directly above the active layer structure 17. Depending on the design techniques and subsequent etching steps, the periphery of the hard mask layer 40 may include a diameter and size slightly larger than the periphery of the active layer structure 17. The hard mask layer may also include a specific shape or form that supports etching along a specific angle. In this example, the periphery of the hard mask layer 40 is slightly smaller than the edge of the mesa etch layer stack but has approximately the same dimensions as the periphery of the multi-quantum well layer 17.
[0080] Figure 5B The next processing step, in which deep mesa etching is performed, is illustrated. Similar to the shallow mesa etching step, various techniques, including dry or wet etching processes, are suitable. Depending on the materials used for layers 19 and 18 and the desired shape of the microlens, different etching parameters are used, as further explained below.
[0081] Deep mesa etching exposes the sidewalls of layer 19, which will later form microlenses, and also extends slightly into the top portion of layer 18 surrounding the periphery. Therefore, the resulting structure is slightly larger than the periphery of the active layer. The form and shape of the sidewalls, as well as their curvature, can be adjusted as needed. For example, during the etching process, etching parameters, such as etchant concentration or temperature, can be changed to alter the curvature and etching rate. Furthermore, different etchants, such as those suitable for selective etching along specific crystal orientations, are suitable for forming the desired shape. Additionally, the etching process can be stopped and the shape or form and size of mask layer 40 can be adjusted to provide different etching profiles.
[0082] Although, for simplicity, the sidewalls of the mesa etched shown herein are typically not straight as indicated, but rather curved, resembling the shape of the desired microlens and optical function. However, curvature is not always necessary, provided that the desired optical function of the microlens is achievable.
[0083] Figure 5C The next step is shown. After removing the hard mask layer, a photoresist layer 41 is applied and subsequently structured to re-expose the sidewalls of layer 19 and the now-exposed portion of layer 18 adjacent to the sidewalls of layer 19. Conductive material 20 is applied to the sidewalls and top of layer 18 to provide contacts for injecting charge carriers. In some cases, instead of... Figure 5CThe additional photoresist layer 41 shown can be reused with the hard mask 40, and a corresponding conductive material 20 can be applied thereon. Depending on the deposition, the sidewalls are either completely covered as shown, or only covered to a certain height, leaving some portions of the sidewalls of layer 19 uncovered. The conductive material 20 deposited thereon is ITO or any other conductive material that may include a reflective metal. This causes light emitted toward the sidewalls to be reflected back into the main µLED. Such light is then reflected again from the contact metal layer 11 until it is emitted through the top surface. Thus, the curvature of the microlens made of layer 19 and the material on the sidewalls allows for tuning of the optical function over a variety of different ranges and parameters.
[0084] Figure 6A and Figure 6B An embodiment with microlenses of different shapes generated by varying deep mesa etching processes is shown. In this embodiment, the hard mask layer 40 applied to the top surface of layer 19'' is slightly smaller than the periphery of the active layer structure 17. As a result, and which can be adjusted by changing parameters during the mesa etching process, the sidewalls and surfaces of material 19'' and n-contact layer 19' comprise a circular shape following the conventional form of a microlens. Furthermore, the etching process stops at regenerated layer 15, i.e., where it completely removes portions of layers 19'', 19', and 18 surrounding the periphery of the layer stack. In this respect, the material of layer 15 can be selected as a commonly used etch stop layer for mesa etching processes. Moreover, as indicated herein, the lens is slightly larger than the corresponding layer stack, with the bottom of the lens extending beyond the periphery of the layer stack itself. Therefore, in this particular embodiment, the microlens is larger than the dimensions of the active layer structure 17 and the layer stack.
[0085] As an alternative and not in Figure 6A As shown, deep mesa etching can continue until passivation layer 12 is reached. Such a solution will produce... Figure 2 The µLED depicted.
[0086] To prevent short circuits in the p-doped regrown layer 15, a dielectric material 21 is applied to the exposed surface of layer 15 before depositing the conductive material 20. Similar to previous embodiments, the conductive element 20 may include a transparent conductive oxide (e.g., ITO) or a metallic reflective layer. The main emitting surface is formed from the upper surface of the microlens material 19''. Furthermore, as... Figure 6A As shown, the additional n-contact layer 19' between the n-doped material 18 and the lens material 19'' includes a lower bandgap with a higher doping concentration than the undoped lens material 19'' described above. This provides a refractive index that matches the microlens material 19'', which provides improved functionality.
[0087] The proposed principle generates a µLED with a mesa-etched layer stack and integrated microlenses, fabricated from two different directions and sides (i.e., from the bottom and from the top) using two mesa-etching steps. Compared to conventional techniques, the combination of microlens formation following the mesa-etching process on the semiconductor layer stack enables the separation of individual emitters, providing improved optical output coupling and charge carrier confinement for enhanced internal quantum efficiency. These effects can be combined in a single design. Furthermore, since the lenses and layer stack are not processed as separate devices but rather from the same semiconductor material, microlens alignment is significantly simplified.
[0088] The various aspects illustrated in this paper can be combined in different ways and are independent of or unique to any particular material system. As previously mentioned, the combination of microlenses with layer stacks having monolithic epitaxial layer structures provides a combination of high internal quantum efficiency and reduced optical crosstalk. µLEDs with a given structure are suitable for project applications such as AR and VR because they allow for high efficiency and higher directionality of the output coupled light.
[0089] Reference list:
[0090] 1 µLED
[0091] 10. Substrate, Temporary Substrate
[0092] 11 Contact metal layer
[0093] 12 Passivation layer
[0094] 13 Contact Layer
[0095] 14 p-doped layer
[0096] 15 p-doped barrier layer
[0097] 16 p-doped layer
[0098] 17', 17'' Covering Layer
[0099] 17. Active layer structure
[0100] 18 n-doped layer
[0101] 19' n-Contact Layer
[0102] 19'' Microlens layer
[0103] 19 Microlenses
[0104] Periodic structures 19a and 19b
[0105] 20 Contact with metal
[0106] 21 Dielectric layer
[0107] 30 Hard Mask
[0108] 40 Hard Mask
[0109] 41 Photoresist layer
Claims
1. A µLED device, comprising: - A layer stack having a first layer of a first doping type and a second layer of a second doping type, and an active layer structure between the first layer and the second layer; - A first contact portion, the first contact portion covering the surface of the first layer, the surface being away from the active layer structure; - A semiconductor layer, wherein the semiconductor layer forms a microlens deposited on the surface of the second layer, the surface being away from the active layer structure; - Wherein, the layer stack includes a first mezzanine etched sidewall that extends from the first layer along the active layer structure toward the second layer; - Wherein, the semiconductor layer includes a second mesa etched sidewall, the sidewall forming the microlens.
2. The apparatus according to claim 1, wherein, - The second mesa etched sidewalls each include an increased periphery in the direction toward the active layer structure, and the first mesa etch includes either an increased periphery in the direction toward the active layer structure or a periphery that is substantially equal in the direction toward the active layer structure.
3. The apparatus according to any one of the preceding claims, wherein, The first mezzanine etched sidewall extends into a portion of the second layer, optionally exposing a flat surface portion of the second layer adjacent to the sidewall.
4. The apparatus according to any one of the preceding claims, wherein, The second mesa etched sidewall extends into a portion of the second layer, and optionally through the second layer to reach the dielectric layer stacked around the layer.
5. The apparatus according to any one of the preceding claims, wherein, - The outermost periphery of the second mesa etched sidewall closest to the active layer structure is larger than the outermost periphery of the first mesa etched sidewall closest to the active layer structure; or - The periphery of the second mesa etched sidewall includes a maximum value that is greater than the maximum value of the periphery of the first mesa etched sidewall; or - Wherein, the maximum periphery of the semiconductor layer is greater than the periphery of one of the maximum periphery of the active layer structure and the first mesa etched sidewall.
6. The apparatus according to any one of the preceding claims, wherein, - A conductive layer material, particularly one of a reflective metal and ITO, is deposited on a portion of the second mesa etched sidewall of the microlens to form a second contact portion; And / or - A dielectric layer is deposited on a portion of the second mesa etched sidewall, the dielectric layer covering at least a portion of the second doped layer and optionally covering a portion of the regenerated layer exposed by the second mesa etch.
7. The apparatus according to any one of the preceding claims, wherein, The first mesa etched sidewall is covered by one or more regenerated layers that extend to the surface of the first layer away from the active layer structure, to the sidewall, and optionally to the flat surface portion of the second doped layer adjacent to the sidewall.
8. The apparatus according to any one of the preceding claims, wherein, The sidewall is covered by a passivation layer that extends from the sidewall to the planar portion of the second doped layer adjacent to the sidewall.
9. The apparatus according to any one of the preceding claims, wherein, The semiconductor layer includes: - A doped contact layer, which is deposited on the second layer having a second doping type and optionally in contact with a metal layer forming the second contact portion; - A substantially undoped layer on the doped contact layer, the undoped layer optionally comprising a lower refractive index than the doped contact layer and / or optionally comprising a larger band gap than the doped contact layer.
10. The apparatus according to any one of the preceding claims, wherein, The first contact portion includes reflective metal extending from the surface of the first layer to the sidewall of the layer stack.
11. The apparatus according to any one of the preceding claims, wherein, The layer stack is based on a phosphide material system, wherein the active layer structure includes InGaAlP with different Al concentrations in its different sublayers; and wherein the semiconductor material includes one of InGaAlP and InAlP.
12. The apparatus according to any one of the preceding claims, wherein, The semiconductor layer includes an optical active structure on its shaped surface, particularly one of the following: - Anti-reflective coating; - Roughened surfaces; and - Generate a periodic structure of optical bandgap.
13. A method for processing a μLED device, comprising the following steps: - Provides a growth substrate with an optional buffer layer; - Epitaxially deposit a semiconductor layer on the growth substrate; - An epitaxially deposited layer stack is formed on the semiconductor layer, the layer stack having a first layer of a first doping type and a second layer of a second doping type, and an active layer structure between the first layer and the second layer, the second layer facing the semiconductor layer; - A first mesa etching process is performed to expose the sidewalls of the first layer, the active layer structure, and optionally a portion of the second layer, wherein the first mesa etching process creates an exposed surface of the second layer that is substantially parallel to the growth substrate; - Optionally, the exposed sidewalls may be annealed; - A first contact material is deposited on the surface of the first layer and over the exposed sidewalls of the layer stack, the first contact material being electrically isolated from the exposed sidewalls; - Re-bond the layer stack and then remove the growth substrate; - A second mesa etching process is performed in the semiconductor layer to form a microlens that is substantially centrally positioned above the layer stack; - Deposit a second contact on or along the periphery of the mesa etched sidewall of the semiconductor layer.
14. The method according to claim 13, wherein, Annealing the exposed sidewalls may optionally include the following steps: - Deposit one or more regenerated layers on the exposed sidewalls, the regenerated layers comprising undoped or p-doped material, the regenerated layers comprising a larger band gap than the material of the active layer structure; - Deposit dielectric material on the one or more regenerated layers, optionally covering the exposed surface of the second layer that is substantially parallel to the growth substrate.
15. The method according to any one of claims 13 to 14, wherein, Perform the first mesa etching process and / or the second mesa etching process to form a sloping sidewall, wherein the slope of the sidewall of the layer stack relative to the lateral dimension of the active layer structure is substantially constant, and wherein the slope of the sidewall of the semiconductor layer relative to the lateral dimension of the active layer structure includes at least two different values.
16. The method according to any one of claims 13 to 15, wherein, The first mesa etched sidewall and / or the second mesa etched sidewall each include an increased periphery in the direction toward the active layer structure.
17. The method according to any one of claims 13 to 16, wherein, The lateral dimension of the sidewall generated during the first mesa etching is smaller than the lateral dimension of the sidewall generated during the second mesa etching.
18. The method according to any one of claims 13 to 17, wherein, Performing a second mesa etching process includes at least one of the following: - Etch the semiconductor layer so that a small portion of the doped semiconductor layer remains on top of the second layer; - Etch the semiconductor layer until the second layer is reached; - Optionally etch at least a portion of the second layer - Optionally, etch through the second layer until the passivation layer or the etch stop layer.
19. The method according to any one of claims 13 to 18, wherein, The second mesa etching process includes: - A conductive layer material, particularly one of a reflective metal and ITO, is deposited on a portion of the second mesa etched sidewall, particularly on a portion of the second mesa etched sidewall adjacent to the periphery of the semiconductor layer, thereby forming a second contact portion; forming a second contact portion.
20. The method according to any one of claims 13 to 19, wherein, The second mesa etching process includes: A dielectric layer material is deposited on a flat surface adjacent to the sidewall of the semiconductor layer, exposed by the second mesa etching process; the dielectric layer optionally covers the exposed portion of the second layer and one or more regenerated layers.
21. The method according to any one of claims 13 to 20, wherein, The step of epitaxially depositing a semiconductor layer on the growth substrate includes: - Deposit a substantially undoped layer on the doped contact layer; - Deposit a doped contact layer on the substantially undoped layer, wherein the doped layer optionally includes a higher refractive index than the undoped layer and / or optionally includes a smaller band gap than the undoped contact layer.
22. The method according to any one of claims 13 to 21, wherein, The layer stack is based on a phosphide material system, wherein the active layer structure includes InGaAlP with different Al concentrations in its different sublayers; and wherein the semiconductor material includes one of InGaAlP and InAlP.