Signal processing method and device, storage medium and program product
By reading the reset enable state of the persistent reset signal during the startup phase of the electronic device and performing device or function reset during the enumeration phase, the problem of enumeration failure caused by the host's inability to recognize the BBRST pin is solved, and stable enumeration and function recovery of the electronic device are achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- FIBOCOM TECHNOLOGY CO LTD
- Filing Date
- 2026-01-21
- Publication Date
- 2026-05-08
AI Technical Summary
When the signal is unstable, the host cannot recognize and operate the BBRST pin of the PCIe device, resulting in enumeration failure and affecting the implementation of electronic device functions.
By using a persistent reset signal (PCIE signal) to read the reset enable state during the startup phase of the electronic device, and then resetting the device or function based on this state during the enumeration phase, the electronic device is ensured to clear abnormal states and the probability of enumeration failure is reduced.
It effectively reduces the probability of enumeration failure, ensures that electronic devices can be successfully enumerated when the host restarts, and expands the application scenarios, including devices without the BBRST pin.
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Figure CN121996471A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of communication technology, and in particular to signal processing methods, devices, storage media and program products. Background Technology
[0002] The host can enumerate electronic devices (such as peripheral component interconnect express (PCIe) devices) to discover, identify, and configure the electronic devices connected to the host. In some cases (such as unstable signals), enumeration may fail, requiring the host to reset the electronic devices to re-enumerate.
[0003] In one approach, the host can trigger a reset of the electronic device by sending a signal to its boot and reset (BBRST) pin. However, the BBRST pin is not a standard pin defined by the PCIe protocol. If the host does not store information related to the BBRST pin, it will not recognize or operate it, leading to reset failure, enumeration failure, and consequently, affecting the functionality of the electronic device. Therefore, reducing the probability of enumeration failure is a challenge. Summary of the Invention
[0004] This application provides signal processing methods, devices, storage media, and program products that can reduce the probability of enumeration failure.
[0005] In a first aspect, embodiments of this application provide a signal processing method applicable to electronic devices, such as electronic devices or devices within electronic devices. The method includes: during a startup phase, the electronic device reads the reset enable state of a persistent reset signal; during an enumeration phase, the electronic device receives the persistent reset signal; and when the reset enable state of the persistent reset signal is enabled, the electronic device performs a device reset based on the persistent reset signal.
[0006] In this method, the electronic device can reset itself during the enumeration phase based on the persistent reset signal, which is determined during the startup phase. This helps the electronic device clear any abnormal states of the device before the reset, allowing it to re-enumerate and reducing the probability of enumeration failure.
[0007] In this method, the persistent reset signal is the PCIe signal, which helps ensure successful reset of the electronic device and reduces the probability of enumeration failure when the electronic device restarts the host.
[0008] In one optional implementation, the electronic device performs a device reset based on the persistent reset signal when the persistent reset signal is enabled. Specifically, the electronic device performs a device reset based on the persistent reset signal when the persistent reset signal is enabled and the persistent reset signal is at a high level.
[0009] In this implementation, a high-level persistent reset signal indicates that the host has sent a persistent reset signal to the electronic device. Based on the reset enable state of the persistent reset signal determined during the startup phase, the electronic device can determine whether to perform a device reset based on the persistent reset signal. This helps the electronic device clear abnormal states and reduces the probability of enumeration failure.
[0010] In one optional implementation, the electronic device further performs the following step: when the reset enable state of the persistent reset signal is disabled, the electronic device performs a functional reset based on the persistent reset signal. In this embodiment, when the reset enable state of the persistent reset signal is disabled, the persistent reset signal is used to trigger the electronic device to perform a functional reset, so that the electronic device can initialize the functions of the electronic device (such as PCIe functions).
[0011] In one optional implementation, the electronic device performs a functional reset based on the persistent reset signal when the reset enable state of the persistent reset signal is disabled. Specifically, the electronic device performs a functional reset based on the persistent reset signal when the reset enable state of the persistent reset signal is disabled and the persistent reset signal is at a high level. In this implementation, a high-level persistent reset signal indicates that the host has sent a persistent reset signal to the electronic device. The electronic device can determine whether to perform a functional reset based on the persistent reset signal according to the reset enable state of the persistent reset signal determined during the startup phase. This facilitates clearing abnormal states of functions (such as PCIe functions) from the electronic device.
[0012] In one optional implementation, the electronic device reads the reset enable state of the persistent reset signal, specifically by the electronic device reading the reset enable state of the persistent reset signal from the configuration register. In this embodiment, the configuration register is used to store the configuration information of the electronic device. The electronic device reads the reset enable state of the persistent reset signal from the configuration register, which helps the electronic device to determine the type of reset based on the reset enable state of the persistent reset signal.
[0013] In one alternative implementation, the electronic device further performs the following steps: the electronic device determines its operating state; if the operating state of the electronic device is a link active state, a persistent reset signal is used to trigger the electronic device to perform a functional reset.
[0014] In this method, the electronic device restores the function of the persistent reset signal when the link is active, which is beneficial for subsequent electronic devices to perform functional reset based on the persistent reset signal. For example, restoring the function of the persistent reset signal when the electronic device is active allows the electronic device to perform functional reset in power-saving sleep mode (D3 / L2).
[0015] Secondly, embodiments of this application provide a communication device, the device comprising: The read module is used to read the reset enable state of the persistent reset signal during the startup phase. The communication module is used to receive a persistent reset signal during the enumeration phase. The processing module is used to reset the device based on the persistent reset signal when the reset enable state of the persistent reset signal is enabled.
[0016] In addition, other alternative implementations of the communication device in this regard can be found in the relevant content of the first aspect above, and will not be described in detail here.
[0017] Thirdly, embodiments of this application provide a communication device, which includes a communication module, a power module, a storage module, and a chip, wherein: The power module is used to provide power to the communication device; The storage module is used to store data and instructions; The communication module is used for internal communication within the communication device, or for communication between the communication device and external devices. The chip is used to perform the method described in the first aspect above.
[0018] Fourthly, this application also provides a computer device, the computer device comprising: a memory and a processor, wherein the memory stores a computer program, and the computer program, when executed by the processor, implements the steps of the method described above.
[0019] Fifthly, this application also provides a computer storage medium storing a computer program that, when executed by a processor, implements the steps of the method described above.
[0020] Sixthly, this application also provides a computer program product containing instructions that, when executed on a communication device, implement the steps of the method described above. Attached Figure Description
[0021] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, those skilled in the art can obtain other drawings based on these drawings without any creative effort.
[0022] Figure 1 A schematic diagram of the architecture of a computer system provided in this application embodiment; Figure 2 A schematic flowchart of a signal processing method provided in an embodiment of this application; Figure 3 A timing diagram of a persistent reset signal provided for an embodiment of this application; Figure 4 This is a schematic diagram of the structure of a communication device provided in an embodiment of this application; Figure 5 This is a schematic diagram of the structure of a communication device provided in an embodiment of this application; Figure 6 This is a schematic diagram of the structure of a computer device provided in an embodiment of this application.
[0023] The realization of the objectives, functional features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. The accompanying drawings have illustrated specific embodiments of this application, which will be described in more detail below. These drawings and textual descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concepts of this application to those skilled in the art through reference to specific embodiments. Detailed Implementation
[0024] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.
[0025] It should be understood that the terms "comprising" or "including" indicate the presence of the stated features, steps, operations, elements, components, items, types, and / or groups, but do not exclude the presence, occurrence, or addition of one or more other features, steps, operations, elements, components, items, types, and / or groups. The terms "or," "and / or," and "comprising at least one of the following," as used in this application, can be interpreted as inclusive, or mean any one or any combination thereof. For example, "comprising at least one of the following: A, B, C" means "any one of the following: A; B; C; A and B; A and C; B and C; A and B and C," and similarly, "A, B, or C" or "A, B, and / or C" means "any one of the following: A; B; C; A and B; A and C; B and C; A and B and C." Exceptions to this definition only occur when the combination of elements, functions, steps, or operations is inherently mutually exclusive in some way.
[0026] It should be understood that although the steps in the flowcharts of this application's embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some of the steps in the figures may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times, and their execution order is not necessarily sequential, but can be performed alternately or in turn with other steps or at least a portion of the sub-steps or stages of other steps.
[0027] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.
[0028] In the following description, the use of suffixes such as "module," "part," or "unit" to denote elements is solely for the purpose of illustrative purposes and has no specific meaning in itself. Therefore, "module," "part," or "unit" may be used interchangeably.
[0029] The following describes the computer system architecture to which the embodiments of this application apply. For example... Figure 1 As shown, Figure 1This is a schematic diagram of the architecture of a computer system provided in an embodiment of this application. The computer system includes a host 101 and an electronic device 102. The host 101 is used for controlling the bus, initiating enumeration, allocating resources, and managing devices. The host 101 and the electronic device 102 can be connected via a bus. The electronic device 102 can receive instructions from the host 101 via the bus, and thus the electronic device 102 can respond to the instructions of the host 101 and perform corresponding operations. For example, the host 101 and the electronic device 102 are connected via a PCIe bus. The electronic device 102 can receive an enumeration request from the host 101 via the PCIe bus, and thus the electronic device 102 responds to the enumeration request by performing enumeration.
[0030] The host 101 can be a server, embedded host, industrial computer, etc., and this application does not limit the type of host 101. The electronic device 102 can be a high-speed peripheral component interconnect express (PCIe) device, and this application does not limit the type of electronic device 102.
[0031] To facilitate understanding of the signal processing method disclosed in the embodiments of this application, the relevant terms are explained below.
[0032] (1) Enumeration Enumeration refers to the handshake process before communication between a host and an electronic device. After powering on, the host scans and discovers one or more electronic devices connected to the bus, and initializes and configures these devices. The specific process is as follows: the host scans the bus and discovers electronic devices; the host reads the configuration information of the electronic devices; the host allocates resources to the electronic devices; the host initializes the electronic devices.
[0033] (2) Reset Reset refers to the process by which the host sends a reset signal to the electronic device to trigger the electronic device to clear its current operating state and restore it to its initial state. The reset signal includes the boot and reset (BBRST) signal and the persistent reset (PERST) signal. The BBRST signal is used for device reset, and the PERST signal is used for function reset.
[0034] (3) BBRST pin The BBRST pin is used on electronic devices to receive the BBRST signal. After receiving the BBRST signal, the electronic device performs a device reset.
[0035] The BBRST pin is not defined by the PCIe protocol. If the host does not save the relevant information for the BBRST pin, it may not be able to recognize the BBRST pin in the event of an electronic device enumeration failure or a host restart. Consequently, the host may not send a BBRST signal to the electronic device's BBRST pin to trigger a device reset, which could cause the electronic device to malfunction.
[0036] (4) Equipment reset Device reset refers to the process by which an electronic device clears the current operating state of all its functional modules and restores it to its initial state. For example, when the host sends a BBRST signal to the BBRST pin of the electronic device, the electronic device receives the BBRST signal, clears the current operating state of all its functional modules, and restores it to its initial state.
[0037] Electronic devices restart during a device reset process; therefore, when a restart is required, it can be achieved through a device reset. All functional modules include PCIe modules and non-PCIe modules. PCIe modules are those that interact with the host based on the PCIe protocol. Non-PCIe modules are those that do not rely on the PCIe protocol but are used to implement the functions of the electronic device. (5) PERST pin The PERST pin is a pin on an electronic device used to receive the PERST signal. When an electronic device receives the PERST signal, it performs a functional reset. The PERST pin is defined by the PCIe protocol, and the host computer stores information related to the PERST pin. Therefore, in case of an abnormality in the electronic device, the host can trigger a functional reset using the PERST signal.
[0038] (6) Function Reset A function reset refers to the process by which an electronic device clears the current operating state of some of its functional modules and restores them to their initial state. For example, the host sends a PERST signal to the PERST pin of the electronic device. Upon receiving the PERST signal, the electronic device clears the current operating state of some of its functional modules and restores them to their initial state. In this function reset process, the electronic device does not need to be restarted, and some of the functional modules are PCIe functional modules.
[0039] In electronic devices where a device reset or restart is required for successful enumeration, if the host computer does not save information related to the BBRST pin, it cannot recognize and operate the BBRST pin, leading to device reset failure and consequently enumeration failure. If the electronic device does not have a BBRST pin, it also cannot perform a device reset, potentially causing enumeration failure. Therefore, reducing the probability of enumeration failure is a key issue.
[0040] To address the aforementioned problems, this application proposes a signal processing method. In this method, a persistent reset signal can be used to reset the device, thereby clearing abnormal states from the electronic device and reducing the probability of enumeration failure. See also... Figure 2 , Figure 2 This is a schematic flowchart illustrating a signal processing method provided in an embodiment of this application. The method is described from the perspective of interaction between an electronic device and a host computer. Figure 2 As shown, the method includes, but is not limited to, the following steps: S201. During the startup phase, the electronic device reads the reset enable state of the persistent reset signal.
[0041] The reset enable state of the persistent reset signal can be understood as the functional configuration information of the persistent reset signal. The reset enable state of the persistent reset signal indicates the type of reset triggered by the persistent reset signal in the electronic device. For example, the reset enable state of the persistent reset signal may indicate that the persistent reset signal triggers the electronic device to perform a device reset, or it may indicate that the persistent reset signal triggers the electronic device to perform a functional reset.
[0042] Optionally, the reset enable state of the persistent reset signal includes an enabled state or a disabled state. For example, when the reset enable state of the persistent reset signal is enabled, this reset enable state is used to instruct the persistent reset signal to trigger the electronic device to perform a device reset; when the reset enable state of the persistent reset signal is disabled, this reset enable state is used to instruct the persistent reset signal to trigger the electronic device to perform a functional reset. It can be seen that in this method, the persistent reset signal can simulate the functions of the start and reset signals, which helps reduce the probability of reset failure due to the host's inability to recognize and operate the BBRST pin, thereby reducing the probability of enumeration failure.
[0043] Optionally, the enabled state can be represented by bit "1", and the disabled state can be represented by bit "0". For example, during the startup phase, if the electronic device reads that the reset enable state of the persistent reset signal is "1", it determines that the reset enable state of the persistent reset signal is enabled; if the electronic device reads that the reset enable state of the persistent reset signal is "0" during the startup phase, it determines that the reset enable state of the persistent reset signal is disabled.
[0044] In one optional implementation, S201 includes: during the startup phase, the electronic device reads the reset enable state of the persistent reset signal in the configuration register. The configuration register stores the operating mode of the electronic device and configuration information related to the functions of the electronic device. Therefore, during the startup phase, the electronic device can determine the type of reset triggered by the persistent reset signal based on the reset enable state of the persistent reset signal in the configuration register. This is beneficial for the subsequent execution of the corresponding reset by the electronic device based on the persistent reset signal.
[0045] Optionally, the reset enable state of the persistent reset signal can be written to the configuration register of the electronic device by the manufacturer before the device leaves the factory. Alternatively, the reset enable state of the persistent reset signal can be written to the configuration register of the electronic device by the user after the device leaves the factory.
[0046] In one alternative implementation, the electronic device entering the startup phase may be triggered by the host, for example, when the host is powered on or restarted, the electronic device is triggered to enter the startup phase.
[0047] S202. During the enumeration phase, the host sends a persistent reset signal; correspondingly, the electronic device receives the persistent reset signal.
[0048] In one optional implementation, during the enumeration phase, the host sends a persistent reset signal, including: in the case of enumeration failure of the electronic device, the host sends a persistent reset signal. The enumeration failure of the electronic device may be due to signal interference, signal instability, or the environment in which the electronic device is located. In this method, sending a persistent reset signal in the case of enumeration failure of the electronic device facilitates the electronic device to reset based on the persistent reset signal, thereby clearing the abnormal state of the electronic device and reducing the probability of enumeration failure.
[0049] Optionally, the electronic device receives a persistent reset signal, including: the electronic device receives a persistent reset signal through the PERST pin of the electronic device.
[0050] S203. The electronic device determines the reset enable state of the persistent reset signal. If the reset enable state of the persistent reset signal is enabled, the electronic device executes S204; if the reset enable state of the persistent reset signal is disabled, the electronic device executes S205.
[0051] Optionally, the electronic device may determine the reset enable state of the persistent reset signal based on the reset enable state of the persistent reset signal read during the startup phase.
[0052] S204. When the persistent reset signal is enabled, the electronic device performs a device reset based on the persistent reset signal.
[0053] In an optional implementation, S204 includes: the electronic device performing a device reset based on the persistent reset signal when the persistent reset signal's reset enable state is enabled and the persistent reset signal is high. In this method, a high persistent reset signal indicates that the host has sent a persistent reset signal to the electronic device. The electronic device can determine whether to perform a device reset based on the persistent reset signal according to the reset enable state of the persistent reset signal determined during the startup phase, thereby facilitating the clearing of abnormal states from all functional modules of the electronic device and reducing the probability of enumeration failure.
[0054] For example, see Figure 3 , Figure 3 This is a timing diagram of a persistent reset signal provided in an embodiment of this application. During time range t1, the persistent reset signal is low, indicating that the host has not yet sent a persistent reset signal to the electronic device; during time range t2, the persistent reset signal is high, indicating that the host has sent a persistent reset signal to the electronic device, thus allowing the electronic device to reset itself based on the persistent reset signal when the reset enable state of the persistent reset signal is enabled.
[0055] In one optional implementation, after the electronic device performs a device reset based on a persistent reset signal, it re-enumerates; if the enumeration fails, the host executes S202; if the enumeration succeeds, the electronic device enters the link active state (L0). It is evident that during the enumeration phase, the host can send a persistent reset signal to the electronic device to trigger a reset until the electronic device successfully enumerates and enters the link active state, which facilitates normal communication between the electronic device and the host.
[0056] In one optional implementation, the electronic device determines its operating state; when the electronic device is in a link-active state, a persistent reset signal is used to trigger a functional reset. In this approach, restoring the function of the persistent reset signal while the electronic device is in a link-active state facilitates subsequent functional resets based on the persistent reset signal. For example, it is beneficial for the electronic device to perform a functional reset in a power-saving sleep state (D3 / L2).
[0057] S205. When the reset enable state of the persistent reset signal is disabled, the electronic device performs a functional reset based on the persistent reset signal.
[0058] In an optional implementation, S205 includes: when the persistent reset signal's reset enable state is disabled and the persistent reset signal is high, the electronic device performs a functional reset based on the persistent reset signal. In this method, a high persistent reset signal indicates that the host has sent a persistent reset signal to the electronic device. The electronic device can determine whether it should perform a functional reset based on the persistent reset signal according to the reset enable state of the persistent reset signal determined during the startup phase, thereby facilitating the clearing of abnormal states of some functional modules of the electronic device.
[0059] For example, in Figure 3 Within the time range t1 shown, the persistent reset signal is low, indicating that the host has not yet sent a persistent reset signal to the electronic device; Figure 3 Within the time range t2 shown, the persistent reset signal is at a high level, indicating that the host has sent a persistent reset signal to the electronic device. Thus, the electronic device can perform a functional reset based on the persistent reset signal even when the reset enable state of the persistent reset signal is disabled.
[0060] As can be seen, in this embodiment, the electronic device can perform a device reset based on the persistent reset signal during the enumeration phase, based on the reset enable state of the persistent reset signal determined during the startup phase. This helps the electronic device clear abnormal states before the reset, so as to re-enumerate and reduce the probability of enumeration failure.
[0061] In addition, in this embodiment, the persistent reset signal is a PCIe signal. The host can trigger the electronic device to reset through the persistent reset signal to ensure that the electronic device is reset successfully and reduce the probability of the electronic device failing to enumerate when the host restarts.
[0062] Furthermore, in this embodiment, the persistent reset signal can be used for device reset, so that device reset can be performed even when the electronic device does not have a BBRST pin, thereby expanding the application scenarios of this embodiment.
[0063] Please see Figure 4 , Figure 4 This is a schematic diagram of a communication device provided in an embodiment of this application. The communication device includes at least a reading module 401, a communication module 402, and a processing module 403.
[0064] The communication device can be an electronic device as described in the above embodiments, such as an electronic device or a device within an electronic device. For example, in one embodiment, the reading module 401 is used to read the reset enable state of the persistent reset signal during the startup phase; Communication module 402 is used to receive a persistent reset signal during the enumeration phase; The processing module 403 is used to reset the device based on the persistent reset signal when the reset enable state of the persistent reset signal is enabled.
[0065] In one optional embodiment, the processing module 403 is used to perform device reset based on the persistent reset signal when the reset enable state of the persistent reset signal is enabled. Specifically, when the reset enable state of the persistent reset signal is enabled and the persistent reset signal is at a high level, the processing module 403 is used to perform device reset based on the persistent reset signal.
[0066] In one optional implementation, the processing module 403 is further configured to perform a functional reset based on the persistent reset signal when the reset enable state of the persistent reset signal is disabled.
[0067] In one optional embodiment, the processing module 403 is further configured to perform a functional reset based on the persistent reset signal when the reset enable state of the persistent reset signal is disabled. Specifically, when the reset enable state of the persistent reset signal is disabled and the persistent reset signal is at a high level, the processing module 403 is further configured to perform a functional reset based on the persistent reset signal.
[0068] In one optional implementation, the reading module 401 is used to read the reset enable state of the persistent reset signal, specifically: the reading module 401 is used to read the reset enable state of the persistent reset signal from the configuration register.
[0069] In one optional implementation, the processing module 403 is further configured to determine the operating state of the electronic device; when the operating state of the electronic device is a link active state, a persistent reset signal is used to trigger the electronic device to perform a functional reset.
[0070] The embodiments of this application and the method embodiments shown above are based on the same concept and have the same technical effects. For the specific principles, please refer to the description of the embodiments shown above, which will not be repeated here.
[0071] Please see Figure 5 , Figure 5 This is a schematic diagram of a communication device provided in an embodiment of this application. The communication device can execute the relevant steps of the terminal or edge server in the aforementioned method embodiments. The communication device includes: a communication module 501, a power module 502, a storage module 503, and a chip 504.
[0072] The power module 502 is used to provide power to the communication device; the storage module 503 is used to store data and instructions; the communication module 501 is used for internal communication within the communication device or for communication between the communication device and external devices; and the chip 504 is used to execute the method executed by the terminal device in the above method embodiments.
[0073] The implementation of this communication device can be found in the relevant content of the above method embodiments, and will not be described in detail here.
[0074] The embodiments of this application and the above-described method embodiments are based on the same concept and have the same technical effects. For the specific principles, please refer to the description of the above-described method embodiments, which will not be repeated here.
[0075] Please see Figure 6 , Figure 6 This is a schematic diagram of the structure of a computer device provided in an embodiment of this application. The computer device includes at least a processor 601, a memory 603, and a user interface 602. The processor 601, the memory 603, and the user interface 602 are interconnected. The memory 603 is used to store computer programs, which include program instructions. The processor 601 is used to execute the program instructions.
[0076] Memory 603 may include volatile memory, such as random-access memory (RAM); memory 603 may also include non-volatile memory, such as flash memory, solid-state drive (SSD), etc.; memory 603 may also include a combination of the above types of memory.
[0077] Processor 601 may be a central processing unit (CPU). Processor 601 may further include hardware chips. The aforementioned hardware chips may be application-specific integrated circuits (ASICs), programmable logic devices (PLDs), etc. The aforementioned PLDs may be field-programmable gate arrays (FPGAs), generic array logic (GALs), etc.
[0078] In an optional implementation, memory 603 is also used to store program instructions. Processor 601 can invoke program instructions: processor 601 is configured to invoke program instructions to execute the relevant content of the above method embodiments, which will not be described in detail here.
[0079] The embodiments of this application and the method embodiments shown above are based on the same concept and have the same technical effects. For the specific principles, please refer to the description of the embodiments shown above, which will not be repeated here.
[0080] This application also provides a computer-readable storage medium storing a detection program, which, when executed by a processor, implements the steps of a signal processing method in any of the above embodiments.
[0081] The embodiments of the mobile terminal and computer-readable storage medium provided in this application include all the technical features of the above-described signal processing method embodiments. The extended and explanatory content of the specification is basically the same as the embodiments of the above method, and will not be repeated here.
[0082] This application also provides a computer program product, which includes computer program code. When the computer program code is run on a computer, it causes the computer to perform the methods described in the various possible implementations above.
[0083] This application also provides a chip, including a memory and a processor. The memory is used to store a computer program, and the processor is used to call and run the computer program from the memory, so that a device with the chip installed performs the methods described in the various possible implementations above.
[0084] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.
[0085] The steps in the method of this application embodiment can be adjusted, combined, or deleted according to actual needs.
[0086] The units in the device of this application embodiment can be merged, divided, and deleted according to actual needs.
[0087] In this application, the same or similar terms, concepts, technical solutions and / or application scenario descriptions are generally described in detail only when they appear for the first time. When they appear again, they are generally not repeated for the sake of brevity. When understanding the technical solutions and other contents of this application, the same or similar terms, concepts, technical solutions and / or application scenario descriptions that are not described in detail later can be referred to their previous relevant detailed descriptions.
[0088] In this application, the descriptions of the various embodiments have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0089] The technical features of the present application can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of the present application.
[0090] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) as described above, and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, controlled terminal, or network device, etc.) to execute the methods of each embodiment of this application.
[0091] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product. A computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the flow or function according to the embodiments of this application is generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, storage disk, magnetic tape), an optical medium (e.g., digital video disc (DVD)), or a semiconductor medium (e.g., SSD), etc.
[0092] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.
Claims
1. A signal processing method, characterized in that, The method includes: During the startup phase, the reset enable state of the persistent reset signal is read; During the enumeration phase, the persistent reset signal is received; When the reset enable state of the persistent reset signal is enabled, the device is reset based on the persistent reset signal.
2. The method according to claim 1, characterized in that, When the reset enable state of the persistent reset signal is enabled, the device is reset based on the persistent reset signal, including: When the persistent reset signal is enabled and the persistent reset signal is high, the device is reset based on the persistent reset signal.
3. The method according to claim 1, characterized in that, The method further includes: When the reset enable state of the persistent reset signal is disabled, a functional reset is performed based on the persistent reset signal.
4. The method according to claim 3, characterized in that, When the reset enable state of the persistent reset signal is disabled, performing a functional reset based on the persistent reset signal includes: When the reset enable state of the persistent reset signal is disabled and the persistent reset signal is high, a functional reset is performed based on the persistent reset signal.
5. The method according to any one of claims 1 to 4, characterized in that, The read persistent reset signal reset enable state includes: Read the reset enable state of the persistent reset signal from the configuration register.
6. The method according to claim 1 or 2, characterized in that, The method further includes: Determine the operating status of electronic devices; When the electronic device is in a link-active state, the persistent reset signal is used to trigger the electronic device to perform a functional reset.
7. A module device, characterized in that, The module device includes a communication module, a power module, a storage module, and a chip, wherein: The power module is used to provide electrical energy to the module device; The storage module is used to store data and instructions; The communication module is used for internal communication within the module device, or for communication between the module device and external devices; The chip is used to perform the method as described in any one of claims 1 to 6.
8. A computer device, characterized in that, The computer device includes: a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, it implements the method as described in any one of claims 1 to 6.
9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-readable instructions that, when executed on a communication device, cause the communication device to perform the method described in any one of claims 1 to 6.
10. A computer program product containing instructions, characterized in that, When the instructions are executed, the method described in any one of claims 1 to 6 is implemented.