Interface anti-corrosion method and device, processor and storage medium

By detecting the insertion detection pin and identification pin status of the Type-C interface, the anti-corrosion strategy is activated only when no external device is inserted into the Type-C interface. This solves the problem of poor user experience when the Type-C interface detects liquid or foreign objects, and achieves protection of the identification pin and normal data transmission.

CN121996595APending Publication Date: 2026-05-08BEIJING XIAOMI MOBILE SOFTWARE CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
BEIJING XIAOMI MOBILE SOFTWARE CO LTD
Filing Date
2024-11-04
Publication Date
2026-05-08

AI Technical Summary

Technical Problem

In existing technologies, the Type-C interface immediately activates an anti-corrosion strategy upon detecting liquid or foreign objects, resulting in a poor user experience.

Method used

By detecting the status of the insertion detection pin and the identification pin, the anti-corrosion strategy is only activated when the insertion detection pin is in place and the identification pin is not in place, ensuring that the anti-corrosion strategy is activated when no external device is plugged into the Type-C interface.

Benefits of technology

This reduces the corrosion of identification pins, avoids the impact of anti-corrosion strategies on data transmission between external devices and terminals, and improves the user experience.

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Abstract

The invention relates to an interface anti-corrosion method and device, a processor and a storage medium, and relates to the technical field of electronic equipment. The method comprises the following steps: detecting the state of an inserted detection pin and the state of an identification pin in a Type c interface of a terminal under the condition that an interrupt signal is received; the interrupt signal is used for triggering a processor on the terminal; starting an anti-corrosion strategy under the condition that the insertion detection pin is in an in-place state and the identification pin is in a non-in-place state; the insertion detection pin is in an in-place state to indicate that the Type c interface is conducted, the identification pin is in a non-in-place state to indicate that external equipment is not inserted into the Type c interface, and the anti-corrosion strategy is used for reducing the phenomenon that the identification pin is corroded. By using the interface anti-corrosion method provided by the invention, the use experience of a user can be improved while the corrosion probability of the identification pin is reduced.
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Description

Technical Field

[0001] This disclosure relates to the field of electronic equipment technology, and in particular to an interface corrosion protection method, apparatus, processor and storage medium. Background Technology

[0002] Currently, some electronic devices use the Type-C interface. The Type-C interface is a common universal serial bus (USB) interface. It is small in size, has a high maximum data transfer speed, and does not require distinguishing between the front and back, so it has gradually become the mainstream USB interface.

[0003] In related technologies, when the Type-C interface is detected to be conducting, it is assumed that liquid or foreign matter has entered the Type-C interface, and an anti-corrosion strategy is activated to reduce the probability of corrosion caused by liquid or foreign matter entering the Type-C interface. However, this method of activating the anti-corrosion strategy will bring a bad experience to the user. Summary of the Invention

[0004] To overcome the problems existing in related technologies, this disclosure provides an interface corrosion prevention method, apparatus, processor, and storage medium.

[0005] According to a first aspect of the present disclosure, an interface corrosion protection method is provided, the method comprising:

[0006] Upon receiving an interrupt signal, the status of the insertion detection pin is checked against the status of the identification pin in the Type-C interface on the terminal.

[0007] When the insertion detection pin is in the present state and the identification pin is in the absent state, the anti-corrosion strategy is activated; the presence of the insertion detection pin indicates that the Type-C interface is turned on, and the absence of the identification pin indicates that the external device is not inserted into the Type-C interface. The anti-corrosion strategy is used to reduce the corrosion of the identification pin.

[0008] Optionally, activating the anti-corrosion strategy when the insertion detection pin is in the in-position state and the identification pin is not in the in-position state includes:

[0009] If the insertion detection pin is detected to be in the in-position state, wait for a preset time to detect the state of the identification pin;

[0010] If the identification pin is detected to be out of position, the anti-corrosion strategy is activated.

[0011] Optionally, the method further includes:

[0012] If the insertion detection pin is detected to be out of position, the identification pin is controlled to be in a low-level mode.

[0013] Optionally, the method further includes:

[0014] When the identification pin is detected to be in the present state, the identification pin is controlled to be in a high-low level alternation mode.

[0015] Optionally, the method further includes:

[0016] If the interrupt signal is received again, the state of the insertion detection pin is checked;

[0017] If the insertion detection pin is not in place, the corrosion prevention strategy is terminated.

[0018] Optionally, the step of exiting the anti-corrosion strategy when the insertion detection pin is not in the present state includes:

[0019] If the insertion detection pin is not in place and the terminal screen is lit by user input, the anti-corrosion strategy is terminated.

[0020] Optionally, after activating the anti-corrosion strategy, the method further includes:

[0021] When the screen of the terminal is on, the identification pin is controlled to enter a high-low level alternation mode.

[0022] Optionally, after controlling the identification pin to enter a high-low level alternation mode when the terminal's screen is on, the method further includes:

[0023] When the screen switches from the on state to the off state and no external device is inserted into the Type-C interface, the identification pin is controlled to be in a low-level mode.

[0024] Optionally, after controlling the identification pin to enter a high-low level alternation mode when the terminal's screen is on, the method further includes:

[0025] When the screen switches from the on state to the off state and the external device is plugged into the Type-C interface, the identification pin is controlled to be in the target mode; the target mode is the mode after the identification pin is switched after the external device is plugged into the Type-C interface.

[0026] Optionally, the method further includes:

[0027] When the terminal screen is off and the terminal's audio device or Bluetooth module is activated, the identification pin is controlled to be in the alternating high and low level mode.

[0028] Optionally, the method further includes:

[0029] When the terminal screen is off and the terminal's audio device or Bluetooth module is turned off, the identification pin is controlled to be in a low-level mode.

[0030] According to a second aspect of the present disclosure, an interface corrosion protection device is provided, comprising:

[0031] The receiving module is configured to detect the state of the insertion detection pin and the state of the identification pin in the Type C interface on the terminal when an interrupt signal is received.

[0032] The anti-corrosion module is configured to activate an anti-corrosion strategy when the insertion detection pin is in the present state and the identification pin is in the absent state; the presence of the insertion detection pin indicates that the Type-C interface is turned on, and the absence of the identification pin indicates that the external device is not inserted into the Type-C interface; the anti-corrosion strategy is used to reduce the corrosion of the identification pin.

[0033] According to a third aspect of the present disclosure, a processor is provided, the processor being configured to perform the steps of the interface anti-corrosion method provided in the first aspect of the present disclosure.

[0034] According to a fourth aspect of the present disclosure, an interface corrosion protection device is provided, including a processor provided in the third aspect of the present disclosure, and a memory for storing processor-executable instructions.

[0035] According to a fourth aspect of the present disclosure, a computer-readable storage medium is provided that stores computer program instructions thereon, which, when executed by a processor, implement the steps of the interface anti-corrosion method provided in the first aspect of the present disclosure.

[0036] The technical solutions provided by the embodiments of this disclosure may include the following beneficial effects:

[0037] The anti-corrosion strategy is activated only when the insertion detection pin is in the correct position and the identification pin is not in the correct position. In other words, the anti-corrosion strategy is activated only when liquid has entered the Type-C interface and no external device has been inserted.

[0038] Firstly, it can reduce the corrosion of identification pins through anti-corrosion strategies. Secondly, it activates the anti-corrosion strategy when no external device is plugged in, rather than when an external device is plugged in. Therefore, it can avoid the impact of activating the anti-corrosion strategy on data transmission between the external device and the terminal, thus improving the user experience.

[0039] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0040] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0041] Figure 1 This is a flowchart illustrating the steps of an interface corrosion prevention method according to an exemplary embodiment.

[0042] Figure 2 This is a schematic diagram of an insertion detection circuit according to an exemplary embodiment.

[0043] Figure 3 This is a schematic diagram illustrating an identification pin detection of an external device according to an exemplary embodiment.

[0044] Figure 4 This is a logical diagram illustrating the activation and deactivation of an anti-corrosion strategy according to an exemplary embodiment.

[0045] Figure 5 This is a logical schematic diagram illustrating an anti-corrosion strategy according to an exemplary embodiment.

[0046] Figure 6 This is a block diagram illustrating an interface corrosion protection device according to an exemplary embodiment.

[0047] Figure 7 This is a block diagram illustrating an interface corrosion protection device according to an exemplary embodiment.

[0048] Figure 8 This is a block diagram illustrating a chip system according to an exemplary embodiment. Detailed Implementation

[0049] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this disclosure as detailed in the appended claims.

[0050] It should be noted that all actions involving the acquisition of signals, information, or data in this disclosure are carried out in compliance with the relevant data protection laws and policies of the country where the location is situated, and with authorization from the owner of the relevant device.

[0051] Figure 1 This is a flowchart illustrating an interface corrosion prevention method according to an exemplary embodiment, such as... Figure 1 As shown, the interface anti-corrosion method is used in a processor, which can be a central processing unit (CPU) or a controller (MCU) in a terminal. The terminal can be an electronic device equipped with a Type-C interface, such as a mobile phone, laptop, or power bank; this disclosure does not limit this. The interface can be a Type-C interface. Preventing the electrochemical corrosion of the identification pins in the Type-C interface during the anti-corrosion process means performing anti-corrosion on the Type-C interface itself. The interface anti-corrosion method includes the following steps.

[0052] In step S10, upon receiving an interrupt signal, the state of the insertion detection pin and the state of the identification pin in the Type C interface on the terminal are detected.

[0053] The interrupt signal (INT) is used to trigger the processor on the terminal to notify the processor to prioritize the current anti-corrosion task. The current anti-corrosion task includes: determining whether to execute the anti-corrosion strategy, and the tasks that need to be processed when executing the anti-corrosion strategy.

[0054] Please see Figure 2 The insertion detection circuit shown outputs an interrupt signal to the processor when it detects that the Type-C interface is on, so that the processor can perform subsequent anti-corrosion tasks. This insertion detection circuit includes a Type-C interface and an integrated power management circuit (PM8550B).

[0055] The Type-C interface includes four pins: A1, A12, B1, and B12. Pin B12 is connected to the connector insertion detection (CID) pin in the power supply integrated circuit via a first resistor R1. When no external device is plugged into the Type-C interface, these four pins are in a floating state, meaning they are not grounded and are not conductive. When an external device is plugged into the Type-C interface, pin B12 is grounded and becomes conductive, while the other three pins remain in a floating state.

[0056] The power management circuit includes an insertion detection pin, a switch, a power supply, a second resistor R2, a third resistor R3, a comparator, and general purpose input / output (GPIO) pins. The insertion detection pin is used to detect the insertion of external devices into the Type-C interface on the terminal. The first end of the insertion detection pin is connected to pin B12 via a first resistor R1. The second end of the insertion detection pin is connected to the non-inverting input of the comparator via the second resistor R2 and the third resistor R3, and is also connected to the inverting input of the comparator. The GPIO pin is connected to the connection point between the second end of the insertion detection pin and the inverting input of the comparator. One end of the switch is connected to the power supply, and the other end is connected to the connection point between the second resistor R2 and the third resistor R3.

[0057] When an external device is plugged into the Type-C interface, the switch closes. At this time, the power output from the power supply (0.3~0.5V) flows through the switch, the second resistor R2, the insertion detection pin, and the first resistor R1 to pin B12, and then back to ground, forming a closed loop and turning on pin B12. After pin B12 is turned on, the insertion detection pin can detect the resistance value of the first resistor R1 between pin B12 and the insertion detection pin. If the resistance value of the first resistor R1 is greater than the resistance threshold set within the insertion detection pin, the insertion detection pin outputs a signal to a comparator. The comparator compares this signal with a reference signal, thereby outputting an interrupt signal.

[0058] The Type-C interface is a Dual Role Port (DRP) mode, which includes Dual Role Port (DRP) mode, Upstream Facing Port (UFP) mode, and Downstream Facing Port (DFP) mode. DRP mode, also known as alternating high / low level mode, switches between UFP and DFP modes. In DRP mode, the external device connected to the Type-C interface can be identified, thus determining the master-slave relationship between the terminal and the external device. The Type-C interface can act as a power provider or master (Source) or a power receiver or sink (Sink), depending on the type of external device plugged into it. UFP mode, also known as low-level mode, involves the terminal acting as a slave and the external device as a master, with the identification pin of the Type-C interface in a low-level state. DFP mode, also known as high-level mode, involves the terminal acting as a master and the external device as a slave, with the identification pin of the Type-C interface in a high-level state.

[0059] For example, if the external device plugged into the Type-C port of the terminal is a USB device or a wired headset, then the USB device or wired headset is the slave device, and the terminal is the master device. Similarly, if the external device plugged into the Type-C port of the terminal is a charger, a power bank, or a car accessory, then the charger, power bank, or car accessory is the master device, and the terminal is the slave device.

[0060] The identification pin can be the CC pin, DP pin, or DM pin on the Type C interface, etc. This disclosure does not limit it. The identification pin is used to identify the role of the terminal in high and low level modes.

[0061] It is understood that the Type-C interface is equipped with an identification pin, and the operating mode of the Type-C interface is switched through the identification pin. The identification pin includes at least one of the following functions:

[0062] Firstly, the roles of external devices and terminals are identified. In DRP mode, when an external device and a terminal are connected, their respective roles can be negotiated through pin identification, thereby determining the master and slave in DRP mode. Please refer to [link to relevant documentation]. Figure 2As shown, when the identification pin in the Type-C interface is in DRP mode, the switch can be connected to the device providing the pulse signal. The pulse signal passes through the switch, the second resistor, the insertion detection pin, and the first resistor to reach pin B12, causing the level of the identification pin in the Type-C interface to fluctuate between high and low. When the identification pin is high, a low-level external device can be detected, thus configuring the terminal as the master and the external device as the slave. When the identification pin is low, a high-level external device can be detected, thus configuring the terminal as the slave and the external device as the master. Specifically, when the identification pin is high, it is energized, thus energizing the Type-C interface; when the identification pin is low, it is de-energized, thus de-energizing the Type-C interface.

[0063] Secondly, the identification pin is used to detect the correct route of the data link, ensuring that data is sent from the master to the slave. Please refer to [link / reference]. Figure 3 As shown, a pull-up resistor RP is provided between the identification pin and the ground terminal, and a pull-down resistor RD is also provided between the identification pin and the ground terminal. The host detects the pull-down resistor RD of the slave through the pull-up resistor RP, thereby determining the connection direction between the host and the slave.

[0064] Thirdly, the identification pins are used to detect the orientation of the inserted external device. The identification pins include CC1 and CC2. If a pull-down resistor is detected on CC1, the external device is considered to be inserted correctly; if a pull-down resistor is detected on CC2, the external device is considered to be inserted incorrectly. In this way, the identification pins can detect the insertion direction of the external device, ensuring that it will function normally regardless of whether the USB cable is inserted correctly or incorrectly.

[0065] When the Type-C interface is in DRP mode, it can also be considered that the identification pin is in DRP mode. In DRP mode, the identification pin's voltage level can cycle between high and low. Similarly, when the Type-C interface is in UFP mode, it can also be considered that the identification pin is in UFP mode, and in UFP mode, the identification pin is at a low voltage level. When the Type-C interface is in DFP mode, it can also be considered that the identification pin is in DFP mode, and in DFP mode, the identification pin is at a high voltage level.

[0066] In step S20, when the insertion detection pin is in the in-position state and the identification pin is in the out-of-position state, the anti-corrosion strategy is activated.

[0067] The insertion detection pin being in the "present" state indicates that the Type-C interface is powered on, and the insertion detection pin has formed a path with the B12 pin. The insertion detection pin being in the "absent" state indicates that the Type-C interface is not powered on.

[0068] Please see Figure 2 As shown, if liquid or foreign object enters the Type-C interface, the Type-C interface will be grounded through the liquid or foreign object. At this time, the power output of the power supply will return to the ground terminal through the switch, the second resistor, the insertion detection pin, the first resistor, and the B12 pin, making the B12 pin conduct. At this time, the insertion detection pin and B12 form a path, the insertion detection pin is in the present state, and the B12 pin is conducted, further making the Type-C interface conduct.

[0069] Similarly, please see Figure 2 As shown, if an external device is plugged into the Type-C interface, the Type-C interface will be grounded through the external device. At this time, the power output from the power supply will return to the ground terminal through the switch, the second resistor, the insertion detection pin, the first resistor, and the B12 pin, making the B12 pin conduct. At this time, the insertion detection pin and B12 form a path, the insertion detection pin is in the present state, and the B12 pin is conducted, further making the Type-C interface conduct.

[0070] As can be seen, when the insertion detection pin is in the in-position state, the indicated Type-C interface is turned on in two situations: one is that liquid or foreign objects have entered the Type-C interface; the other is that an external device has been inserted into the Type-C interface.

[0071] To further identify whether the Type-C interface is conducting due to liquid or foreign object ingress, or because an external device is inserted, the status of the identification pin can be further examined. If the identification pin is in an "out of position" state, indicating that an external device is not inserted into the Type-C interface, it can be determined that the Type-C interface is conducting due to liquid or foreign object ingress, rather than because an external device is inserted. Therefore, anti-corrosion strategies can be activated to reduce corrosion of the identification pin.

[0072] The Type-C interface includes an identification pin and a VBUS pin. When an external device is not inserted into the Type-C interface, neither the identification pin nor the VBUS pin is grounded, meaning they are not conductive. When an external device is inserted into the Type-C interface, the VBUS pin is grounded first, followed by the identification pin, meaning the VBUS pin conducts first, followed by the identification pin. Therefore, if the identification pin is detected as not being in the correct position, it means that the identification pin is not conductive, and the Type-C interface is not connected to an external device. If the identification pin is in the correct position, it means that the identification pin is grounded and conductive, and the Type-C interface is connected to an external device.

[0073] Furthermore, in the Type-C interface, the VBUS pin and the identification pin are positioned adjacent to each other. When no external device is plugged into the Type-C interface, the effective voltage level of the identification pin is relatively high, while the VBUS pin is mostly at a low level. This results in a significant voltage difference between the identification pin and the VBUS pin. When liquid or foreign matter enters the Type-C interface, the identification pin is exposed to the external environment and comes into contact with water or moisture, thus becoming charged and forming a high voltage level. The high voltage level of the identification pin and the low voltage level of the VBUS pin create a significant voltage difference, which easily leads to electrochemical corrosion of the identification pin and the VBUS pin, causing a micro-short circuit. The higher the voltage difference, the greater the probability of electrochemical corrosion of the identification pin.

[0074] Based on this, this disclosure proposes an anti-corrosion strategy. One of the anti-corrosion strategies is to control the identification pin to a low-level mode so that the identification pin is not energized, thereby reducing the voltage difference between the identification pin and the VBUS pin, reducing the electrochemical corrosion between the identification pin and the VBUS pin, and thus reducing the phenomenon of corrosion of the identification pin.

[0075] For related technologies, please refer to Figure 2 As shown, when the processor receives an interrupt signal, it assumes that the identification pin in the Type-C interface is in a high-level conducting state. To prevent the identification pin from being corroded, an anti-corrosion strategy is activated to reduce the corrosion phenomenon. However, if an external device is inserted and the identification pin is turned on, activating the anti-corrosion strategy will affect the communication between the external device and the terminal. After setting the identification pin in the Type-C interface to a low-level mode, it will no longer be able to identify the type of external device, thus making it impossible to control the role switching between the terminal and the external device.

[0076] For example, if the external device is a wired headset, when the headset is plugged into the Type-C interface, the processor assumes that the identification pin in the Type-C interface is conducting. However, this identification pin is susceptible to electrochemical corrosion. To prevent corrosion, the processor controls the identification pin in the Type-C interface to be in a low-level mode. Firstly, with the identification pin in a low-level mode, the type of wired headset cannot be identified, making it impossible to distinguish the master-slave relationship between the headset and the terminal. Secondly, even if the master-slave relationship is identified, during communication between the headset and the terminal, the terminal should be the master and the headset the slave. However, due to the corrosion prevention strategy, the terminal becomes the slave, preventing the transmission of audio data from the terminal to the headset. From the user's perspective, this means the user cannot hear the music played by the terminal, resulting in a poor user experience.

[0077] The above technical solution activates the anti-corrosion strategy only when the insertion detection pin is in place and the identification pin is not in place. That is, the anti-corrosion strategy is activated only when liquid is confirmed to have entered the Type-C interface and no external device is inserted.

[0078] Firstly, it can reduce the corrosion of identification pins through anti-corrosion strategies; secondly, it activates the anti-corrosion strategy when no external device is plugged in, rather than when an external device is plugged in, thus avoiding any impact on data transmission between the external device and the terminal.

[0079] Figure 4 This is an exemplary solution related to step S20 above, proposed according to an exemplary embodiment, which illustrates a processing solution for entering an anti-corrosion strategy, including the following steps:

[0080] (1) When the insertion detection pin is detected to be in the in-position state, wait for a preset time to detect the state of the identification pin.

[0081] If the insertion detection pin is detected to be in the in-position state, it indicates that the Type C interface is turned on. To further determine whether the Type C interface is turned on due to liquid or foreign objects or due to the insertion of an external device, the status of the detection pin can be detected after a preset time.

[0082] The reason for the preset waiting time is as follows: When a user inserts an external device, due to the relatively long insertion channel of the Type-C interface, the VBUS interface conducts first, followed by the identification pin. Only after the identification pin is active does it mean the external device is fully inserted into the Type-C interface and connected to the terminal. Therefore, it takes a preset time for the identification pin to conduct after the insertion detection pin is detected as being in place. Thus, even if the insertion detection pin is detected as being in place, the preset time must be waited before the identification pin is checked again. Only then will the detected identification pin status be accurate, allowing for a precise determination of whether the user has inserted the external device into the Type-C interface. If the identification pin status is checked immediately after the insertion detection pin is detected as being in place, it is very likely that the identification pin will be detected as not being in place (not conducting), because although the user has inserted the external device, the identification pin is not yet active, resulting in an inaccurate detection of its status.

[0083] The preset duration is greater than or equal to the time required for the user to insert an external device until the identification pin is turned on.

[0084] Taking a preset duration of 3 seconds as an example, assuming the time required for the user to insert an external device until the identification pin is activated is also 3 seconds. If the insertion detection pin is detected as being in place, immediately detecting the identification pin's state will lead to inaccurate results. This is because if the user inserts the external device into the Type-C interface, the VBUS pin is activated, but the identification pin is not yet activated. Therefore, the system will detect the identification pin as not being in place, assuming the external device is not inserted into the Type-C interface. However, in reality, the external device will be fully inserted into the Type-C interface after 3 seconds, and the identification pin will be activated and in place after 3 seconds. Therefore, the detected identification pin state is inaccurate. Instead, if the insertion detection pin is detected as being in place, waiting 3 seconds before detecting the identification pin's state will be more accurate. If the external device is inserted into the Type-C interface, the identification pin will be in a activated, in-place state. This allows for a more accurate determination of whether the identification pin is activated due to the insertion of the external device, thus avoiding misjudgments of the identification pin's state.

[0085] Optionally, if the insertion detection pin is detected to be out of position, the control identification pin is kept in a low-level mode.

[0086] Please see Figure 4 As shown, when the detection pin is not in the correct position, it indicates that the Type C interface is not powered on. At this time, no external device is plugged into the Type C interface. Therefore, the identification pin in the Type C interface can be controlled to be in low-level mode (UFP mode) so that the identification pin is not energized, thus ensuring the safety of the identification pin.

[0087] (2) If the identification pin is detected to be out of position, the anti-corrosion strategy is activated.

[0088] If the identification pin is detected to be out of position after a preset waiting time, it is assumed that the identification pin is not conducting and the external device is not inserted into the Type-C interface. The conduction of the detection pin is due to liquid or foreign matter entering the Type-C interface. Therefore, the anti-corrosion strategy can be activated to prevent liquid or foreign matter from corroding the identification pin.

[0089] Optionally, please refer to Figure 4As shown, when the identification pin is detected as being in the "on" state, it indicates that an external device has been inserted into the Type-C interface. At this time, the identification pin can be controlled to enter a high / low level mode. In high / low level mode (DRPmode), the level of the identification pin alternates between high and low, allowing the identification pin to recognize the external device inserted into the Type-C interface, thus enabling the terminal to act as either a master or slave. By controlling the identification pin to enter an alternating high / low level mode, the inserted external device can be identified, and the role of the terminal with the identification pin can be switched promptly according to the type of the inserted external device, thereby quickly enabling data transmission between the external device and the terminal.

[0090] For example, after an external device is plugged into the Type-C interface of the terminal, the control identification pin is in a high-low level mode. In the high-low level mode, if the external device is a wired headset, the terminal where the identification pin is located will switch to the master and the wired headset will switch to the slave. If the external device is a charger, the terminal where the identification pin is located will switch to the slave and the charger will switch to the master, thereby realizing the rapid switching of the identification pin's role.

[0091] Alternatively, the anti-corrosion strategy can be activated directly when the insertion detection pin is detected as being in place. After waiting for a preset time, the status of the identification pin is checked. If the identification pin is not in place, the anti-corrosion strategy remains activated; if the identification pin is in place, the anti-corrosion strategy is deactivated, and the identification pin is controlled in an alternating high-low level mode. This can also be understood as: when the identification pin is detected to be conducting, whether due to liquid ingress or external device connection, the anti-corrosion strategy is activated; then the status of the identification pin is checked. If the identification pin is not conducting (not in place), the anti-corrosion strategy remains activated; if the identification pin is conducting (in place), the anti-corrosion strategy is deactivated, and the identification pin is controlled in an alternating high-low level mode.

[0092] Through the above technical solution, firstly, by waiting a preset time after detecting that the insertion detection pin is in the in-position state before detecting the state of the identification pin, the detected state of the identification pin can be more accurate, avoiding misjudgment of the identification pin; secondly, by controlling the identification pin to a low-level mode when the insertion detection pin is detected to be out of the in-position state, the identification pin can be de-energized, thus ensuring greater safety; thirdly, by controlling the identification pin to a high-low level alternating mode when the identification pin is detected to be in the in-position state, the identification pin can be controlled to quickly switch its role according to the type of external device, thereby realizing fast switching between dual roles of the Type-C interface and improving the user experience.

[0093] Figure 4This disclosure relates to an exemplary solution proposed according to an exemplary embodiment, which illustrates a process for exiting an anti-corrosion strategy, comprising the following steps:

[0094] (1) If the interrupt signal is received again, the state of the insertion detection pin is detected.

[0095] If an interrupt signal is received again, the processor will be triggered again and woke up again. At this time, the status of the inserted detection pin can be checked again.

[0096] (2) If the insertion detection pin is not in place, exit the anti-corrosion strategy.

[0097] If the insertion detection pin is not in the correct position, it indicates that the CC interface is not conducting. At this time, no external device is inserted into the Type C interface, and there is no liquid or foreign matter inside the Type C interface. Therefore, the anti-corrosion strategy can be discontinued.

[0098] Optionally, the anti-corrosion strategy can be exited when the insertion detection pin is not in place and the terminal screen is lit up by user input.

[0099] User input operations are interactions between the user and the terminal, such as touch operations, button input, and fingerprint input. Touch operations include tapping and swiping. Users can trigger the terminal screen to light up by tapping, pressing the mechanical buttons on either side of the terminal, or unlocking the terminal with their fingerprint.

[0100] The reason for exiting the anti-corrosion strategy when the terminal screen is lit is as follows: If there is foreign matter or liquid inside the Type-C interface, and the user has not cleaned the foreign matter or liquid inside the Type-C interface, the insertion detection pin will repeatedly detect liquid or foreign matter, causing the insertion detection pin to repeatedly switch between the present and absent states. In this way, the terminal will repeatedly start and exit the anti-corrosion strategy, causing the identification pin to repeatedly switch between high-level mode and low-level mode, and repeatedly switch between being energized and de-energized. When the terminal screen is lit, the anti-corrosion strategy can be exited to avoid the identification pin repeatedly switching between being energized and de-energized, thus ending this switching cycle.

[0101] Furthermore, by manually turning on the terminal screen to exit the anti-corrosion strategy, the following advantages are achieved: First, manually turning on the terminal screen indicates that the user wants to use the terminal. At this time, the anti-corrosion strategy can be exited, and the identification pin can be controlled to switch from a low-level mode to a high-low level alternating mode to quickly detect whether an external device is inserted and the role of the terminal where the identification pin is located after the external device is inserted, thereby improving the user experience. Second, manually turning on the terminal screen can eliminate screen lighting caused by message reminders, NFC (Near Field Communication), alarm clocks, voice wake-up, etc. If the screen lighting caused by message reminders, NFC, alarm clocks, and voice wake-up causes the anti-corrosion strategy to be exited, it will lead to an increase in the corrosion time of the identification pin. Therefore, these situations can be eliminated to reduce the corrosion time of the identification pin without affecting the user experience.

[0102] Figure 5 This is a schematic diagram of a method for controlling an anti-corrosion strategy after its activation, according to an exemplary embodiment. The method includes:

[0103] When the screen of the terminal is on, the identification pin is controlled to enter a high-low level alternation mode.

[0104] When the terminal screen is on, it means that the user is using the terminal. Therefore, the identification pin can be controlled to enter a high-low level alternation mode so that when the user plugs in an external device, the role of the external device and the terminal can be identified in a timely manner, so as to realize fast communication between the external device and the terminal.

[0105] Optionally, please refer to Figure 5 As shown, after activating the anti-corrosion strategy, the identification pin can be initially controlled to a low-level mode, thus de-energizing it and placing it in a safe state. Then, with the terminal screen on, it switches from the low-level mode to an alternating high-low level mode. It can be understood that each time the anti-corrosion strategy is activated, the identification pin is first controlled to an initial low-level mode.

[0106] Optionally, in scenarios where the terminal screen switches from a lit state to a screen-off state, the following two methods can be used to switch the recognition pin mode:

[0107] Option A: When the screen switches from the on state to the off state and no external device is inserted into the Type C interface, the identification pin is controlled to be in a low-level mode.

[0108] When the terminal screen switches from on to off state and no external device is plugged into the Type-C interface, it means that the user will not be using the terminal at this time. In order to avoid electrochemical corrosion of the identification pin, the identification pin can be controlled to be in a low-level mode so that the identification pin is not energized, thus preventing the identification pin from being corroded.

[0109] It can control the recognition pin to be in a low-level mode when the terminal screen switches from a bright state to a dark state and the recognition pin is not in position.

[0110] Option B involves controlling the identification pin to be in target mode when the screen switches from the on state to the off state and the external device is plugged into the Type C interface.

[0111] When the terminal screen switches from a lit state to a screen-off state, and the external device is plugged into the Type-C interface, it indicates that the user will use the external device with the terminal. At this time, the identification pin can be controlled to be in target mode.

[0112] The target mode is the mode that the identification pins switch after an external device is plugged into the Type-C interface.

[0113] For example, if the external device is a wired headset, after the wired headset is plugged into the Type-C interface, the terminal is the host, and the identification pin is in a high-level mode. The wired headset is the slave. Therefore, when the terminal screen switches from a bright state to a dark state, and the wired headset is plugged into the Type-C interface, the identification pin can remain in a high-level mode, thus ensuring that the terminal can output audio data to the wired headset.

[0114] For example, if the external device is a charger, after the charger is plugged into the Type-C interface, the terminal is the slave device, and the identification pin is in a low-level mode. The charger is the master device. Therefore, when the terminal screen switches from the on state to the off state, and the Type-C interface is plugged into the charger, the identification pin can remain in a low-level mode, thereby ensuring that the charger can transmit power to the terminal.

[0115] It can control the recognition pin to be in the target mode when the terminal screen switches from the on state to the off state and the recognition pin is in the in-position state.

[0116] The above technical solution achieves two objectives: First, when the terminal switches from a screen-on state to a screen-off state and no external device is plugged into the Type-C interface, the identification pin can be kept in a low-level mode, thus reducing corrosion by ensuring the identification pin is not energized. Second, when the terminal switches from a screen-on state to a screen-off state and an external device is plugged into the Type-C interface, the identification pin can be kept in the mode used when transmitting data with the external device, thereby ensuring data transmission between the external device and the terminal and preventing data transmission interruption.

[0117] Figure 5 This is a schematic diagram of a method for controlling an anti-corrosion strategy after it has been activated, according to an exemplary embodiment. The method includes the following two different scenarios:

[0118] In scenario A, when the terminal screen is off and the terminal's audio device or Bluetooth module is activated, the identification pin is controlled to be in the alternating high and low level mode.

[0119] Audio devices can be audio playback devices on the terminal, such as speakers; Bluetooth modules act as data transmission bridges between Bluetooth devices and the terminal, used to transmit data from the terminal to the Bluetooth device and vice versa. Bluetooth devices can be Bluetooth headsets, etc.

[0120] When the terminal screen is off and the terminal's audio device or Bluetooth module is activated, it indicates that the terminal is playing audio through an external audio playback device or through a Bluetooth device. In this scenario, the user may plug wired headphones into the terminal's Type-C interface. Therefore, the identification pin can be controlled to be in an alternating high and low level mode so that after the user plugs wired headphones into the Type-C interface, the identification pin in the Type-C interface can be switched to a high level mode in time, so as to set the terminal as the master and the wired headphones as the slave.

[0121] For example, if the terminal is playing music through its speaker and the screen is off, the identification pin can be controlled to alternate between high and low levels. When a wired headset is plugged into the Type-C interface, the user wants to listen to music through the wired headset. Therefore, with the identification pin in the alternating high and low level mode, the terminal can be quickly switched to the host and the wired headset to the slave, so that the terminal's audio data can be quickly transmitted to the wired headset.

[0122] For example, if the terminal is playing music through Bluetooth headphones and the screen is off, the identification pin can be controlled to be in an alternating high and low level mode. When a wired headphone is plugged into the Type-C interface, the user wants to listen to music through the wired headphone. Therefore, with the identification pin in the alternating high and low level mode, the terminal can be quickly switched to the host and the wired headphone to the slave, so as to quickly transmit the terminal's audio data to the wired headphone.

[0123] In scenario B, when the terminal screen is off and the terminal's audio device or Bluetooth module is turned off, the identification pin is controlled to be in a low-level mode.

[0124] When the terminal screen is off and the terminal's audio device or Bluetooth module is turned off, it means that the user will not be using the terminal at this time. Therefore, the identification pin can be controlled to be in a low-level mode, thereby reducing the time that the identification pin is corroded.

[0125] Through the above technical solution, when the terminal screen is off and the terminal's audio device or Bluetooth module is activated, controlling the identification pin to be in the alternating high and low level mode allows for rapid switching of the terminal's role. This enables the user to quickly coordinate the interaction between the external device and the terminal after plugging in an external device, thus achieving rapid data transmission between the external device and the terminal. When the terminal screen is off and the terminal's audio device or Bluetooth module is off, controlling the identification pin to be in the low level mode allows the identification pin to be de-energized when the user is not using the terminal, thereby reducing the corrosion time of the identification pin.

[0126] Figure 6 This is a block diagram illustrating an interface corrosion protection device according to an exemplary embodiment. (Refer to...) Figure 6 The interface corrosion protection device 600 includes a receiving module 610 and a corrosion protection module 620.

[0127] The receiving module 610 is configured to detect the state of the insertion detection pin and the state of the identification pin in the Type-C interface on the terminal when an interrupt signal is received; the interrupt signal is used to trigger the processor on the terminal.

[0128] The anti-corrosion module 620 is configured to activate an anti-corrosion strategy when the insertion detection pin is in the present state and the identification pin is in the absent state; the presence of the insertion detection pin indicates that the Type-C interface is turned on, and the absence of the identification pin indicates that the external device is not inserted into the Type-C interface; the anti-corrosion strategy is used to reduce the corrosion of the identification pin.

[0129] Optionally, the corrosion-resistant module 620 includes:

[0130] The identification pin detection submodule is configured to wait for a preset time to detect the status of the identification pin when the insertion detection pin is detected to be in the in-position state.

[0131] The startup submodule is configured to activate the anti-corrosion strategy when the identification pin is detected to be out of position.

[0132] Optionally, the interface corrosion protection device 600 further includes:

[0133] The first control module is configured to control the identification pin to a low-level mode when it is detected that the insertion detection pin is not in the correct position.

[0134] Optionally, the interface corrosion protection device 600 further includes:

[0135] The second control module is configured to control the identification pin to be in an alternating high and low level mode when the identification pin is detected to be in the in-position state.

[0136] Optionally, the interface corrosion protection device 600 further includes:

[0137] An insertion detection pin detection module is configured to detect the state of the insertion detection pin upon receiving the interrupt signal again.

[0138] The exit module is configured to exit the anti-corrosion strategy if the insertion detection pin is not in the correct position.

[0139] Optionally, the exit module is also configured to exit the anti-corrosion strategy when the insertion detection pin is not in place and the terminal screen is lit by user input.

[0140] Optionally, the interface corrosion protection device 600 further includes:

[0141] The third control module is configured to control the identification pin to enter a high-low level alternation mode when the screen of the terminal is on.

[0142] Optionally, the interface corrosion protection device 600 further includes:

[0143] The fourth control module is configured to control the identification pin to be in a low-level mode when the screen switches from the on state to the off state and no external device is inserted into the Type C interface.

[0144] Optionally, the interface corrosion protection device 600 further includes:

[0145] The fifth control module is configured to control the identification pin to be in a target mode when the screen switches from the on state to the off state and the external device is plugged into the Type-C interface; the target mode is the mode after the identification pin switches after the external device is plugged into the Type-C interface.

[0146] Optionally, the interface corrosion protection device 600 further includes:

[0147] The sixth control module is configured to control the identification pin to be in the high-low level alternation mode when the terminal screen is in the off state and the terminal's audio device or Bluetooth module is activated.

[0148] Optionally, the interface corrosion protection device 600 further includes:

[0149] The seventh control module is configured to control the identification pin to be in a low-level mode when the terminal screen is off and the terminal's audio device or Bluetooth module is turned off.

[0150] Regarding the apparatus in the above embodiments, the specific manner in which each module performs its operation has been described in detail in the embodiments related to the method, and will not be elaborated upon here.

[0151] This disclosure also provides a computer-readable storage medium having stored thereon computer program instructions that, when executed by a processor, implement the steps of the interface anti-corrosion method provided in this disclosure.

[0152] Figure 7 This is a block diagram illustrating an interface corrosion protection device 700 according to an exemplary embodiment. For example, device 700 may be a mobile phone, computer, digital broadcasting terminal, messaging device, game console, tablet device, medical device, fitness equipment, personal digital assistant, etc.

[0153] Reference Figure 7 The device 700 may include one or more of the following components: processing component 702, memory 704, power supply component 706, multimedia component 708, audio component 710, input / output interface 712, sensor component 714, and communication component 716.

[0154] The processing component 702 typically controls the overall operation of the device 700, such as operations associated with display, telephone calls, data communication, camera operation, and recording. The processing component 702 may include one or more processors 720 to execute instructions to complete all or part of the steps of the interface corrosion protection method described above. This processor may be a central processing unit or a controller within the interface corrosion protection device 700. Furthermore, the processing component 702 may include one or more modules to facilitate interaction between the processing component 702 and other components. For example, the processing component 702 may include a multimedia module to facilitate interaction between the multimedia component 708 and the processing component 702.

[0155] Memory 704 is configured to store various types of data to support the operation of device 700. Examples of this data include instructions for any application or method operating on device 700, contact data, phonebook data, messages, pictures, videos, etc. Memory 704 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0156] Power supply assembly 706 provides power to various components of device 700. Power supply assembly 706 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to device 700.

[0157] Multimedia component 708 includes a screen that provides an output interface between the device 700 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may sense not only the boundaries of the touch or swipe action but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 708 includes a front-facing camera and / or a rear-facing camera. When the device 700 is in an operating mode, such as a shooting mode or a video mode, the front-facing camera and / or the rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0158] Audio component 710 is configured to output and / or input audio signals. For example, audio component 710 includes a microphone (MIC) configured to receive external audio signals when device 700 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 704 or transmitted via communication component 716. In some embodiments, audio component 710 also includes a speaker for outputting audio signals.

[0159] Input / output interface 712 provides an interface between processing component 702 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, start buttons, and lock buttons.

[0160] Sensor assembly 714 includes one or more sensors for providing state assessments of various aspects of device 700. For example, sensor assembly 714 may detect the on / off state of device 700, the relative positioning of components such as the display and keypad of device 700, changes in the position of device 700 or a component of device 700, the presence or absence of user contact with device 700, the orientation or acceleration / deceleration of device 700, and temperature changes of device 700. Sensor assembly 714 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 714 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 714 may also include an accelerometer, a gyroscope, a magnetometer, a pressure sensor, or a temperature sensor.

[0161] Communication component 716 is configured to facilitate wired or wireless communication between device 700 and other devices. Device 700 can access wireless networks based on communication standards, such as WiFi, 2G, or 3G, or combinations thereof. In one exemplary embodiment, communication component 716 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 716 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0162] In an exemplary embodiment, the device 700 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the above-described interface corrosion protection method.

[0163] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 704 including instructions, which can be executed by a processor 720 of the device 700 to complete the interface anti-corrosion method described above. For example, the non-transitory computer-readable storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.

[0164] In another exemplary embodiment, a computer program product is also provided, the computer program product comprising a computer program executable by a programmable device, the computer program having a code portion for performing the interface anti-corrosion method described above when executed by the programmable device.

[0165] Some embodiments of this disclosure also provide a chip system, such as Figure 8 As shown, the chip system includes at least one processor 801 and at least one interface circuit 802. The processor 801 and the interface circuit 802 are interconnected via lines. For example, the interface circuit 802 can be used to receive signals from other devices (e.g., the memory of an electronic device). As another example, the interface circuit 802 can be used to send signals to other devices (e.g., the processor 801). Exemplarily, the interface circuit 802 can read instructions stored in memory and send those instructions to the processor 801. When the instructions are executed by the processor 801, the interface corrosion protection device can perform the steps in the above embodiments. Of course, the chip system may also include other discrete devices, and some embodiments of this disclosure do not specifically limit this.

[0166] In some embodiments of this disclosure, the interface circuit 802 can acquire data, program instructions, and / or information from the internal storage area of ​​the chip system; it can also acquire data, program instructions, and / or information from outside the chip system.

[0167] Those skilled in the art will also understand that the various illustrative logical blocks and steps listed in the embodiments of this application can be implemented by electronic hardware, computer software, or a combination of both. Whether such functionality is implemented through hardware or software depends on the specific application and the overall system design requirements. Those skilled in the art can implement the described functionality using various methods for each specific application, but such implementation should not be construed as exceeding the scope of protection of the embodiments of this application.

Claims

1. A method for preventing corrosion of an interface, characterized in that, The method includes: Upon receiving an interrupt signal, the status of the insertion detection pin is checked against the status of the identification pin in the Type-C interface on the terminal. When the insertion detection pin is in the present state and the identification pin is in the absent state, the anti-corrosion strategy is activated; the presence of the insertion detection pin indicates that the Type-C interface is turned on, and the absence of the identification pin indicates that the external device is not inserted into the Type-C interface. The anti-corrosion strategy is used to reduce the corrosion of the identification pin.

2. The method according to claim 1, characterized in that, The step of activating the anti-corrosion strategy when the insertion detection pin is in the in-position state and the identification pin is in the out-of-position state includes: If the insertion detection pin is detected to be in the in-position state, wait for a preset time to detect the state of the identification pin; If the identification pin is detected to be out of position, the anti-corrosion strategy is activated.

3. The method according to claim 2, characterized in that, The method further includes: If the insertion detection pin is detected to be out of position, the identification pin is controlled to be in a low-level mode.

4. The method according to claim 2, characterized in that, The method further includes: When the identification pin is detected to be in the present state, the identification pin is controlled to be in a high-low level alternation mode.

5. The method according to claim 1, characterized in that, The method further includes: If the interrupt signal is received again, the state of the insertion detection pin is checked; If the insertion detection pin is not in place, the corrosion prevention strategy is terminated.

6. The method according to claim 5, characterized in that, The step of exiting the anti-corrosion strategy when the insertion detection pin is not in the correct position includes: If the insertion detection pin is not in place and the terminal screen is lit by user input, the anti-corrosion strategy is terminated.

7. The method according to claim 1, characterized in that, After activating the corrosion prevention strategy, the method further includes: When the screen of the terminal is on, the identification pin is controlled to enter a high-low level alternation mode.

8. The method according to claim 7, characterized in that, When the screen of the terminal is on, after controlling the recognition pin to enter a high-low level alternation mode, the method further includes: When the screen switches from the on state to the off state and no external device is inserted into the Type-C interface, the identification pin is controlled to be in a low-level mode.

9. The method according to claim 7, characterized in that, When the screen of the terminal is on, after controlling the recognition pin to enter a high-low level alternation mode, the method further includes: When the screen switches from the on state to the off state and the external device is plugged into the Type-C interface, the identification pin is controlled to be in the target mode; the target mode is the mode after the identification pin is switched after the external device is plugged into the Type-C interface.

10. The method according to claim 7, characterized in that, The method further includes: When the terminal screen is off and the terminal's audio device or Bluetooth module is activated, the identification pin is controlled to be in the alternating high and low level mode.

11. The method according to claim 7, characterized in that, The method further includes: When the terminal screen is off and the terminal's audio device or Bluetooth module is turned off, the identification pin is controlled to be in a low-level mode.

12. An interface corrosion protection device, characterized in that, include: The receiving module is configured to detect the state of the insertion detection pin and the state of the identification pin in the Type C interface on the terminal when an interrupt signal is received. The anti-corrosion module is configured to activate an anti-corrosion strategy when the insertion detection pin is in the present state and the identification pin is in the absent state; the presence of the insertion detection pin indicates that the Type-C interface is turned on, and the absence of the identification pin indicates that the external device is not inserted into the Type-C interface; the anti-corrosion strategy is used to reduce the corrosion of the identification pin.

13. A processor, characterized in that, The processor is configured to perform the steps of the method according to any one of claims 1 to 11.

14. An interface corrosion protection device, characterized in that, It includes the processor of claim 13, and a memory for storing processor-executable instructions.

15. A computer-readable storage medium having a computer program stored thereon, characterized in that, When executed by a processor, the computer program implements the steps of the method described in any one of claims 1 to 11.