A method and device for simulating the distribution of electro-thermal parameters of a power semiconductor device on a whole wafer

Abstract

The application relates to a whole-wafer power semiconductor device electrothermal parameter distribution simulation method and device, the method is characterized in that: first working condition parameters are set, and the analysis is carried out in combination with the collection results of multiple physical quantity parameters; the whole-wafer device is divided into radial multiple regions; a refined electrothermal parameter distribution calculation model is established; quantitative calculation and analysis are carried out on the radial multiple region electric contact resistance, contact thermal resistance, current distribution and temperature distribution of the whole-wafer power semiconductor device; the current unevenness and temperature rise characteristics caused by the contact state difference of different radial regions can be accurately obtained; the calculation results are more consistent with the actual operation situation; the internal current and temperature distribution of the whole-wafer device can be accurately obtained; the potential failure risk can be identified in advance; and the device safety, reliability and engineering application adaptability are significantly improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor device simulation and analysis technology, specifically to a method and apparatus for simulating the distribution of electrothermal parameters of a whole-wafer power semiconductor device. Background Technology

[0002] Flexible direct current (DC) transmission technology, as a core support for building a new power system, has become a key pathway for cross-regional power transmission from large-scale wind and solar power bases in inland and deep-sea areas. However, the reliable operation of the flexible DC converter valve, the core of energy conversion, has become a critical technical bottleneck restricting the safety of the entire service life of the project. The power semiconductor devices used in flexible DC converter valves are generally composed of multi-chip parallel connections or whole-wafer power semiconductor device packages, and electrical connections are mainly achieved through external pressure.

[0003] Semiconductor devices commonly exhibit significant electrothermal multiphysics coupling and stress imbalance, particularly under extreme short-circuit, surge, and short-term overload conditions unique to flexible DC systems. These conditions can easily lead to uneven radial current distribution and excessively high local temperatures, potentially causing thermal runaway, device performance degradation, or even catastrophic failure. Therefore, during the device design and application phases, it is crucial to accurately assess the contact resistance, contact thermal resistance, current distribution, and temperature distribution of the entire wafer power semiconductor device under different operating conditions to improve device safety and reliability.

[0004] Current methods are based on overall equivalent parameter models or finite element multiphysics simulations for analysis. While overall equivalent parameter models are simple to model and computationally fast, they neglect the significant radial non-uniformity present in the entire wafer structure, failing to reflect current congestion and local hotspots caused by pressure distribution differences in different radial regions. Finite element multiphysics simulations, which simulate using a 3D device model, can describe the internal electrothermal distribution of the device with relatively high precision, but they are highly dependent on model parameters, especially contact resistance and thermal resistance, which are difficult to obtain accurately. Furthermore, the calculation process is complex and time-consuming, making them unsuitable for rapid, multi-condition parameter evaluation in engineering applications.

[0005] Therefore, there is an urgent need for a method that can efficiently and accurately calculate the distribution of internal electrothermal parameters of a whole wafer power semiconductor device under given external operating conditions, in order to solve the existing technical problems. Summary of the Invention

[0006] To overcome the shortcomings of the prior art, this application provides a method and apparatus for simulating the electrothermal parameter distribution of a whole-wafer power semiconductor device, specifically adopting the following technical solution:

[0007] A method for simulating the electrothermal parameter distribution of a whole-wafer power semiconductor device, the method comprising the following steps:

[0008] Determine the first operating condition parameters and device characteristic parameters of the whole wafer power semiconductor device; the device characteristic parameters are the inherent characteristic parameters of the device set in advance according to the corresponding specifications of different types of whole wafer power semiconductor devices.

[0009] Under the first operating condition parameters, the whole wafer power semiconductor device is simulated and tested to obtain the operating condition measurement parameters of the whole wafer power semiconductor device;

[0010] The first parameter set of the whole wafer power semiconductor device is determined based on the operating condition measurement parameters and device characteristic parameters. The first parameter set includes at least the current, contact resistance, junction temperature and contact thermal resistance of each ring in the whole wafer power semiconductor device.

[0011] Using the first parameter set as initial conditions, the distribution data of the electrothermal parameters of each ring of the whole wafer power semiconductor device are obtained by solving the problem through a bidirectional electrothermal coupling iterative method.

[0012] An equivalent circuit is constructed based on the distribution data of the electrothermal parameters of each ring, and simulation calculations are performed using preset circuit simulation software to obtain the distribution results of the electrothermal parameters of the whole wafer power semiconductor device.

[0013] Optionally: The step of determining the first parameter set of the whole wafer power semiconductor device based on the operating condition measurement parameters and device characteristic parameters includes:

[0014] The first calculation data is determined based on the operating condition measurement parameters and device characteristic parameters; the first calculation data includes at least the anode case temperature, cathode case temperature, power heat flow, average pressure of semiconductor device, pressure of each ring, number of rings of the whole wafer device, inner and outer ring radii of each ring, effective heat transfer area of ​​each ring, and series and parallel thermal resistance coefficients.

[0015] The first calculation data is substituted into the first calculation function to obtain the first calculation result; the first calculation result includes at least the anode contact thermal resistance and cathode contact thermal resistance of each ring; the first calculation function is a pre-set solution function for calculating the anode contact thermal resistance and cathode contact thermal resistance;

[0016] The first calculation data and the first calculation result are substituted into the second calculation function to obtain the second calculation result. The second calculation result includes at least the anode junction temperature, cathode junction temperature and junction temperature of each ring. The second calculation function is a pre-set solution function for calculating the junction temperature of a semiconductor device.

[0017] Optionally: The step of determining the first parameter set of the whole wafer power semiconductor device based on the operating condition measurement parameters and device characteristic parameters includes:

[0018] The second calculation data is determined based on the operating condition measurement parameters and device characteristic parameters; the second calculation data includes at least the current source value, the voltage across the semiconductor device, the number of device rings on the whole wafer, the material resistivity, the material hardness, the oxide layer tunnel resistivity, the number of conductive spots per unit area, the equivalent elastic modulus, the rough surface density, the average radius of curvature of the rough peak, the Gaussian distribution, the contact spacing, and the inner and outer ring radii of each ring.

[0019] The third calculation data is determined based on the current source value and the voltage across the semiconductor device; the third calculation data includes at least the anode contact resistance and cathode contact resistance of the entire wafer power semiconductor device.

[0020] The second and third calculation data are substituted into the third calculation function to obtain the third calculation result, which includes at least the anode contact resistance and cathode contact resistance of each ring.

[0021] The second calculation data is substituted into the fourth calculation function to obtain the fourth calculation result, which includes at least the current of each ring.

[0022] Optionally: The step of obtaining the electrothermal parameter distribution data of each ring of the whole wafer power semiconductor device by solving the problem through an electrothermal bidirectional coupling iterative method using the first parameter set as the initial condition includes:

[0023] The fourth calculation data is determined based on the first parameter set, operating condition measurement parameters, and device characteristic parameters. The fourth calculation data includes at least the current source value, the preset current convergence threshold, the preset junction temperature convergence threshold, the anode contact thermal resistance and cathode contact thermal resistance of each ring, the junction temperature of each ring, the anode contact resistance and cathode contact resistance of each ring, the current of each ring, the effective heat transfer area of ​​each ring, the number of rings of the whole wafer device, the inner and outer ring radii of each ring, the device equivalent radial thermal conductivity, the first-order temperature sensitivity coefficient, and the second-order temperature sensitivity coefficient.

[0024] Based on the fourth calculation data, the first... k The electrothermal state matrix of the next iteration and the radial thermal diffusion coupling coefficient between adjacent rings; where k Let be the number of iterations, when k When =0, the electrothermal state quantity matrix is ​​the corresponding value of the first parameter set;

[0025] Based on the k The electrothermal state matrix of the second iteration determines the first... k +1 iterations of power and heat flow in each loop;

[0026] Based on the k The electrothermal state matrix of the nth iteration, the nth k In the +1 iteration, the power and heat flux of each ring and the radial thermal diffusion coupling coefficient between adjacent rings are respectively used to construct the whole wafer power semiconductor device.i The heat balance equation of the ring;

[0027] The first [equation] is obtained by solving the thermal balance equations of each ring in a whole-wafer power semiconductor device. k Junction temperature of each ring in +1 iteration;

[0028] According to the k The junction temperature of each ring in the +1 iteration affects the... k In the next iteration, the contact thermal resistance of each loop in the electrothermal state matrix is ​​spatially weighted and corrected to obtain the first... k Contact thermal resistance of each ring under +1 iteration;

[0029] According to the k The junction temperature of each ring in the +1 iteration affects the... k The contact resistance of each loop in the electrothermal state matrix is ​​corrected and calculated in the next iteration to obtain the first... k Contact resistance of each ring in +1 iteration;

[0030] According to the k The contact resistance of each ring is recalculated in the +1 iteration to obtain the first... k The ring current of each ring in +1 iterations;

[0031] Based on the k The contact thermal resistance, junction temperature, contact resistance, and current of each ring are constructed in the +1 iteration to obtain the first... k Electrothermal state matrix under +1 iterations;

[0032] When the coupling iteration termination condition is met, the electrothermal state matrix of the last iteration of each loop is used as the electrothermal parameter distribution data of the corresponding loop in the whole wafer power semiconductor device; when the coupling iteration termination condition is not met, the coupling iteration process continues.

[0033] Furthermore, the coupling iteration termination condition includes a first termination condition and a second termination condition. The first termination condition is that the difference in junction temperature of each ring before and after the iteration is less than a preset junction temperature convergence threshold. The second termination condition is that the difference in current of each ring before and after the iteration is less than a preset current convergence threshold.

[0034] Furthermore: the step of constructing the equivalent circuit based on the distribution data of the electrothermal parameters of each ring includes:

[0035] Using the geometric center of the entire wafer power semiconductor device as a reference, the electrothermal parameter distribution data of each ring of the entire wafer power semiconductor device are obtained in a radial order from the center outwards; the electrothermal parameter distribution data includes anode contact thermal resistance, cathode contact thermal resistance, junction temperature, anode contact resistance, cathode contact resistance, and current;

[0036] Based on the distribution data of electrothermal parameters of each ring of the whole wafer power semiconductor device, the equivalent branches of each ring are constructed respectively; the equivalent branches include the anode contact resistance branch, the cathode contact resistance branch, the anode contact thermal resistance branch, the cathode contact thermal resistance branch, and the ring branches of the semiconductor device.

[0037] The equivalent circuit of the corresponding ring is formed by connecting the anode contact resistance branch, the anode contact thermal resistance branch, the ring branch of the semiconductor device, the cathode contact resistance branch, and the cathode contact thermal resistance branch in series in that order.

[0038] Connect the equivalent circuits of each ring in parallel from start to finish, and connect the gates of the ring branches of the semiconductor devices in each ring in parallel to form a... n Ring equivalent circuit, in which n This represents the total number of rings in the power semiconductor device on the entire wafer.

[0039] Furthermore, the preset circuit simulation software uses SPICE circuit simulation software.

[0040] Optional: The first operating condition parameters include at least the type, model, operating temperature, operating pressure, operating voltage, current source value, preset current convergence threshold, and preset junction temperature convergence threshold of the whole wafer power semiconductor device; the device characteristic parameters include at least the number of rings of the whole wafer device, the inner and outer ring radii of each ring, the surface roughness density, the average radius of curvature of the roughness peak, the contact spacing, the equivalent elastic modulus, the material resistivity, the material hardness, the oxide layer tunnel resistivity, the effective heat transfer area of ​​each ring, the number of conductive spots per unit area, the semiconductor material density, the specific heat capacity, the material volume corresponding to each ring, the device's equivalent radial thermal conductivity, Gaussian distribution, the first-order temperature sensitivity coefficient, the second-order temperature sensitivity coefficient, and the series and parallel thermal resistance coefficients.

[0041] Optionally, the operating condition measurement parameters include at least temperature parameters, pressure parameters, and voltage parameters; wherein the temperature parameters include anode shell temperature, cathode shell temperature, and power heat flux; the pressure parameters include the pressure values ​​of each ring and the average pressure value; and the voltage parameters include the voltage across the semiconductor device.

[0042] Furthermore, this application also discloses a whole-wafer power semiconductor device electrothermal parameter distribution simulation device, the device comprising at least:

[0043] The parameter input module is used to determine the first operating condition parameters and device characteristic parameters of the whole wafer power semiconductor device; the device characteristic parameters are the inherent characteristic parameters of the device set in advance according to the corresponding specifications of different types of whole wafer power semiconductor devices.

[0044] The simulation test module is used to perform simulation tests on the whole wafer power semiconductor device under the first operating condition parameters, and to obtain the operating condition measurement parameters of the whole wafer power semiconductor device.

[0045] The parameter extraction module determines the first parameter set of the whole wafer power semiconductor device based on the operating condition measurement parameters and device characteristic parameters. The first parameter set includes at least the current, contact resistance, junction temperature and contact thermal resistance of each ring in the whole wafer power semiconductor device.

[0046] The coupled solution module is used to obtain the distribution data of electrothermal parameters of each ring of the whole wafer power semiconductor device by using the first parameter set as the initial condition and solving it through a bidirectional electrothermal coupling iterative method.

[0047] The simulation output module is used to construct an equivalent circuit based on the distribution data of the electrothermal parameters of each ring, and to perform simulation calculations using preset circuit simulation software to obtain the distribution results of the electrothermal parameters of the whole wafer power semiconductor device.

[0048] The technical solution of this application achieves the following beneficial effects:

[0049] The simulation method for electrothermal parameter distribution of whole-wafer power semiconductor devices in this application only sets initial operating conditions such as pressure, current, temperature, and voltage. It combines the collected results of multiple physical parameters for analysis and divides the whole-wafer device into radial multi-regions to establish a more refined calculation model for electrothermal parameter distribution. This enables quantitative calculation and analysis of electrical contact resistance, contact thermal resistance, current distribution, and temperature distribution in radial multi-regions of the whole-wafer power semiconductor device. It accurately obtains the current unevenness and temperature rise characteristics caused by the difference in contact state in different radial regions, making the calculation results more consistent with the actual operating conditions. It accurately calculates the internal current and temperature distribution of the whole-wafer device, thereby identifying potential failure risks in advance and significantly improving the safety, reliability, and engineering application adaptability of the device under high current and high power operating conditions. Attached Figure Description

[0050] Figure 1 This is a flowchart of the simulation method for the distribution of electrothermal parameters of a whole wafer power semiconductor device in the embodiments of this application.

[0051] Figure 2 This is a plan view of the whole wafer power semiconductor device in the embodiments of this application.

[0052] Figure 3 This is a schematic diagram of the structure of the whole-wafer power semiconductor device in the embodiments of this application.

[0053] Figure 4 This is a single-ring semiconductor equivalent circuit diagram of the whole wafer power semiconductor device in the embodiments of this application.

[0054] Figure 5 This is a multi-ring parallel equivalent circuit diagram of the whole wafer power semiconductor device in the embodiments of this application.

[0055] Figure 6 This is a current distribution result diagram output by an embodiment of this application.

[0056] Figure 7 This is a temperature distribution result diagram output by an embodiment of this application.

[0057] Figure 8 This is a structural diagram of the simulation device according to an embodiment of this application.

[0058] Figure 9 This is a flowchart illustrating the process of simulating the distribution of electrothermal parameters for the simulation device in the embodiments of this application.

[0059] Figure 10 This is a structural diagram of an electronic device according to an embodiment of this application. Detailed Implementation

[0060] The present application will now be further described with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present application and should not be construed as limiting the scope of protection of the present application. It should be noted that the following detailed descriptions are exemplary and intended to provide further explanation of the present application.

[0061] Specifically, such as Figure 1 As shown in the figure, this embodiment discloses a simulation method for the electrothermal parameter distribution of a whole-wafer power semiconductor device. This method can accurately evaluate the electrothermal parameter distribution of a whole-wafer power semiconductor device under different operating conditions. The method includes the following steps:

[0062] First, the first operating condition parameters and device characteristic parameters of the entire wafer power semiconductor device are determined. In this embodiment, the first operating condition parameters include at least the type and model of the entire wafer power semiconductor device, operating temperature, operating pressure, operating voltage, current source value, preset current convergence threshold, and preset junction temperature convergence threshold. Among them, the operating temperature, operating pressure, operating voltage, and current source value are the core boundary conditions for simulating the actual engineering operation of the device, ensuring that the subsequent simulation or calculation process fully matches the actual operating environment of the device. The type and model of the entire wafer power semiconductor device are the configuration basis for calling preset parameters or functions in the subsequent simulation or calculation process, ensuring the accuracy of the results.

[0063] This embodiment calculates the electrothermal parameter distribution of a press-fit IGCT semiconductor device and derives waveforms with temperature distribution between 80μs and 280μs and current distribution between 152.3μs and 162μs, as shown below. Figure 6 and Figure 7 As shown in Table 1, the parameters for the first operating condition are as follows.

[0064]

[0065] In this embodiment, the device characteristic parameters are pre-matched to the inherent characteristic parameters of different types of whole-wafer power semiconductor devices according to their corresponding specifications. Generally, when setting the first operating condition parameters, the device characteristic parameters can be determined after determining the type and model of the whole-wafer power semiconductor device. Specifically, the device characteristic parameters in this embodiment include at least the number of rings of the whole-wafer device, the inner and outer radii of each ring, the surface roughness density, the average radius of curvature of the roughness peak, the contact spacing, the equivalent elastic modulus, the material resistivity, the material hardness, the oxide layer tunnel resistivity, the effective heat transfer area of ​​each ring, the number of conductive spots per unit area, the semiconductor material density, the specific heat capacity, the material volume corresponding to each ring, the device's equivalent radial thermal conductivity, Gaussian distribution, the first-order temperature sensitivity coefficient, the second-order temperature sensitivity coefficient, and the series and parallel thermal resistance coefficients.

[0066] Secondly, under the operating environment constructed based on the first operating condition parameters, the entire wafer power semiconductor device is simulated and tested to obtain the operating condition measurement parameters of the entire wafer power semiconductor device. Since the operating environment constructed based on the first operating condition parameters is a theoretical setting, this embodiment uses a simulated operating environment to actually collect the operating condition measurement parameters, in order to avoid discrepancies between the calculation results and the actual operating conditions and to ensure the accuracy of subsequent electrothermal calculations. The operating condition measurement parameters in this embodiment include at least temperature parameters, pressure parameters, and voltage parameters. The pressure parameters include the pressure values ​​of each ring and the average pressure value. Since this embodiment divides the entire wafer power semiconductor device radially into multiple rings, the pressure values ​​of the first to last rings can be measured. n The pressure value of each ring in the circuit is used to accurately analyze the differences in radial pressure distribution, providing fundamental data for refined radial calculations. Temperature parameters include anode case temperature, cathode case temperature, and power heat flux, while voltage parameters include the voltage across the semiconductor device. This step uses the actually measured temperature, pressure, and voltage parameters as the initial reference for subsequent electrothermal coupling, ensuring that subsequent electrothermal coupling iterations are based on real-world operating conditions and that the coupling results closely match the actual operating state of the device.

[0067] Subsequently, based on the operating condition measurement parameters and device characteristic parameters, a first parameter set for the whole-wafer power semiconductor device can be determined. This first parameter set includes at least the current, contact resistance, junction temperature, and contact thermal resistance of each ring in the whole-wafer power semiconductor device. For example, in this embodiment, the whole-wafer power semiconductor device has… n If there are n rings, then the first parameter set includes the current values ​​of each ring from the 1st to the nth ring, the junction temperature values ​​of each ring from the 1st to the nth ring, and the current values ​​of each ring from the 1st to the nth ring. n The anode contact resistance values ​​of each ring, from ring 1 to ring 2 n The cathode contact resistance values ​​of each ring, from ring 1 to ring 2 n The anode contact thermal resistance values ​​of each ring and the first to the second ring n The cathode contact thermal resistance of each ring.

[0068] Specifically, in this embodiment, the process of determining the contact thermal resistance and junction temperature of each ring in the first parameter set is as follows:

[0069] The first calculation data is determined based on the obtained operating condition measurement parameters and device characteristic parameters; wherein the first calculation data includes at least the anode case temperature, cathode case temperature, power heat flow, average pressure of semiconductor device, pressure of each ring from the 1st to the nth ring, number of rings of the whole wafer device, inner and outer ring radii of each ring, effective heat transfer area of ​​each ring, and series and parallel thermal resistance coefficients.

[0070] In this embodiment, the following functions are used as the first calculation function and the second calculation function to solve for the anode contact thermal resistance, the cathode contact thermal resistance, and the junction temperature, respectively.

[0071] The first calculation function is:

[0072] ;

[0073] ;

[0074] The second calculation function is:

[0075] ;

[0076] in R TA This is the value of the anode contact thermal resistance. R TC This is the value of the cathode contact thermal resistance. T VJ Junction temperature of semiconductor devices T A For anode shell temperature, T C The cathode shell temperature, Q For power heat flow, α The series and parallel thermal resistance coefficients are given.

[0077] The first and second calculation functions mentioned above are pre-set solution functions used to calculate the anode contact thermal resistance, cathode contact thermal resistance, and junction temperature.

[0078] Furthermore, in this embodiment, the first calculated data is substituted into the first calculation function to obtain the first calculation result, namely the anode contact thermal resistance and cathode contact thermal resistance of each ring:

[0079] ;

[0080] ;

[0081] Simultaneously, the first calculated data and the first calculated result are substituted into the second calculated function to obtain the second calculated result, namely the anode junction temperature, cathode junction temperature, and junction temperature of each ring:

[0082] ;

[0083] ;

[0084] In the above formula R TA,i For the first i The thermal resistance of the ring anode contact is... R TC,i For the first i The ring cathode contact thermal resistance, T VJ,i,A For the anode i Circular junction temperature, T VJ,i,C For the cathode i Circular junction temperature, T VJ,i For the first i Circulation junction temperature, T VJ,j For the first j Circular junction temperature, R TA For the anode contact thermal resistance, R TC For cathode contact thermal resistance, π Pi r i,o For the first i One outer ring radius, r n,o For the first n One outer ring radius, r i,i For the first i One inner ring radius, P i For the first i Ring pressure, for n The average pressure of each ring, T A For anode shell temperature, T C The cathode shell temperature, T VJ Junction temperature of semiconductor devices A i For the first i Effective heat transfer area of ​​each ring, A j For the first j Effective heat transfer area of ​​each ring, T VJ,j,A For the anode j Circular junction temperature,T VJ,j,C For the cathode j Circular junction temperature, i and j All of these are the ring numbers of whole-wafer power semiconductor devices. i =1, 2, 3 , n ; j =1, 2, 3 , n ;in n This refers to the number of rings in a full-wafer power semiconductor device.

[0085] Specifically, in this embodiment, the process of determining the current and contact resistance of each ring in the first parameter set is as follows:

[0086] The second calculation data is determined based on the operating condition measurement parameters and device characteristic parameters; wherein the second calculation data includes at least the current source value, the voltage across the semiconductor device, the number of device rings on the whole wafer, the material resistivity, the material hardness, the oxide layer tunnel resistivity, the number of conductive spots per unit area, the equivalent elastic modulus, the rough surface density, the average radius of curvature of the rough peak, the Gaussian distribution, the contact spacing, and the inner and outer ring radii of each ring.

[0087] By applying a current source across the entire wafer power semiconductor device, a third set of calculated data can be determined based on the current source value and the voltage across the semiconductor device, namely, the overall anode contact resistance and cathode contact resistance of the entire wafer power semiconductor device:

[0088] ;

[0089] In the above formula R EA This refers to the anode contact resistance. R EC The cathode contact resistance, I For current source values, U This is the voltage across the semiconductor device.

[0090] In this embodiment, the following functions are used as the third and fourth calculation functions to solve for the first to the second rings, respectively. n The anode contact resistance, cathode contact resistance, and junction temperature of each ring.

[0091] The third calculation function is:

[0092] ;

[0093] The third calculation result is obtained by substituting the second and third calculation data into the third calculation function mentioned above, that is, the result from the first ring to the third... n The anode contact resistance and cathode contact resistance of each ring.

[0094] The fourth calculation function is:

[0095] ;

[0096] In the above formula R EA,i For the first i Ring anode contact resistance, R EC,i For the first i Ring cathode contact resistance. I i For the first i Loop current, ρ The resistivity of the material H For material hardness, r i,o For the first i One outer ring radius, r i,i For the first i One inner ring radius, For the equivalent elastic modulus, z For integration variables, d For contact spacing, R EA This refers to the anode contact resistance. R EC The cathode contact resistance, n spot The number of conductive spots per unit area. The resistivity of the oxide layer tunnel. For rough cover density, The average radius of curvature of the rough peak. It follows a Gaussian distribution. Pi U The voltage across the semiconductor device. i This represents the ring number of the whole-wafer power semiconductor device. i =1, 2, 3 , n ,in n This refers to the number of rings in a full-wafer power semiconductor device.

[0097] The fourth calculation result is obtained by substituting the second calculation data into the fourth calculation function mentioned above, that is, the first ring to the fourth... n The current in each ring.

[0098] Similarly, the third and fourth calculation functions mentioned above are also pre-set solution functions used to calculate the anode contact resistance, cathode contact resistance, and current.

[0099] Subsequently, this embodiment uses the first parameter set as the initial condition and obtains the distribution data of the electrothermal parameters of each ring of the whole wafer power semiconductor device through an iterative electrothermal bidirectional coupling method.

[0100] Specifically, in this embodiment, the solution process using bidirectional electrothermal coupling iteration is as follows:

[0101] This embodiment determines the fourth calculation data based on the first parameter set, operating condition measurement parameters, and device characteristic parameters. The fourth calculation data includes at least the current source value, the preset current convergence threshold, the preset junction temperature convergence threshold, the anode contact thermal resistance and cathode contact thermal resistance of each ring, the junction temperature of each ring, the anode contact resistance and cathode contact resistance of each ring, the current of each ring, the effective heat transfer area of ​​each ring, the number of rings in the whole wafer device, the inner and outer ring radii of each ring, the device equivalent radial thermal conductivity, the first-order temperature sensitivity coefficient, and the second-order temperature sensitivity coefficient.

[0102] This embodiment constructs and obtains the fourth calculation data. k The electrothermal state matrix of the next iteration:

[0103] ;

[0104] In the above formula For the first i Ring 1 k The thermal resistance of the anode contact in the next iteration. For the first i Ring 1 k The cathode contact thermal resistance in the next iteration. For the first i Ring 1 k The junction temperature of the next iteration, For the first i Ring 1 k Anode contact resistance in the next iteration. For the first i Ring 1 k The cathode contact resistance in the next iteration. For the first i Ring 1 k The current in the next iteration i This represents the ring number of the entire wafer semiconductor device. i =1, 2, 3 , n ,in n This refers to the number of rings in a whole-wafer semiconductor device. k Let be the number of iterations, where when k When =0, the above electrothermal state quantity matrix is ​​the corresponding value of the first parameter set.

[0105] Furthermore, this embodiment can calculate the radial thermal diffusion coupling coefficient between adjacent rings based on the fourth calculation data. The specific calculation process is as follows:

[0106] ;

[0107] In the above formula G th,i,j The radial thermal diffusion coupling coefficient between adjacent rings. k eq The equivalent radial thermal conductivity of the device is... r i,o For the first i One outer ring radius, r i,i For the first i One inner ring radius, π Pi i and j All of these are the ring numbers of whole-wafer semiconductor devices. i =1, 2, 3 , n ; j =1, 2, 3 , n ,in n This represents the number of rings in a complete wafer semiconductor device.

[0108] Further, based on the first k The electrothermal state matrix of the second iteration determines the first... k The calculation process for the power and heat flux of each loop in the +1 iteration is as follows:

[0109] ;

[0110] In the above formula A i For the first i The effective heat transfer area of ​​the ring, For the first i Ring 1 k The current in the next iteration For the first i Ring 1 k Anode contact resistance in the next iteration. i This represents the ring number of the entire wafer semiconductor device. i =1, 2, 3 , n ,in n This refers to the number of rings in a whole-wafer semiconductor device. k This represents the number of iterations.

[0111] Then based on the first k The electrothermal state matrix of the nth iteration, the nth k The thermal balance equations for each ring of the whole-wafer power semiconductor device can be constructed by using the power heat flow of each ring and the radial thermal diffusion coupling coefficient between adjacent rings in the +1 iteration. This embodiment uses the first iteration as an example. iTaking a ring as an example, its heat balance equation can be expressed as:

[0112] ;

[0113] In the above formula For the first i Ring 1 k Power heat flux of +1 iteration For the first i Ring 1 k The thermal resistance of the anode contact in the next iteration. For the first i Ring 1 k The cathode contact thermal resistance in the next iteration. For the first i Ring 1 k The junction temperature at +1 iteration. For the first i Ring 1 k The junction temperature of the next iteration, G th,i,j The radial thermal diffusion coupling coefficient between adjacent rings. T A For anode shell temperature, T C The cathode shell temperature, A i For the first i The effective heat transfer area of ​​the ring, i and j All of these are the ring numbers of whole-wafer semiconductor devices. i =1, 2, 3 , n ; j =1,2,3 , n ,in n This refers to the number of rings in a whole-wafer semiconductor device. k This represents the number of iterations.

[0114] The first [equation] is obtained by solving the thermal balance equations of each ring in a whole-wafer power semiconductor device. k Junction temperatures of each ring in +1 iteration:

[0115] ;

[0116] ;

[0117] In the above formula Here is the junction temperature matrix. For the first i Ring 1 k The junction temperature at +1 iteration. h xx and h xyFor thermal coupling strength, x , y These represent the number of rows and columns of the matrix, respectively. x , y ≤ n and x ≠ y . T A For anode shell temperature, T C The cathode shell temperature, For the first i Ring 1 k The power heat flux of the next iteration For the first i Ring 1 k The thermal resistance of the anode contact in the next iteration. For the first i Ring 1 k The cathode contact thermal resistance in the next iteration. G th,i,j is the radial thermal diffusion coupling coefficient between adjacent rings. i and j All of these are the ring numbers of whole-wafer semiconductor devices. i =1, 2, 3 , n ; j =1, 2, 3 , n ,in n This refers to the number of rings in a whole-wafer semiconductor device. k This represents the number of iterations.

[0118] Next, according to the... k The junction temperature of each ring in the +1 iteration affects the... k In the next iteration, the contact thermal resistance of each loop in the electrothermal state matrix is ​​spatially weighted and corrected to obtain the first... k Contact thermal resistance of each ring in +1 iteration:

[0119] ;

[0120] In the above formula For the first i Ring 1 k Anode contact thermal resistance after +1 iteration For the first i Ring 1 k Cathode contact thermal resistance after +1 iteration For the first i Ring 1 k The thermal resistance of the anode contact in the next iteration. For the first i Ring 1 k The cathode contact thermal resistance in the next iteration. It is a non-linear distribution index. For the first i Ring 1 k The junction temperature at +1 iteration. For the first j Ring 1 k The junction temperature at +1 iteration. T A For anode shell temperature, T C The cathode shell temperature, A i For the first i Effective heat transfer area of ​​each ring, A j For the first j Each ring has an effective heat transfer area. i and j All of these are the ring numbers of whole-wafer semiconductor devices. i =1, 2, 3 , n ; j =1, 2, 3 , n ,in n This refers to the number of rings in a whole-wafer semiconductor device. k This represents the number of iterations.

[0121] Simultaneously utilizing the above-mentioned... k The junction temperature of each ring in the +1 iteration affects the... k The contact resistance of each loop in the electrothermal state matrix is ​​corrected and calculated in the next iteration to obtain the first... k Contact resistance of each ring in +1 iteration:

[0122] ;

[0123] In the above formula For the first i Ring 1 k Anode contact resistance after +1 iteration For the first i Ring 1 k Cathode contact resistance in +1 iteration For the first i Ring 1 k Anode contact resistance in the next iteration. For the first i Ring 1 k The cathode contact resistance in the next iteration. It is a first-order temperature sensitivity coefficient. It is a second-order temperature sensitivity coefficient. T VJ Junction temperature of semiconductor devices For the first i Ring 1 kThe junction temperature at +1 iteration. i This represents the ring number of the entire wafer semiconductor device. i =1, 2, 3 , n ,in n This refers to the number of rings in a whole-wafer semiconductor device. k This represents the number of iterations.

[0124] Furthermore, it can be based on the first k The contact resistance of each ring is recalculated in the +1 iteration to obtain the first... k The ring currents of each ring in +1 iteration:

[0125] ;

[0126] In the above formula For the first i Ring 1 k Current from +1 iteration I For current source values, For the first i Ring 1 k Anode contact resistance after +1 iteration For the first j Ring 1 k Cathode contact resistance in +1 iteration. i and j All of these are the ring numbers of whole-wafer semiconductor devices. i =1, 2, 3 , n ; j =1, 2, 3 , n ,in n This refers to the number of rings in a whole-wafer semiconductor device. k This represents the number of iterations.

[0127] Finally, based on the above... k In the +1 iteration, the contact thermal resistance, junction temperature, contact resistance, and current of each ring can be used to construct the... k Electrothermal state matrix under +1 iteration:

[0128] ;

[0129] In the above formula For the first k At the +1st iteration, the... i The thermal resistance of the ring anode contact is... For the first k At the +1st iteration, the... i The ring cathode contact thermal resistance, For the first k At the +1st iteration, the... i Circular junction temperature, For the first k At the +1st iteration, the... i Ring anode contact resistance, For the first k At the +1st iteration, the... i Ring cathode contact resistance. For the first k At the +1st iteration, the... i Loop current, i This represents the ring number of the entire wafer semiconductor device. i =1, 2, 3 , n ,in n This refers to the number of rings in a whole-wafer semiconductor device. k This represents the number of iterations.

[0130] In this embodiment, the above process can be repeated to iterate the electrothermal state matrix until the coupling iteration termination condition is met. The electrothermal state matrix of the last iteration of each loop is then used as the electrothermal parameter distribution data for the corresponding loop in the whole-wafer power semiconductor device. If the coupling iteration termination condition is not met, the coupling iteration process continues. It should be noted that the coupling iteration termination condition in this embodiment includes a first termination condition and a second termination condition.

[0131] The first termination condition is that the difference in junction temperature between each loop before and after the iteration is less than a preset junction temperature convergence threshold, i.e.:

[0132] ;

[0133] The second termination condition is that the difference in current between each loop before and after the iteration is less than a preset current convergence threshold, i.e.:

[0134] ;

[0135] In the above formula To preset the current convergence threshold, To preset the junction temperature convergence threshold, For the first i Ring 1 k The junction temperature at +1 iteration. For the first i Ring 1 k The junction temperature of the next iteration, For the first i Ring 1 k Current from +1 iteration For the first i Ring 1 k The current in the next iteration i This represents the ring number of the entire wafer semiconductor device. i =1, 2, 3 , n,in n This refers to the number of rings in a whole-wafer semiconductor device. k This represents the number of iterations.

[0136] In this embodiment, after all the above-mentioned coupling iteration termination conditions are met, the electrothermal state matrix of the last iteration is used as the electrothermal parameter distribution data of the corresponding ring in the whole wafer power semiconductor device:

[0137] ;

[0138] In the above formula For the first i Final value of the annular anode contact thermal resistance. For the first i Final value of the ring cathode contact thermal resistance For the first i Final value of ring junction temperature, For the first i Final value of the ring anode contact resistance. For the first i Final value of the ring cathode contact resistance. For the first i Final value of loop current i This represents the ring number of the entire wafer semiconductor device. i =1, 2, 3 , n ,in n This represents the number of rings in a complete wafer semiconductor device.

[0139] Finally, an equivalent circuit is constructed based on the distribution data of the electrothermal parameters of each ring, and simulation calculations are performed using preset circuit simulation software to obtain the distribution results of the electrothermal parameters of the whole wafer power semiconductor device.

[0140] Specifically, the process of constructing the equivalent circuit based on the distribution data of the electrothermal parameters of each ring in this embodiment is as follows:

[0141] Firstly, in this embodiment, the geometric center of the entire wafer power semiconductor device is used as a reference, and the electrothermal parameter distribution data of each ring of the entire wafer power semiconductor device are obtained sequentially from the center outward in a radial order; that is, the electrothermal parameter distribution data includes the first ring to the second ring. n The final value of the anode contact thermal resistance of each ring, from the first ring to the second ring. n Final value of cathode contact thermal resistance of each ring, from ring 1 to ring 2 n Final junction temperature of each ring, from ring 1 to ring 2 n The final value of the anode contact resistance of each ring, from ring 1 to ring 2. n The final value of the cathode contact resistance of each ring, from ring 1 to ring 2 n Final current value of each ring, number of rings in the whole wafer power semiconductor device nIt should be noted that in this embodiment, the rings are numbered sequentially from the center outwards, such as... Figure 2 As shown.

[0142] Extracting from the first ring to the second ring n The final value of the anode contact thermal resistance of the ring and the first ring to the second ring n The final value of the cathode contact thermal resistance of the ring can be expressed as:

[0143] ;

[0144] In the above formula R TA For the anode contact thermal resistance matrix, R TC This is the cathode contact thermal resistance matrix, where T denotes transpose. For the first i Final value of annular anode contact thermal resistance For the first i Final value of the ring cathode contact thermal resistance i This represents the ring number of the entire wafer semiconductor device. i =1, 2, 3 , n ,in n This represents the number of rings in a complete wafer semiconductor device.

[0145] Extracting the first ring to the second ring n The final junction temperature of the ring can be expressed as:

[0146] ;

[0147] In the above formula, T VJ Here is the junction temperature matrix, and T denotes the transpose. For the first i Final value of ring junction temperature, i This represents the ring number of the entire wafer semiconductor device. i =1, 2, 3 , n ,in n This represents the number of rings in a complete wafer semiconductor device.

[0148] Extracting the first ring to the second ring n The final value of the anode contact resistance of the ring and the first ring to the second ring n The final value of the cathode contact resistance of the ring can be expressed as:

[0149] ;

[0150] In the above formula, R EA For the anode contact resistance matrix, R EC This is the cathode contact resistance matrix, where T denotes transpose. For the first iFinal value of the ring anode contact resistance. For the first i Final value of the ring cathode contact resistance. i This represents the ring number of the entire wafer semiconductor device. i =1, 2, 3 , n ,in n This represents the number of rings in a complete wafer semiconductor device.

[0151] Extracting the first ring to the second ring n The final value of the current in the loop can be expressed as:

[0152] ;

[0153] In the above formula, I is the current matrix, and T represents the transpose. For the first i Final value of loop current i This represents the ring number of the entire wafer semiconductor device. i =1, 2, 3 , n ,in n This represents the number of rings in a complete wafer semiconductor device.

[0154] Subsequently, based on the structure of the whole-wafer power semiconductor device, equivalent branches for each ring can be constructed using the electrothermal parameter distribution data of each ring in the whole-wafer power semiconductor device. These equivalent branches include those with values ​​of... The anode contact resistance branch, the value is The cathode contact resistance branch, the value is The anode contact thermal resistance branch, the value is The cathode contact thermal resistance branch and columnar values ​​are i The ring branch of the semiconductor device. Among them, the first... i The ring junction temperature is , No. i The loop current is .

[0155] In this embodiment, the equivalent circuit of the corresponding loop is formed by sequentially connecting the anode contact resistance branch, the anode contact thermal resistance branch, the semiconductor device loop branch, the cathode contact resistance branch, and the cathode contact thermal resistance branch. Combined with... Figure 3 and Figure 4 As shown, this embodiment uses the first... i Taking the equivalent circuit construction process of a single ring as an example, the terminals of the anode contact resistance branch are terminal 1 and terminal 2, and the terminals of the anode contact thermal resistance branch are terminal 3 and terminal 4. (Semiconductor device) iThe terminals of the branch circuit are terminals 5 and 6, the terminals of the cathode contact resistance branch circuit are terminals 7 and 8, and the terminals of the cathode contact thermal resistance branch circuit are terminals 9 and 10. When connecting the branches in series, terminals 2 and 3, 4 and 5, 6 and 7, and 8 and 9 are directly connected to form the [branch circuit]. i The equivalent circuit of each ring can be constructed in the same way, thereby obtaining the equivalent circuit of each ring of the entire wafer power semiconductor device.

[0156] Furthermore, the equivalent circuits of each ring can be connected in parallel end to end, and the gates of the ring branches of the semiconductor devices in each ring can be connected in parallel to form a... n Ring equivalent circuit. In this embodiment, terminals 1 and 10 of the equivalent circuit of each ring are connected in parallel, and the gates of the semiconductor device branches of each ring are connected in parallel, such as... Figure 5 As shown.

[0157] As a preferred embodiment, this embodiment completes the construction... n After obtaining the equivalent circuit, it can be converted into a circuit file in SPICE language and input into a preset circuit simulation software, such as SPICE circuit simulation software, to perform circuit simulation, calculate the current distribution and temperature distribution, and obtain the final electrothermal parameter distribution results.

[0158] Furthermore, this application also discloses a whole-wafer power semiconductor device electrothermal parameter distribution simulation device, which includes at least:

[0159] The parameter input module is used to determine the first operating condition parameters and device characteristic parameters of the whole wafer power semiconductor device; the device characteristic parameters are the inherent characteristic parameters of the device set in advance according to the corresponding specifications of different types of whole wafer power semiconductor devices.

[0160] The simulation test module is used to perform simulation tests on the whole wafer power semiconductor device under the first operating condition parameters, and to obtain the operating condition measurement parameters of the whole wafer power semiconductor device.

[0161] The parameter extraction module determines the first parameter set of the whole wafer power semiconductor device based on the operating condition measurement parameters and device characteristic parameters. The first parameter set includes at least the current, contact resistance, junction temperature and contact thermal resistance of each ring in the whole wafer power semiconductor device.

[0162] The coupled solution module is used to obtain the distribution data of electrothermal parameters of each ring of the whole wafer power semiconductor device by using the first parameter set as the initial condition and solving it through a bidirectional electrothermal coupling iterative method.

[0163] The simulation output module is used to construct an equivalent circuit based on the distribution data of the electrothermal parameters of each ring, and to perform simulation calculations using preset circuit simulation software to obtain the distribution results of the electrothermal parameters of the whole wafer power semiconductor device.

[0164] This embodiment integrates the above modules into a specific device, such as... Figure 8 As shown, the device includes an input display 1, an output display 2, an internal computing system 3, control buttons 4, a power switch 5, an external USB interface 6, an input control panel 7, a heat dissipation vent 8, a main housing 9, a working condition simulation and measurement system 10, a temperature and voltage simulation measurement device 11, a pressure simulation measurement device 12, and a whole wafer power semiconductor device 13.

[0165] The device can use the control panel 7 as a parameter input module to input the first operating parameters of the entire wafer power semiconductor device, and the input display 1 can show the parameters being input and those already input. After inputting the type and model of the entire wafer semiconductor, the device will automatically match data in the preset template library and automatically call up the corresponding device characteristic parameters.

[0166] Combination Figure 9 As shown, the working condition simulation and measurement system 10 in this embodiment serves as a simulation test module. It includes multiple simulation devices and measurement devices for different types of data, such as temperature simulation devices, voltage simulation devices, pressure simulation devices, temperature measurement devices, voltage measurement devices, and pressure measurement devices. It can perform working condition simulation based on the input first working condition parameters and measure and obtain working condition measurement parameters, such as some temperature parameters, pressure parameters, and voltage parameters.

[0167] Combination Figure 9 As shown, the parameter extraction module, coupled solution module, and simulation output module of this embodiment are built into the internal computing system 3 of the device. The parameter extraction module can be divided into multiple sub-modules. For example, the temperature parameter is obtained by the temperature and contact thermal resistance parameter sub-extraction module within the parameter extraction module; the contact thermal resistance parameter is obtained by the temperature and contact thermal resistance parameter extraction sub-module within the parameter extraction module; the current parameter is obtained by the current and contact resistance parameter extraction sub-module within the parameter extraction module; and the contact resistance parameter is obtained by the current and contact resistance parameter extraction sub-module within the parameter extraction module. The temperature and contact thermal resistance parameter extraction sub-module and the current and contact resistance parameter extraction sub-module are all based on the initial data of the input first operating condition parameters and device characteristic parameters for acquisition and calculation.

[0168] In addition, the simulation output module can output the electrothermal distribution waveform and calculation data to the output display 2. When exporting waveforms and data, it is output through the external USB interface 6.

[0169] The apparatus provided in this application embodiment can achieve... Figure 1 To avoid repetition, the various processes implemented in the method embodiments will not be described again here.

[0170] like Figure 10 As shown in the illustration, this application also provides an electronic device, including a processor and a memory, and a program or instructions stored in the memory and executable on the processor, which, when executed by the processor, implement as follows: Figure 1 The various processes of the method embodiments shown are all capable of achieving the same technical effect, and will not be described again here to avoid repetition.

[0171] This application embodiment also provides a readable storage medium storing a program or instructions that, when executed by a processor, implement the above-described functionality. Figure 1 The various processes described in the embodiments of the method described herein can achieve the same technical effect, and will not be repeated here to avoid repetition.

[0172] This application also provides a computer program product, including computer instructions, which, when executed by a processor, implement the above-described... Figure 1 The various processes described in the embodiments of the method described herein can achieve the same technical effect, and will not be repeated here to avoid repetition.

[0173] It should be understood that the phrase "one embodiment" or "an embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this application, the sequence numbers of the above-described processes do not imply a sequential order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. The sequence numbers of the above-described embodiments are merely descriptive and do not represent the superiority or inferiority of the embodiments.

[0174] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0175] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components may be combined, or integrated into another device, or some features may be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed may be through some interfaces, and the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0176] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units. They may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.

[0177] In addition, each functional unit in the various embodiments of this application can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; the integrated unit can be implemented in hardware or in the form of hardware plus software functional units.

[0178] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as mobile storage devices, read-only memory (ROM), magnetic disks, or optical disks.

[0179] Alternatively, if the integrated units described above are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, or the parts that contribute to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a device (which may be a terminal or platform, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROMs, magnetic disks, or optical disks.

[0180] The above description is only a preferred embodiment of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of this application, and these improvements and modifications should also be considered within the scope of protection of this application.

Claims

1. A method for simulating the distribution of electrothermal parameters in a whole-wafer power semiconductor device, characterized in that, The method includes the following steps: Determine the first operating condition parameters and device characteristic parameters of the whole wafer power semiconductor device; the device characteristic parameters are the inherent characteristic parameters of the device set in advance according to the corresponding specifications of different types of whole wafer power semiconductor devices. Under the first operating condition parameters, the whole wafer power semiconductor device is simulated and tested to obtain the operating condition measurement parameters of the whole wafer power semiconductor device; A first parameter set for the entire wafer power semiconductor device is determined based on operating condition measurement parameters and device characteristic parameters. This first parameter set includes at least the current, contact resistance, junction temperature, and contact thermal resistance of each ring in the entire wafer power semiconductor device. The second calculation data is determined based on the operating condition measurement parameters and device characteristic parameters; the second calculation data includes at least the current source value, the voltage across the semiconductor device, the number of device rings on the whole wafer, the material resistivity, the material hardness, the oxide layer tunnel resistivity, the number of conductive spots per unit area, the equivalent elastic modulus, the rough surface density, the average radius of curvature of the rough peak, the Gaussian distribution, the contact spacing, and the inner and outer ring radii of each ring. The third calculation data is determined based on the current source value and the voltage across the semiconductor device; the third calculation data includes at least the anode contact resistance and cathode contact resistance of the entire wafer power semiconductor device. The second and third calculation data are substituted into the third calculation function to obtain the third calculation result, which includes at least the anode contact resistance and cathode contact resistance of each ring. The second calculated data is substituted into the fourth calculated function to obtain the fourth calculated result, which includes at least the current of each ring; Using the first parameter set as initial conditions, the distribution data of the electrothermal parameters of each ring of the whole wafer power semiconductor device are obtained by solving the problem through a bidirectional electrothermal coupling iterative method. An equivalent circuit is constructed based on the distribution data of the electrothermal parameters of each ring, and simulation calculations are performed using preset circuit simulation software to obtain the distribution results of the electrothermal parameters of the whole wafer power semiconductor device. The steps for constructing the equivalent circuit based on the distribution data of the electrothermal parameters of each ring include: Using the geometric center of the entire wafer power semiconductor device as a reference, the electrothermal parameter distribution data of each ring of the entire wafer power semiconductor device are obtained in a radial order from the center outwards; the electrothermal parameter distribution data includes anode contact thermal resistance, cathode contact thermal resistance, junction temperature, anode contact resistance, cathode contact resistance, and current; Based on the distribution data of electrothermal parameters of each ring of the whole wafer power semiconductor device, the equivalent branches of each ring are constructed respectively; the equivalent branches include the anode contact resistance branch, the cathode contact resistance branch, the anode contact thermal resistance branch, the cathode contact thermal resistance branch, and the ring branches of the semiconductor device. The equivalent circuit of the corresponding ring is formed by connecting the anode contact resistance branch, the anode contact thermal resistance branch, the ring branch of the semiconductor device, the cathode contact resistance branch, and the cathode contact thermal resistance branch in series in that order. Connect the equivalent circuits of each ring in parallel from start to finish, and connect the gates of the ring branches of the semiconductor devices in each ring in parallel to form a... n Ring equivalent circuit, in which n This represents the total number of rings in the power semiconductor device on the entire wafer.

2. The simulation method for the distribution of electrothermal parameters of a whole-wafer power semiconductor device according to claim 1, characterized in that, The step of determining the first parameter set of the whole wafer power semiconductor device based on the operating condition measurement parameters and device characteristic parameters includes: The first calculation data is determined based on the operating condition measurement parameters and device characteristic parameters; the first calculation data includes at least the anode case temperature, cathode case temperature, power heat flow, average pressure of semiconductor device, pressure of each ring, number of rings of the whole wafer device, inner and outer ring radii of each ring, effective heat transfer area of ​​each ring, and series and parallel thermal resistance coefficients. The first calculation data is substituted into the first calculation function to obtain the first calculation result; the first calculation result includes at least the anode contact thermal resistance and cathode contact thermal resistance of each ring; the first calculation function is a pre-set solution function for calculating the anode contact thermal resistance and cathode contact thermal resistance; The first calculation data and the first calculation result are substituted into the second calculation function to obtain the second calculation result. The second calculation result includes at least the anode junction temperature, cathode junction temperature and junction temperature of each ring. The second calculation function is a pre-set solution function for calculating the junction temperature of a semiconductor device.

3. The simulation method for the distribution of electrothermal parameters of a whole-wafer power semiconductor device according to claim 1, characterized in that, The step of obtaining the electrothermal parameter distribution data of each ring of the whole wafer power semiconductor device by solving the problem through an electrothermal bidirectional coupling iterative method using the first parameter set as the initial condition includes: The fourth calculation data is determined based on the first parameter set, operating condition measurement parameters, and device characteristic parameters. The fourth calculation data includes at least the current source value, the preset current convergence threshold, the preset junction temperature convergence threshold, the anode contact thermal resistance and cathode contact thermal resistance of each ring, the junction temperature of each ring, the anode contact resistance and cathode contact resistance of each ring, the current of each ring, the effective heat transfer area of ​​each ring, the number of rings of the whole wafer device, the inner and outer ring radii of each ring, the device equivalent radial thermal conductivity, the first-order temperature sensitivity coefficient, and the second-order temperature sensitivity coefficient. Based on the fourth calculation data, the first... k The electrothermal state matrix of the next iteration and the radial thermal diffusion coupling coefficient between adjacent rings; where k Let be the number of iterations, when k When =0, the electrothermal state quantity matrix is ​​the corresponding value of the first parameter set; Based on the k The electrothermal state matrix of the second iteration determines the first... k +1 iterations of power and heat flow in each loop; Based on the k The electrothermal state matrix of the nth iteration, the nth k In the +1 iteration, the power and heat flux of each ring and the radial thermal diffusion coupling coefficient between adjacent rings are respectively used to construct the whole wafer power semiconductor device. i The heat balance equation of the ring; The first [equation] is obtained by solving the thermal balance equations of each ring in a whole-wafer power semiconductor device. k Junction temperature of each ring under +1 iteration; According to the k The junction temperature of each ring in the +1 iteration affects the... k In the next iteration, the contact thermal resistance of each loop in the electrothermal state matrix is ​​spatially weighted and corrected to obtain the first... k Contact thermal resistance of each ring under +1 iteration; According to the k The junction temperature of each ring in the +1 iteration affects the... k The contact resistance of each loop in the electrothermal state matrix is ​​corrected and calculated in the next iteration to obtain the first... k Contact resistance of each ring in +1 iteration; According to the k The contact resistance of each ring is recalculated in the +1 iteration to obtain the first... k The ring current of each ring in +1 iterations; Based on the k The contact thermal resistance, junction temperature, contact resistance, and current of each ring are constructed in the +1 iteration to obtain the first... k Electrothermal state matrix under +1 iterations; When the coupling iteration termination condition is met, the electrothermal state matrix of the last iteration of each loop is used as the electrothermal parameter distribution data of the corresponding loop in the whole wafer power semiconductor device; when the coupling iteration termination condition is not met, the coupling iteration process continues.

4. The simulation method for the distribution of electrothermal parameters of a whole-wafer power semiconductor device according to claim 3, characterized in that, The coupling iteration termination conditions include a first termination condition and a second termination condition. The first termination condition is that the difference in junction temperature of each ring before and after the iteration is less than a preset junction temperature convergence threshold. The second termination condition is that the difference in current of each ring before and after the iteration is less than a preset current convergence threshold.

5. The simulation method for the distribution of electrothermal parameters of a whole-wafer power semiconductor device according to claim 1, characterized in that, The preset circuit simulation software uses SPICE circuit simulation software.

6. The simulation method for the distribution of electrothermal parameters of a whole-wafer power semiconductor device according to claim 4, characterized in that, The first operating condition parameters include at least the type, model, operating temperature, operating pressure, operating voltage, current source value, preset current convergence threshold, and preset junction temperature convergence threshold of the whole wafer power semiconductor device; the device characteristic parameters include at least the number of rings of the whole wafer device, the inner and outer ring radii of each ring, the rough surface density, the average radius of curvature of the rough peak, the contact spacing, the equivalent elastic modulus, the material resistivity, the material hardness, the oxide layer tunnel resistivity, the effective heat transfer area of ​​each ring, the number of conductive spots per unit area, the semiconductor material density, the specific heat capacity, the material volume corresponding to each ring, the device's equivalent radial thermal conductivity, Gaussian distribution, the first-order temperature sensitivity coefficient, the second-order temperature sensitivity coefficient, and the series and parallel thermal resistance coefficients.

7. The simulation method for the distribution of electrothermal parameters of a whole-wafer power semiconductor device according to claim 1, characterized in that, The operating condition measurement parameters include at least temperature parameters, pressure parameters, and voltage parameters; wherein the temperature parameters include anode shell temperature, cathode shell temperature, and power heat flow; the pressure parameters include the pressure values ​​of each ring and the average pressure value; and the voltage parameters include the voltage across the semiconductor device.

8. A simulation device for the distribution of electrothermal parameters of a whole-wafer power semiconductor device, characterized in that, The device includes at least: The parameter input module is used to determine the first operating condition parameters and device characteristic parameters of the whole wafer power semiconductor device; the device characteristic parameters are the inherent characteristic parameters of the device set in advance according to the corresponding specifications of different types of whole wafer power semiconductor devices. The simulation test module is used to perform simulation tests on the whole wafer power semiconductor device under the first operating condition parameters, and to obtain the operating condition measurement parameters of the whole wafer power semiconductor device. The parameter extraction module determines a first parameter set for the entire wafer power semiconductor device based on operating condition measurement parameters and device characteristic parameters. The first parameter set includes at least the current, contact resistance, junction temperature, and contact thermal resistance of each ring in the entire wafer power semiconductor device. The second calculation data is determined based on the operating condition measurement parameters and device characteristic parameters; the second calculation data includes at least the current source value, the voltage across the semiconductor device, the number of device rings on the whole wafer, the material resistivity, the material hardness, the oxide layer tunnel resistivity, the number of conductive spots per unit area, the equivalent elastic modulus, the rough surface density, the average radius of curvature of the rough peak, the Gaussian distribution, the contact spacing, and the inner and outer ring radii of each ring. The third calculation data is determined based on the current source value and the voltage across the semiconductor device; the third calculation data includes at least the anode contact resistance and cathode contact resistance of the entire wafer power semiconductor device. The second and third calculation data are substituted into the third calculation function to obtain the third calculation result, which includes at least the anode contact resistance and cathode contact resistance of each ring. The second calculated data is substituted into the fourth calculated function to obtain the fourth calculated result, which includes at least the current of each ring; The coupled solution module is used to obtain the distribution data of electrothermal parameters of each ring of the whole wafer power semiconductor device by using the first parameter set as the initial condition and solving it through a bidirectional electrothermal coupling iterative method. The simulation output module is used to construct an equivalent circuit based on the electrothermal parameter distribution data of each ring, and to perform simulation calculations using preset circuit simulation software to obtain the electrothermal parameter distribution results of the entire wafer power semiconductor device; the steps for constructing the equivalent circuit based on the electrothermal parameter distribution data of each ring include: Using the geometric center of the entire wafer power semiconductor device as a reference, the electrothermal parameter distribution data of each ring of the entire wafer power semiconductor device are obtained in a radial order from the center outwards; the electrothermal parameter distribution data includes anode contact thermal resistance, cathode contact thermal resistance, junction temperature, anode contact resistance, cathode contact resistance, and current; Based on the distribution data of electrothermal parameters of each ring of the whole wafer power semiconductor device, the equivalent branches of each ring are constructed respectively; the equivalent branches include the anode contact resistance branch, the cathode contact resistance branch, the anode contact thermal resistance branch, the cathode contact thermal resistance branch, and the ring branches of the semiconductor device. The equivalent circuit of the corresponding ring is formed by connecting the anode contact resistance branch, the anode contact thermal resistance branch, the ring branch of the semiconductor device, the cathode contact resistance branch, and the cathode contact thermal resistance branch in series in that order. Connect the equivalent circuits of each ring in parallel from start to finish, and connect the gates of the ring branches of the semiconductor devices in each ring in parallel to form a... n Ring equivalent circuit, in which n This represents the total number of rings in the power semiconductor device on the entire wafer.

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