Electronic device

Abstract

The embodiment of the invention relates to electronic equipment. An electronic device includes a single photon avalanche diode including a PN junction having a first dimension less than 1.2 m, the single photon avalanche diode surrounded by an insulating wall, the first dimension being a minimum dimension of the junction.

Description

Technical Field

[0001] This disclosure relates generally to electronic devices, and more particularly to electronic devices including single-photon avalanche diodes and methods for manufacturing the same. Background Technology

[0002] A single-photon avalanche diode (SPAD) is a solid-state photodetector belonging to the same family as photodiodes and avalanche photodiodes (APDs), and is fundamentally related to the behavior of basic diodes. Like photodiodes and APDs, SPADs are based on semiconductor PN junctions that can be irradiated by ionizing radiation. The fundamental difference between a SPAD and an APD or photodiode is that a SPAD is biased much higher than its reverse bias breakdown voltage and has a structure that allows operation without damage or excessive noise. Summary of the Invention

[0003] One embodiment provides an electronic device including a single-photon avalanche diode, the single-photon avalanche diode including a PN junction having a first dimension smaller than 1.2 µm, the single-photon avalanche diode being surrounded by an insulating wall, the first dimension being the minimum dimension of the junction.

[0004] Another embodiment provides a method for manufacturing an electronic device including a single-photon avalanche diode (SPAD) comprising a PN junction, the method comprising a doping step of at least a portion of the anode of the SPAD, the PN junction having a first dimension smaller than 1.2 µm, the SPAD being surrounded by an insulating wall, the first dimension being the minimum dimension of the junction.

[0005] According to one embodiment, the insulating wall includes a conductive core and an insulating sheath.

[0006] According to one embodiment, the cathode of a single-photon avalanche diode includes an N-doped region located in a substrate, and the anode of the single-photon avalanche diode includes a first portion positioned relative to the cathode and a second portion surrounding a region of the substrate, said region of the substrate being separated from the cathode by the first portion.

[0007] According to one embodiment, the PN junction is formed by a first portion of an anode, a cathode, and a portion of a substrate located between the first portion of the anode and the cathode.

[0008] According to one embodiment, the second dimension is smaller than 0.5µm, and the second dimension is the minimum overlap between the first and second portions.

[0009] According to one embodiment, the first dimension is less than 150% of the lateral spatial resolution of the doping method used to form at least a portion of the anode of the single-photon avalanche diode, for example, less than 130% of the lateral spatial resolution of the doping method used to form at least a portion of the anode of the single-photon avalanche diode.

[0010] According to one embodiment, the doping method used is ion implantation of the dopant element.

[0011] According to one embodiment, the first size is greater than 90% of the lateral spatial resolution of the doping method.

[0012] According to one embodiment, the lateral spatial resolution of the doping method is the minimum size of the upper surface of the region that allows the upper surface of the region to be planar when doping a region having a rectangular parallelepiped shape.

[0013] According to one embodiment, the first dimension is less than 1µm.

[0014] According to one embodiment, the first dimension is between 0.7 µm and 1.2 µm.

[0015] According to one embodiment, the device includes a time-of-flight device, and a single-photon avalanche diode is part of the time-of-flight device.

[0016] According to one embodiment, the method includes forming a hard mask that includes openings, at least one of the dimensions of which is smaller than 150% of the lateral spatial resolution of the doping method.

[0017] According to one embodiment, doping is performed from the side closest to the cathode. Attached Figure Description

[0018] The above-described features and advantages, as well as other features and advantages, will be described in detail in the following description of specific embodiments given by way of example rather than limitation with reference to the accompanying drawings, in which:

[0019] Figure 1 The view in Figure 1 A and 1B show the limitations of the doped lateral spatial resolution;

[0020] Figure 2 An embodiment of an electronic device including a single-photon avalanche diode is shown;

[0021] Figure 3 The view in Figure 3 Examples A through 3E illustrate breakdown probabilities in different single-photon avalanche diodes; and

[0022] Figure 4Another embodiment of an electronic device including a single-photon avalanche diode is shown. Detailed Implementation

[0023] In the figures, the same features are indicated by the same reference numerals. Specifically, common structural and / or functional features in the various embodiments may have the same reference numerals and may have the same structure, dimensions, and material properties.

[0024] For clarity, only those aspects that help to understand the embodiments described herein have been detailed and described.

[0025] Unless otherwise stated, when referring to two elements connected together, it means a direct connection without any intermediate elements other than conductors, and when referring to two elements coupled together, it means that the two elements can be connected or can be coupled via one or more other elements.

[0026] In the following disclosure, unless otherwise stated, reference to absolute position qualifiers (such as the terms “front,” “back,” “top,” “bottom,” “left,” “right,” etc.) or relative position qualifiers (such as the terms “above,” “below,” “higher,” “lower,” etc.) or orientation qualifiers (such as “horizontal,” “vertical,” etc.) shall be made to the orientation shown in the figures.

[0027] Unless otherwise stated, the expressions “about,” “roughly,” “substantially,” and “approximately” all mean within 10% or 10°, and preferably within 5% or 5°.

[0028] The equipment is designed for use in the automotive industry, for example. The trend towards autonomous driving is generating a growing demand for 3D telemetry sensors. Such sensors are, for example, SPAD LiDAR (Light Detection and Ranging) systems capable of generating 3D images and videos. These sensors also include depth "time-of-flight" imaging techniques combined with standard 2D intensity imaging. In fact, SPAD matrix technology is capable of producing both.

[0029] This device can be used, for example, in industrial applications. The object recognition and manipulation by industrial robots is generating a growing demand for 3D telemetry sensors such as SPAD LIDAR.

[0030] This device is intended for use in personal electronic products, for example. The increasing demand for 3D telemetry sensors, such as SPAD LIDAR, is driven by facial recognition and sophisticated autofocus cameras in smartphones and other consumer electronics.

[0031] This device is intended for use, for example, in communication equipment or in computers and their peripherals. For instance, photon detectors or optical communication devices integrate SPAD sensors due to their high sensitivity, time-correlated accuracy, and strong output signal due to the significant increase in avalanche carriers.

[0032] The disclosed devices include high electron mobility transistors (HEMTs). HEMTs are commonly used in high-frequency and high-power applications such as satellite communications, radar systems, and microwave amplifiers. HEMTs can also be used in some specialized personal electronic devices, such as high-end audio amplifiers or radio frequency (RF) transmitters. HEMTs are increasingly used in automotive electrification, particularly in electric and hybrid vehicles. In power electronics, HEMTs are used to control the flow of electrical energy in industrial equipment such as electric motors, generators, and transformers. HEMTs are used in light-emitting diode (LED) lighting systems to control current and voltage. HEMTs contribute to improving the efficiency and performance of LED lighting systems.

[0033] Figure 1 The view in Figure 1 A and vision Figure 1 B illustrates the limitation on the lateral spatial resolution of the doping method. More specifically, [the following text is incomplete and requires further context to translate accurately]. Figure 1 A illustrates a case where the size D of the doped structure is larger than the lateral spatial resolution of the doping method used, assuming... Figure 1 B illustrates a case where the size D of the doped structure is smaller than the lateral spatial resolution of the doping method used.

[0034] See Figure 1 A and vision Figure 1 Figure B shows a semiconductor substrate 10. The substrate 10 includes an upper surface 10a and a lower surface 10b, with the lower surface 10b opposite to the upper surface 10a. It is desirable to form a doped region 12 (solid line) in the substrate 10 using a doping method. The doping method is, for example, ion implantation of a dopant element. The doping method is performed from the side of the upper surface 10a.

[0035] In view Figure 1 A and vision Figure 1 In B, region 12 has a rectangular shape. Therefore, in view... Figure 1 A and vision Figure 1In region B, region 12 has an upper side 12a (in other words, the side closest to the upper surface 10a), a lower side 12b (in other words, the side closest to the lower surface 10b), and two side surfaces 12c connecting the upper side 12a and the lower side 12b. The upper side 12a and the lower side 12b are parallel to each other. The upper side 12a is parallel to the upper surface of the substrate 10a. The side surfaces 12c are perpendicular to the upper side 12a and the lower side 12b of region. In other words, the side surfaces 12c extend laterally to the upper side 12a and the lower side 12b.

[0036] Region 12 is a cuboid. (View) Figure 1 A and vision Figure 1 B corresponds to the view of region 12, which is parallel to the surface of the cuboid.

[0037] Region 12 is a buried region. Therefore, region 12 is partially surrounded by substrate 10 on all sides. Figure 1 A and vision Figure 1 In example B, region 12, more specifically the lower side of region 12b, is separated from the lower surface 10b by region 13. Region 12, more specifically the upper side of region 12a, is separated from the upper surface 10a by region 14. The side of region 12, more specifically region 12c, is partially separated from the sidewall of the substrate by region 14. It is desirable that regions 12 and 14 be clearly distinguishable.

[0038] For example, region 13 is a doped region. For example, region 13 is doped with the same conductivity type as the desired region 12. For example, region 14 may be undoped or doped with a conductivity type opposite to that of region 13. Neither region 13 nor region 14 was doped by the doping steps that formed region 12.

[0039] Region 13 is entirely located between region 12 and the lower surface 10b. Therefore, no part of region 13 is located between the side of region 12 and the sidewall of substrate 10. For example, the upper surface of region 13 is parallel to and in contact with the lower surface of region 12.

[0040] Size D corresponds to the view Figure 1 A and vision Figure 1 The length of region 12 in the view plane of B. Dimension D corresponds to the width of the portion of the upper surface of region 12 closest to the upper surface of substrate 10. Dimension D corresponds to the width of the cuboid forming region 12. Dimension D corresponds to the smaller distance between the two opposite sidewalls of rectangular region 12.

[0041] The doping method may include forming a hard mask 16, which includes an opening 18. The opening 18 is then positioned with respect to region 12. In a plane parallel to the plane of the upper surface of substrate 10a, the opening 18 has the same dimensions as region 12. In this doping method, dimension D corresponds to the dimension of opening 18, which corresponds to the dimension D of region 12.

[0042] See Figure 1 A and vision Figure 1 The dashed lines in B correspond to the upper and side sides of region 12 obtained by doping when attempting to form region 12, which is represented by solid lines.

[0043] The lateral spatial resolution of the doping method is the minimum size D that allows the formation of a region 12 with a planar upper side. In view... Figure 1 In A, the dimension D is larger than the resolution value of the doping method used. In this embodiment, the buried region 12 has a substantially flat upper surface opposite the upper surface of the substrate 10a. Figure 1 In region B, the dimension D is smaller than the resolution value of the doping method used. Therefore, the formed region 12 includes a curved upper side and has no planar portion.

[0044] Alternatively, if a doping method is used to form doped region 14, and regions 12 and 13 are, for example, undoped, doped with a different conductivity type than region 14, or doped weakly than desired in region 14, then the doping method includes, for example, a first sequence of photolithography and dopant implantation of the portion of region 14 above region 12, and a second sequence of photolithography and dopant implantation of the portion of region 14 on the side of region 12. In the first sequence, the openings in the mask are as shown... Figure 1 A and vision Figure 1 B is represented. In the second sequence, the mask is located above region 12, and the opening is located in view. Figure 1 A and vision Figure 1 The mask position in B. In this case, the lateral spatial resolution of the doping method is limited to the minimum size D that allows the formation of region 14, where the interface between region 14 and the upper side 12a of region 12 is planar.

[0045] For example, the doping method can be ion implantation, in which the lateral spatial resolution is proportional to the implantation depth. Doping can also be performed via thermal annealing, in which case the lateral spatial resolution is increased due to dopant diffusion during annealing.

[0046] Figure 2 An embodiment of an electronic device 20 including a single-photon avalanche diode (SPAD) 22 is shown. More specifically, Figure 2 SPAD 22, which is part of pixel 23, is shown. For example, SPAD is part of the time-of-flight telemetry device included in device 20.

[0047] Figure 2 The substrate 24 of the device 20 is shown, on which the SPAD 22 is formed. The substrate 24 is a semiconductor substrate, such as a silicon substrate. For example, quenching circuitry associated with the SPAD 22 is formed on and in another substrate.

[0048] For example, device 20 includes a plurality of pixels or circuits 23. For example, the pixels 23 are arranged in an array.

[0049] Each SPAD 22 includes a cathode 26 and an anode 28. The anode 28 includes regions 28a, 28b, and 28c.

[0050] The cathode 26 is an n-doped semiconductor region. For example, the cathode 26 is exposed on the upper surface of the substrate 24. In other words, the cathode 26 is recessed, and the upper surface of the cathode 26 is coplanar with the upper surface of the substrate 24. The cathode 26 has, for example, a cylindrical shape. For example, the cathode 26 has a circular shape in a top view. In other words, the upper surface of the cathode 26 has a circular shape. Alternatively, the cathode 26 has a rectangular shape in a top view, preferably a square, with smooth angles. The cathode 26 preferably has a substantially constant doping concentration.

[0051] Region 28a is a p-doped semiconductor region. Region 28a is, for example, buried in substrate 24. Region 28a has a planar upper surface, for example, a substantially planar upper surface. Region 28a has, for example, a cylindrical shape. For example, region 28a has a circular shape in a top view. In other words, the upper surface of region 28a has a circular shape. Alternatively, region 28a has a rectangular shape in a top view, preferably a square shape, and with smooth angles. For example, region 28a is located below cathode 26. In other words, at least a portion of region 28a is perpendicularly aligned with a portion of cathode 26. Figure 2 In the example, region 28a is separated from cathode 26 by a portion of substrate 24. Preferably, region 28a has a smaller horizontal dimension than cathode 26. For example, region 28a is separated from cathode 26 by a portion 27 of substrate 24 rather than a portion of the cathode or anode of the SPAD. This portion is preferably N-doped and has a doping concentration lower than that of region 28a and cathode 26, preferably at least 100 times lower. The portion of substrate is located on a side surface of region 28a. Region 28a, cathode 26, and the portion 27 of substrate located between region 28a and cathode 26 form the PIN of the SPAD.

[0052] Alternatively, region 28a and cathode 26 can be in contact. Therefore, region 28a and cathode 26 are not separated by a portion of substrate 24. Preferably, the upper surface of region 28a is then in complete contact with cathode 26. In this case, region 28a and cathode 26 form a PN junction of the SPAD.

[0053] Region 28b is a p-doped semiconductor region. Region 28b is, for example, buried in substrate 24. Region 28b is preferably located below region 28a. In other words, region 28a is preferably located between region 28b and cathode 26. Region 28b is, for example, in the form of a ring. Region 28b laterally surrounds a portion of substrate 24 that is vertically aligned with region 28a. Regions 28b and 28a are preferably in contact. A portion of the upper surface of region 28b is preferably in contact with the lower surface of region 28a. Therefore, there is a vertical overlap between regions 28a and 28b. This overlap ensures the electrical continuity of the anode.

[0054] Preferably, the overlap between regions 28a and 28b is smaller than 0.5 µm, for example, smaller than 0.1 µm. This overlap is formed, for example, by blurring of the doping pattern during the doping step.

[0055] The overlap between regions 28a and 28b, which is greater than 0.5 µm, will cause a p-doped enhanced region to form around the interface between regions 28a and 28b (compared to regions 28a and 28b alone). This will make the SPAD more sensitive to potential barriers. To ensure that the barrier does not affect the efficiency of the SPAD, the intensity of the p-doping needs to be reduced. The doping gradient in the junction (which is a key driver of the maximum electric field) will be weakened.

[0056] Region 28c is a p-doped semiconductor region. Region 28c extends vertically within substrate 24. Region 28c extends from the upper surface of substrate 24 to the level of at least region 28b. Regions 28b and 28c are in contact, for example, laterally. The upper surface of region 28c is, for example, coplanar with the upper surface of substrate 24. The width of region 28c is, for example, higher at the level of the upper surface of the substrate than at the level of region 28b. For example, region 28c includes an upper portion having a first width (preferably a substantially constant width) and a lower portion having a second width (preferably a substantially constant width). The second width is, for example, smaller than the first width. Region 28c has the form of a ring in top view. Region 28c surrounds cathode 26 and regions 28a and 28b. Region 28c is separated from cathode 26 by a portion of substrate 24. In other words, region 28c has an upper portion that protrudes and extends from its main vertical portion toward cathode 26. Region 28c has a protruding surface facing cathode 26.

[0057] Each region 28a, 28b, 28c preferably has a substantially constant doping concentration. For example, the doping concentration of region 28a is higher than that of region 28b. For example, the doping concentration of region 28b is lower than that of region 28c.

[0058] Each SPAD is surrounded by an electrically insulating wall 30. Preferably, the walls 30 surrounding the different SPADs have the same dimensions.

[0059] Preferably, the wall 30 extends vertically over the entire height of the corresponding SPAD. Preferably, the wall 30 extends vertically at least from the point closest to the upper surface of the substrate in the cathode 26 and anode 28 to the point furthest from the upper surface of the substrate in the cathode 26 and anode 28. In other words, in Figure 2 In the example, wall 30 extends vertically from the upper surface of the cathode corresponding to the upper surface of the substrate and the upper surface of region 28c to the lower surface of region 28c, for example, corresponding to the lower surface of substrate 24.

[0060] Each wall 30 laterally surrounds the corresponding SPAD. In other words, each SPAD is preferably completely separated from the adjacent SPAD by a portion of the wall 30. Figure 2 In the example, each SPAD is surrounded by a wall 30 associated with that SPAD, and the wall 30 is different from the wall 30 surrounding another SPAD. Therefore, two adjacent SPADs are separated by portions of two different walls. Figure 2 In the example, the different walls surrounding the different SPADs do not contact each other. In other words, the different walls surrounding the different SPADs are separated from each other by portions of the substrate 24.

[0061] Preferably, the wall 30 is optically insulating. The wall 30 is, for example, of the back deep trench insulation (BDTI) type. The wall 30 includes, for example, a sheath 30a made of an electrically insulating material (e.g., silicon oxide or silicon nitride) and a core 30b made of an optically insulating material (e.g., metal). The optically insulating material refers to a material that is at least partially opaque, preferably completely opaque, to the operating wavelengths of the SPAD (e.g., all wavelengths in the visible light range and / or all wavelengths in the near-infrared range). The wall 30 is configured to be polarized, for example. More specifically, the conductive core of the wall 30 is polarized, for example, by a negative voltage, such that the semiconductor substrate 24 in the pixel is depleted, for example, completely depleted.

[0062] Region 28a has a dimension R. Dimension R corresponds to the minimum horizontal dimension of the planar upper surface of region 28a. If region 28a has the shape of a disk in the top view, then dimension R corresponds to the diameter of the disk. If region 28a has the shape of a rectangle in the top view, then dimension R corresponds to the minimum dimension of the rectangle, in other words, the width.

[0063] To maximize the breakdown probability of the SPAD, the size R is configured to be as small as possible to generate a single hot spot. Specifically, the size R is configured to be less than or equal to 150% of the lateral spatial resolution of the doping method used to form region 28a, preferably less than or equal to 130% of the lateral spatial resolution of the doping method used to form region 28a. Preferably, the size R is less than 1.2 µm, for example, between 0.7 µm and 1.2 µm, and for example, less than 1 µm. The size R is independent of the size of the SPAD, and therefore independent of the size of the cathode 26. The size R is greater than the lateral spatial resolution of the doping method used to form region 28a, allowing the desired doping distribution to be obtained.

[0064] In other words, doped region 28a has side surfaces in substrate 27. A dimension R lies between the side surfaces of doped region 28a along a first direction. Doped region 28a is on the undoped region of substrate 24 such that the side surfaces of doped region 28a extend along the first direction through the undoped region of substrate 24, and such that the side surfaces of doped region 28a are on doped region 28b. In other words, the undoped region of substrate 24 in contact with doped region 28a extends along the first direction by a dimension smaller than R.

[0065] Since the PN junction of the SPAD is located between region 28a and cathode 26, the minimum size of the PN junction is, for example, less than or equal to 150% of the lateral spatial resolution of the doping method used to form region 28a, and preferably less than or equal to 130% of the lateral spatial resolution of the doping method used to form region 28a.

[0066] The manufacturing methods of SPAD include: a) Doping the substrate 24; b) Doping the substrate to form region 28b; c) Doping the substrate to form region 28a; d) Doping the substrate to form region 28c; e) Forming wall 30; and f) Doping the substrate to form a cathode 26.

[0067] For example, step d) includes forming a hard mask (not shown) on the upper surface of the substrate, the hard mask including an opening above the location of region 28a. The doping step is performed through the opening of the hard mask. The opening is preferably rectangular in shape in a top view. Preferably, at least one horizontal dimension (e.g., length or width) of the opening is less than or equal to 150% of the lateral spatial resolution of the doping method used to form region 28a, and preferably less than or equal to 130% of the lateral spatial resolution of the doping method used to form region 28a.

[0068] In previous implementations of SPADs, the SPADs were separated and insulated from each other by semiconductor junctions (such as PN junctions). In this structure, to ensure the uniformity of the electric field within the SPAD and to achieve the maximum fill factor between the SPAD junction area and the total area, it was considered necessary to ensure that the PN junction between the cathode and anode was as large as possible. In current SPADs, manufacturers have been trying to obtain SPADs with a larger PN junction between the cathode and anode. For example, current SPADs typically have a dimension R corresponding to 4 / 5 of the SPAD's width.

[0069] However, the inventors discovered that in the presence of insulating walls (such as...) Figure 2 In the case of a 30mm wall, as the junction size is reduced, a funneling effect is generated, allowing the electric field to enter the PN junction, which is beneficial to the breakdown probability. The funneling effect collects photogenerated electrons and drives them to a small hot spot at the center of the PN junction formed by the cathode and anode.

[0070] Figure 3 Examples of breakdown probabilities in different single-photon avalanche diodes are shown. Figure 3 Including five views Figure 3 A, 3B, 3C, 3D, and 3E show the breakdown probabilities in a SPAD, such as... Figure 2 SPADs with different values ​​of size R are shown in the image. Size R is the view... Figure 3 The only difference between SPADs A, 3B, 3C, 3D, and 3E.

[0071] See Figure 3 The size R of SPAD in A is greater than that of the view Figure 3 The size R of the SPAD in B is large. Figure 3 The size R of SPAD in B is greater than that of the view Figure 3 The size R of the SPAD in C is large. Figure 3 The size R of SPAD in C is greater than the visual Figure 3 The size R of the SPAD in D is large. Figure 3 The size R of SPAD in D is greater than the visual size. Figure 3 The size R of the SPAD in E is large. Furthermore, the view... Figure 3 The size R of the SPAD in A to 3D is larger than the lateral spatial resolution of the doping method used to form the SPAD. Figure 3 The value of the SPAD size R in E is closest to the lateral spatial resolution of the doping method used to form the SPAD anode.

[0072] It can be seen that, in the view Figure 3Between A and 3D, decreasing the value of size R increases the breakdown probability throughout the SPAD. This effect is particularly pronounced if the value of size R is less than 150% of the lateral spatial resolution of the doping method used to form the anode, and even more pronounced if the value of size R is less than 130% of the lateral spatial resolution of the doping method used to form the anode. Furthermore, it can be seen that in the view... Figure 3 In E, when the size R is lower than the lateral spatial resolution, the breakdown probability stops increasing and decreases around region 28a. The inventors have determined that this decrease is due to blurring of the doped pattern.

[0073] One advantage of the described embodiment is that the breakdown probability of the SPAD is maximized. In other words, the SPAD is advantageously more likely to trigger an avalanche when it receives a photon.

[0074] Figure 4 Another embodiment of an electronic device 40 including a single-photon avalanche diode 42 is shown.

[0075] Equipment 40 includes Figure 2 The components of device 20, such as those in combination Figure 2 As described. Device 40 includes: 23 pixels; Substrate 24; Cathode 26; Anode 28 includes regions 28a, 28b, and 28c; and Wall 30 includes sheath 30a and core 30b.

[0076] The difference between device 40 and device 20 is that device 40 does not include region 27 separating cathode 26 from region 28a. Therefore, cathode 26 and region 28a are in contact. Therefore, SPAD 42 includes a PN junction.

[0077] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these embodiments can be combined, and other variations will readily conceive of by those skilled in the art.

[0078] Finally, based on the functional descriptions provided above, the actual implementation of the embodiments and variations described herein is within the capabilities of those skilled in the art.

[0079] An electronic device is summarized to include a single-photon avalanche diode (22) comprising a PN junction having a first dimension smaller than 1.2 µm, the single-photon avalanche diode (22) being surrounded by an insulating wall (30), the first dimension being the minimum dimension of the junction.

[0080] A method of manufacturing an electronic device is summarized as including a single-photon avalanche diode (22) comprising a PN junction, the method comprising a doping step of at least a portion of the anode of the single-photon avalanche diode (22) having a first dimension smaller than 1.2 µm, the single-photon avalanche diode (22) being surrounded by an insulating wall (30), the first dimension being the minimum dimension of the junction.

[0081] The insulating wall (30) includes a conductive core (30b) and an insulating sheath (30a).

[0082] The cathode (26) of the single-photon avalanche diode (22) includes an N-doped region located in the substrate (24), and the anode of the single-photon avalanche diode (22) includes: a first portion (28a) positioned relative to the cathode; and a second portion (28b) surrounding a region of the substrate (24), said region of the substrate (24) being separated from the cathode by the first portion (28a).

[0083] The PN junction is formed by a first portion (28a) of the anode, a cathode (26), and a portion (27) of the substrate located between the first portion (28a) of the anode and the cathode (26).

[0084] The second dimension is smaller than 0.5 µm and is the smallest overlap between the first part (28a) and the second part (28b).

[0085] The first dimension is less than 150% of the lateral spatial resolution of the doping method used to at least partially form the anode (28a) of the single-photon avalanche diode (22), for example less than 130% of the lateral spatial resolution of the doping method used to at least partially form the anode (28a) of the single-photon avalanche diode (22).

[0086] The doping method used is ion implantation of the dopant element.

[0087] The first size is greater than 90% of the lateral spatial resolution of the doping method.

[0088] The lateral spatial resolution of a doping method is the minimum size of the upper surface of a region that allows the upper surface of the region to be planar when doping a region with a cuboid shape.

[0089] The first dimension is less than 1 µm.

[0090] The first dimension is between 0.7 µm and 1.2 µm.

[0091] The device includes a time-of-flight device, of which a single-photon avalanche diode (22) is a part.

[0092] The method includes forming a hard mask that includes openings, at least one of the sizes of which is smaller than 150% of the lateral spatial resolution of the doping method.

[0093] Doping is performed from the side closest to the cathode.

[0094] The various embodiments described above can be combined to provide other embodiments. If desired, aspects of the embodiments can be modified to incorporate concepts from various patents, applications, and publications to provide other embodiments.

[0095] Based on the detailed description above, these and other changes can be made to the embodiments. Generally, the terminology used in the appended claims should not be construed as limiting the claims to the specific embodiments disclosed in the specification and claims, but should be understood to include all possible embodiments and the full scope of the equivalents conferred by these claims. Therefore, the claims are not limited by this disclosure.

Claims

1. An electronic device, comprising: Substrate; A single-photon avalanche diode, wherein the single-photon avalanche diode has a PN junction, the PN junction comprising: Anode, the anode having a first portion; A cathode, which is opposite the first portion of the anode along a first direction; The portion of the substrate between the first portion of the anode and the cathode; and A first dimension of the first portion of the anode along a second direction perpendicular to the first direction, the first dimension being smaller than 1.2 µm and being the minimum dimension of the junction; and An insulating wall surrounds the single-photon avalanche diode.

2. The device of claim 1, wherein the first dimension is smaller than 1 µm.

3. The device according to claim 1, wherein the insulating wall has a conductive core and an insulating sheath.

4. The device of claim 1, wherein the cathode of the single-photon avalanche diode comprises an N-doped region located in the substrate, and wherein the anode of the single-photon avalanche diode comprises: The first portion aligned with the cathode; as well as The second part surrounds a region of the substrate, which is separated from the cathode by the first part.

5. The device of claim 1, wherein the first dimension is between 0.7 µm and 1.2 µm.

6. The device of claim 3, wherein the second dimension is smaller than 0.5 µm, and the second dimension is the minimum overlap between the first portion and the second portion of the anode.

7. A manufacturing method, comprising: A single-photon avalanche diode is formed, wherein the single-photon avalanche diode has a PN junction, the PN junction comprising: Anode, the anode having a first portion; A cathode, which is opposite the first portion of the anode along a first direction; The portion of the substrate between the first portion of the anode and the cathode; and A first dimension of the first portion of the anode along a second direction perpendicular to the first direction, the first dimension being smaller than 1.2 µm and being the minimum dimension of the junction, wherein formation includes: doping at least a portion of the anode of the single-photon avalanche diode; and An insulating wall is formed, which surrounds the single-photon avalanche diode.

8. The method of claim 7, wherein the first dimension is less than 150% of the lateral spatial resolution of the doping method used to form at least a portion of the anode of the single-photon avalanche diode.

9. The method of claim 7, wherein the doping method used is ion implantation of the dopant element.

10. The method of claim 7, wherein the first dimension is greater than 90% of the lateral spatial resolution of the doping method.

11. The method of claim 7, wherein the lateral spatial resolution of the doping method is the minimum value of the minimum size of the upper surface of the region that allows the upper surface of the region to be planar when doping a region having a cuboid shape.

12. The method of claim 7, wherein the first dimension is between 0.7 µm and 1.2 µm.

13. The method of claim 8, wherein forming the single-photon avalanche diode comprises: The hard mask is formed, the hard mask including openings, at least one of the dimensions of the openings being less than 150% of the lateral spatial resolution of the doping method.

14. The method of claim 8, wherein the doping is performed from the surface closest to the cathode.

15. The method of claim 8, wherein the first dimension is less than 130% of the lateral spatial resolution of the doping method used to form at least a portion of the anode of the single-photon avalanche diode.

16. An apparatus comprising: A substrate having a first surface opposite to a second surface; A first doped region, wherein the first doped region is embedded in the substrate; The second doped region is buried in the substrate and is opposite to the first doped region along a first direction; A third doped region is located on the first undoped region of the substrate; as well as A fourth doped region is located in the substrate and is opposite to the third doped region along a second direction perpendicular to the first direction. A second undoped region of the substrate separates the third doped region from the fourth doped region.

17. The device of claim 16, further comprising a fifth doped region extending from a first surface of the substrate to a second surface of the substrate, the fifth doped region contacting the first doped region, and the fifth doped region having a portion extending in a first direction adjacent to the first surface of the substrate, the fourth doped region being opposite the portion of the fifth doped region.

18. The device of claim 17, further comprising an insulating layer on the fifth doped region.

19. The device of claim 16, wherein the fourth doped region is n-doped.

20. The device of claim 16, wherein the first doped region, the second doped region, and the third doped region are p-doped.

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