Temperature sensing circuit and display device thereof

Abstract

The invention discloses a temperature sensing circuit and a display device thereof. The temperature sensing circuit includes first to fifth transistors, and first to second capacitors. The first capacitor is coupled between the control end of the first transistor and the first end of the second transistor. The third transistor has a first terminal coupled to the control terminal of the first transistor and a second terminal coupled to the second terminal of the first transistor. The fourth transistor has a first end coupled to the second end of the first transistor. The second capacitor is coupled between the control voltage and the control end of the first transistor. The fifth transistor has a first end coupled to the second end of the first transistor and a second end providing an output voltage.

Description

Technical Field

[0001] This invention relates to a sensing circuit, and more particularly to a temperature sensing circuit and its display device. Background Technology

[0002] With the development of display technology, flat panel display technology has gradually matured. The advantages of flat panel display technology mainly include thinner design, space saving, lower power consumption, better image quality, and wider viewing angles. Therefore, flat panel displays have become the main display method. However, due to the physical response of the display elements, the display brightness may change with temperature. Therefore, when the ambient temperature changes, it is necessary to compensate for the display brightness of the display elements to counteract the brightness drift caused by temperature changes, thus allowing the display panel to adapt to different ambient temperatures.

[0003] To compensate for the temperature of the display panel, a temperature sensor needs to be placed next to the display panel, or the temperature sensing circuit needs to be placed directly on the display panel. If an N-type transistor and a P-type transistor are used to form the temperature sensing circuit, charging, discharging, and leakage operations are performed using both types of transistors. However, using a hybrid of N-type and P-type transistors increases manufacturing complexity and is not conducive to integration into the pixel circuit. Furthermore, if the temperature sensing circuit only uses parasitic capacitance to store potential, its output node voltage is easily affected by external loading effects if integrated into the pixel circuit. Summary of the Invention

[0004] The present invention provides a temperature sensing circuit and its display device, which can distinguish the temperature difference in 10-degree increments from 25 degrees to 85 degrees, and can compensate for the critical voltage variation of the driving transistor to output a temperature-positively correlated sensing curve.

[0005] The temperature sensing circuit of the present invention includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a first capacitor, and a second capacitor. The first transistor has a first terminal for receiving a high system voltage, a control terminal, and a second terminal. The second transistor has a first terminal, a control terminal for receiving a first control voltage, and a second terminal for receiving a first signal voltage. The first capacitor is coupled between the control terminal of the first transistor and the first terminal of the second transistor. The third transistor has a first terminal coupled to the control terminal of the first transistor, a control terminal for receiving a second control voltage, and a second terminal coupled to the second terminal of the first transistor. The fourth transistor has a first terminal coupled to the second terminal of the first transistor, a control terminal for receiving a third control voltage, and a second terminal for receiving a low system voltage. The second capacitor is coupled between the fourth control voltage and the control terminal of the first transistor. The fifth transistor has a first terminal coupled to the second terminal of the first transistor, a control terminal for receiving a selection control voltage, and a second terminal for providing an output voltage.

[0006] The display device of the present invention includes a plurality of pixel circuits, a plurality of temperature sensing circuits as described above, an analog-to-digital converter circuit, a timing controller, and a source driver. The temperature sensing circuits individually sense one of the pixel circuits to provide one of a plurality of output voltages. The analog-to-digital converter circuit is coupled to the temperature sensing circuits to provide a plurality of sensed output data based on the output voltages. The timing controller receives image data and is coupled to the analog-to-digital converter circuit to receive the sensed output data, to provide a plurality of corrected data voltages based on the image data and the sensed output data. The source driver is coupled to the timing controller and the pixel circuits to provide a plurality of pixel data voltages to the pixel circuits based on the corrected data voltages.

[0007] Based on the above, in the temperature sensing circuit and display device of this invention, the gate voltage of the first transistor leaks through the second transistor to the first capacitor, and then, through the coupling effect of the first capacitor, the gate voltage of the first transistor decreases. Therefore, in addition to distinguishing temperatures from 25 degrees to 85 degrees Celsius, it can also compensate for variations in the critical voltage of the first transistor, mitigate the impact of critical voltage variations on the output voltage, and eliminate the influence of external load effects, resulting in an output voltage response that is positively correlated with the temperature sensing curve.

[0008] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description

[0009] Figure 1 This is a system schematic diagram of a temperature sensing circuit according to an embodiment of the present invention.

[0010] Figure 2This is a schematic diagram of the driving timing of a temperature sensing circuit according to an embodiment of the present invention.

[0011] Figures 3A to 3D This is a schematic diagram of the operation of a temperature sensing circuit according to an embodiment of the present invention during different periods.

[0012] Figure 4 This is a system schematic diagram of a temperature sensing circuit according to another embodiment of the present invention.

[0013] Figure 5 This is a schematic diagram of the driving timing of a temperature sensing circuit according to another embodiment of the present invention.

[0014] Figures 6A to 6E This is a schematic diagram of the operation of a temperature sensing circuit during different periods according to another embodiment of the present invention.

[0015] Figure 7 This is a system schematic diagram of a display device according to an embodiment of the present invention.

[0016] In the attached figures, the following labels are used:

[0017] 10: Display device

[0018] 11: Timing Controller

[0019] 12: Gate Driver

[0020] 13: Source Driver

[0021] 14: Storage device

[0022] 15: Lookup Table (LUT)

[0023] 16: Analog-to-digital converter circuit

[0024] 100, 200, 300: Temperature sensing circuit

[0025] A, B, C, V IN :node

[0026] C1, C2, C3, C LOAD :capacitance

[0027] Dimage: Image Data

[0028] D out D out1 D out2 Sensor output data

[0029] Pcmp1, Pcmp2: Compensation period

[0030] Pcop2: During coupling

[0031] Pout1, Pout2: Output period

[0032] Prst1, Prst2: During the reset period

[0033] Psen1, Psen2: Sensing period

[0034] PX: Pixel Circuit

[0035] R LOAD :resistance

[0036] T1~T7: Transistors

[0037] V control1 First control voltage

[0038] V control2 Second control voltage

[0039] V control3 Third control voltage

[0040] V control4 Fourth control voltage

[0041] V control5 Fifth control voltage

[0042] V DATA’ Corrected data voltage

[0043] VDD: System high voltage

[0044] V out V out1 V out2 Output voltage

[0045] V PIXEL Pixel data voltage

[0046] V sel Select control voltage

[0047] V sig1 First signal voltage

[0048] V sig2 Second signal voltage

[0049] VSS: System Low Voltage

[0050] XGate: Gate signal Detailed Implementation

[0051] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with their meanings in the context of the relevant technology and this invention, and will not be interpreted as having idealized or overly formal meanings unless expressly defined herein.

[0052] It should be understood that although the terms "first," "second," "third," etc., may be used herein to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, and / or parts should not be limited by these terms. These terms are used only to distinguish one element, component, region, layer, or part from another. Therefore, "first element," "component," "region," "layer," or "part" discussed below may be referred to as a second element, component, region, layer, or part without departing from the teachings of this document.

[0053] The terminology used herein is for the purpose of describing particular embodiments only and is not restrictive. As used herein, unless the content clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to include the plural forms, including “at least one.” “Or” signifies “and / or.” As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. It should also be understood that, when used in this specification, the terms “comprising” and / or “comprising” specify the presence of the stated features, areas, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, areas, integrals, steps, operations, elements, components, and / or combinations thereof.

[0054] Figure 1 This is a system schematic diagram of a temperature sensing circuit according to an embodiment of the present invention. Please refer to... Figure 1 In this embodiment, the temperature sensing circuit 100 includes transistors T1 to T5 (corresponding to the first to fifth transistors) and capacitors C1 to C2 (corresponding to the first and second capacitors), wherein transistors T1 to T5 are, for example, P-type transistors, but this embodiment of the invention is not limited thereto.

[0055] Transistor T1 has a first terminal for receiving the system high voltage VDD, a control terminal, and a second terminal. Transistor T2 has a first terminal for receiving the first control voltage VDD. control1 The control terminal and the receiver of the first signal voltage V sig1 The second terminal. Capacitor C1 is coupled between the control terminal of transistor T1 and the first terminal of transistor T2. Transistor T3 has a first terminal coupled to the control terminal of transistor T1 and receives the second control voltage V.control2 The control terminal and the second terminal coupled to the second terminal of transistor T1. Transistor T4 has a first terminal coupled to the second terminal of transistor T1 and receives a third control voltage V. control3 The control terminal and the second terminal of the receiving system's low voltage VSS. Capacitor C2 is coupled to the fourth control voltage V. control4 Between the control terminal of transistor T1 and transistor T5. Transistor T5 has a first terminal coupled to the second terminal of transistor T1, receiving the selection control voltage V. sel The control terminal, and the output voltage V out The second end.

[0056] Based on the above, during the temperature sensing period performed by the temperature sensing circuit 100 (e.g. Figure 2 During the sensing period Psen1 shown, transistors T2~T5 will be turned off, and the first signal voltage V sig1 A change from a high voltage level (e.g., 6 volts (V)) to a low voltage level (e.g., -4 volts) triggers leakage current in transistor T2. Therefore, the gate voltage of transistor T1 (i.e., node V)... IN The voltage of the transistor (T2) leaks through the capacitor C1, and then through the coupling effect of the capacitor C1, the voltage at node V... IN The voltage drops. In this way, in addition to distinguishing temperatures from 25 degrees to 85 degrees Celsius, it can also compensate for variations in the critical voltage of transistor T1, mitigating the impact of these variations on the output voltage V. out The influence of external load effects is eliminated, resulting in a lower output voltage V. out Sensing curves showing a positive correlation between the response and temperature.

[0057] In this embodiment, the output voltage V out It can be converted into sensing output data D via an analog-to-digital converter (ADC). out However, the embodiments of the present invention are not limited thereto, wherein the resistor R LOAD It is the output voltage V that is transmitted. out The line impedance, and the capacitor C LOAD It receives the output voltage V. out The equivalent capacitance between the input terminal of the analog-to-digital converter and the ground voltage.

[0058] Figure 2 This is a schematic diagram of the driving timing of a temperature sensing circuit according to an embodiment of the present invention. Figures 3A to 3D This is a schematic diagram illustrating the operation of a temperature sensing circuit according to an embodiment of the present invention during different periods. Please refer to... Figure 1 , Figure 2 and Figures 3A to 3DIn this embodiment, the temperature sensing circuit 100 performs a temperature sensing cycle that includes at least a reset period Prst1, a compensation period Pcmp1, a sensing period Psen1, and an output period Pout1. This depends on the circuit design, but the embodiments of the present invention are not limited thereto.

[0059] like Figure 2 and Figure 3A As shown, during the reset period Prst1, the first signal voltage V sig1 For high voltage levels (e.g., 6 volts), the first control voltage V control1 and the second control voltage V control2 For low voltage levels (e.g., -5 volts), the third control voltage V control3 For low voltage levels (e.g., -1 volt), and the fourth control voltage V control4 And select the control voltage V sel The voltage level is high (e.g., 13 volts). At this point, the voltage at node A is the source-drain voltage of transistor T4, and the voltage at node B is the first signal voltage V. sig1 High voltage levels (e.g., 6 volts), and node V IN The voltage is the source-drain voltage of transistor T4. Furthermore, via the first control voltage V... control1 Second control voltage V control2 and the third control voltage V control3 Transistors T2~T4 will be turned on, and the selection control voltage V will be activated. sel Transistor T5 will be turned off. This resets the voltage across capacitors C1 and C2, and based on node V... IN When the voltage is applied, transistor T1 will turn on.

[0060] like Figure 2 and Figure 3B As shown, during the compensation period Pcmp1, the first signal voltage V sig1 Maintaining a high voltage level, the first control voltage V control1 and the second control voltage V control2 Maintaining a low voltage level, the third control voltage V control3 Change to a high voltage level (e.g., 13 volts), and the fourth control voltage V control4 And select the control voltage V sel The voltage remains at a high level. At this time, the voltage at node A is the absolute value of the system high voltage VDD minus the critical voltage of transistor T1, and the voltage at node B remains at the first signal voltage V. sig1 The high voltage level, and node V IN The voltage is the absolute value of the system high voltage VDD minus the threshold voltage of transistor T1. Furthermore, via the first control voltage V... control1and the second control voltage V control2 Transistors T2 and T3 will be turned on, and will be controlled by the third control voltage V. control3 And select the control voltage V sel Transistors T4 and T5 will be turned off. This allows for compensation of the critical voltage of transistor T1, and based on node V... IN When the voltage is applied, transistor T1 will turn on.

[0061] like Figure 2 and Figure 3C As shown, during the sensing period Psen1, the first signal voltage V sig1 When changing from a high voltage level to a low voltage level (e.g., -4 volts), the first control voltage V control1 and the second control voltage V control2 Change to a high voltage level (e.g., 13 volts), third control voltage V control3 Fourth control voltage V control4 And select the control voltage V sel The voltage remains at a high level. At this time, the voltage at node A is maintained at the absolute value of the system high voltage VDD minus the critical voltage of transistor T1, and the voltage at node B is maintained at the first signal voltage V. sig1 The high voltage level minus the voltage difference caused by the leakage current of transistor T2, and node V IN The voltage is the system high voltage VDD minus the absolute value of the threshold voltage of transistor T1, and then minus the voltage difference caused by leakage current. Furthermore, via the first control voltage V... control1 Second control voltage V control2 Third control voltage V control3 And select the control voltage V sel Transistors T2 through T5 will be turned off. Furthermore, based on node V... IN When the voltage is applied, transistor T1 will turn on.

[0062] like Figure 2 and Figure 3D As shown, during the output period Pout1, the first signal voltage V sig1 Maintaining a low voltage level, the first control voltage V control1 and the second control voltage V control2 Maintaining a high voltage level, the third control voltage V control3 Change to a low voltage level (e.g., -1 volt), fourth control voltage V control4 Change to a low voltage level (e.g., 11.5 volts) and select the control voltage V. sel Change to a low voltage level (e.g., -5 volts). At this time, the voltage at node A remains at the source-drain voltage of transistor T4, and the voltage at node B remains at the first signal voltage V. sig1The high voltage level minus the voltage difference caused by leakage current, and node V IN The voltage is the system high voltage VDD minus the absolute value of the threshold voltage of transistor T1, minus the voltage difference caused by leakage current and the drop in the fourth control voltage V. control4 The resulting voltage difference (i.e., ∆V). Further, via the first control voltage V... control1 and the second control voltage V control2 Transistors T2 and T3 will be turned off, and the third control voltage V will be applied. control3 And select the control voltage V sel Transistors T4 and T5 will conduct. Furthermore, based on node V... IN When the voltage is applied, transistor T1 will turn on.

[0063] Based on the above, the voltage at node A (i.e., the source-drain voltage of transistor T4) will be output as the output voltage V. out The voltage at node A is based on the conduction levels of transistors T1 and T4. Since node V... IN The voltage is related to the leakage current of transistor T2, i.e., node V. IN The voltage at node A is related to the sensed temperature, therefore the voltage at node A (i.e., the source-drain voltage of transistor T4) is also related to the sensed temperature. Then, through the P-type transistor T1, the voltage level at node A will be positively correlated with the temperature.

[0064] In this embodiment, during the reset period Prst1 and the output period Pout1, the third control voltage V control3 The low voltage level (i.e., -1 volt) is higher than the first control voltage V. control1 Second control voltage V control2 And select the control voltage V sel For P-type transistors, the conduction level of transistor T4 when it is turned on will be less than that of transistors T2, T3 and T5.

[0065] Figure 4 This is a system schematic diagram of a temperature sensing circuit according to another embodiment of the present invention. Please refer to... Figure 1 and Figure 4 The temperature sensing circuit 200 is generally the same as the temperature sensing circuit 100, except that the temperature sensing circuit 200 further includes transistors T6 and T7 (corresponding to the sixth and seventh transistors) and capacitor C3 (corresponding to the third capacitor), wherein the same or similar components are labeled with the same or similar designations. In this embodiment, transistors T1 to T7 are, for example, P-type transistors, but the embodiments of the present invention are not limited thereto.

[0066] In this embodiment, transistor T6 has the function of receiving a second signal voltage V.sig2 The first terminal receives the first control voltage V. control1 The control terminal and the second terminal. Transistor T7 has a fourth control voltage V. control4 The first terminal receives the fifth control voltage V. control5 The control terminal of transistor T1 and the second terminal of transistor T6 are coupled together. Capacitor C3 is coupled between the second terminal of transistor T6 and the control terminal of transistor T1.

[0067] Figure 5 This is a schematic diagram of the driving timing of a temperature sensing circuit according to another embodiment of the present invention. Figures 6A to 6E This is a schematic diagram illustrating the operation of a temperature sensing circuit during different periods according to another embodiment of the present invention. Please refer to... Figure 1 , Figure 4 , Figure 5 and Figures 6A to 6E In this embodiment, the temperature sensing circuit 200 performs at least one temperature sensing cycle including a reset period Prst2, a compensation period Pcmp2, ​​a coupling period Pcop2, a sensing period Psen2, and an output period Pout2. This depends on the circuit design, but the embodiments of the present invention are not limited thereto. Furthermore, the fourth control voltage V... control4 It is fixed at any voltage level Vx (that is, it presents a DC voltage).

[0068] like Figure 4 and Figure 6A As shown, during the reset period Prst2, the first signal voltage V sig1 For a high voltage level (e.g., 10 volts, corresponding to the first high voltage level), the second signal voltage V sig2 For a low voltage level (e.g., 10 volts, corresponding to the second low voltage level), the first control voltage V control1 and the second control voltage V control2 For low voltage levels (e.g., -5 volts), the third control voltage V control3 The voltage level is low (e.g., 2 volts), and the fifth control voltage V control5 And select the control voltage V sel The voltage level is high (e.g., 13 volts). At this point, the voltage at node A is the system high voltage VDD minus the source-drain voltage of transistor T1, and the voltage at node B is the first signal voltage V. sig1 At a high voltage level (e.g., 10 volts), the voltage at node C is the second signal voltage V. sig2 The low voltage level (e.g., 10 volts), and node V IN The voltage is the system high voltage VDD minus the source-drain voltage of transistor T1. Furthermore, via the first control voltage V... control1 Second control voltage V control2 and the third control voltage Vcontrol3 Transistors T2~T4 and T6 will be turned on, and will be controlled by the fifth control voltage V. control5 And select the control voltage V sel Transistors T5 and T7 will be turned off. This resets the voltage across capacitors C1-C3, and based on node V... IN When the voltage is applied, transistor T1 will turn on.

[0069] like Figure 4 and Figure 6B As shown, during the compensation period Pcmp2, ​​the first signal voltage V sig1 Maintaining a high voltage level, the second signal voltage V sig2 Maintaining a low voltage level, the first control voltage V control1 and the second control voltage V control2 Maintaining a low voltage level, the third control voltage V control3 Change to a high voltage level (e.g., 13 volts), and the fifth control voltage V control5 And select the control voltage V sel The voltage remains at a high level. At this time, the voltage at node A is the absolute value of the system high voltage VDD minus the critical voltage of transistor T1, and the voltage at node B remains at the first signal voltage V. sig1 At the high voltage level, the voltage at node C remains at the second signal voltage V. sig2 The low voltage level, and node V IN The voltage is the absolute value of the system high voltage VDD minus the threshold voltage of transistor T1. Furthermore, via the first control voltage V... control1 and the second control voltage V control2 Transistors T2, T3, and T6 will be turned on, and will be controlled by the third control voltage V. control3 Fifth control voltage V control5 And select the control voltage V sel Transistors T4, T5, and T7 will be turned off. This allows for compensation of the critical voltage of transistor T1, and based on node V... IN When the voltage is applied, transistor T1 will turn on.

[0070] like Figure 4 and Figure 6C As shown, during the coupling period in Pcop2, the first signal voltage V sig1 Maintaining a high voltage level, the second signal voltage V sig2 Maintaining a low voltage level, the first control voltage V control1 and the second control voltage V control2 Change to a high voltage level (e.g., 13 volts), third control voltage V control3 Change to a low voltage level (e.g., 2 volts), fifth control voltage V control5Change to a low voltage level (e.g., -5 volts) and select the control voltage V. sel The voltage remains at a high level. At this time, the voltage at node A is the system high voltage VDD minus the source-drain voltage of transistor T1, and the voltage at node B remains at the first signal voltage V. sig1 The high voltage level plus the voltage difference (denoted as ∆V) generated by the coupling of capacitor C1 C1 The voltage at node C is any voltage level Vx, and node V... IN The voltage is the system high voltage VDD minus the absolute value of the threshold voltage of transistor T1, plus the voltage difference (denoted as ∆V) generated by the coupling of capacitor C3. Furthermore, via the third control voltage V... control3 and the fifth control voltage V control5 Transistors T4 and T7 will be turned on, and will be controlled by the first control voltage V. control1 Second control voltage V control2 And select the control voltage V sel Transistors T2, T3, T5, and T6 will be turned off. Furthermore, based on node V... IN When the voltage reaches a certain level, transistor T1 will conduct. The voltage difference generated by capacitor C1 coupling is negligible and may be disregarded in some embodiments, depending on the circuit design.

[0071] like Figure 4 and Figure 6D As shown, during the sensing period Psen2, the first signal voltage V sig1 When the voltage level changes from high to low (e.g., 0.49 volts, corresponding to the first low voltage level), the second signal voltage V... sig2 When changing from a low voltage level to a high voltage level (e.g., 11.28 volts, corresponding to the second high voltage level), the first control voltage V... control1 and the second control voltage V control2 Maintaining a high voltage level, the third control voltage V control3 Maintaining a low voltage level, the fifth control voltage V control5 Change to a high voltage level (e.g., 13 volts) and select the control voltage V. sel The voltage remains at a high level. At this time, the voltage at node A is maintained at the system high voltage VDD minus the source-drain voltage of transistor T1, and the voltage at node B is maintained at the first signal voltage V. sig1 The high voltage level plus the voltage difference generated by capacitor C1 coupling, the voltage at node C is any voltage level Vx, and node V IN The voltage is the system high voltage VDD minus the absolute value of the threshold voltage of transistor T1, plus the voltage difference generated by the coupling of capacitor C3. Furthermore, via the first control voltage V... control1 Second control voltage Vcontrol2 Fifth control voltage V control5 And select the control voltage V sel Transistors T2, T3, T5, T6, and T7 will be turned off, based on the third control voltage V. control3 Transistor T4 will conduct. The leakage current of transistor T2 affects the voltage at node B, and the leakage current of transistor T3 affects the voltage at node V. IN The voltage of node C is affected by the leakage current of transistor T6. Furthermore, based on node V... IN When the voltage is applied, transistor T1 will turn on.

[0072] like Figure 4 and Figure 6E As shown, during the output period Pout2, the first signal voltage V sig1 Maintaining a low voltage level, the second signal voltage V sig2 Maintaining a high voltage level, the first control voltage V control1 Second control voltage V control2 and the fifth control voltage V control5 Maintaining a high voltage level, the third control voltage V control3 Maintain at a low voltage level and select control voltage V. sel The voltage level is changed to a low level (e.g., -5V). At this time, the voltage at node A remains at the system high voltage VDD minus the source-drain voltage of transistor T1, and the voltage at node B is the first signal voltage V. sig1 The voltage difference at node C is the sum of the voltage level Vx and the voltage difference caused by the leakage current of transistor T2, minus the voltage difference caused by the leakage current of transistor T2. The voltage at node C is any voltage level Vx plus the voltage difference caused by the leakage current of transistor T6, and node V... IN The voltage is the system high voltage VDD minus the absolute value of the critical voltage of transistor T1, plus the voltage difference caused by the change in voltage at coupling nodes B and C of capacitors C1 and C3, and the voltage difference caused by the leakage current of transistor T3. Furthermore, via the first control voltage V... control1 Second control voltage V control2 and the fifth control voltage V control5 Transistors T2, T3, T6, and T7 will be turned off, based on the third control voltage V. control3 And select the control voltage V sel Transistors T4 and T5 will conduct. Furthermore, based on node V... IN When the voltage is applied, transistor T1 will turn on.

[0073] Based on the above, the voltage at node A (i.e., the system high voltage VDD minus the source-drain voltage of transistor T1) will be output as the output voltage V. outThe voltage at node A is based on the conduction levels of transistors T1 and T4. Since node V... IN The voltage is related to the leakage current of transistors T2, T3, and T6, i.e., node V. IN The voltage at node A is related to the sensed temperature; therefore, the voltage at node A (i.e., the system high voltage VDD minus the source-drain voltage of transistor T1) is also related to the sensed temperature. Then, through the P-type transistor T1, the voltage level at node A will be positively correlated with the temperature. Furthermore, the output voltage V is the sum of the leakage currents of transistors T2, T3, and T6. out The curve relative to the sensed temperature can be more linear.

[0074] In this embodiment, during the reset period Prst2, the coupling period Pcop2, and the output period Pout2, the third control voltage V control3 The low voltage level (i.e., 2 volts) is higher than the first control voltage V. control1 Second control voltage V control2 Fifth control voltage V control5 And select the control voltage V sel For P-type transistors, the conduction level of transistor T4 is lower than that of transistors T2, T3, T5, T6, and T7. Furthermore, in this embodiment, the first signal voltage V... sig1 The high voltage level (e.g., 10 volts) is equal to the second signal voltage V. sig2 The low voltage level (e.g., 10 volts) is not limited to this embodiment of the invention, but may be determined according to the circuit design.

[0075] Based on the above, the temperature sensing circuits 100 and 200 of this embodiment are composed of transistors / thin-film transistors (such as transistors T1 to T7) and can be integrated into the pixel circuit of the display panel. By sensing the temperature around the pixel circuit through the temperature sensing circuit that can be integrated into the pixel circuit, the influence of temperature on the pixel circuit can be compensated, for example, to compensate for the defect that the luminous efficiency of sub-millimeter light-emitting diodes (mini-LEDs) decreases with increasing temperature.

[0076] In the temperature sensing circuit 200, the leakage current of transistor T3 gradually increases due to the gradually increasing voltage across transistor T3 over time. This, along with transistors T2 and T6 (which have different voltage across transistors), simultaneously affects node V. IN In addition to distinguishing temperatures from 25 to 85 degrees Celsius, the leakage current sensor can also output a linear sensing curve and compensate for variations in the critical voltage of transistor T1, mitigating the impact of these variations on the output voltage V. out The impact.

[0077] Figure 7This is a system schematic diagram of a display device according to an embodiment of the present invention. Please refer to... Figure 1 , Figure 4 and Figure 7 In this embodiment, the display device 10 includes a plurality of pixel circuits PX, a temperature sensing circuit 300, a timing controller 11, a gate driver 12, a source driver 13, a storage device 14, and an analog-to-digital converter circuit 16.

[0078] Temperature sensing circuit 300 can be referenced. Figure 1 / Figure 4 The temperature sensing circuits 100 / 200 and 300 shown individually sense one of these pixel circuits PX to provide multiple output voltages V. out1 V out2 One of them. The analog-to-digital converter circuit 16 is coupled to the temperature sensing circuit 300 to measure the output voltage V. out1 V out2 Provides multiple sensing output data D out1 D out2 The timing controller 11 receives image data Dimage and is coupled to the analog-to-digital converter circuit 16 to receive sensing output data D. out1 D out2 Based on image data Dimage and sensor output data D out1 D out2 Provides multiple corrected data voltages V DATA’ The source driver 13 is coupled to the timing controller 11 and the pixel circuit PX, based on the modified data voltage V. DATA’ Provides multiple pixel data voltages V PIXEL The brightness of each pixel circuit PX is determined by the pixel circuit PX.

[0079] In this embodiment, the storage device 14 stores a lookup table (LUT) 15 and is coupled to a timing controller 11, wherein the timing controller 11 performs a lookup on the lookup table 15 to output the temperature-corrected data voltage V for individual gray levels. DATA’ .

[0080] In this embodiment, the gate driver 12 is coupled to the pixel circuit PX to provide multiple gate signals XGate to these pixel circuits PX to turn on / drive the pixel circuits PX.

[0081] In this embodiment, the temperature sensing circuit 300 and the pixel circuit PX have a one-to-one correspondence. However, in this embodiment of the invention, the temperature sensing circuit 300 and the pixel circuit PX can have a one-to-many correspondence, depending on the circuit design. This embodiment of the invention is not limited to this.

[0082] In summary, the temperature sensing circuit and display device of the present invention, wherein the gate voltage of transistor T1 (i.e., node V) IN The voltage of the transistor (T2) leaks through the capacitor C1, and then through the coupling effect of the capacitor C1, the voltage at node V... IN The voltage drops. In this way, in addition to distinguishing temperatures from 25 degrees to 85 degrees Celsius, it can also compensate for variations in the critical voltage of transistor T1, mitigating the impact of these variations on the output voltage V. out The influence of external load effects is eliminated, resulting in a lower output voltage V. out Sensing curves showing a positive correlation between the response and temperature.

[0083] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A temperature sensing circuit, characterized in that, include: A first transistor has a first terminal for receiving a high voltage of a system, a control terminal, and a second terminal; A second transistor has a first terminal, a control terminal that receives a first control voltage, and a second terminal that receives a first signal voltage; A first capacitor is coupled between the control terminal of the first transistor and the first terminal of the second transistor; A third transistor has a first terminal coupled to the control terminal of the first transistor, a control terminal receiving a second control voltage, and a second terminal coupled to the second terminal of the first transistor. A fourth transistor has a first terminal coupled to the second terminal of the first transistor, a control terminal receiving a third control voltage, and a second terminal receiving a system low voltage. A second capacitor is coupled between a fourth control voltage and the control terminal of the first transistor; as well as A fifth transistor has a first terminal coupled to the second terminal of the first transistor, a control terminal receiving a selection control voltage, and a second terminal providing an output voltage.

2. The temperature sensing circuit as described in claim 1, characterized in that, During a reset period, the second transistor, the third transistor, and the fourth transistor are turned on via the first control voltage, the second control voltage, and the third control voltage. During a compensation period, the second transistor and the third transistor are turned on via the first control voltage and the second control voltage, and During a sensing period, the second transistor, the third transistor, and the fourth transistor are turned off via the first control voltage, the second control voltage, and the third control voltage, and the first signal voltage changes from a high voltage level to a low voltage level.

3. The temperature sensing circuit as described in claim 2, characterized in that, During the reset period, the conduction level of the fourth transistor is less than that of the second transistor and the third transistor.

4. The temperature sensing circuit as described in claim 1, characterized in that, The first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor are all P-type transistors.

5. The temperature sensing circuit as described in claim 1, characterized in that, Including: A sixth transistor has a first terminal for receiving a second signal voltage, a control terminal for receiving the first control voltage, and a second terminal; A seventh transistor has a first terminal receiving a fourth control voltage, a control terminal receiving a fifth control voltage, and a second terminal coupled to the second terminal of the sixth transistor; and A third capacitor is coupled between the second terminal of the sixth transistor and the control terminal of the first transistor.

6. The temperature sensing circuit as described in claim 5, characterized in that, During a reset period, the second transistor, the third transistor, the fourth transistor, and the sixth transistor are turned on via the first control voltage, the second control voltage, and the third control voltage. During a compensation period, the second transistor, the third transistor, and the sixth transistor are turned on via the first control voltage and the second control voltage. During a coupling period, the fourth transistor and the seventh transistor are turned on via the third control voltage and the fifth control voltage, and During a sensing period, the second transistor, the third transistor, the sixth transistor, and the seventh transistor are turned off via the first control voltage, the second control voltage, and the fifth control voltage, and the first signal voltage changes from a first high voltage level to a first low voltage level, and the second signal voltage changes from a second low voltage level to a second high voltage level.

7. The temperature sensing circuit as described in claim 6, characterized in that, During the reset period, the conduction level of the fourth transistor is less than that of the second transistor, the third transistor, and the sixth transistor.

8. The temperature sensing circuit as described in claim 5, characterized in that, The second low voltage level is equal to the first high voltage level.

9. The temperature sensing circuit as described in claim 5, characterized in that, The first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor are all P-type transistors.

10. A display device, characterized in that, include: Multiple pixel circuits; Multiple temperature sensing circuits as described in claim 1, each sensing one of the pixel circuits to provide one of a plurality of output voltages; An analog-to-digital converter circuit is coupled to the temperature sensing circuits to provide multiple sensing output data based on the output voltages; A timing controller receives image data and is coupled to the analog-to-digital converter circuit to receive the sensed output data, so as to provide a plurality of corrected data voltages based on the image data and the sensed output data; as well as A source driver, coupled to the timing controller and the pixel circuits, provides a plurality of pixel data voltages to the pixel circuits based on the modified data voltages.

11. The display device as claimed in claim 10, characterized in that, It also includes a storage device storing a lookup table and coupled to the timing controller, wherein the timing controller performs a lookup on the lookup table to output the temperature-corrected data voltages for individual gray levels.

12. The display device as claimed in claim 10, characterized in that, It also includes a gate driver coupled to the pixel circuits to provide multiple gate signals to the pixel circuits.

13. The display device as claimed in claim 10, characterized in that, The temperature sensing circuits and the pixel circuits are in a one-to-one correspondence.

14. The display device as claimed in claim 10, characterized in that, The temperature sensing circuits and the pixel circuits have a one-to-many correspondence.

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