System-in-package airborne heterogeneous computing control board card
By integrating DSP, FPGA, Flash, RAM memory and power supply circuits through system-level packaging technology, the integration and signal integrity issues of airborne control boards are solved, resulting in control boards with high integration and long lifespan.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- GUIYANG AVIATION MOTOR
- Filing Date
- 2025-12-15
- Publication Date
- 2026-05-12
AI Technical Summary
Existing airborne control boards are limited by system size and integration bottlenecks, have short service life, and cannot meet the requirements of applications with high integration and high frequency signal integrity.
By employing system-in-package (SiP) technology, DSP, FPGA, Flash, RAM memory, and power supply circuitry are integrated into the SiP module, and structural strength is enhanced by fastening brackets, achieving high integration and signal integrity.
It improves the integration and signal integrity of the board, extends its service life, and meets the requirements of high integration and high frequency signal integrity.
Smart Images

Figure CN122018385A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of embedded computer hardware and airborne electronic equipment technology, and in particular to a highly integrated system-in-package (SIPP) control board for use in airborne equipment, specifically a system-in-package airborne heterogeneous computing control board. Background Technology
[0002] As airborne electronic systems develop towards intelligence, integration, and consolidation, the computational and control logic tasks that airborne equipment needs to handle are becoming increasingly complex, encompassing high-speed data acquisition, real-time signal processing, complex algorithm solving, and control of multiple heterogeneous interfaces. As the core carrier of these functions, airborne control boards often require a large number of complex circuits to implement multiple functions.
[0003] Currently, there are many types of airborne control boards. Among them, DSP and FPGA-based architectures are widely used because they can meet the comprehensive needs of solving high-intensity numerical calculations, strong real-time response, and highly versatile interface control. However, board-level integration still has inherent limitations. Complex components such as DSP, FPGA, FLASH, and RAM chips are all independent physical units, electrically connected through printed circuit boards (PCBs). These devices occupy a large area of the PCB, limiting the application of control boards in airborne equipment with extremely limited space, and restricting the miniaturization and integration of the entire system. In addition, asynchronous buses (Xintf) and some high-frequency signals are transmitted through PCB traces, which can easily cause delays and attenuation, affecting signal integrity. At the same time, the high-layer, high-density PCB mounting and soldering processes also have stringent requirements, resulting in limited reliability. In summary, board-level heterogeneous computing control boards are limited by system size and integration bottlenecks, have short lifespans, and cannot meet the requirements of some applications with high integration, high-frequency signal integrity, and high performance loss requirements. Summary of the Invention
[0004] The purpose of this invention is to provide a system-in-package onboard heterogeneous computing control board to solve the problems mentioned in the background art, such as the limitations of existing board-level heterogeneous computing control boards in terms of system size and integration, short service life of control boards, and inability to meet the requirements of some applications with high integration, high frequency signal integrity and high performance loss.
[0005] To achieve the above objectives, the present invention provides the following technical solution: a system-in-package (SIP) onboard heterogeneous computing control board, comprising a power supply circuit, a SIP module connected to the output of the power supply circuit, an external interface connected to the SIP module, and a clock circuit interactively connected to the SIP module. The SIP module has internal RAM and Flash memory. One input of the SIP module is connected to a reset circuit, which has power-on reset, power-off reset and restart, and abnormal operation monitoring functions. One pin of the SIP module is connected to an analog signal circuit and a communication circuit, respectively. The SIP module converts and calculates external analog signals through the analog signal circuit and controls the communication circuit to transmit data externally. Another pin of the SIP module is connected to a configurable interface, which includes a GPIO interface, an eleven-channel ePWM interface, an SPI / eCAN interface, or an ADC interface.
[0006] Furthermore, the clock circuit consists of a DSP clock and an FPGA clock. The clock circuit provides external clock signals to the DSP and FPGA in the SIP module, respectively. One pin of the SIP module is connected to a first JTAG interface for the DSP clock and a second JTAG interface for the FPGA clock.
[0007] Furthermore, the communication circuit has RS422, RS485 and ARINC429 communication ports to enable multi-channel parallel communication for data transmission.
[0008] Furthermore, the input terminals of the SIP module are interconnected with discrete quantity circuits.
[0009] Furthermore, the airborne heterogeneous computing control board also includes a fastening bracket for protecting the control board. The fastening bracket has a U-shaped structure when viewed from above, and the fastening bracket can be fixed to the edge of the control board by fasteners.
[0010] The beneficial effects of this invention are: This invention, while inheriting the powerful performance of heterogeneous computing from DSP and FPGA, integrates DSP, FPGA, Flash, RAM memory, and power supply circuits through the cooperation of highly integrated SIP modules and clock circuits. Its functions cover acquisition, data processing, storage, communication, and data recording, meeting the high-intensity numerical calculation and strong real-time response requirements common to airborne equipment. This reduces the use of discrete components and improves board integration. Furthermore, the communication circuit and configurable interface enable ultra-short-distance, high-performance interconnection within chip components, improving signal integrity, reducing component power consumption, and overcoming the problems of large size, low integration, poor signal integrity, and limited reliability associated with existing board-level heterogeneous computing control boards with multiple chips.
[0011] This invention integrates the functions of DSP, FPGA, Flash, RAM memory, and power supply circuit into one unit, and expands the functions of external ADC, RS422 / 485 interface, and discrete input / output. It is feature-rich. The fastening bracket mentioned can protect the edge of the control board, thereby improving the overall structural strength of the control board and extending its service life. This is beneficial to the long-term use of this system-in-package onboard heterogeneous computing control board. Attached Figure Description
[0012] Fig. 1 This is a schematic diagram of the front structure of the airborne heterogeneous computing control board of the present invention; Fig. 2 This is a schematic diagram of the back structure of the airborne heterogeneous computing control board of the present invention; Fig. 3 This is a block diagram illustrating the principle of the present invention.
[0013] In the diagram: 1. SIP module; 2. DSP clock; 3. FPGA clock; 4. Power supply circuit; 5. First JTAG interface; 6. Second JTAG interface; 7. Reset circuit; 8. Analog circuit; 9. Communication circuit; 10. External interface; 11. Fastening bracket. Detailed Implementation
[0014] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0015] Please see Figs. 1-3 This invention provides a technical solution: a system-in-package (SIP) onboard heterogeneous computing control board, comprising a power supply circuit 4, a SIP module 1 connected to the output of the power supply circuit 4, an external interface 10 connected to the SIP module 1, and a clock circuit interactively connected to the SIP module 1. The SIP module 1 internally includes a RAM memory and a Flash memory, employing a 256K×16bit RAM memory and a 128Mbit Flash memory, used for large-capacity data buffering and storage. It should be noted that one input terminal of the SIP module 1 is connected to a reset circuit 7, which has power-on reset, power-off reset restart, and abnormal operation monitoring functions. One pin of the SIP module 1 is connected to an analog signal circuit 8 and a communication circuit 9.
[0016] The communication circuit features RS422, RS485, and ARINC429 communication ports for multi-channel parallel data transmission. It includes two RS422 / RS485 communication channels with transmit enable control, enabling parallel multi-channel communication applications. The ARINC429 communication port connects to the ARINC429 controller module to implement ARINC429 communication functionality. Both the receive and transmit FIFOs have a capacity of 256×16 bits. The SIP module 1 converts and processes external analog signals via analog circuit 8 and controls the communication circuit 9 to transmit data. Another pin of the SIP module 1 connects to a configurable interface, which includes a GPIO interface, eleven ePWM interfaces, an SPI / eCAN interface, or an ADC interface. The ADC interface can connect to an ADC converter, featuring a fifteen-channel built-in ADC converter and an external eight-channel sixteen-bit ADC converter for high-precision data acquisition. The configurable GPIO interface has 2×16 channels, enabling 3.3V to 5V signal output or 5V to 3.3V signal input acquisition.
[0017] Among them, the SIP module is an integrated module that integrates DSP, FPGA, Flash, RAM memory and power supply chip. Its functions cover acquisition, data processing, storage, communication and data recording functions, which meet the general high-intensity numerical calculation and strong real-time response requirements of airborne equipment, reduce the use of discrete components and improve the integration of the board; the input terminal of SIP module 1 is interactively connected to discrete circuits.
[0018] In this embodiment, the clock circuit mentioned consists of a DSP clock 2 and an FPGA clock 3. The clock circuit provides external clock signals to the DSP and FPGA in the SIP module 1, respectively. One pin of the SIP module 1 is connected to a first JTAG interface 5 for the DSP clock 2 and a second JTAG interface 6 for the FPGA clock 3.
[0019] This system-in-package onboard heterogeneous computing control board is used in the following scenarios: Normal operating scenario: After supplying power to the control board at 4.75V-5.25V and 14.5V-15.5V via external interface 10 and external connector, the program is written to SIP module 1 through the first JTAG interface 5 and the second JTAG interface 6. After power-off and power-on, the reset circuit 7 performs a power-on reset on SIP module 1. The clock circuit provides external clock signals to the DSP and FPGA in SIP module 1 respectively. The software starts to execute initialization, bit, and other tasks. The discrete quantity circuit collects or outputs relevant discrete quantity signals, and the analog quantity circuit 8 converts and calculates external analog quantity signals. It also controls the communication circuit 9 to transmit data externally. During operation, the running data information can be stored in the RAM and Flash of SIP module 1 to achieve precise monitoring function. Fault operation scenarios: During the power-on or operation of the control board, when the reset circuit 7 detects an abnormal 3.3V power supply, it triggers the power-down reset function and controls the SIP module 1 to restart; During the operation of the general control board, when it detects that the SIP module 1 has not output a watchdog signal normally for more than 1.6 seconds, it triggers the timeout reset function and controls the SIP module 1 to restart; During the normal operation of the general control board, the DSP and FPGA inside the SIP module 1 perform mutual checks on the operating status. When the DSP detects an abnormal FPGA operating status, it controls the FPGA to reset and load. When the FPGA detects an abnormal DSP operating status, it issues a fault alarm indication. Maintenance scenario: By inputting a download signal through an external connector, the timeout reset function in reset circuit 7 is disabled, enabling online software upgrades.
[0020] In this embodiment, the airborne heterogeneous computing control board also includes a fastening bracket 11 for protecting the control board. The fastening bracket 11 has a U-shaped structure when viewed from above. The fastening bracket 11 can be fixed to the edge of the control board by fasteners, such as screws or bolts. The fastening bracket 11 can protect the edge of the control board, thereby improving the overall structural strength of the control board and extending its service life. This is beneficial for the long-term use of the system-in-package airborne heterogeneous computing control board.
[0021] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0022] The above embodiments only illustrate preferred embodiments of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be understood that, for those skilled in the art, several modifications and improvements can be made without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. In the present invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "joining," "fixing," etc., should be interpreted broadly. For example, it can refer to a fixed connection, a detachable connection, or an integral part; it can refer to a mechanical connection; it can refer to a direct connection or an indirect connection through an intermediate medium; it can refer to the internal communication of two components or the interaction between two components. Among these, there are various ways of detachable installation, such as by using a combination of plug-in and snap-fit, or by using bolt connections, etc.
[0023] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.
Claims
1. A system-in-package (SIBP) onboard heterogeneous computing control board, characterized in that, The system includes a power supply circuit, a SIP module connected to the output of the power supply circuit, an external interface connected to the SIP module, and a clock circuit interconnected with the SIP module. The SIP module has internal RAM and Flash memory. One input of the SIP module is connected to a reset circuit, which has power-on reset, power-off reset and restart, and abnormal operation monitoring functions. One pin of the SIP module is connected to an analog signal circuit and a communication circuit. The SIP module converts and processes external analog signals through the analog signal circuit and controls the communication circuit to transmit data externally. The other pin of the SIP module is connected to a configurable interface, which includes a GPIO interface, an eleven-channel ePWM interface, an SPI / eCAN interface, or an ADC interface.
2. The system-in-package onboard heterogeneous computing control board according to claim 1, characterized in that: The clock circuit consists of a DSP clock and an FPGA clock. The clock circuit provides external clock signals to the DSP and FPGA in the SIP module, respectively. One pin of the SIP module is connected to a first JTAG interface for the DSP clock and a second JTAG interface for the FPGA clock.
3. The system-in-package onboard heterogeneous computing control board according to claim 1, characterized in that: The communication circuit has RS422, RS485 and ARINC429 communication ports to enable multi-channel parallel communication for data transmission.
4. The system-in-package onboard heterogeneous computing control board according to claim 1, characterized in that: The input terminals of the SIP module are interconnected with discrete quantity circuits.
5. A system-in-package onboard heterogeneous computing control board according to claim 1, characterized in that: It also includes a fastening bracket for protecting the control board, the fastening bracket having a top view of a "U" shape, the fastening bracket being fixed to the edge of the control board by fasteners.