DETR-Core-based ceramic-based printed circuit board defect detection method, system and terminal

Abstract

The invention discloses a DETR-Core-based ceramic-based printed circuit board defect detection method, a DETR-Core-based ceramic-based printed circuit board defect detection system and a DETR-Core-based ceramic-based printed circuit board defect detection terminal. Firstly, a high-resolution defect image is collected through an industrial camera, a corresponding data set is constructed, and sample data redundancy is reduced through preprocessing, so that dependence on hardware is reduced; then, a ceramic-based printed circuit board defect detection model is constructed based on DETR-Core, and a PatchCore anomaly score calculation module is designed, so that the difference between a sample to be detected and a non-defective sample and an abnormal region can be efficiently analyzed; and an AFA multi-scale feature aggregation module is also designed, so that the characterization capability of the model on fine-grained texture defects is enhanced, and the sensitivity and discrimination capability of the model on abnormal defect areas are improved. And finally, a self-adaptive multi-head attention mechanism is introduced into a self-adaptive multi-head attention decoding module, so that the video memory, memory and calculation overhead caused by the multi-head attention mechanism and the multi-scale deformable attention is remarkably reduced, the calculation consumption and memory occupation of the model are effectively reduced, and the accuracy of defect detection is improved.

Description

Technical Field

[0001] This invention belongs to the field of PCB defect detection technology, specifically relating to a method, system, and terminal for detecting defects in ceramic-based printed circuit boards based on DETR-Core. Background Technology

[0002] Ceramic substrates are widely used in optoelectronic devices, electric vehicles, and high-power electronic devices due to their excellent thermal conductivity, load-bearing capacity, and mechanical strength. However, in large-scale, high-precision manufacturing processes, ceramic-based printed circuit boards are prone to minute defects such as circuit breaks, misalignment, missing prints, and localized detachment due to the complexity of the process and extremely stringent precision requirements, thus affecting product consistency and reliability. Although automated optical inspection technology based on machine vision has made relatively mature progress in identifying defects by acquiring images with high-speed cameras and combining image processing and pattern recognition algorithms, its high equipment cost and extensive human training requirements limit its adoption in small and medium-sized enterprises.

[0003] In recent years, deep learning technology has demonstrated strong potential in the field of industrial defect detection. By constructing and training image recognition networks for specific application scenarios and optimizing their network structure and algorithms, deep learning methods have achieved significant breakthroughs in improving the accuracy and real-time performance of general models, especially in target recognition. Although deep learning has made progress in industrial inspection in other fields, research on high-precision detection of micro-circuit defects on ceramic-based printed circuit boards (PCBs) remains relatively scarce. This problem mainly stems from the special material properties and process characteristics of ceramic substrates, as well as the low resolution of defects, which pose significant challenges to detection. Furthermore, the production of ceramic-based PCBs places high demands on the real-time performance of the inspection system, requiring rapid response while ensuring detection accuracy. Therefore, how to achieve lightweight and efficient models while ensuring detection effectiveness has become a core issue driving breakthroughs in automated inspection technology for ceramic-based PCBs. Summary of the Invention

[0004] To address the shortcomings of the existing technologies, this invention proposes a method, system, and terminal for defect detection of ceramic-based printed circuit boards based on DETR-Core. This addresses the technical problems of traditional defect detection relying mainly on manual visual inspection, which is inefficient, and the high cost and strong hardware dependence of automated optical inspection equipment.

[0005] To achieve the above and other related objectives, this invention provides a method for defect detection of ceramic-based printed circuit boards (PCBs) based on DETR-Core. The method includes: Step S1: Collecting and preprocessing relevant data of the ceramic PCB; Step S2: Constructing a ceramic-based PCB dataset involving various common circuit defect types based on the preprocessed data; wherein the common circuit defect types include: circuit cracks, rectangular cracks, circuit damage, and circuit misalignment; Step S3: Training a DETR-Core-based ceramic-based PCB defect detection model based on the ceramic-based PCB dataset; wherein the ceramic-based PCB defect detection model includes: multiple feature extraction modules, a texture enhancement module, and a cross-convolution module; Step S4: Using the DETR-Core-based ceramic-based PCB defect detection model, obtaining corresponding circuit defect detection results based on the relevant data of the ceramic PCB to be detected.

[0006] In one embodiment of the present invention, step S1 includes: acquiring high-resolution images of ceramic circuit board defects using an industrial camera; marking the ceramic circuit board defect images with circuit defect types; cutting the ceramic circuit board defect images into smaller images according to a certain overlap ratio; and using the SIFT algorithm to clean the data and exclude sub-images with fewer feature points.

[0007] In one embodiment of the present invention, step S3 includes:

[0008] Set evaluation metrics, including precision, recall, and mean precision. Train a DETR-Core-based ceramic printed circuit board (PCB) defect detection model using the training set in the PCB dataset. Test the trained DETR-Core-based PCB defect detection model using the test set in the PCB dataset and obtain the evaluation metrics.

[0009] In one embodiment of the present invention, the PatchCore anomaly score calculation module is used to integrate the multi-scale features of good sample images of good ceramic-based circuit boards extracted by the multi-scale feature extraction module into a multi-scale good feature library, and to combine them into a core subset feature library using a greedy core set sampling method; it is also used to perform nearest neighbor search on the multi-scale features of the ceramic-based circuit board image to be detected extracted by the multi-scale feature extraction module and the features in the core subset feature library, and to calculate anomaly scores for feature mapping at each scale.

[0010] In one embodiment of the present invention, the multi-scale features of the good product sample images of the good product ceramic-based circuit board dataset extracted by the multi-scale feature extraction module are integrated into a multi-scale good product feature library, and the greedy core set sampling method is used to combine them into a core subset feature library. This includes: obtaining features at three different scales for each good product sample image using a pre-trained ResNet50; and aggregating the multi-scale features of each good product sample image through adaptive average pooling to integrate them into the good product feature library. The process expression is as follows:

[0011] ;

[0012] ;

[0013] ;

[0014] in, The input image represents a sample image of a good product; Represents the first... layer, ; , , These are the output feature maps of ResNet50 layers 2, 3, and 4, respectively. This indicates an adaptive average pooling layer; This represents the multi-scale features after aggregation; This represents the generated feature library of good products;

[0015] A greedy core set sampling method is used to remove redundant features from the good product feature library, ultimately obtaining a core subset feature library. The process expression is as follows:

[0016] ;

[0017] ;

[0018] in, and They belong to the good product feature library respectively With core subset feature library Element; This represents the most similar feature element.

[0019] In one embodiment, the step of performing nearest neighbor search on the multi-scale features of the ceramic-based circuit board image to be detected extracted by the multi-scale feature extraction module and the features in the core subset feature library, and calculating anomaly scores for each scale feature mapping, includes:

[0020] The nearest neighbor search algorithm is used to calculate the maximum Euclidean distance between the multi-scale features of the input ceramic-based circuit board image to be detected and the features in the core subset feature library. The process expression is as follows:

[0021] ;

[0022] ;

[0023] in, and These represent the multi-scale features of the input ceramic-based circuit board image to be detected and the core subset features in the core subset feature library, respectively. The core subset of features that are most similar to the features of the image of the ceramic-based circuit board to be detected; The Euclidean distance between the features of the ceramic-based circuit board image to be detected and the core subset features;

[0024] The final anomaly score is obtained by multiplying the Euclidean distance between the features of the ceramic-based circuit board image to be detected and the core subset features by a weight. The calculation formula is as follows:

[0025] ;

[0026] in, This indicates the relationship between the features in the core subset feature library and the features of the ceramic-based circuit board image to be detected. The most similar core subset features; This represents the final anomaly score obtained.

[0027] In one embodiment, the AFA multi-scale feature aggregation module uses a U-Net network as its basic framework. It normalizes the anomaly score output by the PatchCore anomaly score calculation module using a softmax function, and then weights and fuses it with the multi-scale features of the ceramic-based circuit board image to be detected using a special attention mechanism. Finally, it... The convolution transforms the number of input feature channels into the number of channels in the intermediate hidden layers. Then, the RepVGG module, which performs structural reparameterization, further aggregates the fused features to obtain aggregated features. The process expression includes:

[0028] ;

[0029] ;

[0030] ;

[0031] ;

[0032] ;

[0033] in, This represents the softmax function; Indicates the kernel size as Convolution; This refers to the RepVGG module; Represents a bilinear upsampling function; This represents the flatten function; Indicates feature splicing; This indicates convolutional downsampling with a stride of 2; , , These represent feature maps at three different scales.

[0034] In one embodiment, the adaptive multi-head attention decoding module learns the correlation between feature channels through dynamic partial convolution and adaptively calculates the optimal channel segmentation ratio. The formula for calculating the channel segmentation ratio is:

[0035] ;

[0036] in, The first term represents the learnable binary gate vector. One element; Indicates the number of channels in the hidden layer;

[0037] The learned segmentation ratio is applied to the input features, and the features are segmented into a first feature and a second feature according to the channel dimension:

[0038] , ;

[0039] Multi-head attention decoding of the second feature is performed as follows:

[0040] ;

[0041] ;

[0042] ;

[0043] ;

[0044] in, , , They represent the first Size The weight matrix; Indicates the first Output of the head; Represents a linear transformation matrix;

[0045] The second feature, after being decoded by multi-head attention, is enhanced using multi-scale deformable attention. The process expression is as follows:

[0046] ;

[0047] in, This represents the input feature map starting from the first scale; and They represent the first The first scale and the first One sampling point; and They represent the first time. The first scale and the first The first thing to pay attention to is the height. Attention weights and offsets for each sampling point; using The coordinates are normalized. Readjust normalized coordinates To the One scale;

[0048] The second feature, after multi-head attention decoding and enhancement, is concatenated with the first feature. Two multilayer perceptrons are then used to finally output the defect region localization box and the confidence score of each defect. The process expression is as follows:

[0049] ;

[0050] ;

[0051] ;

[0052] in, and These represent the final defect location and the corresponding confidence level, respectively.

[0053] To achieve the above and other related objectives, this invention provides a ceramic-based printed circuit board (PCB) defect detection system based on DETR-Core. The system includes: a data acquisition module for collecting and preprocessing data related to the PCB; a dataset construction module connected to the data acquisition module for constructing a PCB dataset based on the preprocessed PCB data; wherein the PCB dataset includes: a dataset of good-quality PCBs and a dataset of PCB defects involving various common circuit defect types; the common circuit defect types include: circuit cracks, rectangular cracks, circuit damage, and circuit misalignment; a model training module connected to the dataset construction module for training a DETR-Core-based PCB defect detection model based on the PCB dataset; wherein the PCB defect detection model includes: a multi-scale feature extraction module, an AFA multi-scale feature aggregation module, and an adaptive multi-head attention decoding module; and a defect detection module connected to the model training module for using the DETR-Core-based PCB defect detection model to obtain corresponding circuit defect detection results from images of the PCB to be detected.

[0054] To achieve the above and other related objectives, the present invention provides an electronic terminal, comprising: one or more memories and one or more processors; the one or more memories being used to store a computer program; and the one or more processors being connected to the memories and used to run the computer program to perform the method described.

[0055] As described above, the present invention is a method, system, and terminal for defect detection of ceramic-based printed circuit boards based on DETR-Core, which has the following beneficial effects:

[0056] A defect detection model for ceramic-based printed circuit boards (PCBs) is constructed, comprising an Anomaly Scoring (ACP) algorithm based on Patchcore, an Anomaly Scoring-Based Feature Aggregation (AFA) algorithm, and an Adaptive Multi-Head Attention Decoder (AADecoder). This model detects circuit defects in PCBs. During defect detection, the ACP algorithm is used to acquire anomalous regions between multi-scale features of the target image and features of a good product image, generating an anomaly scoring matrix. The AFA algorithm progressively aggregates multi-scale feature information based on a U-Net network and uses the anomaly scoring matrix to enhance anomalous regions in the target image features, making the model more focused on anomalous region features. The adaptive multi-head attention decoder optimizes the extraction capability of defect features of different shapes on the circuit board, improving the overall detection performance of the model while significantly reducing computational cost and inference time.

[0057] This model not only significantly improves the accuracy of circuit defect detection on ceramic substrates, but also effectively reduces memory usage and computational consumption during training and inference, laying a solid foundation for lightweighting of ceramic-based printed circuit board defect detection models and providing strong support for real-time detection in industrial settings. Attached Figure Description

[0058] Figure 1 is a schematic flowchart of the defect detection method for ceramic-based printed circuit boards based on DETR-Core according to an embodiment of the present invention.

[0059] Figure 2 is a schematic diagram of the structure of the exception scoring module based on PatchCore in an embodiment of the present invention.

[0060] Figure 3 is a schematic diagram of the structure of the AFA multi-scale feature aggregation module according to an embodiment of the present invention.

[0061] Figure 4 is a schematic diagram of the structure of the adaptive multi-head attention decoding module according to an embodiment of the present invention.

[0062] Figure 5 This is a schematic diagram of the structure of the DETR-Core-based ceramic-based printed circuit board defect detection system according to an embodiment of the present invention.

[0063] Figure 6 is a schematic diagram of the structure of the electronic terminal according to an embodiment of the present invention. Detailed Implementation

[0064] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments will be described in detail below with reference to the accompanying drawings. The following embodiments are used to illustrate the present invention, but are not intended to limit the scope of the present invention.

[0065] The method of the present invention will be further described below with reference to the accompanying drawings and embodiments.

[0066] As shown in Figure 1, a defect detection method for ceramic-based printed circuit boards based on DETR-Core is described, and the specific implementation steps are as follows:

[0067] Step S1: Collect and preprocess relevant data of ceramic circuit boards.

[0068] In one embodiment, step S1 specifically involves the following steps:

[0069] High-resolution images of ceramic circuit board defects are captured using industrial cameras; the captured images cover four common types of circuit defects: line cracks, rectangular cracks, line damage, and line misalignment.

[0070] High-resolution images of defects in ceramic-based printed circuit boards and images of good ceramic-based circuit boards are acquired using industrial cameras. The acquired image data is then preprocessed, including data labeling, image segmentation, and data cleaning.

[0071] Data labeling methods include: each ceramic-based printed circuit board defect image is used as a sample and labeled according to common circuit defect types: circuit cracks, rectangular cracks, circuit damage, and circuit misalignment; images of good ceramic-based circuit boards are also labeled as good.

[0072] The specific image segmentation methods include: employing an overlapping segmentation strategy to cut the original image (2448×2048) of each sample into smaller images of 640×640 according to a certain overlap ratio. Data cleaning methods include: using the SIFT algorithm to remove images from the segmented samples that have fewer than a threshold number of feature points, reducing data redundancy and hardware dependence.

[0073] Step S2: Based on the preprocessed ceramic circuit board related data, construct a ceramic-based printed circuit board dataset involving various common circuit defect types.

[0074] The dataset includes a ceramic-based printed circuit board (PCB) defect dataset constructed using labeled data samples, encompassing four common circuit defect types: circuit cracks, rectangular cracks, circuit damage, and circuit misalignment. The dataset is proportionally divided into training and testing sets to support model training and evaluation. Typically, the ratio of training to testing sets can be adjusted according to actual needs, for example, 80% for training and 20% for testing. A dataset of good-quality ceramic-based PCBs is also included.

[0075] Step S3: Train a DETR-Core-based defect detection model for ceramic-based printed circuit boards based on the ceramic-based printed circuit board dataset.

[0076] In detail, the constructed ceramic-based printed circuit board defect detection model encompasses several key modules, including a multi-scale feature extraction module for accurately extracting effective features from input data, a PatchCore anomaly score calculation module relying on the PatchCore algorithm to accurately calculate anomaly scores, an AFA multi-scale feature aggregation module for efficient aggregation of multi-scale features, and an adaptive multi-head attention decoding module for accurate decoding using an adaptive multi-head attention mechanism. Furthermore, the model is built on the DETR-Core architecture, consisting of a feature extraction network (Backbone), a PatchCore-based anomaly scoring algorithm (APC), an anomaly score-based feature aggregation algorithm (AFA), and an adaptive multi-head attention-based decoder (AADecoder). The Backbone part utilizes the high-performance ResNet50 model, providing stable and powerful feature extraction capabilities for the entire defect detection model.

[0077] In one embodiment, the PatchCore anomaly score calculation module is used to integrate the multi-scale features of the good sample images of the good ceramic base circuit board dataset extracted by the multi-scale feature extraction module into a multi-scale good feature library, and to combine them into a core subset feature library using a greedy core set sampling method.

[0078] Specifically, such as Figure 2 As shown, the PatchCore anomaly score calculation module's PatchCore-based anomaly score algorithm uses ResNet50 as the backbone network during the training phase to extract all good sample images. After analyzing the multi-scale features, an adaptive average pooling layer is used to integrate the multi-scale features into a good product feature library. The process expression is as follows:

[0079] ; (Formula 1)

[0080] ; (Formula 2)

[0081] ; (Formula 3)

[0082] in, This represents a specific input image from the good training sample X; Represents the first... layer, ; , , These are the output feature maps for layers 2, 3, and 4, respectively. This indicates an adaptive average pooling layer; This represents the multi-scale features after aggregation; This represents the generated feature library of good products.

[0083] Feature library The size of the feature library increases with the number of training samples, leading to increased requirements for sample search time and storage space during inference. To reduce the size of the feature library... To eliminate redundancy, a greedy core set sampling method is used to ultimately obtain the core subset feature library. The process expression is as follows:

[0084] ; (Formula 4)

[0085] ; (Formula 5)

[0086] in, and They belong to the feature library respectively With core subset feature library Element; This represents the most similar feature element. The similarity between elements is calculated using the nearest neighbor algorithm, and the most similar element is retained in a new core subset feature library. This reduces redundancy in the feature library and lowers the time spent searching for abnormal regions during inference.

[0087] The PatchCore anomaly score calculation module performs nearest neighbor search on the multi-scale features in the ceramic circuit board image to be detected and the features in the core subset feature library to calculate anomaly scores for each scale feature map.

[0088] During inference and testing, a nearest neighbor search algorithm is used to calculate the maximum distance between the input ceramic-based circuit board image features to be detected and the images in the good product feature library. The process expression is as follows:

[0089] ; (Formula 6)

[0090] ; (Formula 7)

[0091] in, and These represent the multi-scale features of the input ceramic-based circuit board image to be detected and the core subset features in the core subset feature library, respectively. The core subset of features that are most similar to the features of the image of the ceramic-based circuit board to be detected; The Euclidean distance between the features of the ceramic-based circuit board image to be detected and the core subset features;

[0092] To obtain the anomaly score for each pixel in the image of the ceramic-based circuit board to be detected, the Euclidean distance between the features of the image and the core subset features is multiplied by a weight to obtain the final anomaly score, thus explaining the correlation between adjacent features. The process expression is as follows:

[0093] ; (Formula 8)

[0094] in, This indicates the relationship between the feature in the good product feature library and the feature to be detected. The most similar feature; This represents the final anomaly score obtained.

[0095] In one embodiment, such as Figure 3 The AFA multi-scale feature aggregation module is based on the U-Net network framework. The anomaly scores obtained by the PatchCore anomaly score calculation module are normalized to the [0,1] interval using a softmax function, and then weighted and fused with the original features using a special attention mechanism, thereby enhancing the model's focus on anomaly regions. Subsequently, through... The convolution transforms the number of input feature channels into the number of channels in the intermediate hidden layers. Finally, the RepVGG module, which introduces structural reparameterization, further aggregates the fused features to improve feature representation capabilities. The specific mathematical expression of this process is shown below:

[0096] ; (Formula 9)

[0097] ;(Formula 10)

[0098] ; (Formula 11)

[0099] ;(Formula 12)

[0100] ;(Formula 13)

[0101] in, This represents the softmax function; Indicates the kernel size as Convolution; This refers to the RepVGG module; Represents a bilinear upsampling function; This represents the flatten function; Indicates feature splicing; This indicates convolutional downsampling with a stride of 2; , , These represent feature maps at three different scales.

[0102] The constant scores obtained by the PatchCore anomaly score calculation module are applied to the feature maps of the corresponding scale. By reducing the model's focus on normal regions and enhancing its focus on abnormal regions, the recognition accuracy of defective targets is improved.

[0103] In one embodiment, such as Figure 4 The adaptive multi-head attention decoding module learns the correlation between feature channels through dynamic partial convolution and adaptively calculates the optimal channel segmentation ratio. Specifically, input features are segmented along the channel dimension, with only a subset of feature channels participating in multi-head self-attention computation, effectively reducing redundancy between features from different channels. Channel segmentation ratio. The calculation formula is as follows:

[0104] ; (Formula 14)

[0105] in, The first term represents the learnable binary gate vector. One element; This indicates the number of channels in the hidden layer.

[0106] The learned segmentation ratio is then applied to the input features, segmenting them according to the channel dimension to form the first feature. and the second feature : , Among them, the second feature The first feature is input into the decoder. Then, the data is re-concatenated along the channel dimension after the decoder. This operation effectively reduces multi-head attention (...). ) and multi-scale deformable attention ( The computational cost is [not specified]. The adaptive multi-head attention process is expressed as follows:

[0107] ; (Formula 15)

[0108] ; (Formula 16)

[0109] ; (Formula 17)

[0110] ;(Formula 18)

[0111] in, , , They represent the first Size The weight matrix; Indicates the first Output of the head; This represents a linear transformation matrix.

[0112] After adaptive multi-head attention computation, multi-scale deformable attention is employed to enhance the interaction between different heads. The expression for multi-scale deformable attention is as follows:

[0113] ;(Formula 19)

[0114] in, This represents the input feature map starting from the first scale; and They represent the first The first scale and the first One sampling point; and They represent the first time. The first scale and the first The first thing to pay attention to is the height. Attention weights and offsets for each sampling point. The coordinates are normalized. Readjust normalized coordinates To the Each scale.

[0115] Finally, the split features are reassembled after passing through a decoder that includes multi-head attention and multi-scale deformable attention. Two multilayer perceptrons are then used to output the defect region bounding boxes and the confidence score for each defect. The process expression is as follows:

[0116] ; (Formula 20)

[0117] ; (Formula 21)

[0118] ; (Formula 22)

[0119] in, and These represent the final defect location and the corresponding confidence level, respectively.

[0120] In one embodiment, step S3 includes:

[0121] Step S31: Set evaluation metrics; where the evaluation metrics include: precision, recall, and mean precision.

[0122] Step S32: Train a DETR-Core-based defect detection model for ceramic-based printed circuit boards using the training set in the ceramic-based printed circuit board dataset;

[0123] Step S33: Test the trained DETR-Core-based ceramic-based printed circuit board defect detection model using the test set of the ceramic-based printed circuit board dataset, and obtain the evaluation metrics.

[0124] In one embodiment, step S31: setting evaluation indicators, the specific steps are as follows:

[0125] Three evaluation metrics are set up, including precision, recall, and mean average precision rate (mAP), and their expressions are as follows:

[0126] ; (Formula 21)

[0127] ; (Formula 22)

[0128] ; (Formula 23)

[0129] ; (Formula 24)

[0130] In this study, TP represents the number of targets correctly detected by the model; FP represents the number of positive samples incorrectly detected by the model; FN represents the number of positive samples that the model failed to detect; and Average Precision (AP) is the area under the Precision-Recall (PR) curve, which measures the performance of an object detection algorithm on a single class. Here, P represents precision and R represents recall. This invention uses mAP@50 and mAP@50-95 to measure model performance. mAP@50 represents the average precision of the model when the Intersection over Union (IoU) threshold between the predicted and actual bounding boxes is set to 0.5; mAP@50-95 calculates the average precision across multiple IoU thresholds within the IoU range of 0.5 to 0.95.

[0131] In one embodiment, step S32: training the model, training the DETR-Core network model using the training set data of the line defect type dataset, the specific steps are as follows:

[0132] The training set of circuit defects on ceramic substrates was input into the DETR-Core model. The experimental environment configuration included: an Intel® Core™ i5-12400F@4.40 GHz CPU, NVIDIA GeForce 2070 8G GPU, 32G RAM platform, Windows system, and PyTorch 2.5.1 development environment; the SGD optimizer was selected during model training; the weights of the detection loss, classification loss, and distributed focus loss were 7.5, 0.5, and 1.5, respectively; the training image size was uniformly set to 640; the batch size was set to 16; the initial learning rate was 0.01; and a total of 200 epochs were trained.

[0133] In one embodiment, step S33: testing the model, the defect test set data of the ceramic-based printed circuit board is fed into the model that has completed iterative training in step S5 for testing, and evaluation indicators are obtained. The specific steps are as follows:

[0134] The defect test set data of the ceramic-based printed circuit board is fed into the model that has completed iterative training in step S5 for testing, the defect test results are output, and the evaluation index is calculated. After the above 6 steps, the defect detection model of ceramic-based printed circuit boards based on DETR-Core proposed in this invention can be obtained.

[0135] Similar to the above embodiments, the present invention provides a defect detection system for ceramic-based printed circuit boards based on DETR-Core.

[0136] The following specific embodiments are provided in conjunction with the accompanying drawings:

[0137] Figure 5 shows a schematic diagram of a defect detection system for ceramic-based printed circuit boards based on DETR-Core according to an embodiment of the present invention. The system includes:

[0138] Data acquisition module 1 is used to collect and preprocess data related to ceramic circuit boards;

[0139] Dataset construction module 2, connected to data acquisition module 1, is used to construct a ceramic-based printed circuit board dataset based on preprocessed ceramic circuit board related data; wherein, the ceramic-based printed circuit board dataset includes: a good ceramic-based circuit board dataset and a ceramic-based circuit board defect dataset involving various common circuit defect types; the common circuit defect types include: circuit cracks, rectangular cracks, circuit damage, and circuit offset.

[0140] Model training module 3, connected to the dataset construction module 2, is used to train a DETR-Core-based ceramic-based printed circuit board defect detection model based on the ceramic-based printed circuit board dataset; wherein, the ceramic-based printed circuit board defect detection model includes: a multi-scale feature extraction module, a PatchCore anomaly score calculation module, an AFA multi-scale feature aggregation module, and an adaptive multi-head attention decoding module;

[0141] The defect detection module 4 is connected to the model training module 3 and is used to obtain the corresponding circuit defect detection results based on the image of the ceramic circuit board to be detected by using the DETR-Core-based ceramic-based printed circuit board defect detection model.

[0142] Since the implementation principle of the DETR-Core-based ceramic-based printed circuit board defect detection system has been described in the previous embodiments, it will not be repeated here.

[0143] The DETR-Core-based ceramic-based printed circuit board defect detection and control method provided in this embodiment of the invention can be implemented on the terminal side or the server side. Regarding the hardware structure of the electronic terminal, please refer to Figure 6, which is a schematic diagram of an optional hardware structure of the electronic terminal 1000 provided in this embodiment of the invention. The terminal 1000 can be a mobile phone, computer device, tablet device, personal digital processing device, factory back-end processing device, etc. The terminal 1000 includes: at least one processor 1001, a memory 1002, at least one network interface 10010, and a user interface 1009. The various components in the device are coupled together through a bus system 1005. It is understood that the bus system 1005 is used to realize the connection and communication between these components. In addition to a data bus, the bus system 1005 also includes a power bus, a control bus, and a status signal bus. However, for clarity, all buses are labeled as a bus system in Figure 6.

[0144] The user interface 1009 may include a monitor, keyboard, mouse, trackball, clicker, button, touchpad, or touch screen.

[0145] It is understood that memory 1002 can be volatile memory or non-volatile memory, or both. Non-volatile memory can be read-only memory (ROM) or programmable read-only memory (PROM), used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM) and synchronous static random access memory (SSRAM). The memories described in the embodiments of this invention are intended to include, but are not limited to, these and any other suitable categories of memory.

[0146] In this embodiment of the invention, the memory 1002 is used to store various types of data to support the operation of the terminal 1000. Examples of this data include: any executable program for operation on the terminal 1000, such as the operating system 10021 and application program 10022; the operating system 10021 contains various system programs, such as the framework layer, core library layer, driver layer, etc., for implementing various basic services and handling hardware-based tasks. The application program 10022 may contain various applications, such as media players, browsers, etc., for implementing various application services. The implementation of the DETR-Core-based ceramic-based printed circuit board defect detection method provided in this embodiment of the invention can be included in the application program 10022.

[0147] The methods disclosed in the above embodiments of the present invention can be applied to, or implemented by, processor 1001. Processor 1001 may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method can be completed by integrated logic circuits in the hardware of processor 1001 or by instructions in software form. Processor 1001 may be a general-purpose processor, a digital signal processor (DSP), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Processor 1001 can implement or execute the methods described in the embodiments of the present invention.

[0148] The disclosed methods, steps, and logic diagrams. The general-purpose processor 1001 can be a microprocessor or any conventional processor. The steps of the accessory optimization method provided in the embodiments of the present invention can be directly manifested as execution by a hardware decoding processor, or execution by a combination of hardware and software modules in the decoding processor. The software modules can be located in a storage medium, which is located in a memory. The processor reads information from the memory and, in conjunction with its hardware, completes the steps of the aforementioned method.

[0149] In an exemplary embodiment, the terminal 1000 may be used by one or more application-specific integrated circuits (ASICs), DSPs, programmable logic devices (PLDs), or complex programmable logic devices (CPLDs) to execute the aforementioned method.

[0150] Those skilled in the art will understand that all or part of the steps of the above-described method embodiments can be implemented using computer program-related hardware. The aforementioned computer program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments; and the aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.

[0151] In the embodiments provided in this application, the computer-readable and writable storage medium may include read-only memory, random access memory, EEPROM, CD-ROM or other optical disc storage devices, disk storage devices or other magnetic storage devices, flash memory, USB flash drive, portable hard drive, or any other medium capable of storing desired program code in the form of instructions or data structures and accessible by a computer. Additionally, any connection may be appropriately referred to as a computer-readable medium. For example, if instructions are transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. However, it should be understood that computer-readable and writable storage media and data storage media do not include connections, carrier waves, signals, or other transient media, but are intended for non-transient, tangible storage media. The disks and optical discs used in the application include compact optical discs (CDs), laser optical discs, optical discs, digital multifunction optical discs (DVDs), floppy disks, and Blu-ray discs, where disks typically copy data magnetically, while optical discs use lasers to copy data optically.

[0152] In summary, the DETR-Core-based ceramic-based printed circuit board defect detection method, system, and terminal of this invention first acquire high-resolution defect images using an industrial camera and construct a corresponding dataset. Preprocessing reduces sample data redundancy, thereby reducing hardware dependence. Next, a ceramic-based printed circuit board defect detection model is built based on DETR-Core, and a PatchCore anomaly score calculation module is designed to efficiently analyze the differences between the sample to be detected and the good sample, as well as abnormal regions. Furthermore, this method proposes an AFA multi-scale feature aggregation module, enhancing the model's ability to represent fine-grained texture defects and improving its sensitivity and discrimination ability for abnormal defect regions. Finally, an adaptive multi-head attention mechanism is introduced into the adaptive multi-head attention decoding module, significantly reducing the GPU memory, RAM, and computational overhead caused by multi-head attention mechanisms and multi-scale deformable attention, thereby effectively reducing the model's computational consumption and memory usage, and improving the accuracy of defect detection. Therefore, this invention effectively overcomes the various shortcomings of existing technologies and has high industrial application value.

[0153] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings, but the present invention is not limited to the described embodiments. For those skilled in the art, various changes, modifications, substitutions, and variations can be made to these embodiments, including components, without departing from the principles and spirit of the present invention, and these variations still fall within the protection scope of the present invention.

Claims

1. A defect detection method for ceramic-based printed circuit boards based on DETR-Core, characterized in that, The method includes: Step S1: Collect and preprocess relevant data for the ceramic circuit board; Step S2: Based on the preprocessed ceramic circuit board related data, construct a ceramic-based printed circuit board dataset; wherein, the ceramic-based printed circuit board dataset includes: a dataset of good ceramic-based circuit boards and a dataset of ceramic-based circuit board defects involving various common circuit defect types; the common circuit defect types include: circuit cracks, rectangular cracks, circuit damage, and circuit misalignment. Step S3: Train a DETR-Core-based defect detection model for ceramic-based printed circuit boards based on the ceramic-based printed circuit board dataset; wherein, the ceramic-based printed circuit board defect detection model includes: a multi-scale feature extraction module, a PatchCore anomaly score calculation module, an AFA multi-scale feature aggregation module, and an adaptive multi-head attention decoding module; Step S4: Using the DETR-Core-based ceramic-based printed circuit board defect detection model, obtain the corresponding circuit defect detection results based on the image of the ceramic circuit board to be inspected.

2. The method for defect detection of ceramic-based printed circuit boards based on DETR-Core according to claim 1, characterized in that, Step S1 includes: High-resolution images of defects in ceramic circuit boards are acquired using industrial cameras. The defect images of ceramic circuit boards are labeled with the type of circuit defect, and the defect images of ceramic circuit boards are cut into small images with a certain overlap ratio. The SIFT algorithm is used for data cleaning to remove sub-images with fewer feature points.

3. The method for defect detection of ceramic-based printed circuit boards based on DETR-Core according to claim 1, characterized in that, Step S3 includes: Set evaluation metrics; these metrics include: precision, recall, and mean precision. A DETR-Core-based defect detection model for ceramic-based printed circuit boards was trained using the training set in the ceramic-based printed circuit board dataset. The DETR-Core-based defect detection model for ceramic-based printed circuit boards was tested using the test set of the ceramic-based printed circuit board dataset, and evaluation metrics were obtained.

4. The method for defect detection of ceramic-based printed circuit boards based on DETR-Core according to claim 1, characterized in that, The PatchCore anomaly score calculation module is used to integrate the multi-scale features of good sample images of good ceramic-based circuit boards extracted by the multi-scale feature extraction module into a multi-scale good feature library, and to combine them into a core subset feature library using a greedy core set sampling method; it is also used to perform nearest neighbor search on the multi-scale features of the ceramic-based circuit board images to be detected extracted by the multi-scale feature extraction module and the features in the core subset feature library, and to calculate anomaly scores for feature mapping at each scale.

5. The method for defect detection of ceramic-based printed circuit boards based on DETR-Core according to claim 4, characterized in that, The multi-scale features of the good product sample images of the good product ceramic-based circuit board dataset extracted by the multi-scale feature extraction module are integrated into a multi-scale good product feature library, and then combined into a core subset feature library using a greedy core set sampling method, including: We extract features at three different scales from each good sample image using a pre-trained ResNet50. The multi-scale features of each good product sample image are aggregated by adaptive average pooling and integrated into a good product feature library. The process expression is as follows: ； ； ； in, The input image represents a sample image of a good product; Represents the first... layer, ; , , These are the output feature maps of ResNet50 layers 2, 3, and 4, respectively. This indicates an adaptive average pooling layer; This represents the multi-scale features after aggregation; This represents the generated feature library of good products; A greedy core set sampling method is used to remove redundant features from the good product feature library, ultimately obtaining a core subset feature library. The process expression is as follows: ； ； in, and They belong to the good product feature library respectively With core subset feature library Element; This represents the most similar feature element.

6. The method for defect detection of ceramic-based printed circuit boards based on DETR-Core according to claim 5, characterized in that, The step of performing a nearest neighbor search on the multi-scale features of the ceramic-based circuit board image to be detected extracted by the multi-scale feature extraction module and the features in the core subset feature library, and calculating anomaly scores for each scale feature mapping, includes: The nearest neighbor search algorithm is used to calculate the maximum Euclidean distance between the multi-scale features of the input ceramic-based circuit board image to be detected and the features in the core subset feature library. The process expression is as follows: ； ； in, and These represent the multi-scale features of the input ceramic-based circuit board image to be detected and the core subset features in the core subset feature library, respectively. The core subset of features that are most similar to the features of the image of the ceramic-based circuit board to be detected; The Euclidean distance between the features of the ceramic-based circuit board image to be detected and the core subset features; The final anomaly score is obtained by multiplying the Euclidean distance between the features of the ceramic-based circuit board image to be detected and the core subset features by a weight. The calculation formula is as follows: ； in, This indicates the relationship between the features in the core subset feature library and the features of the ceramic-based circuit board image to be detected. The most similar core subset features; This represents the final anomaly score obtained.

7. The method for defect detection of ceramic-based printed circuit boards based on DETR-Core according to claim 6, characterized in that, The AFA multi-scale feature aggregation module, based on the U-Net network framework, normalizes the anomaly score output by the PatchCore anomaly score calculation module using a softmax function, and then weights and fuses it with the multi-scale features of the ceramic-based circuit board image to be detected using a special attention mechanism. Finally, it... The convolution transforms the number of input feature channels into the number of channels in the intermediate hidden layers. Then, the RepVGG module, which performs structural reparameterization, further aggregates the fused features to obtain aggregated features. The process expression includes: ； ； ； ； ； in, This represents the softmax function; Indicates the kernel size as Convolution; This refers to the RepVGG module; Represents a bilinear upsampling function; This represents the flatten function; Indicates feature splicing; This indicates convolutional downsampling with a stride of 2; , , These represent feature maps at three different scales.

8. The method for defect detection of ceramic-based printed circuit boards based on DETR-Core according to claim 7, characterized in that, The adaptive multi-head attention decoding module learns the correlation between feature channels through dynamic partial convolution and adaptively calculates the optimal channel segmentation ratio. The formula for calculating the channel segmentation ratio is as follows: ； in, The first term represents the learnable binary gate vector. One element; Indicates the number of channels in the hidden layer; The learned segmentation ratio is applied to the input features, and the features are segmented into a first feature and a second feature according to the channel dimension: ， ； Multi-head attention decoding of the second feature is performed as follows: ； ； ； ； in, , , They represent the first Size The weight matrix; Indicates the first Output of the head; Represents a linear transformation matrix; The second feature, after being decoded by multi-head attention, is enhanced using multi-scale deformable attention. The process expression is as follows: ； in, This represents the input feature map starting from the first scale; and They represent the first The first scale and the first One sampling point; and They represent the first time. The first scale and the first The first thing to pay attention to is the height. Attention weights and offsets for each sampling point; using The coordinates are normalized. Readjust normalized coordinates To the One scale; The second feature, after multi-head attention decoding and enhancement, is concatenated with the first feature. Two multilayer perceptrons are then used to finally output the defect region localization box and the confidence score of each defect. The process expression is as follows: ； ； ； in, and These represent the final defect location and the corresponding confidence level, respectively.

9. A defect detection system for ceramic-based printed circuit boards based on DETR-Core, characterized in that, The system includes: The data acquisition module is used to collect and preprocess data related to ceramic circuit boards; The dataset construction module, connected to the data acquisition module, is used to construct a ceramic-based printed circuit board dataset based on preprocessed ceramic circuit board related data. The ceramic-based printed circuit board dataset includes: a dataset of good-quality ceramic-based circuit boards and a dataset of ceramic-based circuit board defects involving various common circuit defect types. These common circuit defect types include: circuit cracks, rectangular cracks, circuit damage, and circuit misalignment. The model training module, connected to the dataset construction module, is used to train a DETR-Core-based ceramic-based printed circuit board defect detection model based on the ceramic-based printed circuit board dataset. The ceramic-based printed circuit board defect detection model includes: a multi-scale feature extraction module, an AFA multi-scale feature aggregation module, and an adaptive multi-head attention decoding module. The defect detection module, connected to the model training module, is used to obtain the corresponding circuit defect detection results based on the image of the ceramic-based printed circuit board using the DETR-Core-based ceramic-based printed circuit board defect detection model.

10. An electronic terminal, characterized in that, include: One or more memories and one or more processors; The one or more memories are used to store computer programs; The one or more processors are connected to the memory and are used to run the computer program to perform the method as described in any one of claims 1 to 8.

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