Pixel circuit of display panel, driving method of pixel circuit and display panel

Abstract

The invention discloses a pixel circuit of a display panel, a driving method of the pixel circuit and the display panel. The pixel circuit comprises a target charging path, the first end of the target charging path is connected with a data line, the second end of the target charging path is connected with a first node in the pixel circuit, and the target charging path is parallel to an original charging path in the pixel circuit. The target charging path and the original charging path simultaneously charge the original compensation capacitor through the first node in a charging stage; the target charging path is also used for charging the target compensation capacitor in the charging stage; the target compensation capacitor is used for reducing the leakage current influence of the pixel circuit in the light emitting stage.

Description

Technical Field

[0001] This application relates to the field of electronic technology, and in particular to a pixel circuit and driving method for a display panel, and a display panel thereof. Background Technology

[0002] Existing pixel circuits charge slowly, and because the charging path is fixed and singular, the charging time cannot be shortened further, making it difficult to further improve the refresh rate. Summary of the Invention

[0003] The purpose of this application is to provide a pixel circuit and driving method for a display panel, and a display panel.

[0004] In a first aspect, embodiments of this application provide a pixel circuit for a display panel, including: The target charging path has a first end connected to the data line and a second end connected to the first node in the pixel circuit. The target charging path runs in parallel with the original charging path in the pixel circuit. The target charging path and the original charging path charge the original compensation capacitor simultaneously through the first node during the charging phase. The target charging path is also used to charge the target compensation capacitor during the charging phase; The target compensation capacitor is used to reduce the leakage current effect of the pixel circuit during the light emission stage.

[0005] In some embodiments, the target compensation capacitor and the original compensation capacitor are used during the light emission stage to reduce the leakage current effect of the pixel circuit.

[0006] In some embodiments, the target voltage provided by the target compensation capacitor is greater than the original voltage provided by the original compensation capacitor, generating a compensation current, which flows to the first node in the target charging path.

[0007] In some embodiments, the target charging path includes at least a first transistor and a second transistor; A second node is set between the first transistor and the second transistor, and the target compensation capacitor is connected to the second node; During the charging phase, the target compensation capacitor is charged through the second node; During the light-emitting phase, the compensation current flows from the second node to the first node in the target charging path, and the compensation current flows through the first node to the transistor of the pixel circuit that is leaking current during the light-emitting phase.

[0008] In some embodiments, during the charging phase, the second transistor is turned off before the first transistor so that the charge obtained by the target compensation capacitor is greater than the charge obtained by the original compensation capacitor.

[0009] Secondly, embodiments of this application provide a method for driving pixel circuits of a display panel, the method comprising: During the charging phase, the original compensation capacitor is charged simultaneously through the parallel target charging path and the original charging path in the pixel circuit, and the target charging path also charges the target compensation capacitor; wherein, the target compensation capacitor is used to reduce the leakage current effect of the pixel circuit during the light emission phase.

[0010] In some embodiments, the method further includes: During the charging phase, the target voltage provided by the target compensation capacitor is greater than the original voltage provided by the original compensation capacitor, resulting in a compensation current. During the light-emitting phase, the compensation current flows to the first node in the target charging path.

[0011] In some embodiments, the target charging path includes at least a first transistor and a second transistor, a second node is disposed between the first transistor and the second transistor, and a target compensation capacitor is connected to the second node; the method further includes: During the charging phase, the target compensation capacitor is charged through the second node; During the light-emitting phase, the compensation current flows from the second node to the first node in the target charging path, and the compensation current flows through the first node to the transistor of the pixel circuit that is leaking current during the light-emitting phase.

[0012] In some embodiments, the method further includes: During the charging phase, the second transistor is turned off before the first transistor, so that the charge obtained by the target compensation capacitor is greater than the charge obtained by the original compensation capacitor.

[0013] Thirdly, embodiments of this application provide a display panel comprising a pixel matrix composed of multiple pixel units, each pixel unit having pixel circuitry including: The target charging path has a first end connected to the data line and a second end connected to the first node in the pixel circuit. The target charging path runs in parallel with the original charging path in the pixel circuit. The target charging path and the original charging path charge the original compensation capacitor simultaneously through the first node during the charging phase. The target charging path is also used to charge the target compensation capacitor during the charging phase; The target compensation capacitor is used to reduce the leakage current effect of the pixel circuit during the light emission stage. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the circuit principle of a conventional LTPS 7T pixel circuit; Figure 2 This is a schematic diagram of the circuit principle of a pixel circuit provided in an embodiment of this application; Figure 3This is a schematic diagram of the current flow in the first stage of the pixel circuit during the reset phase. Figure 4 This is a schematic diagram of the current flow in the second stage of the pixel circuit during the reset phase. Figure 5 This is a schematic diagram of the current flow in the first stage of the pixel circuit during the charging phase. Figure 6 This is a schematic diagram of the current flow in the second stage of the pixel circuit during the charging phase. Figure 7 This is a schematic diagram of the current flow in the pixel circuit during the light-emitting stage. Figure 8 This is a schematic diagram of the circuit principle of another pixel circuit provided in an embodiment of this application. Detailed Implementation

[0015] Various embodiments and features of this application are described herein with reference to the accompanying drawings.

[0016] It should be understood that various modifications can be made to the embodiments described herein. Therefore, the above description should not be considered as limiting, but merely as an example of embodiments. Other modifications within the scope and spirit of this application will be apparent to those skilled in the art.

[0017] The accompanying drawings, which are included in and form part of this specification, illustrate embodiments of the present application and, together with the general description of the present application given above and the detailed description of the embodiments given below, serve to explain the principles of the present application.

[0018] These and other features of this application will become apparent from the following description of preferred forms of embodiments given as non-limiting examples, with reference to the accompanying drawings.

[0019] It should also be understood that although this application has been described with reference to some specific examples, those skilled in the art can certainly implement many other equivalent forms of this application.

[0020] The above and other aspects, features and advantages of this application will become more apparent when taken in conjunction with the accompanying drawings and in view of the following detailed description.

[0021] Specific embodiments of this application are described thereafter with reference to the accompanying drawings; however, it should be understood that the claimed embodiments are merely examples of this application, which can be implemented in various ways. Well-known and / or repeated functions and structures are not described in detail to avoid unnecessary or redundant details that could obscure the application. Therefore, the specific structural and functional details claimed herein are not intended to be limiting, but merely serve as the basis and representative basis for the claims to teach those skilled in the art to use this application in a variety of substantially any suitable detailed structures.

[0022] This specification may use the phrases “in one embodiment,” “in another embodiment,” “in yet another embodiment,” or “in other embodiments,” all of which may refer to one or more of the same or different embodiments according to this application.

[0023] like Figure 1 The conventional LTPS (Low Temperature Poly-Silicon) 7T circuit shown in the image requires the data voltage Vdata of the data line Data to pass through three transistors T2, T1, and T3 sequentially to charge the compensation capacitor CST during the pixel charging stage in order to compensate for the Vth (threshold) voltage. Therefore, the pixel charging speed is slow and it is difficult to further improve the refresh rate.

[0024] On the other hand, because leakage current exists in capacitors T3 and T4 when the compensation capacitor CST maintains its voltage, brightness decay occurs, causing visual flicker. When the refresh rate is higher than 60Hz, the human eye cannot perceive the change due to the fast refresh rate (one frame T≤1 / 60=16.6ms). When the refresh rate is lower than 60Hz, such as 45Hz / 30Hz or even 1Hz, the slow refresh rate exposes the problem, and flicker is clearly visible to the human eye. Therefore, the display is unstable in low refresh rate mode (usually below 60Hz), and LTPS displays will exhibit flickering. Consequently, conventional LTPS OLED displays struggle to maintain stable display in low refresh rate modes below 60Hz, thus preventing a reduction in power consumption.

[0025] Therefore, embodiments of this application provide a pixel circuit and driving method for a display panel, as well as a display panel, to solve the above-mentioned technical problems.

[0026] The pixel circuit and driving method of a display panel, as well as the display panel itself, provided in this application, will be described in detail below with reference to the accompanying drawings.

[0027] This application provides a pixel circuit for a display panel, combined with... Figure 2 As shown, the pixel circuit includes: The target charging path 10 has a first end connected to the data line Data and a second end connected to the first node N1 in the pixel circuit. The target charging path 10 runs in parallel with the original charging path 20 in the pixel circuit. The target charging path 10 and the original charging path 20 charge the original compensation capacitor CST simultaneously through the first node N1 during the charging phase. The target charging path 10 is also used to charge the target compensation capacitor CST' during the charging phase; The target compensation capacitor CST' is used to reduce the leakage current effect of the pixel circuit during the light emission stage.

[0028] The pixel circuit of the display panel provided in this application embodiment, by adding a target charging path 10 and a target compensation capacitor CST', with the target charging path 10 running in parallel with the original charging path 20 in the pixel circuit, allows the target charging path 10 and the original charging path 20 to simultaneously charge the original compensation capacitor CST through the first node N1 during the charging phase. This improves the pixel charging speed and further enhances the refresh rate. Furthermore, during the charging phase, the target charging path 10 also charges the target compensation capacitor CST', reducing the leakage current effect of the pixel circuit during the light-emitting phase and thus balancing the losses caused by leakage current.

[0029] In some embodiments, the target compensation capacitor CST' and the original compensation capacitor CST are used during the light emission stage to reduce the leakage current effect of the pixel circuit.

[0030] Specifically, during the charging phase, the target charging path 10 charges the target compensation capacitor CST', and the target charging path 10 and the original charging path 20 simultaneously charge the original compensation capacitor CST. This enables the target compensation capacitor CST' and the original compensation capacitor CST to provide the compensation current required by the pixel circuit during the light emission phase. This compensation current can compensate for the leakage current that originally existed in the pixel circuit, thereby reducing the impact of leakage current in the pixel circuit.

[0031] In some embodiments, combined with Figure 2 As shown, the target voltage provided by the target compensation capacitor CST' is greater than the original voltage provided by the original compensation capacitor CST, generating a compensation current. The compensation current flows to the first node N1 in the target charging path 10.

[0032] Specifically, the target voltage provided by the target compensation capacitor CST' is greater than the original voltage provided by the original compensation capacitor CST, that is, the voltage of the second node N2 is greater than the voltage of the first node N1. Since there is a voltage difference between the second node N2 and the first node N1, during the light-emitting stage, there is a compensation current flowing from the second node N2 to the first node N1. This compensation current is used to compensate for the leakage current in the pixel circuit (such as T3 and T4), so that there will be no flicker in the visual effect of the display screen at low refresh rate, thereby not only reducing the power consumption of the display screen, but also achieving a lower refresh rate.

[0033] In some embodiments, combined with Figure 2 As shown, the target charging path 10 includes at least a first transistor T8 and a second transistor T9; A second node N2 is set between the first transistor T8 and the second transistor T9, and the target compensation capacitor CST' is connected to the second node N2; During the charging phase, the target compensation capacitor CST' is charged through the second node N2; During the light-emitting phase, the compensation current flows from the second node N2 to the first node N1 in the target charging path 10, and the compensation current flows through the first node N1 to the transistors (such as T3 and T4) that leak current in the pixel circuit during the light-emitting phase.

[0034] In this embodiment, by setting the target charging path 10 in parallel with the original charging path 20 in the pixel circuit, during the charging phase, the target charging path 10 charges the target compensation capacitor CST' through the second node N2, and the target charging path 10 and the original charging path 20 simultaneously charge the original compensation capacitor CST through the first node N1. By charging the original compensation capacitor CST simultaneously through the two charging paths, the pixel charging speed can be improved, thereby further increasing the refresh rate. Since the target voltage provided by the target compensation capacitor CST' is greater than the original voltage provided by the original compensation capacitor CST, the target compensation capacitor CST' and the original compensation capacitor CST can provide the compensation current required by the pixel circuit during the light-emitting phase. This compensation current flows from the second node N2 to the first node N1, and through the first node N1 to the transistors (such as T3 and T4) that leak current in the pixel circuit during the light-emitting phase, thereby compensating for the original leakage current in the pixel circuit and reducing the impact of leakage current in the pixel circuit.

[0035] In some embodiments, during the charging phase, the second transistor T9 is turned off before the first transistor T8, so that the charge obtained by the target compensation capacitor CST' is greater than the charge obtained by the original compensation capacitor CST.

[0036] Specifically, firstly, by controlling the second transistor T9 and the first transistor T8 to be simultaneously turned on (conducted), the data voltage Vdata on the data line Data flows to the first node N1 through the target charging path 10 and the original charging path 20 to charge the original compensation capacitor CST. Simultaneously, the synchronous data voltage Vdata flows to the second node N2 through the target charging path 10 to charge the target compensation capacitor CST'. By charging the target compensation capacitor CST' and the original compensation capacitor CST through two charging paths, the charging time can be shortened. Then, by controlling the second transistor T9 to be turned off for a period of time, while the first transistor T8 continues to conduct, the data voltage Vdata on the data line Data continues to flow to the first node N1 through the original charging path 20, further increasing the voltage of the first node N1, so that the original compensation capacitor CST receives more sufficient charge to ensure compensation for the threshold voltage. The final target compensation capacitor CST' receives more charge than the original compensation capacitor CST. A voltage difference is generated between the second node N2 and the first node N1. Thus, the target compensation capacitor CST' and the original compensation capacitor CST can provide the compensation current required by the pixel circuit during the light-emitting stage. This compensation current flows from the second node N2 to the first node N1. The compensation current flows through the first node N1 to the transistors (such as T3 and T4) that leak current in the pixel circuit during the light-emitting stage, thereby compensating for the original leakage current in the pixel circuit and reducing the impact of leakage current in the pixel circuit.

[0037] The following is combined Figures 2 to 7 As shown, taking 9T2C as an example, the composition and specific working process of the pixel circuit provided in the embodiments of this application are explained in detail.

[0038] See Figure 2 As shown, the pixel circuit provided in this embodiment includes: a target charging path 10, a primary charging path 20, a light-emitting circuit 30, a first reset circuit 41, and a second reset circuit 42. The target charging path 10 includes transistors T8 and T9. The primary charging path 20 includes transistors T2, T1, and T3. The light-emitting circuit 30 includes transistors T5 and T6. The first reset circuit 41 includes transistor T7, and the second reset circuit 42 includes transistor T4.

[0039] Specifically, the connection relationships of the transistors in the pixel circuit are as follows: The first terminal of transistor T1 is connected to the first terminals of transistors T2 and T5 through the third node N3; the second terminal of transistor T1 is connected to the first terminals of transistors T3 and T6 through the fourth node N4; the gate of transistor T1 is connected to the first node N1; the second terminal of transistor T2 is connected to the data line Data; the second terminal of transistor T5 is connected to the first voltage terminal ELVDD; the second terminal of transistor T3 is connected to the first node N1 and the first terminal of transistor T4; the second terminal of transistor T6 is connected to the second voltage terminal ELVSS through the light-emitting element; the second terminal of transistor T4 is connected to the third voltage terminal VI1; the first terminal of transistor T7 is connected to the anode of the light-emitting element; and the second terminal of transistor T7 is connected to the fourth voltage terminal VI2. The first terminal of transistor T8 is connected to the data line Data; the second terminal of transistor T8 is connected to the second node N2; the first terminal of transistor T9 is connected to the second node N2; and the second terminal of transistor T9 is connected to the first node N1. The first voltage terminal ELVDD is connected to the first node N1 through the original compensation capacitor CST, and to the second node N2 through the target compensation capacitor CST'. Here, the first terminal specifically refers to the source or drain of the transistor, and correspondingly, the second terminal specifically refers to the drain or source of the transistor. Optionally, each transistor can be a P-type MOS transistor.

[0040] Alternatively, since dual-gate transistors have two channels, charge is less likely to leak out. Therefore, the leakage current of dual-gate transistors is smaller than that of single-gate transistors. Thus, transistors T3 and T4 can be dual-gate transistors to further reduce the impact of leakage current.

[0041] See Figure 3 As shown, in the first stage of the reset phase, the scan signal Scan1 is turned on, the transistor T7 is turned on, and the voltage at the fourth voltage terminal VI2 resets the anode of the OLED light-emitting device through the transistor T7.

[0042] See Figure 4 As shown, in the second stage of the reset phase, the scan signal Scan2 is turned on, transistor T4 is turned on, and the voltage of the third voltage terminal VI1 is input to the first node N1 through transistor T4 to reset the gate of transistor T1.

[0043] See Figure 5As shown, in the first stage of the charging phase, the scan signals Scan3 and SP* are turned on, and transistors T8, T9, T2, T1, and T3 are all turned on. The data voltage Vdata on the data line Data is input to the first node N1 and the second node N2 through transistors T8 and T9. The data voltage Vdata on the synchronous data line Data is input to the first node N1 through transistors T2, T1, and T3, while charging the target compensation capacitor CST' and the original compensation capacitor CST.

[0044] See Figure 6 As shown, in the second stage of the charging phase, before the voltage of the first node N1 reaches Vdata-|Vth|, the scan signal SP* is turned off, and transistor T9 is turned off. Specifically, the pulse width and time can be adjusted according to simulation and measured values. To better control the compensation current flowing through transistor T9, the VGL voltage of the scan signal SP* can be set separately, so that transistor T9 operates in subthreshold mode to slow down the charging speed and prevent the voltage of the first node N1 from exceeding Vdata-|Vth|.

[0045] With the Scan signal Scan3 continuously active, the data voltage Vdata on the Data line continues to be input to the first node N1 through transistors T2, T1, and T3. Transistor T8 then boosts the voltage of the second node N2 to Vdata, ultimately resulting in VN1 = Vdata - |Vth| and VN2 = Vdata.

[0046] See Figure 7 As shown, during the light-emitting stage, the scan signal Scan3 is off, the voltage of the first node N1 is Vdata-|Vth|, the scan signal EM is on, transistors T5 and T6 are turned on (conducted), and the light-emitting element is powered on to emit light. Since VN2=Vdata>VN1=Vdata-|Vth|, there is a compensation current flowing from the second node N2 to the first node N1 to balance the leakage current effect of transistors T3 and T4 in the pixel circuit, so as to maintain the stability of the low refresh rate. Figure 7 In the diagram, the dashed lines between the first node N1 and the fourth node N4, and the dashed lines between the first node N1 and the third voltage terminal VI1 (red dashed lines) represent the leakage current direction of transistors T3 and T4 during the light-emitting stage. The dashed line between the second node N2 and the first node N1 (blue dashed line) represents the direction of the compensation current flowing through transistor T9.

[0047] Optionally, to reduce the impact of leakage current, transistor T8 is also a dual-gate transistor. Transistor T9 is located between the two nodes. At the end of charging, ΔV = VN1 - VN2, where VN1 is the voltage of the first node N1 and VN2 is the voltage of the second node N2. Since the voltage difference ΔV is relatively small, to further increase the impact of leakage current on transistor T9, a single-gate transistor is used for transistor T9. This increases the leakage current of transistor T9, thereby generating a larger compensation current flowing from the second node N2 to the first node N1 to compensate for the leakage current originally present in the pixel circuit (such as T3 and T4), thus reducing the impact of leakage current in the pixel circuit.

[0048] Furthermore, such as Figure 1 The specific workflow of the conventional pixel circuit shown is as follows: During the charging phase, the scan signal Scan3 is negatively charged, and transistors T2 and T3 are turned on (conducting). The data voltage Vdata on the data line Data flows to the first node N1 through transistors T2, T1, and T3 to charge the original compensation capacitor CST. The pixel charging speed is slow, and it is difficult to further improve the refresh rate. Finally, at the third node N3 = Vdata, and at the fourth node N4 = N1 = N3 - |Vth| = Vdata - |Vth|. The voltage at one end of the original compensation capacitor CST is VELVDD, and the voltage at the other end of the compensation capacitor CST is Vdata - |Vth|. The original compensation capacitor CST stores this voltage difference.

[0049] During the light-emitting stage, the scanning signal EM is turned on, transistors T5 and T6 are turned on (conducted), and the light-emitting element is powered on to emit light.

[0050] In low refresh rate mode (typically less than 60Hz), leakage current in T3 and T4 causes current fluctuations, resulting in visual flickering in the LTPS OLED display. Consequently, the power consumption of the LTPS OLED display cannot be reduced. Therefore, the minimum refresh rate in current LTPS applications is generally locked at 60Hz, and lower refresh rates cannot be achieved.

[0051] In comparison, see Figures 2 to 7 The pixel circuit provided in the embodiment of this application, as shown, has the following specific working process: During the charging phase, the scan signals Scan3 and SP* are negatively charged, and transistors T2, T3, T8, and T9 are turned on (conducted). The data voltage Vdata on the data line is input to the first node through two charging paths (T2-T1-T3, T8-T9), synchronously charging the original compensation capacitor CST, and charging the target compensation capacitor CST' through transistor T8.

[0052] As mentioned earlier, transistor T9 turns off before transistor T8, resulting in VN2 = VN3 = Vdata, VN1 = VN4 = Vdata - |Vth|. The voltage across one end of the original compensation capacitor CST is VELVDD, and the voltage across the other end is Vdata - |Vth|. The original compensation capacitor CST stores this voltage difference. The voltage across one end of the target compensation capacitor CST' is VELVDD, and the voltage across the other end is Vdata. The target compensation capacitor CST' stores this voltage difference.

[0053] During the light-emitting stage, the scanning signal EM is turned on, transistors T5 and T6 are turned on (conducted), and the light-emitting element is powered on to emit light.

[0054] In low refresh rate mode (typically when the refresh rate is less than 60Hz), due to the voltage difference between the second node N2 and the first node N1, there is a compensation current from the second node N2 to the first node N1 during the light-emitting stage to compensate for the leakage current of transistors T3 and T4. This can stabilize the potential of the first node N1 to a certain extent, so there will be no flickering on the screen in low refresh rate mode.

[0055] In this embodiment, the original compensation capacitor CST is charged synchronously through two charging paths, and the target compensation capacitor CST' is charged through transistor T8. Optionally, transistor T8 can be made into a TFT with higher path efficiency, which can further shorten the charging time. Since the two charging paths charge simultaneously, the charging time is greatly reduced, and the refresh rate is also significantly improved. Before the potential of the first node N1 reaches Vdata-|Vth|, the scan signal SP* is turned off in advance, transistor T9 is turned off, and the scan signal Scan3 is turned off after the scan signal SP* is turned off for a period of time, which turns off transistors T2 and T3. This shortens the charging time and ensures compensation for the threshold voltage, thus achieving a higher refresh rate.

[0056] Since the voltage of the first node N1 is Vdata -|Vth| and the voltage of the second node N2 is Vdata, during the light-emitting stage, there is a compensation current from the second node N2 to the first node N1, which can stabilize the potential of the first node N1 to a certain extent, making it easier to achieve low-brush stability.

[0057] Optionally, the pixel circuit provided in this application embodiment can achieve at least twice the refresh rate, that is, above 360Hz, by charging simultaneously through two charging paths.

[0058] When the refresh rate of an LTPS display is below 60Hz, i.e. the display is in a low refresh rate state, the leakage current of the TFT transistors in the pixel circuit will cause the brightness to decrease and cause visual flicker.

[0059] When the refresh rate of an LTPS display is higher than 60Hz, the human eye cannot perceive the change due to the fast refresh rate (one frame T≤1 / 60=16.6ms). However, when the refresh rate is lower than 60Hz, such as 45Hz, 30Hz, or even 1Hz, the slow refresh rate exposes the problem, and flicker is clearly visible to the human eye. The pixel circuit provided in this application, during the charging phase, when N2=Vdata and N1=Vdata-|Vth|, generates a compensation current in the N2-N1 direction to compensate for the leakage current of transistors T3 and T4. This solves the screen flicker problem below 60Hz, achieving a lower refresh rate and reducing screen power consumption. Figure 7 As shown, during the light-emitting phase, the voltage of the first node N1 is Vdata. Vth, the voltage of the second node N2 is Vdata. Due to the potential difference between the second node N2 and the first node N1, a compensation current is formed in the target charging path, pointing from the second node N2 to the first node N1. This compensation current flows through the target charging path to the first node N1, and further to the transistor that has leakage current during the light-emitting stage. It should be noted that the direction of this compensation current is opposite to the direction of node potential decay caused by leakage current in the pixel circuit, thus canceling or offsetting the potential drop caused by leakage current. In this way, the probability of brightness fluctuation and visual flicker can be reduced in low refresh rate mode, thereby improving the display stability of the display panel under low refresh rate conditions.

[0060] In addition, to further optimize the stability of low refresh rates, if the routing space allows, a T1 source reset circuit and a matching Scan' timing signal can be added to reset the anode of the light-emitting element and the source of transistor T1 twice, before and after the charging phase.

[0061] In some embodiments, referring to FIG8, the pixel circuit provided in this application embodiment may further include a third reset circuit 43, which may include a transistor T10. The first terminal of transistor T10 is connected to the third node N3, and the second terminal of transistor T7 is connected to the fifth voltage terminal VI3. Optionally, transistor T10 may be a P-type MOS transistor.

[0062] Specifically, the workflow of this pixel circuit is as follows: First, in the first stage of the reset phase, the scan signal Scan' is turned on, transistors T7 and T10 are turned on, the voltage of the fourth voltage terminal VI2 resets the anode of the OLED light-emitting device through transistor T7, and the voltage of the fifth voltage terminal VI3 resets the source of transistor T1 through transistor T10.

[0063] Subsequently, in the second stage of the reset phase, the scan signal Scan2 is turned on, transistor T4 is turned on, and the voltage at the third voltage terminal VI1 is input to the first node N1 through transistor T4, resetting the gate of transistor T1.

[0064] Subsequently, in the first stage of the charging phase, the scan signals Scan3 and SP* are turned on, and transistors T8, T9, T2, T1, and T3 are all turned on. The data voltage Vdata on the data line Data is input to the first node N1 and the second node N2 through transistors T8 and T9. The data voltage Vdata on the synchronization data line Data is input to the first node N1 through transistors T2, T1, and T3, while simultaneously charging the target compensation capacitor CST' and the original compensation capacitor CST.

[0065] Subsequently, in the second stage of the charging phase, before the voltage of the first node N1 reaches Vdata-|Vth|, the scan signal SP* is turned off, and transistor T9 is turned off. Specifically, the pulse width and time can be adjusted according to simulation and measured values. To better control the compensation current flowing through transistor T9, the VGL voltage of the scan signal SP* can be set separately, so that transistor T9 operates in subthreshold mode to slow down the charging speed and prevent the voltage of the first node N1 from exceeding Vdata-|Vth|. The scan signal Scan3 remains on, and the data voltage Vdata on the data line Data continues to be input to the first node N1 through transistors T2, T1, and T3. The voltage of the second node N2 is raised to Vdata through transistor T8, and finally VN1=Vdata-|Vth|, VN2=Vdata.

[0066] Then, in the third stage of the reset phase, the scan signal Scan' is turned on again, transistors T7 and T10 are turned on again, the voltage of the fourth voltage terminal VI2 resets the anode of the OLED light-emitting device again through transistor T7, and the voltage of the fifth voltage terminal VI3 resets the source of transistor T1 again through transistor T10.

[0067] Finally, during the light-emitting stage, the scan signal Scan3 is turned off, the voltage of the first node N1 is Vdata-|Vth|, the scan signal EM is turned on, and the OLED pixel is powered on to emit light. Since VN2=Vdata>VN1=Vdata-|Vth|, there is a compensation current flowing from the second node N2 to the first node N1 to balance the leakage current of transistors T3 and T4 in the pixel circuit, so as to maintain the stability of the low refresh rate. Figure 7 In the diagram, the dashed lines between the first node N1 and the fourth node N4, and the dashed lines between the first node N1 and the third voltage terminal VI1 (red dashed lines) represent the leakage current direction of transistors T3 and T4 during the light-emitting stage. The dashed line between the second node N2 and the first node N1 (blue dashed line) represents the direction of the compensation current flowing through transistor T9.

[0068] The embodiments of this application further optimize the stability of low refresh rates by resetting the anode of the light-emitting element and the source of the transistor T1 twice, before and after the charging phase.

[0069] This application provides a driving method for the pixel circuit of a display panel, applied to the pixel circuit of the display panel as provided in any of the above embodiments. The driving method for the pixel circuit of the display panel includes: During the charging phase, the original compensation capacitor is charged simultaneously through the parallel target charging path and the original charging path in the pixel circuit, and the target charging path also charges the target compensation capacitor; wherein, the target compensation capacitor is used to reduce the leakage current effect of the pixel circuit during the light emission phase.

[0070] The pixel circuit driving method for the display panel provided in this application embodiment, during the charging phase, simultaneously charges the original compensation capacitor through two parallel charging paths in the pixel circuit, which can further improve the pixel charging speed and thus further improve the refresh rate. Furthermore, during the charging phase, the target charging path also charges the target compensation capacitor, thereby reducing the leakage current effect of the pixel circuit during the light-emitting phase and balancing the losses caused by leakage current.

[0071] In some embodiments, the method for driving the pixel circuitry of the display panel further includes: During the charging phase, the target voltage provided by the target compensation capacitor is greater than the original voltage provided by the original compensation capacitor, resulting in a compensation current. During the light-emitting phase, the compensation current flows to the first node in the target charging path.

[0072] In some embodiments, the target charging path includes at least a first transistor and a second transistor, a second node is disposed between the first transistor and the second transistor, and a target compensation capacitor is connected to the second node; the driving method for the pixel circuit of the display panel further includes: During the charging phase, the target compensation capacitor is charged through the second node; During the light-emitting phase, the compensation current flows from the second node to the first node in the target charging path, and the compensation current flows through the first node to the transistor of the pixel circuit that leaks current during the light-emitting phase.

[0073] In some embodiments, the method for driving the pixel circuitry of the display panel further includes: During the charging phase, the second transistor is turned off before the first transistor, so that the charge obtained by the target compensation capacitor is greater than the charge obtained by the original compensation capacitor.

[0074] This application provides a display panel comprising a pixel matrix composed of multiple pixel units, each pixel unit having a pixel circuit including: The target charging path has a first end connected to the data line and a second end connected to the first node in the pixel circuit. The target charging path runs in parallel with the original charging path in the pixel circuit. The target charging path and the original charging path charge the original compensation capacitor simultaneously through the first node during the charging phase. The target charging path is also used to charge the target compensation capacitor during the charging phase; The target compensation capacitor is used to reduce the leakage current effect of the pixel circuit during the light emission stage.

[0075] The display panel provided in this application embodiment includes a pixel matrix composed of multiple pixel units. Each pixel unit has a pixel circuit including a target charging path and a target compensation capacitor. The target charging path runs parallel to the original charging path in the pixel circuit. During the charging phase, the target charging path and the original charging path simultaneously charge the original compensation capacitor through a first node, thereby improving the pixel charging speed and further increasing the refresh rate. Furthermore, during the charging phase, the target charging path also charges the target compensation capacitor, which reduces the leakage current effect of the pixel circuit during the light-emitting phase, thereby balancing the losses caused by leakage current.

[0076] The above embodiments are merely exemplary embodiments of this application and are not intended to limit this application. The scope of protection of this application is defined by the claims. Those skilled in the art can make various modifications or equivalent substitutions to this application within its substance and scope of protection, and such modifications or equivalent substitutions should also be considered to fall within the scope of protection of this application.

Claims

1. A pixel circuit for a display panel, comprising: A target charging path is provided, wherein the first end of the target charging path is connected to the data line, the second end of the target charging path is connected to the first node in the pixel circuit, the target charging path is parallel to the original charging path in the pixel circuit, and the target charging path and the original charging path charge the original compensation capacitor simultaneously through the first node during the charging phase. The target charging path is also used to charge the target compensation capacitor during the charging phase. The target compensation capacitor is used to reduce the leakage current effect of the pixel circuit during the light emission stage.

2. The pixel circuit according to claim 1, wherein the target compensation capacitor and the original compensation capacitor operate during the light-emitting stage to reduce the leakage current effect of the pixel circuit.

3. In the pixel circuit according to claim 2, the target voltage provided by the target compensation capacitor is greater than the original voltage provided by the original compensation capacitor to generate a compensation current, and the compensation current flows to the first node in the target charging path.

4. The pixel circuit according to claim 1 or 3, The target charging path includes at least a first transistor and a second transistor; A second node is provided between the first transistor and the second transistor, and the target compensation capacitor is connected to the second node; During the charging phase, the target compensation capacitor is charged through the second node; During the light-emitting phase, the compensation current flows from the second node to the first node in the target charging path, and the compensation current flows through the first node to the transistor of the pixel circuit that leaks current during the light-emitting phase.

5. The pixel circuit according to claim 4, wherein during the charging phase, the second transistor is turned off before the first transistor, so that the charge obtained by the target compensation capacitor is greater than the charge obtained by the original compensation capacitor.

6. A method for driving pixel circuits in a display panel, the method comprising: During the charging phase, the original compensation capacitor is charged simultaneously through the parallel target charging path and the original charging path in the pixel circuit, and the target charging path also charges the target compensation capacitor; wherein, the target compensation capacitor is used to reduce the leakage current effect of the pixel circuit during the light emission phase.

7. The method according to claim 6, further comprising: During the charging phase, the target voltage provided by the target compensation capacitor is greater than the original voltage provided by the original compensation capacitor, thereby generating a compensation current. During the light-emitting phase, the compensation current flows to the first node through the target charging path.

8. The method according to claim 1 or 7, wherein the target charging path includes at least a first transistor and a second transistor, a second node is provided between the first transistor and the second transistor, and the target compensation capacitor is connected to the second node; The method further includes: During the charging phase, the target compensation capacitor is charged through the second node; During the light-emitting phase, the compensation current flows from the second node to the first node in the target charging path, and the compensation current flows through the first node to the transistor of the pixel circuit that leaks current during the light-emitting phase.

9. The method according to claim 8, further comprising: During the charging phase, the second transistor is turned off before the first transistor, so that the charge obtained by the target compensation capacitor is greater than the charge obtained by the original compensation capacitor.

10. A display panel comprising a pixel matrix composed of multiple pixel units, each pixel unit having pixel circuitry including: A target charging path is provided, wherein the first end of the target charging path is connected to the data line, the second end of the target charging path is connected to the first node in the pixel circuit, the target charging path is parallel to the original charging path in the pixel circuit, and the target charging path and the original charging path charge the original compensation capacitor simultaneously through the first node during the charging phase. The target charging path is also used to charge the target compensation capacitor during the charging phase. The target compensation capacitor is used to reduce the leakage current effect of the pixel circuit during the light emission stage.

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