Broadband laminated patch antenna unit suitable for phased array system, preparation method and application

Abstract

The invention discloses a broadband laminated patch antenna unit suitable for a phased array system, the broadband laminated patch antenna unit comprises a parasitic radiation layer and a main radiation layer from top to bottom, and the parasitic radiation layer comprises a dielectric plate and a rectangular parasitic patch formed on the dielectric plate; the main radiation layer comprises a multi-layer rewiring structure, and the top metal of the main radiation layer is patterned into an E-type radiation patch; the antenna unit and the antenna unit are laminated and attached through insulation paste, and the working bandwidth of the antenna unit is obviously expanded through electromagnetic coupling. The invention also discloses a preparation method of the antenna unit, an antenna array comprising the antenna unit, and a phased array front-end module which is subjected to three-dimensional stacked packaging through a heterogeneous integration process. The antenna has the characteristics of low profile, large bandwidth, easiness in integration with an advanced packaging process and the like, and is suitable for a high-density phased array system.

Description

Technical Field

[0001] This invention relates to millimeter-wave communication and radio frequency integrated circuit technology, specifically to a broadband stacked patch antenna element suitable for phased array systems, its fabrication method, and its application. Background Technology

[0002] With the large-scale commercial deployment of 5G technology and the research on 6G, the demand for spectrum resources for communication equipment is increasing. Millimeter-wave high-frequency bands, due to their abundant available bandwidth, have become a key potential frequency band for achieving ultra-high-speed wireless communication. However, the development of millimeter-wave high-frequency communication systems currently faces several significant challenges, mainly for the following three reasons: First, compared to low-frequency signals, millimeter-wave high-frequency bands are subject to higher atmospheric attenuation. Second, limited by circuit performance, single-channel millimeter-wave high-frequency transmitters struggle to achieve high output power. These two factors limit the transmission distance of millimeter-wave high-frequency communication systems, making phased array technology an effective solution. Antenna element arrays help improve beam gain, while phased array technology enables digitally controlled beamforming, improving the signal-to-noise ratio by optimizing the antenna angles of the transceiver system, thereby extending the communication transmission distance. Third, because millimeter-wave high-frequency band wavelengths are in the millimeter range, the size of a single channel of RF devices is severely limited, making it difficult to implement on a printed circuit board (PCB) using discrete chips. Furthermore, each independent transceiver chip requires its own components, potentially including mixers and switches, making it difficult to control the cost of phased array systems. For phased array systems, multiple transceiver channels need to be integrated within a limited area, which places extremely high demands on system architecture, interconnection technology, and heat dissipation design.

[0003] In 2016, Dean Malta from RTI International in the United States proposed a heterogeneous 3D integrated millimeter-wave high-frequency phased array radar based on a SiGeBiCMOS beamforming chip. This system integrates 64 patch antenna elements, providing support for the feasibility of advanced 3D heterogeneous integration methods for millimeter-wave phased array technology. In 2019, Ahmed S. Ahmed from the University of California, Santa Barbara reported a millimeter-wave high-frequency transmitter and receiver using heterogeneous integration of InP HBT and Si CMOS. The transmitter has a saturation output power of 16 dBm at 90 GHz, and the receiver channel can provide a small signal gain of 26 dB at 58.6 mW DC power.

[0004] In 2021, Yang Xiao from the Microwave and Radio Frequency Technology Center at Shanghai Jiao Tong University proposed a high-performance, compact frequency-modulated continuous wave radar sensor at 94 GHz, with an output power of up to 22 dBm. This sensor provides a dynamic range of 55 dB at a 2 m position. In 2022, Ching-Wen Chiang from National Chiao Tung University in Taiwan introduced a cost-effective millimeter-wave high-frequency antenna-level package using IPD and PCB technologies. The resulting packaged antenna achieved a gain of 3.75 dBi and an impedance bandwidth of -10 dB at 94.5 GHz.

[0005] Therefore, it is evident that researching and realizing highly integrated, miniaturized wideband phased array antennas and corresponding phased array systems using heterogeneous integration technology is of great practical significance for solving the enormous challenges faced by millimeter-wave high-frequency communication systems. Summary of the Invention

[0006] The purpose of this invention is to propose a broadband stacked patch antenna element, its fabrication method, and its application suitable for phased array systems. It aims to solve the problems of poor compatibility and integration difficulties between existing millimeter-wave high-frequency antenna designs and high-precision packaging and interconnection processes, as well as the difficulty in achieving precise coupling spacing control in the millimeter-wave band using traditional structures.

[0007] The technical solution to achieve the purpose of this invention is: a broadband stacked patch antenna unit suitable for phased array systems, comprising a parasitic radiation layer (110), an insulating adhesive layer (120), and a main radiation layer (130) stacked from top to bottom.

[0008] The parasitic radiation layer (110) includes a first dielectric substrate (111) and an upper rectangular parasitic patch (112) formed on the upper surface of the first dielectric substrate.

[0009] The main radiating layer (130) includes a multi-layer redistribution layer (131), the top metal of which is patterned to form a bottom E-type radiating patch (132).

[0010] The parasitic radiation layer (110) and the main radiation layer (130) are bonded and fixed together by an insulating adhesive layer (120);

[0011] The upper rectangular parasitic patch (112) and the lower E-type radiating patch (132) extend the working bandwidth of the antenna through electromagnetic coupling.

[0012] Furthermore, the first dielectric substrate (111) is a high-frequency substrate; the bottom E-type radiating patch (132) has two parallel longitudinal slits formed by etching process; the upper rectangular parasitic patch (112) and the bottom E-type radiating patch (132) are aligned with each other.

[0013] Furthermore, the multilayer redistribution layer (131) includes at least two copper metal layers: an upper metal layer patterned to form the bottom E-type radiating patch (132), and a lower metal layer for signal interconnection and redistribution; each metal layer is isolated by a polyimide dielectric layer and the interlayer electrical connection is achieved through polyimide metal vias; the lower metal layer includes signal routing traces, signal distribution traces, and the radio frequency ground of the antenna.

[0014] Furthermore, the insulating adhesive layer (120) is an epoxy resin adhesive with a thickness between 10 μm and 100 μm and a dielectric constant between 2.0 and 4.0.

[0015] An antenna array comprising the aforementioned broadband stacked patch antenna elements, wherein multiple broadband stacked patch antenna elements are integrated in a periodic arrangement to form a one-dimensional linear array or a two-dimensional area array; the multilayer redistribution layer (131) of the main radiating layer (130) is a shared interconnect substrate, on which multiple bottom E-type radiating patches (132) are arrayed, and an independent upper rectangular parasitic patch (112) is correspondingly disposed above each bottom E-type radiating patch (132); the arrangement spacing of the multiple broadband stacked patch antenna elements is half a wavelength, and each bottom E-type radiating patch (132) is connected to the pad of the RF chip through independent upper and lower metal layer traces and polyimide metal vias below it.

[0016] A method for fabricating the broadband stacked patch antenna element includes the following steps:

[0017] Step 201: Prepare the main radiation layer (130). On the resin carrier, through deposition, photolithography and electroplating processes, a multilayer redistribution layer (131) is formed sequentially, including a lower metal layer, an upper metal layer, a polyimide dielectric layer and vias. The upper metal layer is then patterned to form the bottom E-type radiation patch (132).

[0018] Step 202: Prepare a parasitic radiation layer (110) and form an upper rectangular parasitic patch (112) by patterning on the upper surface of the first dielectric substrate (111).

[0019] Step 203: Apply an insulating adhesive layer (120) to the surface of the upper metal layer of the main radiating layer (130), align the parasitic radiating layer (110) with the main radiating layer (130), align the upper rectangular parasitic patch (112) with the bottom E-type radiating patch (132) at the center, and press and cure the adhesive layer (120) to complete the stacking integration.

[0020] Furthermore, in step 203, the pressing and curing includes applying pressure and heating to cure the insulating adhesive layer (120); in step 201, the resin carrier is the chip feed layer (140), which is used to provide feed input to the antenna unit.

[0021] A phased array front-end module, comprising:

[0022] Antenna array;

[0023] as well as,

[0024] A chip feed layer (140) connected to the antenna array is provided, which encapsulates at least one beamforming chip and at least one mixer chip and is connected to external solder balls through a vertical interconnect structure (141).

[0025] Furthermore, the chip feed layer (140) includes a resin substrate, the resin substrate having periodic openings and being filled with metal to form a TMV structure, the TMV structure being used to realize vertical interconnection between the antenna array and an external signal substrate.

[0026] Furthermore, the bottom of the TMV structure is arrayed with balls to form a ball grid array package; the ball grid array package is electrically connected to the lower multilayer signal substrate through reflow soldering.

[0027] Compared with the prior art, the significant advantages of this invention are:

[0028] 1) Superior broadband performance: By optimizing the shape of the upper parasitic patch and the coupling distance with the lower radiating patch (controlled by the insulating adhesive layer), multiple resonant modes can be effectively excited, achieving an impedance bandwidth (e.g., >10%) that is superior to that of traditional single-layer patches in the millimeter-wave high-frequency band.

[0029] 2) Compatible with advanced packaging processes: The main radiator of the antenna is itself part of the package interconnect (RDL top layer), eliminating additional transition structures and connection losses between the antenna and the chip. The overall integration of the antenna is completed through standard chip mounting, lamination and other packaging processes, simplifying the system assembly complexity.

[0030] 3) Flexible and scalable design: This structure is easy to construct into large-scale planar arrays. By designing different upper-layer parasitic patch patterns, the frequency, bandwidth, and radiation characteristics of the antenna can be flexibly adjusted to meet different application requirements. Attached Figure Description

[0031] Figure 1 This is a schematic cross-sectional view of the stacked antenna unit in Embodiment 1 of the present invention.

[0032] Figure 2 This is the process for preparing the stacked antenna element in Embodiment 1 of the present invention.

[0033] Figure 3 The above are the simulation results of the S-parameters of the antenna in Embodiment 1 of the present invention.

[0034] Figure 4 The above is the simulation result of the antenna radiation pattern in Embodiment 1 of the present invention.

[0035] Figure 5 This is a schematic diagram of the 8-element antenna array in Embodiment 2 of the present invention. Detailed Implementation

[0036] This invention proposes a broadband stacked patch antenna element suitable for phased array systems, its fabrication method, and its application. The core concept lies in integrating the main radiating part of the antenna with the system's multi-layer high-density interconnects (such as redistribution layers, RDLs) into a single design, while simultaneously designing the parasitic radiating part as an independent, attachable module. Specifically:

[0037] The main radiating layer is not fabricated on a regular PCB board, but rather directly utilizes the top metal layer (M2 layer) of the multilayer redistribution layer (RDL) in advanced packaging to create the bottom radiating patch. This RDL layer also serves as the chip's signal fan-out, interconnect, and antenna feed network.

[0038] Parasitic radiation structure: As an independent device, an upper parasitic patch is fabricated on a thin dielectric substrate.

[0039] Integration method: The two are precisely bonded together using an insulating adhesive with controllable thickness and dielectric constant. This design simplifies the complex "dielectric-radiator" stacked structure into a high-precision bonding process between a "prefabricated antenna substrate" and a "prefabricated parasitic patch," which better matches the existing process capabilities in the semiconductor packaging field.

[0040] Example 1:

[0041] like Figure 1 and Figure 2 As shown, this embodiment provides a broadband stacked patch antenna unit suitable for phased array systems, including a parasitic radiating layer 110, a main radiating layer 130, and an insulating adhesive layer 120. The antenna is fed by a chip feeding layer 140.

[0042] The parasitic radiation layer 110 uses a 75μm thick Panasonic MEGTRON 6 high-frequency substrate as the first dielectric substrate 111. A rectangular parasitic patch 112 is formed on its upper surface by metallization.

[0043] The insulating adhesive layer 120 is made of epoxy resin with a dielectric constant of 3.6. The epoxy resin is coated onto the surface of the M2 layer (i.e., the bottom E-type radiating patch 132) of the main radiating layer 130 by spin coating, forming an adhesive film with a thickness of about 20 μm.

[0044] The core of the main radiating layer 130 is a multilayer redistribution (RDL) layer 131. This RDL layer 131 uses polyimide (PI) as the dielectric and contains two copper metal layers. The lower metal layer (M1 layer) includes complex interconnect traces for signal routing and distribution, as well as the antenna's RF ground. The upper metal layer (M2 layer) forms a bottom E-type radiating patch 132 through patterned metal, which is connected to a designated feed point through vias and traces in the M1 layer. The E-type structure is formed by etching two parallel, elongated slits on a rectangular patch to adjust coupling resonance characteristics.

[0045] During assembly, the upper rectangular parasitic patch 112 of the parasitic radiating structure 110 is aligned with the main radiating layer 130 coated with uncured insulating adhesive 120, with one side facing upwards, ensuring that the center of the upper rectangular parasitic patch 112 coincides with the center of the lower E-type radiating patch 132. Then, a certain pressure and heat are applied to cure the insulating adhesive 120, thereby firmly bonding the two together as a whole. At this point, the upper rectangular parasitic patch 112 and the lower E-type radiating patch 132 together constitute a broadband stacked antenna.

[0046] The above-mentioned broadband stacked antenna element was simulated using commercial full-wave simulation software. The relevant simulation results are as follows: Figure 3 and Figure 4 As shown, the broadband stacked antenna element S11<-10dB has a bandwidth of approximately 84-96GHz and a peak gain of approximately 2.94dBi at 92GHz.

[0047] Example 2:

[0048] like Figure 5 As shown, based on the antenna element of Embodiment 1, this embodiment provides a 2×4 antenna array.

[0049] First, the main radiating layer 130 is expanded into a 2×4 array of bottom radiating patches. Within the RDL layer, eight regularly arranged bottom E-type radiating patches 132 are etched at half-wavelength (approximately 1.6 mm) intervals. Each bottom E-type radiating patch 132 is connected to the pads of the RF chip through independent M2 and M1 layer traces and vias between them.

[0050] Next, the parasitic radiation layer 110 is correspondingly expanded into a periodic array. A rectangular parasitic patch array is fabricated on a large-size, thin, high-frequency dielectric substrate with the same half-wavelength spacing.

[0051] During integration, an insulating adhesive layer 120 is applied to the entire surface of the RDL layer, and the parasitic radiation layer 110 is then mounted to the corresponding positions, aligning each upper rectangular parasitic patch 112 with each lower E-type radiation patch 132. The integration is then completed through uniform hot-pressing and curing. This method reduces the difficulty of assembly.

[0052] Example 3:

[0053] This embodiment provides a heterogeneous integrated phased array front-end module that integrates the antenna array and active circuit described in Embodiment 2.

[0054] First, at least one beamforming chip and at least one mixer chip are packaged inside a resin substrate. Periodic openings are made inside the resin substrate and filled with metal to form a TMV (molded through-hole) structure, serving as a vertical interconnect structure. Ball arrays are then placed at the bottom of the TMV structure to complete the BGA (ball grid array) package.

[0055] Then, according to Example 1 Figure 2 The process shown in Example 2 Figure 5 The structure shown completes the fabrication of the array antenna on the resin substrate, enabling the antenna array to form an electrical connection with the chip feed layer 140.

[0056] Finally, the entire structure described above is soldered to the bottom multilayer signal substrate via reflow soldering. This substrate provides the packaged chip with DC power, SPI control signals, and intermediate frequency and local oscillator signals, thereby realizing a complete three-dimensional heterogeneous integrated phased array front-end module.

[0057] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A broadband stacked patch antenna element suitable for phased array systems, characterized in that, It includes a parasitic radiation layer (110), an insulating adhesive layer (120), and a main radiation layer (130) stacked from top to bottom. The parasitic radiation layer (110) includes a first dielectric substrate (111) and an upper rectangular parasitic patch (112) formed on the upper surface of the first dielectric substrate. The main radiating layer (130) includes a multi-layer redistribution layer (131), the top metal of which is patterned to form a bottom E-type radiating patch (132). The parasitic radiation layer (110) and the main radiation layer (130) are bonded and fixed together by an insulating adhesive layer (120); The upper rectangular parasitic patch (112) and the lower E-type radiating patch (132) extend the working bandwidth of the antenna through electromagnetic coupling.

2. The broadband stacked patch antenna element suitable for phased array systems according to claim 1, characterized in that, The first dielectric substrate (111) is a high-frequency board; the bottom E-type radiating patch (132) has two parallel longitudinal slits formed by etching process; the upper rectangular parasitic patch (112) and the bottom E-type radiating patch (132) are aligned with each other.

3. The broadband stacked patch antenna element suitable for phased array systems according to claim 1, characterized in that, The multilayer redistribution layer (131) includes at least two copper metal layers: an upper metal layer patterned to form the bottom E-type radiating patch (132), and a lower metal layer for signal interconnection and redistribution; each metal layer is isolated by a polyimide dielectric layer and the interlayer electrical connection is achieved through polyimide metal vias; the lower metal layer includes signal routing traces, signal distribution traces, and the radio frequency ground of the antenna.

4. The broadband stacked patch antenna element suitable for phased array systems according to claim 1, characterized in that, The insulating adhesive layer (120) is an epoxy resin adhesive with a thickness between 10 μm and 100 μm and a dielectric constant between 2.0 and 4.

0.

5. An antenna array comprising the broadband laminated patch antenna element according to any one of claims 1-4, characterized in that, Multiple broadband stacked patch antenna units are integrated in a periodic arrangement to form a one-dimensional linear array or a two-dimensional area array; the multi-layer redistribution layer (131) of the main radiating layer (130) is a shared interconnect substrate, on which multiple bottom E-type radiating patches (132) are arrayed, and an independent upper rectangular parasitic patch (112) is set above each bottom E-type radiating patch (132); the arrangement spacing of the multiple broadband stacked patch antenna units is half a wavelength, and each bottom E-type radiating patch (132) is connected to the pad of the RF chip through independent upper and lower metal layer traces and polyimide metal vias.

6. A method for preparing a broadband laminated patch antenna element as described in any one of claims 1-4, characterized in that, Includes the following steps: Step 201: Prepare the main radiation layer (130). On the resin carrier, through deposition, photolithography and electroplating processes, a multilayer redistribution layer (131) is formed sequentially, including a lower metal layer, an upper metal layer, a polyimide dielectric layer and vias. The upper metal layer is then patterned to form the bottom E-type radiation patch (132). Step 202: Prepare a parasitic radiation layer (110) and form an upper rectangular parasitic patch (112) by patterning on the upper surface of the first dielectric substrate (111). Step 203: Apply an insulating adhesive layer (120) to the surface of the upper metal layer of the main radiating layer (130), align the parasitic radiating layer (110) with the main radiating layer (130), align the upper rectangular parasitic patch (112) with the bottom E-type radiating patch (132) at the center, and press and cure the adhesive layer (120) to complete the stacking integration.

7. The method according to claim 6, characterized in that, In step 203, the pressing and curing includes applying pressure and heating to cure the insulating adhesive layer (120); in step 201, the resin carrier is the chip feed layer (140), which is used to provide feed input to the antenna unit.

8. A phased array front-end module, characterized in that, include: The antenna array as described in claim 5; as well as, A chip feed layer (140) connected to the antenna array is provided, which encapsulates at least one beamforming chip and at least one mixer chip and is connected to external solder balls through a vertical interconnect structure (141).

9. The phased array front-end module according to claim 8, characterized in that, The chip feed layer (140) includes a resin substrate, the resin substrate having periodic openings and being filled with metal to form a TMV structure, the TMV structure being used to realize vertical interconnection between the antenna array and an external signal substrate.

10. The phased array front-end module according to claim 9, characterized in that, The bottom of the TMV structure is arrayed with balls to form a ball grid array package; the ball grid array package is electrically connected to the lower multilayer signal substrate through reflow soldering.

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