Tunneling magnetoresistance enhancement method of magnetic tunnel junction and magnetic tunnel junction

Abstract

The invention discloses a tunneling magnetoresistance enhancing method of a magnetic tunnel junction and the magnetic tunnel junction, and belongs to the technical field of functional material preparation and spintronics. The method comprises the following steps: S1, sequentially depositing a buffer layer and a pinning layer comprising a first coupling layer on a substrate; s2, before the MgO barrier layer is deposited, carrying out pre-annealing treatment on the pinning layer; s3, sequentially depositing a second coupling layer, a reference layer, an MgO barrier layer, a free layer and a protective layer on the pre-annealed pinning layer to form a full-film stack structure; and S4, carrying out sectional gradient annealing treatment on the whole membrane stack, wherein the treatment comprises four stages of low-temperature interface repair, medium-temperature lattice optimization, high-temperature spin strengthening and gradient cooling which are sequentially carried out. The invention also provides the magnetic tunnel junction prepared by the method. Through the synergistic effect of pre-annealing and segmented gradient annealing, the interface defects are eliminated, the MgO crystal structure is optimized, spin-orbit coupling is strengthened, and the tunneling magnetoresistance efficiency is remarkably improved.

Description

Technical Field

[0001] This invention belongs to the field of functional material preparation and spintronics technology, specifically relating to a method for enhancing the tunneling magnetoresistance of a magnetic tunnel junction and the magnetic tunnel junction itself. Background Technology

[0002] A magnetic tunnel junction (MTJ) is a nanoscale heterostructure consisting of two ferromagnetic layers and an insulating tunneling barrier layer sandwiched between them. Its operating principle is based on the spin-dependent tunneling (SDT) effect. When the magnetization directions of the two ferromagnetic layers are parallel, the tunneling resistance is low; when the magnetization directions are antiparallel, the tunneling resistance increases. This phenomenon is called tunneling magnetoresistance (TMR). Due to its excellent spintronic properties and broad application prospects, the MTJ has become a hot topic in spintronics research and development, particularly in magnetic random access memory (MRAM), magnetic sensors, and spin logic devices.

[0003] The magnitude of tunneling magnetoresistance (TMR) is closely related to several factors, among which the material selection, thickness, interface quality, and crystal structure of the insulating tunneling barrier layer play a crucial role in TMR performance. Studies have shown that MgO, as an insulating tunneling barrier layer material, can significantly improve the tunneling magnetoresistance performance of magnetic tunnel junctions due to its unique crystal structure and electronic properties. MgO has a face-centered cubic crystal structure, and its (001) crystal plane matches the lattice constant of traditional ferromagnetic metals (such as Fe, Co, and Ni), enabling the formation of highly crystallized interfaces. This reduces interface scattering effects and enhances the tunneling probability of spin-polarized electrons. Furthermore, the MgO tunneling barrier exhibits a band-selective tunneling effect (spin-dependent filter effect), allowing electronic states with specific symmetries to pass through. This characteristic further improves the magnitude of the tunneling magnetoresistance.

[0004] Traditional magnetic tunnel junctions often use amorphous Al₂O₃ as the tunneling barrier layer. While Al₂O₃ possesses high resistivity and good electrical insulation properties, its amorphous structure makes it difficult to provide band-selective tunneling, thus limiting the performance of tunneling magnetoresistance. In contrast, MgO tunneling barrier layers can be grown into high-quality single-crystal thin films through magnetron sputtering combined with annealing, significantly improving the order and crystal matching of the ferromagnetic layer and tunneling barrier interface, thereby significantly enhancing the tunneling magnetoresistance effect. This performance improvement has made MgO-based magnetic tunnel junctions a key research focus in spintronics.

[0005] However, the fabrication process of the MgO tunneling barrier layer significantly affects the performance of the magnetic tunnel junction. First, appropriate annealing can promote the crystallization process of the MgO layer, transforming it from an amorphous or polycrystalline state to a highly crystalline single-crystal structure. Second, the fabrication quality of the MgO layer directly determines the degree of scattering of spin-polarized electrons during tunneling. In actual fabrication, the sputtering power and sputtering pressure of the MgO layer have a significant impact on its fabrication quality. Therefore, optimizing the fabrication process to control the interface quality and crystal orientation of the MgO tunneling barrier layer has become a key technical issue for improving the TMR performance of the magnetic tunnel junction.

[0006] Currently, existing technologies (such as CN201610898458.2) propose using a "plasma treatment + single-stage annealing" process after depositing a reference layer to repair interface damage and improve TMR. However, the annealing process of this method is relatively simple (e.g., holding temperature 120~400℃, heating rate 0.1~1℃ / s), and its effect is mainly limited to repairing shallow defects introduced by plasma treatment. It has limited effectiveness in systematically optimizing the flatness of the underlying film, precisely controlling the MgO crystallization process, and strengthening spin-orbit coupling, among other deeper issues. Especially for high-end MTJ devices that use complex multilayer film structures (such as Pt / Co) as pinning layers and pursue extreme TMR performance, the existing annealing process is still insufficient in terms of systematicness, precision, and the final performance improvement. Summary of the Invention

[0007] The purpose of this invention is to overcome the shortcomings of the prior art and provide a magnetic tunnel junction based on an MgO tunneling barrier layer and a method for enhancing its tunneling magnetoresistance (TMR), which is used to improve the tunneling magnetoresistance (TMR) performance of the magnetic tunnel junction.

[0008] The specific technical solution of the present invention is as follows:

[0009] On the one hand, a method for enhancing the tunneling magnetoresistance of a magnetic tunnel junction is provided, comprising the following steps: S1. A buffer layer and a pinning layer including a first coupling layer are sequentially deposited on a substrate. The pinning layer is a composite multilayer film structure containing alternately deposited platinum and cobalt layers. S2. Before depositing the MgO barrier layer, the pinning layer deposited in step S1 is pre-annealed. S3. On the pre-annealed pinned layer, a second coupling layer, a reference layer, an MgO barrier layer, a free layer, and a protective layer are sequentially deposited to form a full film stack structure; wherein, the reference layer and the free layer both contain a CoFeB alloy layer; S4. The full-film stack structure is subjected to segmented gradient annealing. The segmented gradient annealing process includes four stages performed sequentially: the first stage is low-temperature interface repair, the second stage is medium-temperature lattice optimization, the third stage is high-temperature spin strengthening, and the fourth stage is gradient cooling. Through this refined temperature path design, interface defects are systematically eliminated, the MgO crystal structure is optimized, and the spin-related tunneling effect is enhanced.

[0010] Further, the pre-annealing treatment in step S2 is as follows: in a vacuum environment, the sample with the deposited buffer layer and pinning layer is heated to 250-350°C at a heating rate of 5-15°C / min, held at that temperature for 20-40 minutes, and then cooled to room temperature. More preferably, the heating rate is 10°C / min, the holding temperature is 300°C, and the holding time is 30 minutes.

[0011] Furthermore, the parameters for each stage of the segmented gradient annealing process described in step S4 are as follows: First stage: Heat the sample to 150-190℃ at a heating rate of 3-7℃ / min and hold for 20-30 minutes; Second stage: Continue heating the sample from the temperature of the first stage to 250-290℃ at a heating rate of 2-5℃ / min and hold for 35-55 minutes; Third stage: Continue heating the sample from the temperature of the second stage to 310-330℃ at a heating rate of 1-3℃ / min and hold for 15-25 minutes; Fourth stage: Cool the sample from the temperature of the third stage to below 100℃ at a cooling rate of 3-5℃ / min, and then allow it to cool naturally to room temperature.

[0012] More preferably, in the first stage, the temperature is increased to 180°C at a rate of 5°C / min and held for 25 minutes; in the second stage, the temperature is increased to 270°C at a rate of 3°C / min and held for 45 minutes; in the third stage, the temperature is increased to 320°C at a rate of 2°C / min and held for 18 minutes; and in the fourth stage, the temperature is decreased to below 100°C at a rate of 4°C / min.

[0013] Furthermore, the deposition of the MgO barrier layer can be improved by optimizing the sputtering process parameters, such as by using radio frequency magnetron sputtering at specific power, pressure and target-substrate distance.

[0014] Furthermore, in step S3, when depositing the MgO barrier layer, an RF magnetron sputtering process is used, with a sputtering power of 50-80W, a working gas pressure of 0.17-0.25Pa, and a target-substrate distance of 8-12cm.

[0015] More preferably, the process parameters for depositing the MgO barrier layer are: RF power 50W, working gas pressure 0.18Pa, and target-substrate distance 10cm.

[0016] More preferably, the structure of the pinning layer, starting from the buffer layer side, is as follows: A platinum layer with a thickness of 1.8-2.2 nm; The first periodic structure comprises p periods of cobalt / platinum bilayer units, wherein each cobalt / platinum bilayer unit comprises a cobalt layer with a thickness of 0.3-0.5 nm and a platinum layer with a thickness of 0.5-0.7 nm, and p is an integer from 3 to 5; A cobalt layer with a thickness of 0.3-0.5 nm is located on the first periodic structure; A first coupling layer is located on top of the cobalt layer, the first coupling layer being a ruthenium layer with a thickness of 0.7-1.0 nm; A cobalt layer with a thickness of 0.3-0.5 nm is located above the first coupling layer; The second periodic structure comprises q periods of platinum / cobalt bilayer units, wherein each platinum / cobalt bilayer unit comprises a platinum layer with a thickness of 0.5-0.7 nm and a cobalt layer with a thickness of 0.3-0.5 nm, and q is an integer from 2 to 4.

[0017] Furthermore, to obtain optimal performance, the thickness of each key layer can be optimized as follows: the thickness of the reference layer is 0.9-1.1 nm; the thickness of the free layer is 1.5-1.7 nm; the thickness of the MgO barrier layer is 1.2-1.4 nm; and the second coupling layer is a tantalum layer with a thickness of 0.7-0.9 nm.

[0018] On the other hand, a magnetic tunnel junction prepared by the above method is provided. Due to the aforementioned synergistic process, the interface quality, barrier layer crystallinity, and spin polarization of this magnetic tunnel junction are significantly improved.

[0019] Compared with the prior art, the beneficial technical effects of this invention are reflected in: 1. This invention combines pinned layer pre-annealing with segmented gradient annealing of the entire film stack, forming a synergistic and complete process chain. Compared with existing technologies that only use single annealing or simple post-processing, it can more systematically and significantly improve the tunneling magnetoresistance (TMR) performance of magnetic tunnel junctions. Test data shows that the TMR value of devices prepared using the method of this invention is improved by 136.79% compared with the comparative process that only uses traditional single-stage high-temperature annealing.

[0020] 2. The pinning layer pre-annealing step proposed in this invention specifically solves the common problem in existing technologies where poor interface quality of the upper layer is caused by the roughness of the underlying film. This step promotes atomic rearrangement and surface planarization of complex multilayer film structures, thereby reducing the surface roughness of the critical MgO barrier layer grown subsequently by about 72% (from 1.102 nm to 0.306 nm), ensuring the formation of a high-quality CoFeB / MgO interface.

[0021] 3. The segmented gradient annealing process of this invention achieves functional and precise control of the annealing process by setting differentiated temperature stages and heating rates, overcoming the limitation of existing technologies where single-temperature annealing cannot simultaneously optimize multiple interface and bulk defects. This process, through a progressive treatment of repairing interfaces at low temperatures, optimizing the MgO lattice and promoting Co-O bonding at medium temperatures, strengthening spin coupling at high temperatures, and finally releasing stress through gradient cooling, synergistically improves interface characteristics, crystal quality, and magnetic properties from a mechanistic perspective. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the magnetic tunnel junction multilayer film structure according to an embodiment of the present invention; Figure 2 This is an atomic force microscopy (AFM) image of the MgO barrier layer surface of (sample A) without pre-annealing of the pinned layer; Figure 3 This is an atomic force microscopy (AFM) image of the MgO barrier layer surface of (sample B) after pre-annealing of the pinned layer; Figure 4 This is a comparison chart of the tunneling magnetoresistance (TMR) performance of magnetic tunnel junctions using the segmented gradient annealing process of the present invention (Example 3) and the traditional single-stage annealing process (Comparative Example 1).

[0023] In the figure, 100-buffer layer, 200-pinning layer, 210-first coupling layer, 220-second coupling layer, 300-reference layer, 400-barrier layer, 500-free layer, and 600-protective layer. Detailed Implementation

[0024] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0025] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0026] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that is mutually exclusive with other embodiments.

[0027] The embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0028] Example 1: Preparation process and parameter calibration of each layer of magnetic tunnel structure foundation This embodiment aims to determine the optimal sputtering process parameters for each functional layer and establish a complete magnetic tunnel junction fabrication process.

[0029] 1. Equipment, Materials and Pretreatment The MS-400 ultra-high vacuum magnetron sputtering system is used, and its sputtering chamber background vacuum is better than 1×10⁻⁶. -7 The sample preparation system is equipped with an mbar loading chamber that can accommodate six samples to improve preparation efficiency. The substrate is a single-sided 100nm SiO2-coated monocrystalline silicon wafer with dimensions of 4cm×4cm and 1cm×1cm. All target materials (Ta, Ru, Pt, Co, Co...) are used. 40 Fe 40 B 20 The purity of MgO is 99.99%, the size is 2 inches, and the thickness is 3 mm.

[0030] Substrate cleaning process: The silicon wafer is placed in anhydrous ethanol, acetone and anhydrous ethanol in sequence for ultrasonic cleaning for 3 minutes each. After cleaning, the surface is dried with high-purity nitrogen.

[0031] Pre-sputtering of the target material: This is performed before the sample enters the sputtering position. For Ta, CoFeB, Ru, Pt, and Co metal targets, argon (99.999% purity) is used as the working gas at a flow rate of 5 sccm, and pre-sputtering is performed for 5 minutes at a DC power of 30W under a pressure of 0.3 Pa. For MgO targets, pre-sputtering is performed for 15 minutes at an argon flow rate of 15 sccm and a pressure of 0.2 Pa, using an RF power of 80W, to remove the oxide layer and contaminants from the target surface.

[0032] The target pre-cleaning step should be completed when the reaction chamber is under high vacuum and the sample is in the injection chamber. At this time, there is no sample on the sample stage, but the sample stage baffle is still closed before cleaning to protect the heating plate from particles generated by pre-sputtering and maintain good thermal conductivity. Then, set the molecular pump gate valve to the specified opening degree (15%), and then open the electromagnetic diaphragm valve between the flow meter and the chamber. Only then can the gas mass flow meter inlet flow rate be set to 5 sccm. Observe the gas pressure value of the capacitive thin-film vacuum gauge and wait for the pressure to stabilize at 0.3 Pa. Then, turn on the DC power supply connected to the target, set the target power (30W for this step), turn on the power output, and time for 5 minutes. After the timer expires, turn off the power output, turn off the flow meter flow, set the molecular pump gate valve opening degree to 100%, and wait for the reaction chamber vacuum value to return to a high vacuum state.

[0033] 2. Calibration of deposition rate for each thin film layer Under the established process conditions, the deposition rates of the thin films for each material were calibrated. Calibration was performed at room temperature, with high-purity argon gas introduced to achieve the set working pressure. The calibration parameters, deposition time, total deposition thickness for calibration, and average deposition rate for each layer are shown in Table 1. Table 1

[0034] Through systematic optimization of MgO sputtering power (adjusted between 50W and 80W) and working pressure (adjusted between 0.17Pa and 0.25Pa), it was found that the prepared MgO barrier layer has the best compactness, smoothness and crystallinity when using RF power of 50W, working pressure of 0.18Pa and target-substrate distance of 10cm.

[0035] The sputtering power (50W) and operating pressure (0.18Pa) of the MgO layer described above are preferred values ​​for obtaining high-quality thin films. In practice, by optimizing the sputtering power between 50W and 80W and the operating pressure between 0.17Pa and 0.25Pa, a MgO barrier layer with good density and crystallinity can be obtained, thereby ensuring the performance of the device.

[0036] 3. Preparation of basic magnetic tunnel junctions Based on the above-calibrated deposition rate, a magnetic tunnel junction with the following basic structure was fabricated on the cleaned silicon wafer, as shown in the figure. Figure 1 As shown: Buffer layer: composed of a tantalum (Ta) film with a thickness of about 5 nanometers.

[0037] Pinning layer: This is a composite multilayer film structure composed of platinum (Pt) and cobalt (Co), with the following specific order and thickness: Pt (~2 nm) / [Co (~0.4 nm) / Pt (~0.6 nm)] × 4 / Co (~0.4 nm) / first coupling layer / Co (~0.4 nm) / [Pt (~0.6 nm) / Co (~0.4 nm)] × 3. The first coupling layer is a ruthenium (Ru) layer with a thickness of approximately 0.85 nanometers.

[0038] The second coupling layer is a Ta layer with a thickness of approximately 0.8 nanometers deposited on top of the pinning layer.

[0039] Reference layer: a cobalt-iron-boron (CoFeB) alloy layer with a thickness of approximately 1.0 nanometers.

[0040] Barrier layer: A magnesium oxide (MgO) layer with a thickness of approximately 1.3 nanometers.

[0041] Free layer: a CoFeB alloy layer with a thickness of approximately 1.6 nanometers.

[0042] Protective layer: a Ta layer with a thickness of approximately 5 nanometers.

[0043] After preparation, the sample was heated to 320°C in a vacuum environment at a rate of 20°C / min, held at that temperature for 30 minutes, and then cooled naturally to complete the traditional single-stage annealing.

[0044] It is understood that the number of repetitions of the [Co / Pt] or [Pt / Co] periodic structure in the pinning layer can be increased or decreased according to the specific requirements of the device's exchange bias field strength, for example, adjusted to 3 times, 5 times, etc., which are all simple variations of the technical solution of the present invention.

[0045] Example 2: The effect of pre-annealing of pinned layers on interface morphology This embodiment is used to investigate the effect of annealing the underlying layer before depositing the barrier layer.

[0046] Two sets of samples were prepared, and their structures were exactly the same as those of the pinning layer described in Example 1.

[0047] Sample A (Control): After the pinning layer was deposited, no heat treatment was performed; the sample was directly cooled to room temperature in a vacuum environment, and then the subsequent second coupling layer, a three-layer structure of Ta (0.8 nm) / CoFeB (1.0 nm) / MgO (10 nm), was deposited. The MgO layer was thickened to 10 nm for morphology characterization.

[0048] Sample B (pre-annealed): After the pinned layer was deposited, in-situ vacuum annealing was performed in the sputtering chamber. The annealing conditions were: heating to 300℃ at 10℃ / min, holding at that temperature for 30 minutes, and then cooling to room temperature at the same rate. After the sample cooled, the Ta / CoFeB / MgO three-layer structure identical to that of Sample A was deposited.

[0049] The morphology of the MgO thin films on the surfaces of the two groups of samples was characterized using atomic force microscopy (AFM). Figure 2 As shown, the surface roughness (RMS) of MgO in sample A is 1.102 nm. Figure 3 As shown, after pre-annealing of the pinning layer, the surface roughness of MgO in sample B was significantly reduced to 0.306 nm.

[0050] Combination Figure 2 and Figure 3 The test results show that annealing the pinned layer significantly reduces the surface roughness of the subsequently grown MgO barrier layer. This phenomenon is mainly attributed to the following two synergistic mechanisms: First, atomic rearrangement and surface smoothing of the pinned layer. The pinned layer (Pt / [Co / Pt]4 / Co / Ru / Co / [Pt / Co]3) in the deposited state is in a non-equilibrium state, with lattice distortion, interface defects, and micro-morphological fluctuations in its atomic arrangement. During vacuum in-situ annealing at 300℃, Pt, Co, and Ru atoms gain sufficient thermal kinetic energy, resulting in significant surface diffusion and lattice relaxation. This process drives atoms to fill the micro-vacancies and trenches formed during deposition, and also promotes atomic rearrangement at the multilayer film interface, effectively releasing the internal stress caused by interlayer lattice mismatch, thereby significantly reducing the surface roughness of the pinned layer itself at the atomic scale.

[0051] Second, there is a stepwise transfer effect of the underlying morphology to the upper thin film. The Ta / CoFeB / MgO three-layer structure prepared by magnetron sputtering is epitaxially grown layer by layer on the surface of the pinned layer. The thin film growth process has significant morphology replication characteristics, that is, the surface undulations of the lower film directly affect and are transferred to the upper film. Before annealing, its high initial roughness causes the surfaces of the subsequently deposited Ta and CoFeB layers to have simultaneous undulations, which in turn allows the MgO layer to nucleate and grow on the rough and non-uniform CoFeB surface. This non-uniform nucleation results in a large difference in the MgO grain size distribution, ultimately manifesting as a high surface roughness (Ra = 1.102 nm). In contrast, the pinned layer, which has an atomically smooth surface after annealing, provides a uniform and ideal substrate for the subsequent growth of the Ta and CoFeB layers. The surface smoothness of the CoFeB layer grown in this way is improved, which allows the MgO layer to nucleate on a more uniform surface and its grain growth to be more consistent, thus ultimately achieving a significant reduction in the surface roughness of the MgO layer (Ra = 0.306 nm).

[0052] Example 3: Implementation and Performance Verification of Segmented Gradient Annealing Process This embodiment demonstrates the core segmented gradient annealing process of the present invention and verifies its performance improvement effect.

[0053] 1. Sample Preparation Following the process determined in Example 1, a complete magnetic tunnel junction full-film stack structure was prepared, with the specific layer thickness consistent with the final structure in Example 1. During the deposition process, immediately after the pinning layer was deposited, the 300℃ / 30 min pre-annealing process described in Example 2 was implemented. After the sample cooled, the remaining second coupling layer (Ta layer), reference layer, barrier layer, free layer, and protective layer were deposited.

[0054] 2. Segmented gradient annealing After the entire film stack deposition is completed, the four-stage gradient annealing designed in this invention is performed in a vacuum environment. The specific process and parameters are as follows: The first stage (low-temperature interface repair): The sample was heated to 180°C at a heating rate of 5°C / min and held at this temperature for 25 minutes. In this stage, low-energy excitation promoted the desorption of residual gas adsorbed at the interface between the magnetic layer and the barrier layer, while inducing Fe atoms in CoFeB to diffuse slightly to the interface, initially filling oxygen vacancy defects.

[0055] The second stage (intermediate-temperature lattice optimization): The temperature is increased to 270℃ at a rate of 3℃ / min and held for 45 minutes. This stage is the key regulation period, which guides the Co atoms in CoFeB to form stable Co-O bonds with the O atoms in MgO. At the same time, the lattice of the MgO-based core layer is reconstructed and further ordered along the (001) orientation.

[0056] The third stage (high-temperature spin enhancement): the temperature is increased to 320℃ at a rate of 2℃ / min and held for 18 minutes. Through heat treatment at higher temperatures, the ordered arrangement of atoms in the bulk phase and interface is further promoted, and the spin-orbit coupling effect is effectively enhanced, thereby improving the spin polarization of the interface.

[0057] Fourth stage (gradient cooling): After annealing, the temperature is slowly reduced to below 100°C at a controlled rate of 4°C / min. Then, the heating power is turned off, and the sample is allowed to cool naturally to room temperature in a vacuum environment. This slow cooling process avoids thermal stress and lattice distortion caused by rapid cooling.

[0058] The temperature, time, and heating rate parameters for each stage given in the embodiments of this invention are preferred solutions. Those skilled in the art will understand that the above parameters can be adaptively adjusted without departing from the functional objectives of each stage (i.e., low-temperature repair, mid-temperature lattice optimization, and high-temperature spin strengthening). For example, the temperature for the low-temperature repair stage can be selected within the range of 150°C to 190°C, and the temperature for the mid-temperature lattice optimization stage can be selected within the range of 250°C to 290°C. The holding time can also be adjusted accordingly, and these adjustments can all achieve the objectives of this invention.

[0059] Comparative Example 1 The preparation process and pre-annealing steps of this sample are exactly the same as those of the sample in Example 3. The only difference is that in the final full-film stack annealing step, the traditional process is used: the temperature is directly raised to 320°C at a rate of about 20°C / min, held for 30 minutes, and then the heating is turned off to allow the sample to cool naturally to room temperature in a vacuum environment.

[0060] Performance Testing and Comparison The samples of Example 3 and Comparative Example 1 were tested using a tunneling magnetoresistance (CIPT) meter to characterize the effect of annealing temperature on tunneling magnetoresistance. The results showed that the sample using the segmented gradient annealing process of this invention (Example 3) had a tunneling magnetoresistance (TMR) value that was 136.79% higher than that of the control sample (Comparative Example 1) using conventional single-stage annealing. This comparison result is as follows... Figure 4 As shown.

[0061] Effect Analysis: Traditional single-stage annealing is performed at a single temperature, resulting in a crude energy input method that makes it difficult to simultaneously address temperature-dependent physical processes such as interface repair, lattice optimization, and spin enhancement. The segmented gradient annealing process of this invention, through precise design of the temperature path and residence time, achieves improvements in thin film interface quality, optimization of the tunnel barrier layer crystal structure, increased ordering of the magnetic layer, and enhanced spin-related tunneling effects. These mechanisms work together to significantly improve the tunneling magnetoresistance efficiency of the magnetic tunnel junction. Combined with the pre-annealing process of Example 2, this constitutes a complete process chain from "substrate planarization" to "bulk phase and interface system optimization," achieving a significant enhancement of tunneling magnetoresistance while offering advantages such as simple process, stable performance, and wide applicability.

[0062] The above detailed description is a specific description of one of the feasible embodiments of the present invention. This embodiment is not intended to limit the patent scope of the present invention. All equivalent implementations or modifications that do not depart from the present invention should be included within the scope of the technical solution of the present invention.

[0063] It should be particularly noted that the various embodiments listed in this specification and accompanying drawings are intended to illustrate the technical solutions and advantages of the present invention, and not to limit the scope of protection of the present invention. Without departing from the core ideas and technical effects of the present invention, those skilled in the art can make any form of improvement, substitution, combination, or modification to the structural arrangement, process parameters, material selection, control logic, etc., of the described embodiments; any obvious changes based on the same concept should be considered equivalent solutions of the present invention and should be included within the scope of protection defined by the claims of the present invention. The actual scope of protection of the present invention is determined by the appended claims and should be correctly understood in conjunction with the specification and accompanying drawings.

Claims

1. A method for enhancing the tunneling magnetoresistance of a magnetic tunnel junction, characterized in that, Includes the following steps: S1. A buffer layer and a pinning layer including a first coupling layer are sequentially deposited on a substrate, wherein the pinning layer comprises a composite multilayer film structure of alternately deposited platinum and cobalt layers; S2. Before depositing the MgO barrier layer, the pinning layer deposited in step S1 is pre-annealed. S3. On the pre-annealed pinned layer, a second coupling layer, a reference layer, an MgO barrier layer, a free layer, and a protective layer are sequentially deposited to form a full film stack structure; wherein, the reference layer and the free layer both contain a CoFeB alloy layer; S4. Perform segmented gradient annealing on the full-film stack structure; the segmented gradient annealing includes four stages performed sequentially: the first stage is low-temperature interface repair, the second stage is medium-temperature lattice optimization, the third stage is high-temperature spin strengthening, and the fourth stage is gradient cooling.

2. The method according to claim 1, characterized in that, The pre-annealing treatment described in step S2 is as follows: In a vacuum environment, the sample with the deposited buffer layer and pinning layer is heated to 250-350°C at a heating rate of 5-15°C / min, held at that temperature for 20-40 minutes, and then cooled to room temperature.

3. The method according to claim 2, characterized in that, The pre-annealing treatment has a heating rate of 10℃ / min, a holding temperature of 300℃, and a holding time of 30 minutes.

4. The method according to claim 1, characterized in that, The parameters for each stage of the segmented gradient annealing process described in step S4 are as follows: First stage: Heat the sample to 150-190℃ at a heating rate of 3-7℃ / min and hold for 20-30 minutes; Second stage: Continue heating the sample from the temperature of the first stage to 250-290℃ at a heating rate of 2-5℃ / min, and hold at that temperature for 35-55 minutes; Third stage: Heat the sample from the temperature of the second stage to 310-330℃ at a heating rate of 1-3℃ / min, and hold for 15-25 minutes; Fourth stage: The sample is cooled from the temperature of the third stage to below 100℃ at a cooling rate of 3-5℃ / min, and then allowed to cool naturally to room temperature.

5. The method according to claim 4, characterized in that, The first stage involves heating to 180°C at a rate of 5°C / min and holding at that temperature for 25 minutes. The second stage involves heating to 270°C at a rate of 3°C / min and holding at that temperature for 45 minutes. The third stage involves heating to 320°C at a rate of 2°C / min and holding at that temperature for 18 minutes. The fourth stage involves cooling down to below 100°C at a rate of 4°C / min.

6. The method according to claim 1, characterized in that, In step S3, when depositing the MgO barrier layer, an RF magnetron sputtering process is used, with a sputtering power of 50-80W, a working gas pressure of 0.17-0.25Pa, and a target-substrate distance of 8-12cm.

7. The method according to claim 6, characterized in that, The process parameters for depositing the MgO barrier layer are: RF power 50W, working gas pressure 0.18Pa, and target-substrate distance 10cm.

8. The method according to claim 1, characterized in that, The structure of the pinning layer, starting from the buffer layer side, is as follows: A platinum layer with a thickness of 1.8-2.2 nm; The first periodic structure comprises p periods of cobalt / platinum bilayer units, wherein each cobalt / platinum bilayer unit comprises a cobalt layer with a thickness of 0.3-0.5 nm and a platinum layer with a thickness of 0.5-0.7 nm, and p is an integer from 3 to 5; A cobalt layer with a thickness of 0.3-0.5 nm is located on the first periodic structure; A first coupling layer is located on top of the cobalt layer, the first coupling layer being a ruthenium layer with a thickness of 0.7-1.0 nm; A cobalt layer with a thickness of 0.3-0.5 nm is located above the first coupling layer; The second periodic structure comprises q periods of platinum / cobalt bilayer units, wherein each platinum / cobalt bilayer unit comprises a platinum layer with a thickness of 0.5-0.7 nm and a cobalt layer with a thickness of 0.3-0.5 nm, and q is an integer from 2 to 4.

9. The method according to claim 1, characterized in that, The thickness of the reference layer is 0.9-1.1 nm; the thickness of the free layer is 1.5-1.7 nm; the thickness of the MgO barrier layer is 1.2-1.4 nm; and the second coupling layer is a tantalum layer with a thickness of 0.7-0.9 nm.

10. A magnetic tunnel junction, characterized in that, The magnetic tunnel junction is prepared by the method of any one of claims 1 to 9.

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