FPGA (Field Programmable Gate Array) process mapping method and system based on bias learning

By combining bias learning mechanism and dependency graph, the problems of local optima and insufficient utilization of historical search information in KLUT mapping are solved, realizing efficient FPGA process mapping and improving the optimization efficiency and mapping quality of large-scale circuits.

CN122047115APending Publication Date: 2026-05-15UNIV OF CHINESE ACAD OF SCI
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
UNIV OF CHINESE ACAD OF SCI
Filing Date
2026-02-11
Publication Date
2026-05-15

AI Technical Summary

Technical Problem

Existing KLUT mapping methods are prone to getting trapped in local optima, suffer from strong randomness in analog degradation, have slow convergence speed, and lack the ability to learn from historical search information, making it difficult to obtain high-quality mapping results on large-scale circuits.

Method used

We employ a bias learning mechanism combined with a penalty and reward strategy. By constructing a dependency graph, we achieve global incremental updates accurate to the cut set level. We build a three-layer optimization framework: an outer layer of multi-round bias learning iteration, a middle layer of greedy local search, and an inner layer of random multi-start point restart.

Benefits of technology

It significantly improves the efficiency of large-scale circuit optimization, avoids repeatedly getting trapped in local optima, improves search efficiency and mapping quality, and reduces computational complexity.

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Abstract

The invention belongs to the technical field of integrated circuit design automation, and discloses an FPGA process mapping method and system based on bias learning, and the method comprises the steps: S1, carrying out the KLUT input lookup table mapping of an input logic network, and obtaining initial mapping; s2, on the basis of the initial mapping, constructing a dependency graph, and obtaining a dependency relationship between a cut set of each node and a leaf node of the cut set; s3, initializing an increment table based on a dependency relationship between the cut set of each node and a leaf node thereof, and calculating an area increment of each candidate cut set of each node relative to the current optimal cut set; s4, based on the area increment of each candidate cut set of each node relative to the current optimal cut set, executing multiple rounds of offset learning iterative optimization; and S5, learning experience from the local optimal solution of the current round, recovering a global optimal solution, and outputting a result.
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Description

Technical Field

[0001] This invention belongs to the field of integrated circuit design automation (EDA) technology, specifically relating to an FPGA process mapping method and system based on bias learning, and particularly to local search optimization technology in K-input lookup table (KLUT) mapping. Background Technology

[0002] Field-Programmable Gate Arrays (FPGAs) are programmable integrated circuit chips widely used in digital signal processing, communication systems, and artificial intelligence acceleration. The core programmable unit of an FPGA is the lookup table, which is essentially a memory capable of implementing arbitrary K-input logic functions. K-input lookup table mapping (KLUT mapping) is a crucial step in FPGA process mapping, aiming to map the logic circuit network to a lookup table network while optimizing design parameters such as area and delay.

[0003] As chip size increases and application requirements become more complex, KLUT mapping faces significant challenges. While traditional mapping methods can quickly obtain initial mapping results, they are prone to getting trapped in local optima and struggle to achieve high-quality mapping results on large-scale circuits.

[0004] To escape local optima, various local search optimization techniques have been proposed. Simulated annealing escapes local optima by probabilistically accepting inferior solutions, but it suffers from strong randomness, slow convergence, and a lack of ability to learn from historical search information. Tabu search maintains a tabu table to record recently visited solutions to avoid repeated searches, but it only has short-term memory and cannot effectively utilize long-term search experience. Random restart performs random perturbations to restart the search when trapped in local optima, but the perturbation strategy lacks specificity and the search efficiency is low.

[0005] Existing KLUT mapping local search methods mainly suffer from four problems: First, they are prone to getting trapped in local optima, and greedy strategies are likely to converge to suboptimal solutions; second, they lack learning ability, and traditional methods cannot learn from historical searches and cannot intelligently guide subsequent search directions; third, they have low exploration efficiency, random perturbations lack specificity, and a large amount of computational resources are wasted on exploring ineffective search spaces; fourth, incremental updates have high overhead, and after each move, the evaluation values ​​of a large number of nodes need to be recalculated, with a computational complexity of O(N×K), which increases sharply with the size of the circuit.

[0006] Therefore, there is an urgent need for an optimization method that can efficiently escape local optima and is applicable to large-scale circuits. Summary of the Invention

[0007] To address the problems of existing technologies, this invention provides an FPGA process mapping method and system based on bias learning. The core innovations of this invention lie in two aspects: First, it proposes a bias learning mechanism that learns from historical searches through a bidirectional adjustment strategy combining penalties and rewards, intelligently guiding the search direction and avoiding repeated traps in the same local optima. Second, it constructs a dependency graph to achieve global incremental updates accurate to the cut set level, reducing the update complexity from O(N×K) to O(M), where N is the total number of nodes, K is the number of cut set sets involved, and M is the number of affected nodes, with M typically much smaller than N×K. Based on this, this invention constructs a three-layer optimization framework: the outer layer consists of multiple rounds of bias learning iterations, the middle layer is a greedy local search, and the inner layer is a random multi-startpoint restart. The collaborative work of these three layers enables this invention to significantly improve optimization efficiency while ensuring mapping quality.

[0008] To achieve the above objectives, the present invention provides the following solution: An FPGA process mapping method based on bias learning, the method comprising: S1: Apply KLUT input lookup table mapping to the input logic network to obtain the initial mapping; S2: Based on the initial mapping, construct a dependency graph to obtain the dependency relationship between the cut set of each node and its leaf nodes; S3: Based on the dependency relationship between each node's cut set and its leaf nodes, initialize the increment table and calculate the area increment of each candidate cut set of each node relative to the current best cut set; S4: Perform multiple rounds of bias learning iterative optimization based on the area increment of each candidate cut set of each node relative to the current best cut set; S5: Learn from the local optimum of the current round, recover the global optimum, and output the result.

[0009] Preferably, in step S1, the method for obtaining the initial mapping by performing KLUT input lookup table mapping on the input logic network includes: The topological sorting of the computational logic network is performed by traversing each node in topological order and enumerating cut sets. After the cut set enumeration is completed, the delayed optimization mapping, area flow optimization mapping and area optimization mapping are executed in sequence to select the initial optimal cut set for each node and obtain the initial mapping result.

[0010] Preferably, in step S2, the method for constructing a dependency graph based on the initial mapping includes: Initialize the dependency table, with a size equal to the total number of network nodes, and initialize each element as an empty list; Iterate through all mapped nodes. For each node, for all candidate cut sets, skip if it is a trivial cut set. For non-trivial cut sets, iterate through all leaf nodes it contains and add a dependency pair to the corresponding position of the leaf node in the dependency table, including the index of the current node and the index of the current cut set.

[0011] Preferably, in step S3, the method for initializing the incremental table based on the dependency relationship between the cut set of each node and its leaf nodes includes: For each mapped node, the current best cut set is temporarily removed from the mapped network through a dereference operation to obtain the baseline area; Traverse all candidate cut sets for the node: if it is the same as the optimal cut set, set the increment to 0; for other candidate cut sets, temporarily add them to the mapping network through a reference operation, calculate the new area, the difference between the new area and the baseline area is the increment value, store it in the increment table, and then immediately dereference to restore the state; if the increment is less than the negative threshold ε and the temporal constraints are met, add it to the improvement pool; finally, reference back to the current optimal cut set to restore the state.

[0012] Preferably, in step S4, the method of performing multi-round bias learning iterative optimization based on the area increment of each candidate cut set of each node relative to the current optimal cut set includes: S41: After dereferencing all current best cut sets, traverse each mapped node, calculate the comprehensive score for all its candidate cut sets, and complete the cut set reselection; S42: Based on the reselection of the cut set, perform an incremental greedy local search; S43: After completing the incremental greedy local search, trigger a random multi-startpoint restart; S44: After a random multi-startpoint restart, learn from the local optimal solution of the current round, adjust the bias table through penalty and reward mechanisms, and finally return the optimal solution of all rounds.

[0013] Preferably, in step S41, after dereferencing all current optimal cut sets, the method of traversing each mapped node and calculating a comprehensive score for all its candidate cut sets to complete the cut set reselection includes: ; Where λ is the delay weighting coefficient.

[0014] Preferably, in S42, the method of performing an incremental greedy local search based on the reselected cut set includes: first rebuilding the incremental table and improving the candidate pool, and then repeatedly executing S421-S424 until the maximum number of iterations is reached or there are no improved candidates. in, S421: Randomly select a candidate cut set from the improved pool; S422: Apply the candidate cut set replacement and perform incremental update: After performing cut set replacement, collect all leaf nodes of the original cut set and the new cut set, obtain all nodes and cut set index pairs that depend on the leaf node by querying the dependency table for each leaf node, recalculate the incremental value for the dependency pairs and update the improvement pool status. S423: Recalculate global timing information every fixed number of steps to correct accumulated errors; S424: Record the snapshot of the optimal area and the corresponding cut set selection in this round.

[0015] Preferably, in step S43, the method for triggering a random multi-startpoint restart after completing the incremental greedy local search includes: When the improvement pool is empty and the first round of greedy search has been completed, a random multi-start point restart is triggered: 5 to 15 mapped nodes are randomly selected, and for each selected node, one node is randomly selected from the candidate cut set that satisfies the time sequence constraints for replacement. Then, the global time sequence information is recalculated and the incremental table and improvement candidate pool are rebuilt.

[0016] Preferably, in step S44, after a random multi-startpoint restart, the method of learning from the local optimal solution of the current round, adjusting the bias table through a penalty and reward mechanism, and finally returning the optimal solution across all rounds includes: Punishment mechanism: ; Reward Mechanism: .

[0017] The present invention also provides an FPGA process mapping system based on bias learning, the system being used to implement the aforementioned method, the system comprising: a mapping module, a construction module, an initialization module, an iteration module, and an output module; The mapping module is used to perform KLUT input lookup table mapping on the input logic network to obtain the initial mapping; The building module is used to construct a dependency graph based on the initial mapping and obtain the dependency relationship between the cut set of each node and its leaf nodes; The initialization module is used to initialize the increment table based on the dependency relationship between the cut set of each node and its leaf nodes, and to calculate the area increment of each candidate cut set of each node relative to the current best cut set. The iterative module is used to perform multiple rounds of bias learning iterative optimization based on the area increment of each candidate cut set of each node relative to the current best cut set; The output module is used to learn from the local optimal solution of the current round, recover the global optimal solution, and output the result.

[0018] Compared with the prior art, the beneficial effects of the present invention are as follows: (1) The bias learning mechanism enables the method to have long-term memory and learning capabilities. Through a two-way adjustment strategy combining punishment and reward, it learns from historical searches, intelligently guides subsequent search directions, and avoids repeatedly falling into the same local optimum. Compared with simulated annealing and tabu search, this invention has an explicit learning mechanism, which can use the search experience of all rounds to guide subsequent optimization.

[0019] (2) The global incremental update mechanism significantly improves the efficiency of large-scale circuit optimization. By implementing incremental updates accurate to the cut set level through the dependency graph, the update complexity is reduced from O(N×K) to O(M). Experiments show that the local search speed can be improved by more than 10 times.

[0020] (3) The three-layer optimization framework effectively escapes local optima. The outer layer uses multiple rounds of bias learning iteration to control the long-term search direction, the middle layer uses greedy search to perform fine local optimization, and the inner layer uses random multi-starting-point restart to provide short-term escape capability. The three layers work together to significantly improve the global search capability.

[0021] (4) The first-round protection mechanism and the global optimal tracking mechanism ensure the robustness of the method. The former ensures that the first round of search establishes a high-quality benchmark solution, and the latter ensures that the optimal solution in all rounds is returned in the end.

[0022] This invention does not depend on a specific circuit structure or mapping method and can be used as a post-processing step in various K-input lookup table mapping toolchains, exhibiting good scalability and practical value. Attached Figure Description

[0023] To more clearly illustrate the technical solution of the present invention, the drawings used in the embodiments are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a schematic diagram of the overall process of the FPGA process mapping method based on bias learning according to an embodiment of the present invention; Figure 2 This is a schematic diagram illustrating the implementation process of constructing a dependency graph according to an embodiment of the present invention; Figure 3 This is a schematic diagram illustrating the implementation process of incremental table initialization in an embodiment of the present invention; Figure 4 This is a schematic diagram illustrating the implementation process of multi-round bias learning iteration in an embodiment of the present invention; Figure 5 This is a schematic diagram illustrating the implementation process of the bias learning mechanism (punishment and reward strategy) in an embodiment of the present invention; Figure 6 This is a schematic diagram illustrating the implementation process of the incremental greedy local search in an embodiment of the present invention; Figure 7 This is a schematic diagram illustrating the implementation process of random multi-startpoint restart in an embodiment of the present invention. Detailed Implementation

[0025] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0026] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0027] Example 1 like Figure 1 As shown, this invention provides an FPGA process mapping method based on bias learning, the method comprising: S1: Apply KLUT input lookup table mapping to the input logic network to obtain the initial mapping; S2: Based on the initial mapping, construct a dependency graph to obtain the dependency relationship between the cut set of each node and its leaf nodes; S3: Based on the dependency relationship between each node's cut set and its leaf nodes, initialize the increment table and calculate the area increment of each candidate cut set of each node relative to the current best cut set; S4: Perform multiple rounds of bias learning iterative optimization based on the area increment of each candidate cut set of each node relative to the current best cut set; S5: Learn from the local optimum of the current round, recover the global optimum, and output the result.

[0028] The specific implementation process is as follows: S1: Perform traditional KLUT mapping to obtain the initial mapping: The traditional KLUT mapping method is applied to the input logical network to obtain initial mapping results. This step establishes trivial cut sets for constant nodes and the main input node. For each node in the network, a set of K feasible cut sets is generated using cut set enumeration. Then, delay-optimized mapping, area-flow-optimized mapping, and area-optimized mapping are performed sequentially to select the initial optimal cut set for each node. Area and delay are calculated using reference counting and recursion. This step provides the initial mapping configuration and candidate cut set set for subsequent local search optimization.

[0029] S2: Construct the dependency graph: Construct a dependency graph to record the dependencies between each node's cutsets and its leaf nodes. The dependency graph uses a reverse index structure: for each candidate cutset of each node, traverse all leaf nodes in the cutset, and record the current node index and the current cutset index in the dependency table, so that each leaf node corresponds to a list containing all nodes that depend on that leaf node and their corresponding cutset index pairs. This data structure supports subsequent efficient incremental updates.

[0030] S3: Initialize the increment table: Initialize the increment table and calculate the area increment of each candidate cut set for each node relative to the current best cut set. For each node, obtain its current best cut set and temporarily remove it from the mapping network through a dereference operation. For each candidate cut set of this node, if it is the same as the current best cut set, set the increment value to 0; otherwise, temporarily add the candidate cut set to the mapping network through a reference operation, calculate the difference between the new area and the baseline area, and store it as the increment value in the increment table. At the same time, maintain an improved candidate pool, adding candidates whose increments are less than the negative threshold ε and satisfy the temporal constraints to the improved pool. Finally, reference back to the current best cut set to restore the reference count.

[0031] S4: Perform multi-round bias learning iterative optimization: This step is the core innovation of this invention. After the first three steps are completed, multiple rounds of iterative optimization are performed, with each iteration containing four stages: S4.1: Bias-guided cut set reselection (executed starting from round 2) Using the bias information learned in previous rounds, a cut set is reselected for each node. First, a dereference operation is performed on all mapped nodes. Then, for each mapped node, a comprehensive score is calculated for all candidate cut sets. Where λ is the delay weight coefficient, with a value of 0.1. The cut set with the lowest score is selected as the new optimal cut set, and the global temporal information is recalculated after referencing all the new optimal cut sets. The introduction of the bias value increases the score of the penalized cut set and decreases its probability of being selected, while decreasing the score of the rewarded cut set and increasing its probability of being selected, thereby guiding subsequent rounds to explore regions that were not fully explored in the previous rounds.

[0032] S4.2: Incremental Greedy Local Search Perform a greedy local search based on incremental maintenance. First, rebuild the incremental table and improve the candidate pool, then repeat the following steps until the maximum number of iterations is reached or there are no more candidates to improve: (1) Randomly select a candidate from the improvement pool; (2) Apply the cut set replacement and perform incremental update: After the cut set replacement is performed, collect all leaf nodes of the old cut set and the new cut set. For each leaf node, obtain all nodes that depend on the leaf and the cut set index pair by querying the dependency table. Only recalculate the incremental value for these dependency pairs and update the improvement pool state. (3) Recalculate the global timing information every fixed number of steps to correct the accumulated error; (4) Record the optimal area and the corresponding cut set selection snapshot for this round.

[0033] By precisely locating the dependency graph, incremental updates only require recalculating the affected nodes and cut sets, reducing the complexity from O(N×K) to O(M).

[0034] S4.3: Random multi-startpoint restart When the improvement pool is empty and the first round of greedy search has been completed, a random multi-start point restart is triggered: 5 to 15 mapped nodes are randomly selected, and for each selected node, one node is randomly selected from the candidate cut set that satisfies the time sequence constraints for replacement. Then, the global time sequence information is recalculated and the incremental table and improvement candidate pool are rebuilt.

[0035] The initial protection mechanism ensures that the first round of greedy search is fully executed until natural convergence, establishing a high-quality baseline solution. The perturbation strength is selected from 5 to 15 nodes to ensure sufficient perturbation strength without completely destroying the current mapping structure.

[0036] S4.4: Bias Learning Learn from the local optima of the current round. Employ a two-way adjustment strategy combining punishment and reward: (1) Penalty mechanism: A penalty is applied to the current best cut set of each mapped node, and the bias value increases the penalty strength (default 0.5): (2) Reward Mechanism: The best alternative is found among the other candidate cut sets for this node, which must simultaneously satisfy: minimum increment, temporal constraints, non-trivial cut set (size ≥ 2), and increment less than the alternative threshold (default 2.0). A reward is applied to the best alternative, with the bias value reducing the reward intensity (default 0.25). The asymmetric design, where the penalty intensity is greater than the reward intensity, enables the method to maintain a conservative strategy when exploring new regions. As the number of rounds increases, the bias value gradually accumulates, with early rounds focusing on fine-grained local optimization and later rounds exploring a wider range, achieving a dynamic balance between development and exploration.

[0037] During multiple iterations, the global optimal area and corresponding snapshot are maintained. After each round of search, the global optimal area is compared and updated to ensure that the optimal solution in all rounds is returned in the end.

[0038] S5: Restore the global optimal solution and output the result. After S4 is completed, the optimal mapping configuration is restored from the global optimal snapshot. Specifically, this includes: traversing all mapped nodes, obtaining the cut set configuration corresponding to the node from the snapshot and setting it as the current optimal cut set, while updating the arrival time of the node. Then, the reference count and final area are recalculated, and the optimized FPGA process mapping result is output.

[0039] Example 2 Based on the same inventive concept as the foregoing embodiments, the present invention also provides an FPGA process mapping method based on bias learning. Step 1: Perform traditional KLUT mapping to obtain the initial mapping: Perform a traditional KLUT mapping on the input logical network. Establish trivial cut sets for constant nodes and the main input node. Calculate the topological sort of the network, and traverse each node in topological order to perform cut set enumeration: generate a new cut set by merging the cut sets of two fan-in nodes, ensuring that the number of leaf nodes after merging does not exceed K. Calculate the delay and area of ​​the cut sets, and perform dominance pruning and quantity restrictions.

[0040] The formula for calculating cut set delay is: After the cut set enumeration is completed, the delayed optimization mapping, area flow optimization mapping and area optimization mapping are executed in sequence to select the initial optimal cut set for each node and obtain the initial mapping result as the starting point for subsequent local search.

[0041] Step 2: Construct a dependency graph, such as Figure 2 As shown: Dependency graphs are a key data structure for achieving efficient incremental updates. In KLUT mappings, when the cut set of a node changes, it may affect the area calculation of other nodes that depend on that node. Traditional methods require traversing the entire network to recalculate the area increment of all nodes, resulting in a computational complexity of O(N×K). This invention reduces the update complexity to O(M) by constructing a dependency graph to accurately locate the affected nodes and cut sets, where N is the total number of nodes, K is the number of cut sets involved, and M is the number of affected nodes, typically much smaller than N×K.

[0042] The dependency graph uses an inverted index structure to record which nodes and which cut sets each leaf node depends on. The core idea is that when a node's cut set is replaced, only other nodes in the cut set that contain that node as a leaf node will be affected. By pre-establishing this dependency relationship, all affected nodes and cut sets can be quickly queried when a replacement occurs.

[0043] For each leaf node l, its dependency table is defined as follows: First, initialize the dependency table D, with a size equal to the total number of network nodes. Each element is initialized as an empty set. Iterate through all candidate cut sets c of all mapped nodes n. If the size of a cut set is less than 2, skip the trivial cut set. For non-trivial cut sets with a size greater than or equal to 2, iterate through all leaf nodes l contained in it and add dependency pairs (n, c) to the dependency table D(l), where n represents a node, c represents a candidate cut set of that node, and l represents a leaf node in the cut set. This structure reduces the incremental update complexity from O(N×K) to O(M).

[0044] Step 3: Initialize the incremental table, such as... Figure 3 As shown: The increment table is the core data structure for achieving efficient greedy search, recording the area increment of each candidate cut set relative to the current best cut set. The area increment is defined as the change in the total network area if a candidate cut set is replaced by the current best cut set. A negative increment indicates that the replacement reduces the total area, while a positive increment indicates that it increases the total area. By maintaining the increment table, the local search process can quickly determine which cut set replacements are beneficial.

[0045] The increment table uses a two-dimensional array structure. The first dimension index is the node index, and the second dimension index is the cutset index of that node. The table entry value is the corresponding area increment. Two auxiliary data structures also need to be maintained: the improved candidate pool is a dynamic array that stores all nodes with increment values ​​less than the negative threshold ε and their cutset index pairs; the position map is a hash table that records the position of each candidate in the improved pool, allowing specified candidates to be removed from the improved pool in constant time.

[0046] The initialization process is as follows: For each mapped node, the current optimal cut set is temporarily removed from the mapping network through a dereference operation to obtain the baseline area. All candidate cut sets for that node are traversed: if they are the same as the optimal cut set, the increment is set to 0; for other candidate cut sets, they are temporarily added to the mapping network through a reference operation, the new area is calculated, and the difference between the new area and the baseline area is the increment value, which is stored in the increment table. Then, the node is immediately dereferenced to restore its state. If the increment is less than negative ε (where ε is the improvement threshold, and a negative increment indicates a reduction in area) and the timing constraint is met (i.e., the delay of the candidate cut set does not exceed the delay of the current optimal cut set plus the timing tolerance), then the candidate is added to the improvement pool. Finally, the current optimal cut set is referenced back to restore the state.

[0047] Let Δ(n,c) represent the area increment of candidate cut set c of node n relative to the current optimal cut set, A(c) be the network area after referencing candidate cut set c, and A0(n) be the baseline area after dereferencing the current optimal cut set of node n. The area increment Δ(n,c) is calculated as follows: When Δ(n,c)<0, it means that the candidate cut set can reduce the total area. If the timing requirements are met, it is added to the improved candidate pool.

[0048] Step 4: Perform multi-round bias learning iterative optimization, such as... Figure 4 As shown: The core innovation of this invention is multi-round bias learning iteration. The three-layer optimization framework includes: outer layer multi-round iteration and bias learning, middle layer greedy local search, and inner layer random multi-startpoint restart. Set the number of iteration rounds R (default 5 rounds), initialize the bias table (size is the number of nodes multiplied by the maximum number of cut sets per node, initial value is all 0) and the global optimal snapshot.

[0049] For each iteration, the following four phases are executed sequentially: Step 4.1: Bias-guided cut set reselection (starting from round 2) This phase is only performed in round 2 and later. After dereferencing all currently optimal cut sets, iterate through each mapped node and calculate a comprehensive score for all its candidate cut sets: Where λ=0.1 is the delay weight coefficient, and the bias value is retrieved from the bias table. The cut set with the lowest score is selected as the new optimal cut set, and the global temporal information is recalculated after referencing all the new optimal cut sets. Through the cumulative effect of the bias, subsequent rounds gradually explore the regions that were not fully explored in the previous rounds.

[0050] Step 4.2: Incremental greedy local search, such as... Figure 6 As shown: Incremental greedy local search is the main part of single-round optimization. Its goal is to gradually improve the mapping quality based on the current mapping configuration through a series of local cut set replacement operations.

[0051] Before the search begins, rebuild the incremental table and the improvement pool. Set the maximum number of moves (default is 100), calculate the current total mapped area as the initial optimal area for this round, and save a snapshot of the current mapping configuration.

[0052] The improved pool P is defined as follows: it contains all node cut sets with negative area increments and satisfying temporal constraints. (n,c) represents the combination of node n and its candidate cut set c, and ε represents the improvement threshold.

[0053] When a node's cut set is replaced, the set of affected leaf nodes is the symmetric difference between the old and new cut set leaf nodes. For each affected leaf node, the calculation formula is as follows: The dependency table is used to query all node cut sets that depend on the leaf, and the incremental value is recalculated only for these node cut sets. Where L... affected L represents the set of affected leaf nodes. old L represents the set of leaf nodes of the old cut set. new This represents the set of leaf nodes of the new cut set.

[0054] The main loop flow is as follows: (1) Check the status of the improvement pool. If the improvement pool is empty, it means that it is trapped in a local optimum. At this time, the next action is determined based on whether to enable random restart and whether the first round of greedy search has been completed. If the first round of search has not been completed, set the completion flag and exit the loop (first round protection mechanism); if the first round has been completed, trigger random multi-start restart.

[0055] (2) If the improvement pool is not empty, randomly select a candidate from it and apply cut set replacement. Random selection instead of greedy selection can increase the diversity of the search. The core of cut set replacement is the incremental update mechanism: after performing cut set replacement, collect all leaf nodes of the old cut set and the new cut set, query all dependency pairs that depend on the leaf node through the dependency table for each leaf node, recalculate the incremental value for the dependency cut set that needs to be updated and update the state of the improvement pool.

[0056] (3) Every 2000 moves, the global timing information is recalculated to correct the accumulated error.

[0057] (4) After moving, calculate the current total area of ​​the mapping. If it is less than the optimal area in this round, update the optimal value and save the snapshot.

[0058] The incremental update mechanism reduces the update complexity after each move from O(N×K) to O(M), enabling the method to perform a large number of move operations in a reasonable amount of time.

[0059] Step 4.3: Randomly restart from multiple starting points, such as... Figure 7 As shown: Triggering conditions: The improved pool is empty and the first round of greedy search is completed. The first-round protection mechanism ensures that the first round of search is fully executed until natural convergence, establishing a high-quality baseline solution.

[0060] Perturbation strategy: Randomly select 5 to 15 mapped nodes, collect candidate cut sets that satisfy the temporal constraints for each node, and randomly select one to replace it. After the perturbation is completed, recalculate the global temporal information and rebuild the incremental table and the improvement pool, and continue the greedy search main loop.

[0061] Perturbation operation: For each selected node, randomly select one from the feasible cut set that satisfies the temporal constraints for replacement, as shown in the following formula: Where C feasible (n) represents the set of feasible candidate cut sets for node n, and delay(c) represents the delay of candidate cut set c. best ) represents the delay of the current optimal cut set, and ε represents the time tolerance.

[0062] Step 4.4: Bias learning, such as Figure 5 As shown: Bias learning is one of the core innovations of this invention. Its purpose is to learn from the local optima of the current round, adjust the bias table through a penalty and reward mechanism, and guide the next round of search to explore more promising regions.

[0063] Bias learning employs a two-way adjustment strategy combining punishment and reward. The punishment mechanism increases the bias value of the currently selected cut set, thus reducing its probability of being selected in the next bias-guided reselection. The reward mechanism decreases the bias value of the best alternative, increasing its probability of being selected. This two-way adjustment is smarter than single punishment, telling the method not only "what not to choose," but also "what to try."

[0064] Parameter settings: Penalty strength is 0.5, reward strength is 0.25, and alternative quality threshold is 2.0. The asymmetric design, where the penalty strength is greater than the reward strength, is intended to ensure the method maintains a conservative strategy when exploring new regions.

[0065] Perform the following operations on each mapped node: (1) Penalize the current best cut set by increasing the penalty intensity of the bias value: (2) Find and reward the best alternative. Iterate through all candidate cut sets and find the best alternative that satisfies the following conditions: minimum increment, meets temporal constraints, is a non-trivial cut set (its size ≥ 2), and the increment is less than the threshold for alternatives. Reward the best alternative: As the number of rounds increases, the bias value gradually accumulates. Early rounds focus on fine-grained local optimization; in later rounds, due to the cumulative increase in the bias value, the method is guided to explore a wider range, achieving a dynamic balance between development and exploration.

[0066] After each round of search, compare the optimal area of ​​the current round with the global optimal area. If the current round is better, update the global optimal area and save a snapshot to ensure that the optimal solution among all rounds is returned in the end.

[0067] Step 5: Restore the global optimal solution and output the results: After multiple rounds of iterative optimization, the optimal mapping configuration is restored from the globally optimal snapshot. All mapped nodes are traversed, and the cut set configuration corresponding to that node is retrieved from the snapshot and set as the current optimal cut set, while the arrival time is updated.

[0068] After restoration, the reference count and final area are recalculated. The reference count recalculation uses a recursive marking method: clear the reference count of all nodes, and recursively mark and increment the reference count starting from the output node. The final mapped area equals the total number of nodes with a reference count greater than 0, calculated as follows: Area final The final mapped area is represented by ref(n), which represents the reference count of node n. The total number of nodes with a reference count greater than 0 is counted. Finally, the optimized FPGA process mapping results are output, including: final mapped area, final mapped delay, area improvement before and after optimization, and total optimization time.

[0069] Some parameters and strategies in the technical solution of this invention can be adjusted to adapt to different application scenarios and design goals.

[0070] Regarding bias learning parameters, the penalty strength is currently set to 0.5 by default, adjustable from 0.3 to 0.8. A higher penalty strength allows the method to explore new regions more aggressively. The reward strength is currently set to 0.25 by default, adjustable from 0.1 to 0.5. A higher reward strength makes alternatives more likely to be selected. The penalty to reward ratio is currently 2:1, adjustable to other ratios such as 3:1 or 1.5:1 to accommodate different exploration-development balance requirements. The alternative quality threshold is currently set to 2.0 by default, adjustable from 1.0 to 5.0. A smaller threshold ensures that only very high-quality candidates are rewarded. The number of bias learning rounds is currently set to 5 by default, adjustable from 3 to 10 rounds. More rounds provide more learning and exploration opportunities but also increase computation time.

[0071] The default value for the delay weighting coefficient in the scoring function is 0.1, and it can be adjusted from 0.05 to 0.2. A larger weighting coefficient makes the method focus more on delay optimization, while a smaller weighting coefficient makes the method focus more on area optimization. This coefficient can be adjusted according to the specific design objectives.

[0072] Regarding the random restart parameters, the number of perturbation nodes is currently set to 5 to 15 by default, and can be adjusted to 3 to 20 nodes. Fewer perturbation nodes result in a restart starting point closer to the current solution, while more perturbation nodes result in a greater difference in the restart starting point. The current perturbation strategy uses random selection of candidate cut sets that satisfy the temporal constraints, but this can be replaced with other strategies, such as prioritizing candidates with smaller increment values ​​or prioritizing candidates that have been rewarded more times.

[0073] Regarding incremental update parameters, the current default period for periodic recalculation is 2000 moves, with an adjustable range of 1000 to 5000 moves. Shorter periods result in more accurate timing information but increase computational overhead, while longer periods reduce computational overhead but may accumulate errors. The current default improvement threshold is 0.005, which can be adjusted according to circuit size and accuracy requirements.

[0074] The bias learning strategy can be replaced. The current learning rate scheduling strategy uses fixed penalty and reward strengths, which can be replaced with an adaptive strategy, such as dynamically adjusting the penalty and reward strengths based on search progress, using smaller strengths in early rounds and larger strengths in later rounds. The current evaluation criterion uses the minimum increment value as the primary standard, which can be replaced with other standards, such as a weighted score that comprehensively considers the increment value and latency, or a preference for cut set size. A mechanism for the bias value to decay over time can be introduced, so that the experience learned in early rounds gradually loses its influence in later rounds, avoiding over-reliance on early experience.

[0075] The multi-round iterative framework can dynamically decide whether to continue iterating based on the search progress, such as terminating early if there is no improvement after several consecutive rounds. It can also simultaneously launch multiple independent bias learning processes, each using a different random seed or initial bias, and finally select the optimal result.

[0076] Through the flexible configuration of the above alternatives, the present invention can adapt to circuits of different sizes, different optimization objectives and different time budgets, and has good versatility and scalability.

[0077] Example 3 The present invention also provides an FPGA process mapping system based on bias learning. The system is used to implement the method described in Embodiment 1. The system includes: a mapping module, a construction module, an initialization module, an iteration module, and an output module. The mapping module is used to perform KLUT input lookup table mapping on the input logic network to obtain the initial mapping; The building module is used to construct a dependency graph based on the initial mapping and obtain the dependency relationship between the cut set of each node and its leaf nodes; The initialization module is used to initialize the increment table based on the dependency relationship between each node's cut set and its leaf nodes, and to calculate the area increment of each candidate cut set of each node relative to the current best cut set. The iterative module is used to perform multiple rounds of bias learning iterative optimization based on the area increment of each candidate cut set of each node relative to the current best cut set; The output module is used to learn from the local optimal solution of the current round, recover the global optimal solution, and output the result.

[0078] The embodiments described above are merely preferred embodiments of the present invention and are not intended to limit the scope of the present invention. Various modifications and improvements made to the technical solutions of the present invention by those skilled in the art without departing from the spirit of the present invention should fall within the protection scope defined by the claims of the present invention.

Claims

1. An FPGA process mapping method based on bias learning, characterized in that, The method includes: S1: Apply KLUT input lookup table mapping to the input logic network to obtain the initial mapping; S2: Based on the initial mapping, construct a dependency graph to obtain the dependency relationship between the cut set of each node and its leaf nodes; S3: Based on the dependency relationship between each node's cut set and its leaf nodes, initialize the increment table and calculate the area increment of each candidate cut set of each node relative to the current best cut set; S4: Perform multiple rounds of bias learning iterative optimization based on the area increment of each candidate cut set of each node relative to the current best cut set; S5: Learn from the local optimum of the current round, recover the global optimum, and output the result.

2. The method according to claim 1, characterized in that, In step S1, the method for obtaining the initial mapping by performing KLUT input lookup table mapping on the input logic network includes: The topological sorting of the computational logic network is performed by traversing each node in topological order and enumerating cut sets. After the cut set enumeration is completed, the delayed optimization mapping, area flow optimization mapping and area optimization mapping are executed in sequence to select the initial optimal cut set for each node and obtain the initial mapping result.

3. The method according to claim 2, characterized in that, In S2, the method for constructing a dependency graph based on the initial mapping includes: Initialize the dependency table, with a size equal to the total number of network nodes, and initialize each element as an empty list; Iterate through all mapped nodes. For each node, for all candidate cut sets, skip if it is a trivial cut set. For non-trivial cut sets, iterate through all leaf nodes it contains and add a dependency pair to the corresponding position of the leaf node in the dependency table, including the index of the current node and the index of the current cut set.

4. The method according to claim 3, characterized in that, In step S3, the method for initializing the incremental table based on the dependency relationship between the cut set of each node and its leaf nodes includes: For each mapped node, the current best cut set is temporarily removed from the mapped network through a dereference operation to obtain the baseline area; Traverse all candidate cut sets for the node: if it is the same as the optimal cut set, set the increment to 0; for other candidate cut sets, temporarily add them to the mapping network through a reference operation, calculate the new area, the difference between the new area and the baseline area is the increment value, store it in the increment table, and then immediately dereference to restore the state; if the increment is less than the negative threshold ε and the temporal constraints are met, add it to the improvement pool; finally, reference back to the current optimal cut set to restore the state.

5. The method according to claim 4, characterized in that, In S4, the method of performing multi-round bias learning iterative optimization based on the area increment of each candidate cut set of each node relative to the current best cut set includes: S41: After dereferencing all current best cut sets, traverse each mapped node, calculate the comprehensive score for all its candidate cut sets, and complete the cut set reselection; S42: Based on the reselection of the cut set, perform an incremental greedy local search; S43: After completing the incremental greedy local search, trigger a random multi-startpoint restart; S44: After a random multi-startpoint restart, learn from the local optimal solution of the current round, adjust the bias table through penalty and reward mechanisms, and finally return the optimal solution of all rounds.

6. The method according to claim 5, characterized in that, In step S41, after dereferencing all current optimal cut sets, the method of traversing each mapped node and calculating a comprehensive score for all its candidate cut sets to complete the cut set reselection includes: ; Where λ is the delay weighting coefficient.

7. The method according to claim 6, characterized in that, In S42, the method of performing incremental greedy local search based on the reselected cut set includes: first rebuilding the incremental table and improving the candidate pool, and then repeatedly executing S421-S424 until the maximum number of iterations is reached or there are no improved candidates. in, S421: Randomly select a candidate cut set from the improved pool; S422: Apply the candidate cut set replacement and perform incremental update: After performing cut set replacement, collect all leaf nodes of the original cut set and the new cut set, obtain all nodes and cut set index pairs that depend on the leaf node by querying the dependency table for each leaf node, recalculate the incremental value for the dependency pairs and update the improvement pool status. S423: Recalculate global timing information every fixed number of steps to correct accumulated errors; S424: Record the snapshot of the optimal area and the corresponding cut set selection in this round.

8. The method according to claim 7, characterized in that, In step S43, the method for triggering a random multi-startpoint restart after completing the incremental greedy local search includes: When the improvement pool is empty and the first round of greedy search has been completed, a random multi-start point restart is triggered: 5 to 15 mapped nodes are randomly selected, and for each selected node, one node is randomly selected from the candidate cut set that satisfies the time sequence constraints for replacement. Then, the global time sequence information is recalculated and the incremental table and improvement candidate pool are rebuilt.

9. The method according to claim 8, characterized in that, In S44, after a random multi-start restart, the method of learning from the local optimal solution of the current round, adjusting the bias table through penalty and reward mechanisms, and finally returning the optimal solution across all rounds includes: Punishment mechanism: ; Reward Mechanism: .

10. An FPGA process mapping system based on bias learning, the system being used to implement the method according to any one of claims 1-9, characterized in that, The system includes: a mapping module, a construction module, an initialization module, an iteration module, and an output module; The mapping module is used to perform KLUT input lookup table mapping on the input logic network to obtain the initial mapping; The building module is used to construct a dependency graph based on the initial mapping and obtain the dependency relationship between the cut set of each node and its leaf nodes; The initialization module is used to initialize the increment table based on the dependency relationship between the cut set of each node and its leaf nodes, and to calculate the area increment of each candidate cut set of each node relative to the current best cut set. The iterative module is used to perform multiple rounds of bias learning iterative optimization based on the area increment of each candidate cut set of each node relative to the current best cut set; The output module is used to learn from the local optimal solution of the current round, recover the global optimal solution, and output the result.