Storage device testing method, electronic device and storage medium

Abstract

The embodiment of the invention provides a storage device testing method, an electronic device and a storage medium, and the method comprises the steps: controlling a first testing device connected with a to-be-tested storage device to execute a preset host operation, collecting interaction data between the first test equipment and the to-be-tested storage equipment in the process of executing the preset host operation and first response data of the to-be-tested storage equipment to the preset host operation; generating a tracking file based on the interaction data and the first response data; and sending the tracking file to a second test device, controlling the second test device to send test data to the to-be-tested storage device based on the tracking file, and carrying out compatibility test on the to-be-tested storage device. According to the embodiment of the invention, when the compatibility test is carried out on the storage device, the host operation can be pre-recorded and then played back, so that the compatibility test efficiency of the storage device is effectively improved.

Description

Technical Field

[0001] This application relates to the field of storage device technology, and in particular to a storage device testing method, electronic device, and storage medium. Background Technology

[0002] Compatibility testing is a crucial step in the manufacturing process of storage devices, ensuring they function correctly under varying hardware and software environments. To guarantee the reliability of test results, compatibility testing of storage devices under different host operating conditions is necessary. Currently, related technologies typically involve connecting storage devices to multiple hosts for individual compatibility tests, which is cumbersome, time-consuming, and inefficient. Summary of the Invention

[0003] In view of this, it is necessary to provide a storage device testing method, electronic device and storage medium to solve the problem of low testing efficiency caused by connecting the above-mentioned storage devices to multiple hosts for compatibility testing.

[0004] In a first aspect, embodiments of this application provide a storage device testing method applied to an electronic device. The method includes: controlling a first test device connected to a storage device under test to execute a preset host operation; collecting interaction data between the first test device and the storage device under test during the execution of the preset host operation, as well as first response data of the storage device under test to the preset host operation; generating a trace file based on the interaction data and the first response data; sending the trace file to a second test device; controlling the second test device to send test data to the storage device under test based on the trace file; and performing compatibility testing on the storage device under test.

[0005] In one possible implementation, the electronic device is communicatively connected to the first test device via a protocol analysis device and a data acquisition device. The first test device, which controls the storage device under test, performs a preset host operation, including sending a preset control command to the first test device via the protocol analysis device and the data acquisition device, thereby controlling the first test device to perform the preset host operation.

[0006] In one possible implementation, the step of collecting interaction data between the first test device and the storage device under test during the execution of the preset host operation, as well as the first response data of the storage device under test to the preset host operation, includes: collecting interaction signals between the first test device and the storage device under test during the execution of the preset host operation, and collecting response signals of the storage device under test to the preset host operation, and sending the collected interaction signals and response signals to the protocol analysis device; and converting the interaction signals into interaction data and the response signals into the first response data by the protocol analysis device.

[0007] In one possible implementation, generating a trace file based on the interaction data and the first response data includes: generating the trace file using the protocol analysis device according to the interaction data and the first response data; converting the trace file into a transaction file and a spreadsheet file; and sending the transaction file and the spreadsheet file to the electronic device; converting the transaction file into non-volatile memory host controller interface data and register data; converting the spreadsheet file into sideband signal data and payload data; converting the non-volatile memory host controller interface data into non-volatile memory host controller interface commands; converting the register data into register commands; and converting the sideband signal data into sideband signals; converting the non-volatile memory host controller interface commands into management commands and I / O commands; converting the register commands into controller commands and high-speed serial computer expansion bus commands; and converting the sideband signals into high-speed serial computer expansion bus reset signals and clock request signals; and encapsulating the management commands, the I / O commands, the controller commands, the high-speed serial computer expansion bus commands, the high-speed serial computer expansion bus reset signals, and the clock request signals to generate the trace file.

[0008] In one possible implementation, after sending the trace file to the second test device, the method further includes: performing a pre-test on the storage device under test based on the trace file.

[0009] In one possible implementation, the pre-testing of the storage device under test based on the trace file includes: acquiring the management commands, I / O commands, register commands, and sideband signals from the trace file; initializing the management command queue and the I / O command queue; detecting and creating the non-volatile memory host controller interface commands; detecting and creating the register commands; and detecting and creating the sideband signals; if the management command queue and the I / O command queue are successfully initialized, and the non-volatile memory host controller interface commands, the register commands, and the sideband signals are successfully created, the storage device under test is determined to have passed the pre-test.

[0010] In one possible implementation, controlling the second test device to send test data to the storage device under test based on the trace file to perform compatibility testing on the storage device under test includes: sending the management command, the I / O command, the controller command, the high-speed serial computer expansion bus command, the high-speed serial computer expansion bus reset signal, and the clock request signal to the storage device under test respectively; obtaining second response data from the storage device under test; and determining the compatibility test result of the storage device under test based on the first response data and the second response data.

[0011] In one possible implementation, controlling the second test device to send test data to the storage device under test based on the trace file, and performing compatibility testing on the storage device under test, includes: identifying abnormal data in the first response data; and deleting data from the trace file based on the abnormal data, retaining management commands, I / O commands, controller commands, high-speed serial computer expansion bus commands, high-speed serial computer expansion bus reset signals, and clock request signals in the trace file corresponding to the abnormal data.

[0012] Secondly, embodiments of this application provide an electronic device, which includes a processor and a memory. The memory is used to store instructions, and the processor is used to call the instructions in the memory to cause the electronic device to execute the above-described storage device testing method.

[0013] Thirdly, embodiments of this application provide a computer-readable storage medium including computer instructions that, when executed on an electronic device, cause the electronic device to perform the aforementioned storage device testing method.

[0014] The storage device testing method, electronic device, and storage medium provided in this application embodiment can control the testing device to execute preset host operations, acquire data generated during the execution of preset host operations, and thus pre-record the host operations. When performing compatibility testing on the storage device, the pre-recorded host operations can be replayed on the testing device, thereby simplifying the testing operation, shortening the testing time, and effectively improving the efficiency of compatibility testing of the storage device. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0016] Figure 1 This is a schematic diagram illustrating an application scenario of a storage device testing method provided in an embodiment of this application.

[0017] Figure 2 This is a schematic diagram illustrating an application scenario of a storage device testing method provided in another embodiment of this application.

[0018] Figure 3 A flowchart of a storage device testing method provided in an embodiment of this application.

[0019] Figure 4 This is a schematic diagram illustrating the generation of a tracking file according to an embodiment of this application.

[0020] Figure 5 This is a schematic diagram illustrating the playback of a tracking file provided in one embodiment of this application.

[0021] Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of this application clearer, the application will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0023] It should be noted that in this application, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The terms "first," "second," "third," "fourth," etc. (if present) in the specification, claims, and drawings of this application are used to distinguish similar objects, not to describe a specific order or sequence.

[0024] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is being described as an example, illustration, or illustration. Any embodiment or design described as "exemplary" or "for example" in the embodiments of this application should not be construed as being better or more advantageous than other embodiments or designs. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0025] Compatibility testing is a crucial step in the manufacturing process of storage devices, ensuring they function correctly under varying hardware and software environments. To guarantee the reliability of test results, compatibility testing of storage devices under different host operating conditions is necessary. Currently, related technologies typically involve connecting storage devices to multiple hosts for individual compatibility tests, which is cumbersome, time-consuming, and inefficient.

[0026] In addition, host operation replay solutions in related technologies include: virtual machine-based operation simulation, which simulates the operation of different hosts in a virtual machine to achieve compatibility testing of storage devices. This method can reduce the complexity of testing to some extent, but it still cannot completely simulate the actual hardware environment, which may lead to deviations in test results; hardware emulator-based operation replay, which uses a hardware emulator to simulate and replay the operation of the host. This method can simulate the actual hardware environment more accurately, but because hardware emulators are expensive and require professional knowledge to operate, they are not suitable for large-scale compatibility testing; and script-automated testing, which simulates the host's operation on the storage device by writing specific scripts. This method can improve testing efficiency to some extent, but it is difficult to cover all host operations, and writing and maintaining scripts requires a high level of technical expertise.

[0027] This application provides a storage device testing method that can control the test device to execute preset host operations, acquire data generated during the execution of preset host operations, and thus pre-record the host operations. When performing compatibility testing on the storage device, the pre-recorded host operations can be replayed on the test device, thereby simplifying the test operation, shortening the test time, effectively improving the compatibility testing efficiency of the storage device, and also reducing the reproduction cost and batch deployment cost.

[0028] See Figure 1 The diagram shown is an application scenario illustration of a storage device testing method provided in an embodiment of this application. Figure 1 The storage device testing system 100 shown includes an electronic device 1, a testing device 2, a protocol analysis device 3, and a data acquisition device 4. The electronic device 1 is connected to the testing device 2 and the protocol analysis device 3 via network communication, such as a wired or wireless network. The protocol analysis device 3 is electrically connected to the data acquisition device 2, for example, via a cable. The data acquisition device 4 is electrically connected to the storage device in the testing device 2, for example, via a PCIe interface. In some embodiments of this application, the electronic device 1, testing device 2, protocol analysis device 3, and data acquisition device 4 constitute the hardware architecture of the storage device testing system. The electronic device 1 and testing device 2 can be personal computers or servers. The server can be a single server, a cloud server, or a server cluster. The electronic device 1 can deploy a computer program product (e.g., software code, computer-readable instructions, etc.) programmed and implemented according to the storage device testing method provided in the embodiments of this application, thereby providing storage device testing services for compatibility testing of the storage device in the testing device 2. In another embodiment of this application, the protocol analysis device 3 and the data acquisition device 4 can also be components included in the electronic device 1.

[0029] See Figure 2 The diagram shown is an application scenario illustration of a storage device testing method provided in another embodiment of this application. Figure 2 The storage device testing system 100 shown includes an electronic device 1 and a testing device 2. The electronic device 1 and the testing device 2 are connected via network communication, such as a wired network or a wireless network.

[0030] See Figure 3 The diagram shown is a flowchart of a storage device testing method provided in an embodiment of this application. The storage device testing method in this embodiment can be applied to, for example... Figure 1 or Figure 2 The electronic device 1 shown. The storage device testing method includes the following steps: S101, control the first test device connected to the storage device under test to execute a preset host operation, and collect the interaction data between the first test device and the storage device under test during the execution of the preset host operation, as well as the first response data of the storage device under test to the preset host operation.

[0031] In one embodiment of this application, host operations are first recorded before performing compatibility testing on the storage device under test. Preset host operations include, but are not limited to: powering on, booting, restarting, hibernating, waking up, reading / writing data, and running applications.

[0032] In one embodiment of this application, Figure 1 The storage device testing system 100 shown records host operations via hardware. The electronic device is communicatively connected to a protocol analysis device, and through the protocol analysis device and the acquisition device, it is communicatively connected to a first test device. The electronic device runs a storage device compatibility testing program, which, in conjunction with the protocol analysis device and the acquisition device, tests the compatibility of the storage device. The electronic device, through the test program, controls the protocol analysis device and the acquisition device to send preset control commands to the first test device, controlling the first test device to execute preset host operations. For example, the preset control command is a power-on command, and the corresponding preset host operation is power-on. Another example is a restart command, and the corresponding preset host operation is restart.

[0033] In one embodiment of this application, an acquisition device acquires the interaction signals between the first test device and the storage device under test during the execution of a preset host operation, as well as the response signals of the storage device under test to the preset host operation. The acquired interaction signals and response signals are then sent to a protocol analysis device, which converts the interaction signals into interaction data and the response signals into first response data.

[0034] The interaction signals between the first test device and the storage device under test (DUT) can be signals sent from the first test device to the DUT. The interaction signals between the first test device and the DUT, along with the response signals from the DUT to a preset host operation, can be circuit signals from the connection interface between the first test device and the DUT. This connection interface can be a USB interface, a SATA (Serial ATA) interface, a SAS (Serial Attached SCSI) interface, a PCIe interface, etc., and the circuit signals can include voltage, current, level, and signal frequency. The interaction signals between the first test device and the DUT, and the response signals from the DUT to the preset host operation, are acquired by an acquisition device and sent to a protocol analysis device. The protocol analysis device preprocesses the interaction signals and response signals, such as amplifying and filtering, converting them into specific protocol information. This specific protocol information can be data frames or commands corresponding to the communication protocol. Specifically, the protocol analysis device converts the interaction signals and response signals into data frames or commands corresponding to the communication protocol based on the communication protocol between the first test device and the storage device under test, thereby obtaining specific protocol information.

[0035] In another embodiment of this application, it can also be based on Figure 2 The storage device testing system 100 shown records host operations via software. Debugging information is added to the driver layer of the first test device. During the interaction between the first test device and the storage device, when the storage device's driver runs, the driver layer can collect the protocol commands executed by the storage device, along with corresponding interaction and response data. At this time, the first test device can directly send the collected interaction and response data to the electronic device via a wireless network.

[0036] S102, based on the interaction data and the first response data, generates a trace file.

[0037] See Figure 4The diagram illustrates the generation of a trace file according to an embodiment of this application. In one embodiment, after the preset host operation is completed, the protocol analysis device controls the acquisition device to stop acquiring signals, packages the interaction data and first response data to generate a trace file, converts the trace file into a transaction file and a spreadsheet file, and sends the transaction file and spreadsheet file to the electronic device. For example, if the test program running in the electronic device is SerialTek, the protocol analysis device packages the acquired interaction data and first response data to generate a trace file; in this case, the trace file format is CCPCI. The protocol analysis device exports the trace file as a text file, which can be in CSV or TXT format, and the text file includes the transaction file and the spreadsheet file. In another embodiment, the test program running in the electronic device can also be LeCroy, and the corresponding trace file format is PEX.

[0038] In one embodiment of this application, the text-formatted trace file is parsed, organized, and encapsulated to convert the trace file format into a preset format, such as Parquet, a columnar storage file format. The transaction file is converted into Non-Volatile Memory Host Controller Interface (NVMe) data (NVMe_info) and register data (Register_info), and the spreadsheet file is converted into sideband sign data and data payload data. The payload data is the data transmitted between the test device and the storage device during data read / write operations. The NVMe data is converted into NVMe commands (NVMe Cmd), the register data into register commands (RegisterCmd), and the sideband sign data into sideband signs (Sideband Cmd).

[0039] In one embodiment of this application, NVMe commands are converted into administrative (Admin) commands and I / O commands, register commands are converted into controller commands and high-speed serial computer expansion bus (PCIe) commands, and sideband signals are converted into a high-speed serial computer expansion bus reset PERST signal and a clock request CLKREQ signal. The PERST signal is used to reset the storage device, and the CLKREQ signal is used to request a clock signal from the host, i.e., the first test device, for data transmission. The administrative commands, I / O commands, controller commands, PCIe commands, PERST signal, and CLKREQ signal are encapsulated to generate a trace file in a preset format, namely Parquet format. Since the initial trace file generated based on interaction and response data is large in size and requires significant memory, converting the trace file format can reduce memory usage and improve transmission efficiency and loading speed.

[0040] In one embodiment of this application, each tracking file may correspond to one preset host operation or multiple preset host operations. If a tracking file corresponds to multiple preset host operations, the tracking file contains multiple sets of tracking data, and each set of tracking data corresponds to one preset host operation.

[0041] S103, send the trace file to the second test device, control the second test device to send test data to the storage device under test based on the trace file, and perform compatibility testing on the storage device under test.

[0042] See Figure 5 The diagram illustrates the playback of a trace file according to an embodiment of this application. In one embodiment, the second test device can be the same as the first test device. By playing back the trace file on the same test device, host operations can be reproduced, thereby testing the compatibility of the same or different storage devices. In another embodiment, the second test device can be a different device from the first test device. Recorded host operations from other test devices can be loaded onto another test device for playback to test the compatibility of the same or different storage devices. Thus, a single test device can execute host operations from multiple test devices, facilitating the testing of the storage device's compatibility with different test devices and different host operations. The storage device under test in S103 and the storage device under test in S101 can be the same or different storage devices.

[0043] In one embodiment of this application, after the electronic device sends a trace file to the second test device, it performs a pre-test on the storage device under test based on the trace file. The second test device loads the trace file by running a playback program and obtains management commands, I / O commands, register commands, and sideband signals from the trace file. A management command queue and an I / O command queue are initialized sequentially based on multiple management commands and multiple I / O commands, respectively. The I / O command queue is initialized using adaptive creation, which means dynamically creating and managing the I / O queue based on the current system state and requirements. NVMe commands are detected and created, which may not contain CQE (Completion Queue Entry) data. CQE data is used to indicate the execution status of the command. Register commands and sideband signals are also detected and created. The initialization of the management command queue and the I / O command queue is determined, as are the creation of the NVMe commands, register commands, and sideband signals. If the initialization of the management command queue and the I / O command queue is successful, and the creation of the NVMe commands, register commands, and sideband signals is successful, the storage device under test is determined to have passed the pre-test. If the management command queue and / or I / O command queue fail to initialize successfully, or if NVMe commands, register commands, and / or sideband signals fail to be created successfully, the storage device under test (DUT) is determined to have failed the pre-test. If the DUT fails the pre-test, an anomaly is determined to exist in the DUT, and the DUT should be debugged and repaired.

[0044] In one embodiment of this application, if the storage device under test (DUT) passes the pre-test, the second test device sends management commands, I / O commands, controller commands, PCIe commands, PERST signals, and CLKREQ signals to the DUT, acquires the second response data of the DUT, and determines the compatibility test result of the DUT based on the first and second response data. The PERST signal is either a rising edge signal (PERST Rising) or a falling edge signal (PERSTFalling). A rising edge signal indicates the start of link initialization, and a falling edge signal indicates that the power is off. The CLKREQ signal is either a free signal (CLKREQ Free) or a rising signal (CLKREQ Rising). A free signal indicates that the CLKREQ signal is not controlled, and a rising signal indicates that the CLKREQ signal changes from low to high. After sending the management commands and I / O commands, the CQE data of the management commands and I / O commands is also acquired and detected. The command status is determined based on the CQE data, and the command status may include sending, sent, received, executing, executed, etc. The second test device sends the management commands, I / O commands, controller commands, PCIe commands, PERST signals, and CLKREQ signals corresponding to a preset host operation to the storage device under test as test data, which is equivalent to executing the preset host operation, thereby realizing the playback of the preset host operation.

[0045] In another embodiment of this application, it is also possible to eliminate the need for pre-testing of the storage device under test. That is, after the management command queue and I / O command queue are initialized and the NVMe command, register command and sideband signal are created, the second test device directly sends the management command, I / O command, controller command, PCIe command, PERST signal and CLKREQ signal to the storage device under test, respectively.

[0046] Among them, such as Figure 1As shown and referring to the method for acquiring the first response data in S101, the electronic device acquires the second response data of the storage device under test through the protocol analysis device and the acquisition device. In one embodiment of this application, if both the first and second response data are normal, it is determined that the storage device under test has passed the compatibility test; if abnormal data exists in either the first or second response data, it is determined that the storage device under test has failed the compatibility test. After the first or second test device performs a preset host operation, the result corresponding to the preset host operation is also determined. If the result corresponding to the preset host operation is normal, it is determined that the first or second response data is normal; if the result corresponding to the preset host operation is abnormal, it is determined that abnormal data exists in either the first or second response data. For example, the preset host operation is power-on, and the result corresponding to the preset host operation includes successful power-on and failed power-on. If the result corresponding to the preset host operation is successful power-on, the first or second response data is normal; if the result corresponding to the preset host operation is failed power-on, abnormal data exists in either the first or second response data. For example, the preset host operation is to write data. The result of the preset host operation includes successful data writing and data writing failure. If the result of the preset host operation is successful data writing, then the first response data or the second response data is normal. If the result of the preset host operation is data writing failure, then there is abnormal data in the first response data or the second response data. In other embodiments of this application, such as Figure 2 As shown, electronic devices can also directly obtain the second response data of the storage device under test from the second test device via a wireless network.

[0047] In another embodiment of this application, abnormal data in the first response data can also be identified. Based on the abnormal data, the trace file can be pruned, retaining the management commands, I / O commands, controller commands, high-speed serial computer expansion bus commands, high-speed serial computer expansion bus reset signals, and clock request signals corresponding to the abnormal data in the trace file. By retaining the commands corresponding to the abnormal data and deleting other commands, the problem can be reproduced using the fewest commands and time.

[0048] See Figure 6 The diagram shown is a structural schematic of an electronic device according to an embodiment of this application. The electronic device 1 includes, but is not limited to, a processor 10, a memory 20, and a computer program stored in the memory 20 and executable on the processor 10. For example, the computer program is a storage device testing program. When the processor 10 executes the computer program, it implements the steps in a storage device testing method.

[0049] For example, the computer program can be divided into one or more modules / units, which are respectively stored in the memory 20 and executed by the processor 10 to complete the storage device testing method provided in this application embodiment. The one or more modules / units can be a series of computer program instruction segments capable of performing specific functions, and the instruction segments are used to describe the execution process of the computer program in the electronic device 1.

[0050] Those skilled in the art will understand that the schematic diagram is merely an example of electronic device 1 and does not constitute a limitation on electronic device 1. It may include more or fewer components than shown in the diagram, or combine certain components, or different components. For example, electronic device 1 may also include input / output devices, network access devices, buses, etc.

[0051] The processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor. The processor is the control center of the electronic device 1, connecting all parts of the electronic device 1 via various interfaces and lines.

[0052] The memory can be used to store the firmware program and / or modules / units. The processor implements various functions of the electronic device 1 by running or executing the computer programs and / or modules / units stored in the memory, and by calling data stored in the memory. The memory may mainly include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as sound playback function, image playback function, etc.), etc.; the data storage area may store data created according to the use of the electronic device 1, etc. In addition, the memory may include volatile and non-volatile memory, such as hard disk, memory, plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, at least one disk storage device, flash memory device, or other storage devices.

[0053] If the modules / units integrated in the electronic device 1 are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, a recording medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, a read-only memory (ROM), or a random access memory (RAM).

[0054] The extended content of the specific embodiments of the computer-readable storage medium described in this application is basically the same as the embodiments of the storage device testing method described above, and will not be repeated here.

[0055] The storage device testing method, electronic device, and storage medium provided in this application embodiment can control the testing device to execute preset host operations, acquire data generated during the execution of preset host operations, and thus pre-record the host operations. When performing compatibility testing on the storage device, the pre-recorded host operations can be replayed on the testing device, thereby simplifying the testing operation, shortening the testing time, and effectively improving the efficiency of compatibility testing of the storage device.

[0056] It will be apparent to those skilled in the art that this application is not limited to the details of the exemplary embodiments described above, and that this application can be implemented in other specific forms without departing from the spirit or essential characteristics of this application. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of this application is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be embraced within this application. No reference numerals in the claims should be construed as limiting the scope of the claims. Furthermore, it is clear that the word "comprising" does not exclude other units or steps, and the singular does not exclude the plural. Multiple units or devices recited in the apparatus claims may also be implemented by the same unit or device in software or hardware. The terms "first," "second," etc., are used to indicate names and do not indicate any particular order.

[0057] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application and are not intended to limit it. Although this application has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of this application without departing from the spirit and scope of the technical solutions of this application.

Claims

1. A method for testing storage devices, applied to electronic devices, characterized in that, The method includes: A first test device connected to the storage device under test is controlled to perform a preset host operation, and interaction data between the first test device and the storage device under test during the execution of the preset host operation, as well as the first response data of the storage device under test to the preset host operation are collected. Based on the interaction data and the first response data, a trace file is generated; The trace file is sent to the second test device, which then sends test data to the storage device under test based on the trace file to perform compatibility testing on the storage device under test.

2. The storage device testing method as described in claim 1, characterized in that, The electronic device communicates with the first test device via a protocol analysis device and a data acquisition device. The first test device, which controls the storage device under test, performs preset host operations, including: The protocol analysis device and the acquisition device send preset control commands to the first test device to control the first test device to execute the preset host operation.

3. The storage device testing method as described in claim 2, characterized in that, The acquisition of interaction data between the first test device and the storage device under test during the execution of the preset host operation, as well as the first response data of the storage device under test to the preset host operation, includes: The acquisition device acquires the interaction signals between the first test device and the storage device under test during the execution of the preset host operation, and acquires the response signals of the storage device under test to the preset host operation, and sends the acquired interaction signals and response signals to the protocol analysis device. The protocol analysis device converts the interaction signal into the interaction data and the response signal into the first response data.

4. The storage device testing method as described in claim 3, characterized in that, The step of generating a trace file based on the interaction data and the first response data includes: The protocol analysis device generates the trace file based on the interaction data and the first response data, converts the trace file into a transaction file and a spreadsheet file, and sends the transaction file and the spreadsheet file to the electronic device. The transaction file is converted into non-volatile memory host controller interface data and register data, and the spreadsheet file is converted into sideband signal data and payload data; The non-volatile memory host controller interface data is converted into non-volatile memory host controller interface commands, the register data is converted into register commands, and the sideband signal data is converted into sideband signals; The non-volatile memory host controller interface commands are converted into management commands and I / O commands, the register commands are converted into controller commands and high-speed serial computer expansion bus commands, and the sideband signals are converted into high-speed serial computer expansion bus reset signals and clock request signals. The management command, the I / O command, the controller command, the high-speed serial computer expansion bus command, the high-speed serial computer expansion bus reset signal, and the clock request signal are encapsulated to generate the trace file.

5. The storage device testing method as described in claim 4, characterized in that, After sending the trace file to the second test device, the method further includes: The storage device under test is pre-tested based on the trace file.

6. The storage device testing method as described in claim 5, characterized in that, The pre-testing of the storage device under test based on the trace file includes: Obtain the management commands, I / O commands, register commands, and sideband signals from the trace file; Initialize the management command queue and I / O command queue, detect and create the non-volatile memory host controller interface command, detect and create the register command, and detect and create the sideband signal; If the management command queue and the I / O command queue are successfully initialized, and the non-volatile memory host controller interface command, the register command, and the sideband signal are successfully created, the storage device under test is determined to have passed the pre-test.

7. The storage device testing method as described in claim 4, characterized in that, The control of the second test device to send test data to the storage device under test based on the trace file, and to perform compatibility testing on the storage device under test, includes: The management command, the I / O command, the controller command, the high-speed serial computer expansion bus command, the high-speed serial computer expansion bus reset signal, and the clock request signal are respectively sent to the storage device under test to obtain the second response data of the storage device under test; The compatibility test results of the storage device under test are determined based on the first response data and the second response data.

8. The storage device testing method as described in claim 4, characterized in that, The control of the second test device to send test data to the storage device under test based on the trace file, and to perform compatibility testing on the storage device under test, includes: Identify the abnormal data in the first response data; Based on the abnormal data, the trace file is reduced, while retaining the management commands, I / O commands, controller commands, high-speed serial computer expansion bus commands, high-speed serial computer expansion bus reset signals, and clock request signals corresponding to the abnormal data in the trace file.

9. An electronic device, characterized in that, The electronic device includes a processor and a memory, the memory being used to store instructions, and the processor being used to invoke the instructions in the memory, causing the electronic device to execute the storage device testing method according to any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that, Includes computer instructions that, when executed on an electronic device, cause the electronic device to perform the storage device testing method as described in any one of claims 1 to 8.

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