High-performance multi-extension industrial personal computer based on FPGA (Field Programmable Gate Array), ARM (Advanced RISC Machine) and computing power card

Abstract

The invention belongs to the technical field of industrial personal computers, and particularly relates to a high-performance multi-extension industrial personal computer based on an FPGA (Field Programmable Gate Array), an ARM (Advanced RISC Machines) and a computing power card, which comprises a central controller, the central controller is in data transmission connection with an FPGA real-time processing module, the FPGA real-time processing module is in data transmission connection with a computing power card acceleration module, and the computing power card acceleration module is connected with an extension interface module; the central controller serves as an intelligent control core of the whole system; the FPGA real-time processing module is used as a core hub for real-time data processing of the system; the computing power card acceleration module serves as a key component of the system for realizing large-scale data operation and complex algorithm processing, and provides strong computing acceleration capability for the system. According to the overall structure provided by the embodiment of the invention, the constraint of a traditional architecture is broken through, the FPGA, the ARM processor and the computing power card are innovatively and deeply fused, and a powerful and flexible computing processing system is constructed.

Description

Technical Field

[0001] This application relates to the field of industrial control computer technology, and in particular to a high-performance, multi-expansion industrial control computer based on FPGA, ARM and computing card. Background Technology

[0002] In the automotive manufacturing industry, modern production lines place stringent demands on equipment response speed. The precise operation of each robotic arm relies on millisecond-level real-time response; any delay can lead to product accuracy deviations or even production accidents. Smart grid systems process hundreds of millions of real-time data points daily. From grid load monitoring to fault early warning, the real-time analysis capability of massive amounts of data directly impacts power supply stability and energy dispatch efficiency. In the petrochemical industry, various sensors throughout the production site continuously output data; the rapid processing of this data is crucial for ensuring production safety and optimizing processes. However, the shortcomings of traditional industrial control computers are becoming increasingly apparent when dealing with these complex industrial scenarios.

[0003] At the hardware architecture level, while x86 architecture industrial PCs possess strong general-purpose computing power and can meet some routine computing needs, their high power consumption in industrial applications not only significantly increases enterprise operating costs, but their poor real-time performance often leads to decreased equipment control precision and affects production quality. ARM architecture industrial PCs, with their low power consumption and good real-time performance, are used in some energy-sensitive scenarios, but their limited computing resources are insufficient to meet the computing power requirements of industrial big data processing and complex algorithm execution. While pure FPGA devices possess excellent real-time processing capabilities, they lack complete system support, face complex programming environments and debugging challenges during development, and the stability of device operation is difficult to guarantee effectively.

[0004] Furthermore, in the process of building smart factories, industrial equipment is showing a trend towards diversification and intelligence. Traditional industrial control computers have limited interface types and quantities, making it difficult to meet the connection needs of new industrial equipment. They also suffer from insufficient bandwidth and poor compatibility during data transmission, failing to adapt to new industrial bus protocols such as EtherCAT and Profinet, severely hindering the integration and collaborative development of industrial automation systems. Therefore, this invention proposes a high-performance, multi-expansion industrial control computer based on FPGA, ARM, and computing cards. Summary of the Invention

[0005] This application provides a high-performance, multi-expansion industrial control computer based on FPGA, ARM, and computing power card to solve the problems mentioned above.

[0006] This application provides a high-performance, multi-expansion industrial control computer based on FPGA, ARM, and computing card, including: The central controller is connected to the FPGA real-time processing module for data transmission, and the FPGA real-time processing module is connected to the computing power card acceleration module for data transmission, and the computing power card acceleration module is connected to an expansion interface module. The central controller serves as the intelligent control core of the entire system. The FPGA real-time processing module serves as the core hub for real-time data processing in the system. The computing power card acceleration module is a key component for the system to realize large-scale data operation and complex algorithm processing, providing the system with powerful computing acceleration capabilities.

[0007] Preferably, the FPGA real-time processing module employs a timestamp-based synchronization scheduling algorithm. This algorithm assigns a precise timestamp to each acquired data stream, enabling the system to clearly distinguish and process data at each moment when multiple signals arrive simultaneously, thus avoiding data corruption.

[0008] Preferably, the core of the FPGA real-time processing module is to maintain a global synchronization counter, whose counting rule is as follows:

[0009] in, It is the timestamp of the current data. It is the base time of the acquisition cycle, and N is the clock cycle count. It is the system clock cycle.

[0010] Preferably, the central controller employs a dynamic priority scheduling strategy, in which the emergency stop instruction has the highest priority, while the data log recording task within the central controller has a lower priority, and the dynamic priority scheduling strategy monitors the task queue in real time.

[0011] Preferably, a dynamic priority scheduling strategy scheduling decision can be abstracted into the following judgment logic:

[0012] A dynamic priority scheduling strategy ensures that critical tasks receive immediate responses while fully utilizing all cores of the central processing unit, achieving efficient and stable system control.

[0013] Preferably, the computing power card acceleration module has extremely high single-precision floating-point arithmetic capabilities. It can interact with the central processing unit module through a high-speed interface to achieve high-speed data transmission. When processing complex visual tasks such as product surface defect detection, the deep learning model running on the computing power card module follows a standard but efficient recognition process.

[0014] Preferably, the identification process includes the following steps: S1. Preprocess the input image, including uniform scaling and pixel normalization; S2. Extract image features using a pre-trained neural network model; S3. Use a classifier to determine whether a defect exists and the type of defect.

[0015] Preferably, the expansion interface module, as a key component for interconnecting the industrial control computer with external devices, integrates multiple standard communication interfaces, including Ethernet interface, universal serial bus interface, RS485 interface and universal input / output interface.

[0016] Preferably, it also includes a power supply module, which is connected to the central controller, the FPGA real-time processing module, the computing power card acceleration module, and the expansion interface module. The power supply module provides operating power to the central controller, the FPGA real-time processing module, the computing power card acceleration module, and the expansion interface module.

[0017] The technical solutions provided in this application have the following advantages compared with the prior art: The overall structure provided in this application embodiment breaks through the constraints of traditional architecture and innovatively integrates FPGA, ARM processor and computing card to build a powerful and flexible computing processing system. In terms of scalability, the design of the extension interface module can be described as a "bridge connecting everything," integrating a wide variety of interface types. This invention fully considers the power supply conditions and energy-saving requirements of industrial sites, optimizing everything from hardware selection to software strategy. It carefully selects low-power devices such as CPUs and FPGAs as core components, reducing power consumption at the hardware level. The CPU employs advanced manufacturing processes and an energy-saving architecture, ensuring high performance while minimizing energy consumption; the programmable nature of the FPGA allows it to dynamically adjust power consumption according to actual task requirements, avoiding unnecessary energy waste. Furthermore, through in-depth analysis and rational allocation of system tasks, different devices perform their respective functions, fully leveraging their advantages while avoiding unnecessary energy consumption. Attached Figure Description

[0018] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0019] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram of the overall principle structure of the present invention. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0022] Various embodiments of this application may exist in the form of a range. It should be understood that the description in the form of a range is merely for convenience and brevity and should not be construed as a rigid limitation on the scope of this application. Therefore, it should be considered that the range description has specifically disclosed all possible sub-ranges and single numerical values ​​within that range. For example, it should be considered that the range description from 1 to 6 has specifically disclosed sub-ranges, such as from 1 to 3, from 1 to 4, from 1 to 5, from 2 to 4, from 2 to 6, from 3 to 6, etc., and single numbers within the range, such as 1, 2, 3, 4, 5, and 6, regardless of the range. In addition, whenever a numerical range is indicated in this application, it means including any referenced number (fraction or integer) within the indicated range. Unless otherwise specified, all raw materials, reagents, instruments, and equipment used in this application can be purchased commercially or prepared using existing equipment.

[0023] In this application, unless otherwise stated, directional terms such as "upper" and "lower" specifically refer to the drawing directions in the accompanying drawings. Furthermore, in this application, the terms "comprising," "including," etc., mean "including but not limited to." In this application, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. In this application, "and / or" describes the relationship between related objects, indicating that three relationships may exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. A and B can be singular or plural. In this application, "at least one" means one or more, and "more than one" means two or more. "At least one," "at least one of the following," or similar expressions refer to any combination of these items, including any combination of a single item or a plural item. For example, "at least one of a, b, or c", or "at least one of a, b, and c", can both represent: a, b, c, ab (i.e., a and b), ac, bc, or abc, where a, b, and c can be a single or multiple, such as... Figure 1 As shown: This application embodiment provides a high-performance, multi-expansion industrial control computer based on FPGA, ARM, and computing card, including: The central controller is connected to the FPGA real-time processing module for data transmission, and the FPGA real-time processing module is connected to the computing power card acceleration module for data transmission, and the computing power card acceleration module is connected to an expansion interface module. The central controller serves as the intelligent control core of the entire system. The FPGA real-time processing module serves as the core hub for real-time data processing in the system. The computing power card acceleration module is a key component for the system to realize large-scale data operation and complex algorithm processing, providing the system with powerful computing acceleration capabilities.

[0024] Specifically: The central processing unit (CPU) software is designed based on the Linux system, using specialized tools to build a customized embedded Linux distribution. During system startup, the startup script is optimized to reduce startup time and achieve rapid startup of the industrial control computer. In terms of task scheduling, real-time patches to the Linux kernel are used to control task scheduling latency to the microsecond level. Device drivers are written to support FPGA modules, computing card modules, and various expansion interfaces, ensuring seamless hardware and software integration. Simultaneously, application layer software is developed to implement system monitoring, data processing, and external communication functions.

[0025] The FPGA real-time processing module employs a timestamp-based synchronization scheduling algorithm. This algorithm assigns a precise timestamp to each acquired data stream, enabling the system to clearly distinguish and process data at each moment when multiple signals arrive simultaneously, thus avoiding data corruption.

[0026] The core of the FPGA real-time processing module is to maintain a global synchronous counter, whose counting rules are as follows:

[0027] in, It is the timestamp of the current data. It is the base time of the acquisition cycle, and N is the clock cycle count. It is the system clock cycle.

[0028] Specifically, the multi-layered interrupt response mechanism built upon the unique parallel processing architecture and reconfigurable characteristics of FPGA enables it to respond to and process external event signals rapidly within a very short time. Whether it is the real-time precise control of tool position and cutting parameters during CNC machine tool machining, or the immediate execution of instructions for complex motion trajectory planning in industrial robots, the FPGA module can ensure the timeliness of data acquisition and the timely issuance of control commands.

[0029] Furthermore, the FPGA software design employs a hardware description language for programming. In developing the FPGA's protocol stack parsing logic, we adopted a state machine-based design pattern. This is analogous to designing an automatic door control system, which has several clearly defined states such as "waiting," "opening," "keeping open," and "closing." Similarly, for EtherCAT protocol parsing, we defined multiple states such as "frame header detection," "data segment reading," "CRC check," and "acknowledgment." The system is always in one of these states and transitions between them according to preset rules based on the content of the received data packets. This design pattern is logically clear, ensuring the accuracy of each step in protocol parsing with extremely low latency. Parallel sampling logic was written in the data acquisition module to achieve synchronous acquisition of multiple analog signals. For industrial bus protocols, corresponding protocol stack parsing logic was developed, utilizing a state machine to implement data reception, parsing, and transmission, ensuring extremely low protocol parsing latency. Professional development tools were used for synthesis, placement and routing, and simulation verification to ensure the correctness of the FPGA logic functions.

[0030] The central controller employs a dynamic priority scheduling strategy, in which emergency stop instructions have the highest priority, while data log recording tasks within the central controller have a lower priority. This dynamic priority scheduling strategy also monitors the task queue in real time.

[0031] A dynamic priority scheduling strategy can be abstracted into the following decision logic:

[0032] A dynamic priority scheduling strategy ensures that critical tasks receive immediate responses while fully utilizing all cores of the central processing unit, achieving efficient and stable system control.

[0033] The computing power card acceleration module possesses extremely high single-precision floating-point computing power. Through a high-speed interface, it interacts with the central processing unit module, enabling high-speed data transmission. When handling complex visual tasks such as product surface defect detection, the deep learning model running on the computing power card module follows a standard yet efficient recognition process. Specifically: the dynamic priority scheduling strategy, through optimization of the embedded operating system's real-time kernel, can control task scheduling latency to the microsecond level; based on a multi-core architecture design and combined with intelligent load balancing algorithms, it can achieve parallel and efficient processing of multiple tasks in typical application scenarios such as multi-sensor data fusion analysis, significantly improving the overall system processing efficiency. Furthermore, advanced power management technology can automatically adjust the operating mode according to the system load, entering energy-saving mode under light load scenarios, significantly reducing the overall energy consumption level, and achieving efficient energy utilization while ensuring high-performance system operation.

[0034] Furthermore, during the integration of computing card software, the officially provided toolkits and libraries are installed to provide software support for parallel computing. In application development, specific programming models are used to parallelize complex tasks such as image recognition and data analysis. For example, in industrial image inspection applications, kernel functions are written to perform parallel convolution operations on image data acquired by industrial cameras, improving the efficiency and accuracy of defect detection.

[0035] The identification process includes the following steps: S1. Preprocess the input image, including uniform scaling and pixel normalization; S2. Extract image features using a pre-trained neural network model; S3. Use a classifier to determine whether a defect exists and the type of defect.

[0036] Specifically, the identification process ensures that the detection task is both fast and accurate. In machine vision inspection applications in the field of intelligent manufacturing, when facing the task of detecting surface defects in industrial products, the computing power card module can simultaneously process image data acquired by multiple high-definition industrial cameras and achieve high-precision defect identification based on deep learning algorithms. In image recognition and analysis scenarios in the field of intelligent transportation, for real-time monitoring data from multiple cameras at urban traffic intersections, it can quickly complete target detection and trajectory tracking tasks, effectively meeting the stringent requirements of industrial scenarios for real-time and accurate data processing.

[0037] The expansion interface module, as a key component for interconnecting industrial control computers with external devices, integrates multiple standard communication interfaces, including Ethernet interface, universal serial bus interface, RS485 interface, and universal input / output interface.

[0038] Specifically, the number of interfaces can be flexibly configured according to actual application needs. The Ethernet interface supports high-speed adaptive network transmission, adheres to international standard protocols, and not only enables remote data transmission and network communication, but also achieves high-precision clock synchronization for all network devices via Network Time Protocol (NTP). The USB interface adopts a high-speed transmission standard, adaptable to various external devices. The RS485 interface has built-in isolation protection circuitry, providing long-distance communication capabilities to meet the communication needs of various devices in an industrial bus environment. The GPIO interface provides users with flexible custom input / output control options, supports multiple trigger modes, and allows for precise control of external devices through software programming. This rich variety of interface types and flexible configuration methods enable this industrial control computer to widely adapt to the system expansion needs of various industrial application scenarios.

[0039] It also includes a power module, which is connected to the central controller, the FPGA real-time processing module, the computing power card acceleration module, and the expansion interface module. The power module provides operating power to the central controller, the FPGA real-time processing module, the computing power card acceleration module, and the expansion interface module.

[0040] As a fundamental unit ensuring stable system operation, the power supply module adopts a wide voltage input design, adaptable to various industrial power supply environments. Simultaneously, this module integrates comprehensive overvoltage, overcurrent, and short-circuit protection mechanisms, enabling rapid response and power cut-off in the event of electrical faults, effectively protecting the electrical safety of internal modules and improving equipment reliability. Furthermore, by employing active power factor correction (PFC) technology, it significantly improves energy utilization efficiency, reduces grid harmonic pollution, and ensures the system complies with international electromagnetic compatibility standards.

[0041] The above description is merely a specific embodiment of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed in this application.

Claims

1. A high-performance, multi-expansion industrial control computer based on FPGA, ARM, and computing card, characterized in that, include: The central controller is connected to the FPGA real-time processing module for data transmission, and the FPGA real-time processing module is connected to the computing power card acceleration module for data transmission, and the computing power card acceleration module is connected to an expansion interface module. The central controller serves as the intelligent control core of the entire system. The FPGA real-time processing module serves as the core hub for real-time data processing in the system. The computing power card acceleration module is a key component for the system to realize large-scale data operation and complex algorithm processing, providing the system with powerful computing acceleration capabilities.

2. The high-performance, multi-expansion industrial control computer based on FPGA, ARM, and computing card according to claim 1, characterized in that: The FPGA real-time processing module employs a timestamp-based synchronization scheduling algorithm. This algorithm assigns a precise timestamp to each acquired data stream, enabling the system to clearly distinguish and process data at each moment when multiple signals arrive simultaneously, thus avoiding data corruption.

3. The high-performance, multi-expansion industrial control computer based on FPGA, ARM, and computing card according to claim 2, characterized in that: The core of the FPGA real-time processing module is to maintain a global synchronous counter, whose counting rules are as follows: in, It is the timestamp of the current data. It is the base time of the acquisition cycle, and N is the clock cycle count. It is the system clock cycle.

4. The high-performance, multi-expansion industrial control computer based on FPGA, ARM, and computing card according to claim 1, characterized in that: The central controller employs a dynamic priority scheduling strategy, in which emergency stop instructions have the highest priority, while data log recording tasks within the central controller have a lower priority. This dynamic priority scheduling strategy also monitors the task queue in real time.

5. A high-performance, multi-expansion industrial control computer based on FPGA, ARM, and computing card according to claim 4, characterized in that: A dynamic priority scheduling strategy can be abstracted into the following decision logic: A dynamic priority scheduling strategy ensures that critical tasks receive immediate responses while fully utilizing all cores of the central processing unit, achieving efficient and stable system control.

6. A high-performance, multi-expansion industrial control computer based on FPGA, ARM, and computing card as described in claim 1, characterized in that: The computing power card acceleration module has extremely high single-precision floating-point arithmetic capabilities. It interacts with the central processing unit module through a high-speed interface, enabling high-speed data transmission. When handling complex visual tasks such as product surface defect detection, the deep learning model running on the computing power card module follows a standard but efficient recognition process.

7. A high-performance, multi-expansion industrial control computer based on FPGA, ARM, and computing card as described in claim 6, characterized in that: The identification process includes the following steps: S1. Preprocess the input image, including uniform scaling and pixel normalization; S2. Extract image features using a pre-trained neural network model; S3. Use a classifier to determine whether a defect exists and the type of defect.

8. A high-performance, multi-expansion industrial control computer based on FPGA, ARM, and computing card according to claim 1, characterized in that: The expansion interface module, as a key component for interconnecting industrial control computers with external devices, integrates multiple standard communication interfaces, including Ethernet interface, universal serial bus interface, RS485 interface, and universal input / output interface.

9. A high-performance, multi-expansion industrial control computer based on FPGA, ARM, and computing card according to claim 1, characterized in that: It also includes a power module, which is connected to the central controller, the FPGA real-time processing module, the computing power card acceleration module, and the expansion interface module. The power module provides operating power to the central controller, the FPGA real-time processing module, the computing power card acceleration module, and the expansion interface module.

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