Chip attachment position offset detection method, device, storage medium and system

Abstract

The invention relates to a chip attachment position offset detection method, device, storage medium and system, and the method comprises the steps: obtaining a substrate image through image collection equipment before a chip is attached to a substrate, and determining the coordinates of a central point of a chip attachment region of the substrate according to the substrate image; after the chip is attached to the substrate, acquiring a chip image through image acquisition equipment, and determining coordinates of a central point of the chip according to the chip image; calculating a difference value between the coordinate of the central point of the chip attachment area and the coordinate of the central point of the chip to obtain an attachment position offset; and under the condition that the offset of the attachment position is greater than the control value, alarm information is sent out. The method solves the problem that in the prior art, a method for monitoring the offset of the chip attaching position in real time in the production process is lacked.

Description

Technical Field

[0001] This application relates to the field of camera assembly technology, and in particular to a method, apparatus, storage medium and system for detecting chip attachment position offset. Background Technology

[0002] With the continuous upgrading of smartphone camera hardware, the market has placed higher demands on various performance indicators of cameras, driving the continuous iteration and optimization of camera assembly processes to adapt to these needs. Currently, the most widely used and mature technology is COB (Chip on Board) assembly technology, whose core processes include surface mount technology (SMT), chip mounting, wire bonding, lens filter mounting, and lens and cable assembly. The chip mounting process involves applying adhesive to the substrate and attaching the chip to the chip mounting area, laying the foundation for subsequent wire bonding to interconnect the chip and substrate. However, due to precision deviations in the mounting equipment or abnormalities in the production process, the chip mounting position is prone to misalignment. Severe misalignment can cause a series of problems: firstly, the chip may cover the wire bond pads on the substrate, affecting the wire bonding process; secondly, it may affect the alignment accuracy of the lens and the photosensitive area of ​​the chip, thus affecting the camera's focal length and image quality. Therefore, the amount of chip mounting position misalignment directly determines the product quality.

[0003] Existing technologies lack methods for real-time monitoring of chip attachment position offset during the production process, which can easily lead to batch defects and economic losses. Summary of the Invention

[0004] This application provides a method, apparatus, storage medium, and system for detecting chip attachment position offset, in order to solve the problem that there is a lack of methods in the prior art for real-time monitoring of chip attachment position offset during the production process.

[0005] In a first aspect, this application provides a method for detecting chip attachment position offset. The method is applied to a control module and includes: before the chip is attached to a substrate, acquiring an image of the substrate using an image acquisition device, and determining the coordinates of the center point of the chip attachment area on the substrate based on the substrate image; after the chip is attached to the substrate, acquiring an image of the chip using the image acquisition device, and determining the coordinates of the center point of the chip based on the chip image; calculating the difference between the coordinates of the center point of the chip attachment area and the coordinates of the center point of the chip to obtain the attachment position offset; and issuing an alarm message if the attachment position offset is greater than a control value.

[0006] Optionally, the substrate further includes a first marker point and a second marker point, the first marker point and the second marker point being located at opposite ends of the diagonal of the chip attachment area. The step of determining the coordinates of the center point of the chip attachment area of ​​the substrate based on the substrate image includes: determining the coordinates of a first target vertex and a second target vertex based on the substrate image, the first target vertex being a vertex of the outer contour of the first marker point that is away from the chip attachment area along a first diagonal direction, the first diagonal direction being the diagonal direction of the chip attachment area, and the second target vertex being a vertex of the outer contour of the second marker point that is away from the chip attachment area along the first diagonal direction; and calculating the average of the coordinates of the first target vertex and the coordinates of the second target vertex to obtain the coordinates of the center point of the chip attachment area.

[0007] Optionally, the step of acquiring a substrate image using an image acquisition device includes: acquiring a first marker region image and a second marker region image using the image acquisition device, wherein the first marker region image contains the first marker point and the second marker region image contains the second marker point; the step of determining the coordinates of the first target vertex and the second target vertex based on the substrate image includes: performing binarization processing on the first marker region image and the second marker region image respectively, and extracting the outer contours of the first marker point and the second marker point from the binary images of the first marker region image and the second marker region image respectively; and determining the coordinates of the first target vertex based on the outer contour of the first marker point, and determining the coordinates of the second target vertex based on the outer contour of the second marker point.

[0008] Optionally, the step of determining the coordinates of the center point of the chip based on the chip image includes: determining the coordinates of a third target vertex and a fourth target vertex based on the chip image, wherein the third target vertex and the fourth target vertex are two vertices of the outer contour of the chip along the second diagonal direction, and the second diagonal direction is the diagonal direction of the outer contour of the chip; and calculating the average value of the coordinates of the third target vertex and the coordinates of the fourth target vertex to determine the coordinates of the center point of the chip.

[0009] Optionally, the outer contour of the chip is composed of a first side, a second side, a third side, and a fourth side. The first side and the third side are parallel, and the second side and the fourth side are parallel. The step of acquiring the chip image using the image acquisition device includes: acquiring images of the first side region, the second side region, the third side region, and the fourth side region using the image acquisition device. The first side region image contains a first target segment of the first side, the second side region image contains a second target segment of the second side, the third side region image contains a third target segment of the third side, and the fourth side region image contains a fourth target segment of the fourth side. Based on the chip image, the coordinates of the third target vertex and the fourth target vertex are determined. The coordinates of the vertex include: performing binarization processing on the first side region image, the second side region image, the third side region image, and the fourth side region image respectively, and extracting the first target segment, the second target segment, the third target segment, and the fourth target segment from the binary images of the first side region image, the second side region image, the third side region image, and the fourth side region image respectively; and determining the coordinates of the intersection point of the extension line of the first target segment and the extension line of the second target segment as the coordinates of the third target vertex, and determining the coordinates of the intersection point of the extension line of the third target segment and the extension line of the fourth target segment as the coordinates of the fourth target vertex.

[0010] Optionally, before the step of acquiring a substrate image through an image acquisition device and determining the coordinates of the center point of the chip mounting area of ​​the substrate based on the substrate image, the method further includes: acquiring a cumulative mounting quantity through a mounting device, wherein the cumulative mounting quantity is the cumulative number of chips mounted by the mounting device; and entering an offset detection mode when the cumulative mounting quantity meets a preset condition, wherein the preset condition is that the ratio of the cumulative mounting quantity to N is a positive integer, and N is a positive integer.

[0011] Optionally, after issuing the alarm message, the method further includes: exiting the offset detection mode.

[0012] Optionally, after calculating the difference between the coordinates of the center point of the substrate and the coordinates of the center point of the chip to obtain the attachment position offset, the method further includes: exiting the offset detection mode if the attachment position offset is less than or equal to the control value.

[0013] Secondly, this application provides a chip mounting position offset detection device, which is applied to a control module. The device includes: a first acquisition and determination module, used to acquire an image of the substrate using an image acquisition device before the chip is mounted to the substrate, and to determine the coordinates of the center point of the chip mounting area of ​​the substrate based on the substrate image; a second acquisition and determination module, used to acquire an image of the chip using the image acquisition device after the chip is mounted to the substrate, and to determine the coordinates of the center point of the chip based on the chip image; a calculation module, used to calculate the difference between the coordinates of the center point of the chip mounting area and the coordinates of the center point of the chip to obtain the mounting position offset; and an alarm module, used to issue an alarm message when the mounting position offset is greater than a control value.

[0014] Thirdly, this application provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of any of the chip attachment position offset detection methods described above.

[0015] Fourthly, this application also provides a chip attachment position offset detection system, the system comprising: an attachment device; an image acquisition device; and a control module, the control module being used to implement the steps of any of the chip attachment position offset detection methods described above.

[0016] In this embodiment, before the chip is attached to the substrate, an image of the substrate is acquired using an image acquisition device, and the coordinates of the center point of the chip attachment area on the substrate are determined based on the substrate image. After the chip is attached to the substrate, an image of the chip is acquired using an image acquisition device, and the coordinates of the center point of the chip are determined based on the chip image. The difference between the coordinates of the center point of the chip attachment area and the coordinates of the center point of the chip is calculated to obtain the attachment position offset. If the attachment position offset is greater than a control value, an alarm message is issued. This application can detect the chip attachment position offset of each product and issue an alarm message if the chip attachment position offset is greater than a control value. This achieves real-time monitoring of the chip attachment position offset during the production process, avoids the generation of batch defective products, improves the product qualification rate, and solves the problem of the lack of a method for real-time monitoring of chip attachment position offset during the production process in the prior art. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0020] Figure 1 A schematic flowchart illustrating a chip mounting position offset detection method provided in an embodiment of this application; Figure 2 A schematic diagram illustrating the placement position of a substrate according to an embodiment of this application; Figure 3 A schematic diagram illustrating the placement of a chip according to an embodiment of this application; Figure 4 A schematic diagram of a substrate provided in an embodiment of this application; Figure 5(a) is a schematic diagram of the first type of chip provided in the embodiment of this application; Figure 5(b) is a schematic diagram of the second type of chip provided in the embodiments of this application; Figure 6 A structural block diagram of a chip mounting position offset detection device provided in an embodiment of this application; The symbols in the attached image are explained as follows: 1. Substrate; 21. First marker point; 22. Second marker point; 3. Carrier board; 4. Image acquisition device; 5. Chip; 61. Image of the first marker point area; 62. Image of the second marker point area; 63. First target vertex; 64. Second target vertex; 7. Chip attachment area; 81. Image of the first side area; 82. Image of the second side area; 83. Image of the third side area; 84. Image of the fourth side area; 85. Third target vertex; 86. Fourth target vertex; 91. First target segment; 92. Second target segment; 93. Third target segment; 94. Fourth target segment. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0022] The following disclosure provides numerous different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of the invention. Furthermore, reference numerals and / or letters may be repeated in different examples. Such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed.

[0023] The following are explanations of the terms used.

[0024] The marking points on the substrate provide precise positioning for chip mounting.

[0025] World coordinate system: It is a global reference coordinate system used to uniformly describe the position of objects in the camera assembly line.

[0026] In existing technologies, the method for detecting chip attachment position offset involves removing the chip-attached product and sending it to a resolution chamber. A three-dimensional coordinate measuring machine (3D coordinate measuring machine) is used, with the substrate's marked points as a reference, to first collect the center coordinates of the chip attachment area on the substrate, then measure the center coordinates of the chip. Subtracting these two center coordinates yields the chip attachment position offset. This method is typically performed before or during production. For pre-production testing, the attachment equipment is adjusted before production begins, and the product is sent to the resolution chamber to confirm the chip attachment position offset, ensuring the equipment is functioning correctly. However, this method cannot monitor the chip attachment position offset during production. While in-process testing can monitor the chip placement offset during production, this monitoring is not real-time. Instead, it involves periodically sampling finished chip-attached products and sending them to the analysis room for measurement. This leads to several problems: First, removing products from the production line for measurement is time-consuming and affects production efficiency. Furthermore, removing products can damage them, resulting in scrap and waste. Second, since only individual products are sampled, even if a problem is detected, it only confirms that the sampled product is problem-free, not that the already manufactured products are problem-free. Therefore, this monitoring method not only fails to achieve its monitoring purpose but also wastes products.

[0027] In summary, existing technologies lack methods for real-time monitoring of chip attachment position offset during the manufacturing process.

[0028] To address the technical problem of the lack of a method for real-time monitoring of chip attachment position offset during the production process in existing technologies, this application provides a chip attachment position offset detection method, a chip attachment position offset detection device, a computer-readable storage medium, and a chip attachment position offset detection system. These methods enable real-time monitoring of chip attachment position offset during the production process, preventing the generation of batch defective products and improving the product qualification rate.

[0029] Figure 1 A chip mounting position offset detection method is provided in this application embodiment. The method is applied to a control module and includes: Step S101: Before the chip is attached to the substrate, an image of the substrate is acquired by an image acquisition device, and the coordinates of the center point of the chip attachment area of ​​the substrate are determined based on the substrate image. For example, such as Figure 2 As shown, the substrate 1, after completing the surface mount process, is placed on the cavity of the carrier plate 3. The carrier plate 3 is transported to the mounting equipment. At this time, the control module controls the image acquisition device 4 to move above the substrate 1 and controls the image acquisition device to acquire the substrate image.

[0030] Step S102: After the chip is attached to the substrate, the chip image is acquired by the image acquisition device, and the coordinates of the center point of the chip are determined based on the chip image. In an optional embodiment, after step S101 and before step S102, the method further includes: controlling the attaching device to attach the chip to the substrate according to the coordinates of the center point of the chip attaching area.

[0031] For example, such as Figure 3 As shown, the control module controls the attaching device to attach the chip 5 onto the substrate 1 based on the coordinates of the center point of the chip attaching area. Then, the control module controls the image acquisition device 4 to acquire the chip image. It is necessary to convert the coordinates of the center point of the chip attaching area from the image coordinate system to the world coordinate system. Then, based on the coordinates of the center point of the chip attaching area in the world coordinate system, the control module controls the attaching device to attach the chip to the substrate. The method of controlling the attaching device to attach the chip to the substrate based on the coordinates of the center point of the chip attaching area in the world coordinate system is prior art and will not be described in detail here.

[0032] Step S103: Calculate the difference between the coordinates of the center point of the chip attachment area and the coordinates of the center point of the chip to obtain the attachment position offset; and Step S104: If the offset of the attachment position is greater than the control value, an alarm message is issued.

[0033] For example, it is necessary to transform the coordinates of the center point of the chip attachment area from the image coordinate system to the world coordinate system, and transform the coordinates of the chip's center point from the image coordinate system to the world coordinate system. Then, the difference between the coordinates of the center point of the chip attachment area and the coordinates of the chip's center point is calculated to obtain the attachment position offset.

[0034] For example, the attachment position offset includes: a lateral attachment position offset and a longitudinal attachment position offset, wherein the lateral attachment position offset is the difference between the abscissa of the center point of the chip attachment area and the abscissa of the center point of the chip, and the longitudinal attachment position offset is the difference between the ordinate of the center point of the chip attachment area and the ordinate of the center point of the chip.

[0035] For example, assuming that the chip's attachment position offset reaches the offset threshold, the product is determined to be defective. In this case, the control value is set to be less than the offset threshold, and the absolute value of the difference between the control value and the offset threshold is less than a preset value. During the production process, when the chip's attachment position offset is greater than the control value (close to the offset threshold), an alarm message is immediately issued, instead of issuing an alarm message only when the chip's attachment position offset reaches the offset threshold. This early warning control strategy can control the chip's attachment position offset within a range less than the offset threshold, effectively avoiding the generation of defective products.

[0036] Through the above embodiments, before the chip is attached to the substrate, an image of the substrate is acquired using an image acquisition device, and the coordinates of the center point of the chip attachment area on the substrate are determined based on the substrate image; after the chip is attached to the substrate, an image of the chip is acquired using an image acquisition device, and the coordinates of the center point of the chip are determined based on the chip image; the difference between the coordinates of the center point of the chip attachment area and the coordinates of the center point of the chip is calculated to obtain the attachment position offset; and an alarm message is issued if the attachment position offset is greater than the control value. This application can detect the chip attachment position offset of each product and issue an alarm message if the chip attachment position offset is greater than the control value, realizing real-time monitoring of the chip attachment position offset during the production process, avoiding the generation of batch defective products, improving the product qualification rate, and solving the problem of the lack of a method for real-time monitoring of chip attachment position offset during the production process in the prior art.

[0037] In one alternative embodiment, such as Figure 4As shown, the substrate 1 is further provided with a first marker point 21 and a second marker point 22, which are located at opposite ends of the diagonal of the chip mounting area 7. The step of determining the coordinates of the center point of the chip mounting area of ​​the substrate based on the substrate image includes: Based on the aforementioned substrate image, the coordinates of the first target vertex 63 and the second target vertex 64 are determined. The first target vertex 63 is the vertex of the outer contour of the first marker point 21 that is furthest from the chip attachment area 7 along the first diagonal direction, where the first diagonal direction is the diagonal direction of the chip attachment area 7. The second target vertex 64 is the vertex of the outer contour of the second marker point 22 that is furthest from the chip attachment area 7 along the first diagonal direction. The coordinates of the center point of the chip attachment area 7 are obtained by calculating the average of the coordinates of the first target vertex 63 and the second target vertex 64.

[0038] For example, such as Figure 4 As shown, the direction of the first diagonal can be d1 or the opposite direction to d1.

[0039] For example, such as Figure 4 As shown, regarding the design of substrate 1, the center point of the line connecting the first target vertex 63 and the second target vertex 64 coincides with the center point of the chip attachment area 7. Therefore, by calculating the average of the coordinates of the first target vertex 63 and the second target vertex 64, the coordinates of the center point of the chip attachment area 7 are obtained, which are (x1, y1).

[0040] In one alternative embodiment, such as Figure 4 As shown, the step of acquiring a substrate image through an image acquisition device includes: acquiring a first marker region image 61 and a second marker region image 62 through the image acquisition device, wherein the first marker region image 61 includes the first marker 21 and the second marker region image 62 includes the second marker 22. For example, such as Figure 4 As shown, the control module acquires a first marker region image 61 and a second marker region image 62. The first marker region image 61 contains the first marker point 21, and the second marker region image 62 contains the second marker point 22. Figure 4 For example, the shape of the first marker region image 61 is rectangular and the shape of the second marker region image 62 is rectangular. The size and shape of the first marker region image are not limited in this application, as long as the first marker region image 61 contains all of the first marker point 21 and the second marker region image 62 contains all of the second marker point 22.

[0041] For example, such as Figure 2 and Figure 4 As shown, the control module stores first marker point information, which includes the coordinates of one or more points on the first marker point 21 in the world coordinate system and the size of the first marker point 21. Based on the first marker point information, the control module controls the image acquisition device 4 to move directly above the first marker point 21 on the substrate 1 and controls the image acquisition device 4 to acquire the first marker point area image 61. The control module also stores second marker point information, which includes the coordinates of one or more points on the second marker point 22 in the world coordinate system and the size of the second marker point 22. Based on the second marker point information, the control module controls the image acquisition device 4 to move directly above the second marker point 22 on the substrate 1 and controls the image acquisition device 4 to acquire the second marker point area image 62.

[0042] like Figure 4 As shown, the step of determining the coordinates of the first target vertex 63 and the second target vertex 64 based on the above substrate image includes: The first marker region image 61 and the second marker region image 62 are binarized respectively, and the outer contours of the first marker 21 and the second marker 22 are extracted from the binary images of the first marker region image 61 and the second marker region image 62 respectively; and Based on the outer contour of the first marker point 21, the coordinates of the first target vertex 63 are determined, and based on the outer contour of the second marker point 22, the coordinates of the second target vertex 64 are determined.

[0043] For example, such as Figure 4 As shown, the control module performs binarization processing on the first marker point region image 61, processing the outline of the first marker point 21 in the first marker point region image 61 to black and processing the rest of the first marker point region image 61 to white, thereby extracting the outer outline of the first marker point 21. Alternatively, the outline of the first marker point 21 in the first marker point region image 61 can be processed to white and the rest of the first marker point region image 61 can be processed to black. This application does not impose any restrictions. The control module performs binarization processing on the second marker point region image 62, processing the outline of the second marker point 22 in the second marker point region image 62 to black and processing the rest of the second marker point region image 62 to white, thereby extracting the outer outline of the second marker point 22. Alternatively, the outline of the second marker point 22 in the second marker point region image 62 can be processed to white and the rest of the second marker point region image 62 can be processed to black. This application does not impose any restrictions.

[0044] For example, such as Figure 4As shown, the origin of the image coordinate system is set as the upper left vertex of the first marker point region image 61. Based on the outer contour of the first marker point 21, the coordinates of the first target vertex 63 are determined. At this time, the point with the smallest sum of the horizontal and vertical coordinates in the outer contour of the first marker point 21 can be determined as the first target vertex 63. The method for determining the coordinates of the second target vertex 64 is similar. Other methods in the prior art can also be used to determine the coordinates of the first target vertex 63 and the second target vertex 64. This application does not impose any restrictions.

[0045] In an optional embodiment, as shown in Figures 5(a) and 5(b), the step of determining the coordinates of the center point of the chip 5 based on the chip image includes: Based on the aforementioned chip image, the coordinates of the third target vertex 85 and the fourth target vertex 86 are determined. The third target vertex 85 and the fourth target vertex 86 are two vertices of the outer contour of the chip 5 along the second diagonal direction, where the second diagonal direction is the diagonal direction of the outer contour of the chip 5. Calculate the average of the coordinates of the third target vertex 85 and the fourth target vertex 86 to determine the coordinates of the center point of the chip 5.

[0046] For example, as shown in Figure 5(a), the direction of the second diagonal is d2 or the opposite direction of d2. At this time, if the center point of the chip attachment area 7 and the center point of the chip 5 are completely coincident, the direction of the second diagonal coincides with the direction of the first diagonal. As shown in Figure 5(b), the direction of the second diagonal is d3 or the opposite direction of d3.

[0047] For example, as shown in Figures 5(a) and 5(b), the coordinates of the center point of chip 5 are (x2, y2).

[0048] In an optional embodiment, as shown in Figures 5(a) and 5(b), the outer contour of the chip is composed of a first side, a second side, a third side, and a fourth side. The first side and the third side are parallel, and the second side and the fourth side are parallel. The step of acquiring the chip image through the image acquisition device includes: acquiring a first side region image 81, a second side region image 82, a third side region image 83, and a fourth side region image 84 through the image acquisition device. The first side region image 81 includes a first target segment 91 of the first side, the second side region image 82 includes a second target segment 92 of the second side, the third side region image 83 includes a third target segment 93 of the third side, and the fourth side region image 84 includes a fourth target segment 94 of the fourth side. For example, as shown in Figures 5(a) and 5(b), the control module acquires a first side region image 81, a second side region image 82, a third side region image 83, and a fourth side region image 84. The first side region image 81 contains a first target segment 91 of the first side, the second side region image 82 contains a second target segment 92 of the second side, the third side region image 83 contains a third target segment 93 of the third side, and the fourth side region image 84 contains a fourth target segment 94 of the fourth side. Figure 4 The first side region image 81, the second side region image 82, the third side region image 83, and the fourth side region image 84 are provided as examples, all of which are rectangular. The size and shape of the first side region image 81, the second side region image 82, the third side region image 83, and the fourth side region image 84 are not limited in this application, as long as the first side region image 81 includes the portion of the first side, the second side region image 82 includes the portion of the second side, the third side region image 83 includes the portion of the third side, and the fourth side region image 84 includes the portion of the fourth side.

[0049] For example, such as Figure 3 As shown in Figures 5(a) and 5(b), the control module stores chip information, which includes: the coordinates of one or more points on the first side in the world coordinate system and the size of the first side; the coordinates of one or more points on the second side in the world coordinate system and the size of the second side; the coordinates of one or more points on the third side in the world coordinate system and the size of the third side; and the coordinates of one or more points on the fourth side in the world coordinate system and the size of the fourth side. Based on the chip information, the control module sequentially executes the following commands: control the image acquisition device 4 to move directly above the first side of the chip and acquire the first side region image 81; control the image acquisition device 4 to move directly above the second side of the chip and acquire the second side region image 82; control the image acquisition device 4 to move directly above the third side of the chip and acquire the third side region image 83; and control the image acquisition device 4 to move directly above the fourth side of the chip and acquire the fourth side region image 84.

[0050] As shown in Figures 5(a) and 5(b), based on the above chip images, the coordinates of the third target vertex 85 and the fourth target vertex 86 are determined, including: The first side region image 81, the second side region image 82, the third side region image 83, and the fourth side region image 84 are binarized respectively, and the first target segment 91, the second target segment 92, the third target segment 93, and the fourth target segment 94 are extracted from the binary images of the first side region image 81, the second side region image 82, the third side region image 83, and the fourth side region image 84 respectively; and The coordinates of the intersection of the extension of the first target segment 91 and the extension of the second target segment 92 are determined as the coordinates of the third target vertex 85, and the coordinates of the intersection of the extension of the third target segment 93 and the extension of the fourth target segment 94 are determined as the coordinates of the fourth target vertex 86.

[0051] For example, as shown in Figures 5(a) and 5(b), the control module performs binarization processing on the first side region image 81, processing the first target segment 91 in the first side region image 81 to black and processing the rest of the first side region image 81 to white, thereby extracting the first target segment 91. The control module performs binarization processing on the second side region image 82, processing the second target segment 92 in the second side region image 82 to black and processing the rest of the second side region image 82 to white, thereby extracting the second target segment 92. The control module performs binarization processing on the third side region image 83, processing the third target segment in the third side region image 83 to black and processing the rest of the third target segment 92 to white. The third target segment 93 is processed as black, and the remaining parts of the third side region image 83 are processed as white, thereby extracting the third target segment 93. The control module performs binarization processing on the fourth side region image 84, processing the fourth target segment 94 in the fourth side region image 84 as black, and processing the remaining parts of the fourth side region image 84 as white, thereby extracting the fourth target segment 94. Alternatively, the first target segment 91 in the first side region image 81 can be processed as white, and the remaining parts of the first side region image 81 can be processed as black. This application does not impose any restrictions. The binarization processing of the second side region image 82, the third side region image 83, and the fourth side region image 84 is similar.

[0052] In an optional embodiment, prior to step S101, the method further includes: The cumulative number of chips attached is obtained through the attachment equipment, which is the cumulative number of chips attached by the attachment equipment. When the cumulative number of attachments meets the preset conditions, the offset detection mode is entered. The preset conditions are that the ratio of the cumulative number of attachments to N is a positive integer, and N is a positive integer.

[0053] For example, when the cumulative number of attachments meets the preset conditions, the offset detection mode is entered. The offset detection mode executes the above steps S101, S102, S103 and S104 in sequence. The chip attachment position offset is detected only when the cumulative number of attachments meets the preset conditions, instead of detecting the attachment position offset of each chip, thereby reducing the detection cost.

[0054] For example, when the cumulative number of chips attached does not meet the preset conditions, the offset detection mode is not entered. At this time, the coordinates of the center point of the chip attachment area are determined by the method in the prior art, so as to provide accurate positioning for the chip to be attached to the substrate.

[0055] In an optional embodiment, after step S104, the method further includes: Exit the offset detection mode described above.

[0056] In an optional embodiment, after step S103, the method further includes: If the offset at the attachment position is less than or equal to the control value, exit the offset detection mode.

[0057] For example, if the offset of the attachment position is greater than the control value, an alarm message is issued and the offset detection mode is exited; if the offset of the attachment position is less than or equal to the control value, the offset detection mode is exited directly.

[0058] Figure 6 A chip mounting position offset detection device is provided in this application embodiment. The device is applied to a control module and includes: The first acquisition and determination module 10 is used to acquire an image of the substrate through an image acquisition device before the chip is attached to the substrate, and to determine the coordinates of the center point of the chip attachment area of ​​the substrate based on the substrate image. The second acquisition and determination module 20 is used to acquire a chip image through the image acquisition device after the chip is attached to the substrate, and to determine the coordinates of the center point of the chip based on the chip image. Calculation module 30 is used to calculate the difference between the coordinates of the center point of the chip attachment area and the coordinates of the center point of the chip, to obtain the attachment position offset; and The alarm module 40 is used to issue an alarm message when the offset of the above-mentioned attachment position is greater than the control value.

[0059] In one alternative embodiment, such as Figure 4As shown, the substrate 1 is further provided with a first marker point 21 and a second marker point 22, which are located at opposite ends of the diagonal of the chip mounting area 7. The step of determining the coordinates of the center point of the chip mounting area of ​​the substrate based on the substrate image includes: Based on the aforementioned substrate image, the coordinates of the first target vertex 63 and the second target vertex 64 are determined. The first target vertex 63 is the vertex of the outer contour of the first marker point 21 that is furthest from the chip attachment area 7 along the first diagonal direction, where the first diagonal direction is the diagonal direction of the chip attachment area 7. The second target vertex 64 is the vertex of the outer contour of the second marker point 22 that is furthest from the chip attachment area 7 along the first diagonal direction. The coordinates of the center point of the chip attachment area 7 are obtained by calculating the average of the coordinates of the first target vertex 63 and the second target vertex 64.

[0060] In one alternative embodiment, such as Figure 4 As shown, the step of acquiring a substrate image through an image acquisition device includes: acquiring a first marker region image 61 and a second marker region image 62 through the image acquisition device, wherein the first marker region image 61 includes the first marker 21 and the second marker region image 62 includes the second marker 22. like Figure 4 As shown, the step of determining the coordinates of the first target vertex 63 and the second target vertex 64 based on the above substrate image includes: The first marker region image 61 and the second marker region image 62 are binarized respectively, and the outer contours of the first marker 21 and the second marker 22 are extracted from the binary images of the first marker region image 61 and the second marker region image 62 respectively; and Based on the outer contour of the first marker point 21, the coordinates of the first target vertex 63 are determined, and based on the outer contour of the second marker point 22, the coordinates of the second target vertex 64 are determined.

[0061] In an optional embodiment, as shown in Figures 5(a) and 5(b), the step of determining the coordinates of the center point of the chip 5 based on the chip image includes: Based on the aforementioned chip image, the coordinates of the third target vertex 85 and the fourth target vertex 86 are determined. The third target vertex 85 and the fourth target vertex 86 are two vertices of the outer contour of the chip 5 along the second diagonal direction, where the second diagonal direction is the diagonal direction of the outer contour of the chip 5. Calculate the average of the coordinates of the third target vertex 85 and the fourth target vertex 86 to determine the coordinates of the center point of the chip 5.

[0062] In an optional embodiment, as shown in Figures 5(a) and 5(b), the outer contour of the chip is composed of a first side, a second side, a third side, and a fourth side. The first side and the third side are parallel, and the second side and the fourth side are parallel. The step of acquiring the chip image through the image acquisition device includes: acquiring a first side region image 81, a second side region image 82, a third side region image 83, and a fourth side region image 84 through the image acquisition device. The first side region image 81 includes a first target segment 91 of the first side, the second side region image 82 includes a second target segment 92 of the second side, the third side region image 83 includes a third target segment 93 of the third side, and the fourth side region image 84 includes a fourth target segment 94 of the fourth side. As shown in Figures 5(a) and 5(b), based on the above chip images, the coordinates of the third target vertex 85 and the fourth target vertex 86 are determined, including: The first side region image 81, the second side region image 82, the third side region image 83, and the fourth side region image 84 are binarized respectively, and the first target segment 91, the second target segment 92, the third target segment 93, and the fourth target segment 94 are extracted from the binary images of the first side region image 81, the second side region image 82, the third side region image 83, and the fourth side region image 84 respectively; and The coordinates of the intersection of the extension of the first target segment 91 and the extension of the second target segment 92 are determined as the coordinates of the third target vertex 85, and the coordinates of the intersection of the extension of the third target segment 93 and the extension of the fourth target segment 94 are determined as the coordinates of the fourth target vertex 86.

[0063] In an optional embodiment, before the step of acquiring a substrate image via an image acquisition device and determining the coordinates of the center point of the chip attachment area of ​​the substrate based on the substrate image, the apparatus is further configured to: The cumulative number of chips attached is obtained through the attachment equipment, which is the cumulative number of chips attached by the attachment equipment. When the cumulative number of attachments meets the preset conditions, the offset detection mode is entered. The preset conditions are that the ratio of the cumulative number of attachments to N is a positive integer, and N is a positive integer.

[0064] In an optional embodiment, after issuing the alarm message, the above-mentioned device is further used to: Exit the offset detection mode described above.

[0065] In an optional embodiment, after calculating the difference between the coordinates of the center point of the substrate and the coordinates of the center point of the chip to obtain the attachment position offset, the apparatus is further configured to: If the offset at the attachment position is less than or equal to the control value, exit the offset detection mode.

[0066] This application also provides a chip attachment position offset detection system in its embodiments, the system comprising: Application equipment; Image acquisition equipment; and The control module is used to implement the steps of the chip attachment position offset detection method provided in any of the foregoing method embodiments.

[0067] For example, the image acquisition device may employ a charge-coupled device (CCD), which may be referred to as a CCD image sensor.

[0068] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps of the chip attachment position offset detection method provided in any of the foregoing method embodiments.

[0069] The beneficial technical effects of this application are as follows: 1) It can detect the offset of the mounting position of each chip, realize real-time monitoring of the chip mounting position offset during the production process, avoid the generation of batch defective products, and improve the product qualification rate.

[0070] 2) There is no need to remove the product from the production line for measurement, the time is short and it will not affect production efficiency or cause product scrap.

[0071] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0072] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented using software plus a general-purpose hardware platform, or of course, using hardware. Based on this understanding, the above technical solutions, in essence or the parts that contribute to the related technology, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0073] It should be understood that the terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “described” as used herein may also include the plural forms. The terms “comprising,” “including,” “containing,” and “having” are inclusive and therefore indicate the presence of the stated features, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or combinations thereof. The method steps, processes, and operations described herein are not construed as requiring them to be performed in a particular order described or illustrated unless the order of performance is explicitly indicated. It should also be understood that additional or alternative steps may be used.

[0074] The above description is merely a specific embodiment of the present invention, enabling those skilled in the art to understand or implement the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A method for detecting chip attachment position offset, characterized in that, The method is applied to a control module, and the method includes: Before the chip is attached to the substrate, an image of the substrate is acquired using an image acquisition device, and the coordinates of the center point of the chip attachment area of ​​the substrate are determined based on the substrate image. After the chip is attached to the substrate, an image of the chip is acquired by the image acquisition device, and the coordinates of the center point of the chip are determined based on the chip image. Calculate the difference between the coordinates of the center point of the chip attachment area and the coordinates of the center point of the chip to obtain the attachment position offset; and If the offset of the attachment position is greater than the control value, an alarm message will be issued.

2. The method according to claim 1, characterized in that, The substrate is further provided with a first marker point and a second marker point, the first marker point and the second marker point being located at opposite ends of the diagonal of the chip mounting area, respectively. The step of determining the coordinates of the center point of the chip mounting area of ​​the substrate based on the substrate image includes: Based on the substrate image, the coordinates of a first target vertex and a second target vertex are determined. The first target vertex is the vertex of the outer contour of the first marker point that is away from the chip attachment area along a first diagonal direction, where the first diagonal direction is the diagonal direction of the chip attachment area. The second target vertex is the vertex of the outer contour of the second marker point that is away from the chip attachment area along the first diagonal direction. The coordinates of the center point of the chip attachment area are obtained by calculating the average of the coordinates of the first target vertex and the coordinates of the second target vertex.

3. The method according to claim 2, characterized in that, The step of acquiring a substrate image through an image acquisition device includes: acquiring a first marker region image and a second marker region image through the image acquisition device, wherein the first marker region image contains the first marker and the second marker region image contains the second marker; The step of determining the coordinates of the first target vertex and the second target vertex based on the substrate image includes: Binarization is performed on the first and second marker region images, respectively, and the outer contours of the first and second marker points are extracted from the binary images of the first and second marker region images, respectively; and Based on the outer contour of the first marker point, determine the coordinates of the first target vertex; based on the outer contour of the second marker point, determine the coordinates of the second target vertex.

4. The method according to claim 1, characterized in that, The step of determining the coordinates of the center point of the chip based on the chip image includes: Based on the chip image, the coordinates of a third target vertex and a fourth target vertex are determined. The third target vertex and the fourth target vertex are two vertices of the outer contour of the chip along the second diagonal direction, where the second diagonal direction is the diagonal direction of the outer contour of the chip. The coordinates of the third target vertex and the fourth target vertex are averaged to determine the coordinates of the chip's center point.

5. The method according to claim 4, characterized in that, The outer contour of the chip is composed of a first side, a second side, a third side, and a fourth side. The first side and the third side are parallel, and the second side and the fourth side are parallel. The step of acquiring the chip image through the image acquisition device includes: acquiring an image of the first side region, an image of the second side region, an image of the third side region, and an image of the fourth side region through the image acquisition device. The first side region image contains a first target segment of the first side, the second side region image contains a second target segment of the second side, the third side region image contains a third target segment of the third side, and the fourth side region image contains a fourth target segment of the fourth side. Based on the chip image, the coordinates of the third target vertex and the fourth target vertex are determined, including: The first side region image, the second side region image, the third side region image, and the fourth side region image are each binarized, and the first target segment, the second target segment, the third target segment, and the fourth target segment are extracted from the binary images of the first side region image, the second side region image, the third side region image, and the fourth side region image, respectively; and The coordinates of the intersection point of the extension lines of the first target segment and the second target segment are determined as the coordinates of the third target vertex, and the coordinates of the intersection point of the extension lines of the third target segment and the fourth target segment are determined as the coordinates of the fourth target vertex.

6. The method according to claim 1, characterized in that, Before the steps of acquiring a substrate image using an image acquisition device and determining the coordinates of the center point of the chip mounting area of ​​the substrate based on the substrate image, the method further includes: The cumulative number of chips attached is obtained through the attachment equipment, whereby the cumulative number of chips attached by the attachment equipment is the cumulative number of chips attached. When the cumulative number of attachments meets a preset condition, the offset detection mode is entered. The preset condition is that the ratio of the cumulative number of attachments to N is a positive integer, and N is a positive integer.

7. The method according to claim 6, characterized in that, After issuing the alarm message, the method further includes: Exit the offset detection mode.

8. The method according to claim 6, characterized in that, After calculating the difference between the coordinates of the center point of the substrate and the coordinates of the center point of the chip to obtain the attachment position offset, the method further includes: If the offset at the attachment position is less than or equal to the control value, exit the offset detection mode.

9. A chip mounting position offset detection device, characterized in that, The device is used in the control module, and the device includes: The first acquisition and determination module is used to acquire an image of the substrate through an image acquisition device before the chip is attached to the substrate, and to determine the coordinates of the center point of the chip attachment area of ​​the substrate based on the substrate image. The second acquisition and determination module is used to acquire a chip image through the image acquisition device after the chip is attached to the substrate, and determine the coordinates of the center point of the chip based on the chip image; The calculation module is used to calculate the difference between the coordinates of the center point of the chip attachment area and the coordinates of the center point of the chip, to obtain the attachment position offset; and The alarm module is used to issue an alarm message when the offset of the attachment position is greater than the control value.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the chip attachment position offset detection method as described in any one of claims 1 to 8.

11. A chip mounting position offset detection system, characterized in that, The system includes: Application equipment; Image acquisition equipment; and A control module, wherein the control module is used to implement the steps of the chip attachment position offset detection method as described in any one of claims 1 to 8.

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