Preparation method of chip resistor

Abstract

The invention discloses a preparation method of a chip resistor. The preparation method comprises the following steps: providing a resistor body unit; metallization layers are prepared on the two outer end faces of the resistor body unit, and the metallization layers and copper can be subjected to solid diffusion bonding; the two electrode units are attached to the outer sides of the metallization layers of the two outer end faces, solid diffusion pressing treatment is carried out, and a complex is obtained; carrying out plastic package on the composite body to form a plastic package body wrapping the resistor body units, and exposing the outer end parts, far away from the resistor body units, of the electrode units out of the two sides of the plastic package body; and electroplating copper on the two exposed outer end parts, and forming a thickened copper layer on each outer end part. According to the invention, the thinner electrode unit is used for solid diffusion pressing, the problem of residual stress locking caused by overlarge difference of thermal expansion coefficients due to overthick electrode materials is avoided from the source, and the technology of local electroplating and thickening of the electrode unit after plastic packaging is combined, so that high-power bearing is realized on the premise of not increasing the packaging size, and the packaging cost is reduced. And the service life of the product is prolonged.

Description

Technical Field

[0001] This invention relates to the field of resistor manufacturing technology, and in particular to a method for preparing a chip resistor. Background Technology

[0002] With the rapid miniaturization and high power density of electronic devices, the market has placed stringent demands on surface mount resistors for small packages, high power, and low resistance values. Traditional surface mount resistors typically use soldering to connect copper leads to a manganin (or other precision alloy) resistive element. However, when package sizes shrink to 1206, 0805, 0612 and below, and resistance values ​​are required to reach milliohm or even microohm levels, the soldering process faces fundamental challenges. According to the law of resistance... To achieve extremely low resistance, the length L of the resistor body needs to be as short as possible and the cross-sectional area S needs to be as large as possible. However, the width of the resistor body is extremely narrow in small sizes, resulting in an excessively small soldering area. This makes it difficult to ensure the reliability and consistency of the connection, and problems such as poor soldering and excessive interface resistance are likely to occur, which limits the yield and performance of the product.

[0003] To improve power handling capacity, a common approach is to increase electrode thickness to enhance heat dissipation and conductivity. However, in actual production, when using solid-state diffusion lamination to bond thick copper plates to precision alloys, the significant difference in the coefficients of thermal expansion (CTE) between copper and the precision alloy leads to substantial shrinkage stress at the interface during cooling after high-temperature lamination, resulting in residual stress lock-in. This residual stress not only causes micro-cracks at the interface but also leads to long-term resistance drift, making the device highly susceptible to failure during reliability tests such as temperature cycling, severely threatening its lifespan and stability. Summary of the Invention

[0004] The main objective of this invention is to propose a method for manufacturing chip resistors that achieves a highly reliable connection between the resistor and the electrode, while meeting the heat dissipation requirements of high-power resistors and improving product lifespan and stability.

[0005] To achieve the above objectives, this invention proposes a method for fabricating a chip resistor, comprising: A resistive element unit is provided, the resistive element unit having two outer end faces disposed opposite to each other in a first direction; Metallization layers are prepared on the two outer end faces, and the metallization layers are capable of solid-state diffusion bonding with copper; Two electrode units are attached one-to-one to the outer side of the metallization layer on the two outer end faces, and solid-state diffusion bonding is performed to form an interatomic metallurgical bond between the two electrode units and the resistive element unit through the metallization layer, resulting in a composite. The composite is then encapsulated to form a plastic encapsulation body covering the resistive element unit, with the outer ends of each electrode unit away from the resistive element unit exposed on both sides of the plastic encapsulation body in a first direction. Copper is electroplated onto the two exposed outer ends to form a thickened copper layer at each outer end.

[0006] Optionally, the thickness of the thickened copper layer is greater than or equal to and less than or equal to .

[0007] Optionally, in the step of attaching two electrode units one-to-one to the outer side of the metallization layer on the two outer end faces and performing solid-state diffusion bonding treatment, so that the two electrode units and the resistive element unit form an interatomic metallurgical bond through the metallization layer to obtain a composite, the ratio of the maximum thickness h of each electrode unit to the thickness H of the resistive element unit is greater than or equal to 1 and less than or equal to 3; and / or, In the step of encapsulating the composite to form an encapsulated body covering the resistive element unit, and exposing the outer ends of each electrode unit away from the resistive element unit on both sides of the encapsulated body in a first direction, the dimension d of each outer end in the first direction is greater than or equal to 0.2 mm and less than or equal to 0.45 mm.

[0008] Optionally, the step of providing a resistive element unit, the resistive element unit having two outer end faces arranged opposite each other in a first direction, the resistive element unit being an alloy strip, and each of the electrode units being a copper electrode strip; after the step of attaching the two electrode units one-to-one to the outside of the metallization layer of the two outer end faces and performing solid-state diffusion pressing treatment, so that the two electrode units and the resistive element unit form an interatomic metallurgical bond through the metallization layer to obtain a composite, and before the step of encapsulating the composite to form a plastic encapsulation body covering the resistive element unit, and exposing the outer ends of each electrode unit away from the resistive element unit on both sides of the plastic encapsulation body in the first direction, the step further includes: The composite is slit to obtain multiple individual preforms, each preform including a resistor unit located in the middle and electrode units located at both ends of the resistor in a first direction.

[0009] Optionally, the step of slicing the composite to obtain a plurality of individual preforms, each individual preform including a resistor unit located in the middle and electrode units located at both ends of the resistor in a first direction, includes: Step: Use a passivated cutting edge to scribing dividing guide lines on the surface of the copper electrode strip of the composite. The thickness of the copper electrode strip is h, and the depth of the dividing guide lines is controlled between 0.5h and 0.7h. Step: Perform a final cut along the dividing guide line to obtain the separated individual embryos.

[0010] Optionally, the steps of the scattering and bonding include: The metallization layer is formed by first depositing a nickel layer on the two outer end faces by magnetron sputtering or vacuum evaporation, and then depositing a copper layer on the nickel layer.

[0011] Optionally, in the step of first depositing a nickel layer on the two outer end faces by magnetron sputtering or vacuum evaporation, and then depositing a copper layer on the nickel layer to form the metallization layer, the nickel layer is deposited to a thickness greater than or equal to... and less than or equal to The thickness of the copper plating layer is greater than or equal to and less than or equal to .

[0012] Optionally, in the step of attaching the two electrode units one-to-one to the outside of the metallization layer on the two outer end faces and performing solid-state diffusion bonding treatment, so that the two electrode units and the resistive element unit form an interatomic metallurgical bond through the metallization layer to obtain the composite: The solid diffusion pressing process is carried out at a temperature of 300°C to 450°C and a pressure of 20 MPa to 50 MPa, with a holding time of 10 to 30 minutes.

[0013] Optionally, after the step of electroplating copper on the two exposed outer ends to form a thickened copper layer at each of the outer ends, the method further includes: A nickel layer and a tin layer are electroplated on the thickened copper layer.

[0014] Optionally, in the step of electroplating a nickel layer and a tin layer on the thickened copper layer, the thickness of the nickel layer is greater than or equal to... and less than or equal to The thickness of the tin layer is greater than or equal to and less than or equal to .

[0015] This invention provides a method for fabricating a chip resistor. This method utilizes thin electrode units for solid-state diffusion bonding, followed by a process of encapsulation and electroplating. This overcomes the deficiency of insufficient conductive cross-sectional area in thin electrodes, achieving high power handling capacity without increasing package size. It is understood that the traditional method for increasing power is to increase the thickness of the copper leads, but this is precisely the source of thermal stress.

[0016] Specifically, in the embodiments provided by this invention, the fabrication method first uses a thin electrode unit and a resistive element unit for solid-state diffusion lamination, which significantly reduces the material stiffness and shrinkage stress at the lamination interface. This allows for effective release of thermal stress during cooling, preventing it from concentrating and locking at the interface, thereby improving the formation of microcracks, suppressing long-term resistance drift, and significantly enhancing the reliability and lifespan of the chip resistor. The resistive element unit is then encapsulated with a molding compound, exposing only the outer end of the electrode unit. Subsequently, a thickened copper layer is selectively electroplated onto the exposed outer end. This method only locally increases the conductive cross-sectional area and heat capacity at the electrode end, without requiring a thick copper plate during the lamination stage. This effectively reduces on-resistance and thermal resistance while maintaining a small package size, meeting the requirements of high-power applications.

[0017] Furthermore, the introduction of a metallization layer in the solid-state diffusion bonding process ensures a reliable solid-state diffusion bond between the thin electrode unit and the resistive element unit, resulting in extremely low interfacial contact resistance, which is beneficial for achieving… High-precision control of low-resistance products meets the stringent requirements of high-frequency and high-current applications. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0019] Figure 1 This is a process flow diagram of an embodiment of the method for fabricating a chip resistor provided by the present invention; Figure 2 for Figure 1 A schematic diagram of the process of the resistive element unit and electrode unit of the mid-plate resistor before solid-state diffusion bonding; Figure 3 for Figure 2 A schematic diagram of the process after the resistive element unit and the electrode unit are pressed together to form a composite; Figure 4 for Figure 3 A schematic diagram of the process for cutting a complex into individual preforms; Figure 5 for Figure 4 A cross-sectional view at point hh; Figure 6 for Figure 4 A schematic diagram of the process of encapsulating a plastic sealant around a single preform; Figure 7 for Figure 6 Sectional view at point BB; Figure 8 for Figure 6 A schematic diagram of the copper plating process at the outer and middle ends; Figure 9 for Figure 8 Sectional view at point CC.

[0020] Explanation of icon numbers: The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0021] It should be noted that if the embodiments of the present invention involve directional indication, the directional indication is only used to explain the relative positional relationship and movement of the components in a certain specific posture. If the specific posture changes, the directional indication will also change accordingly.

[0022] Furthermore, if the embodiments of the present invention involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the meaning of "and / or" throughout the text is to include three parallel solutions. For example, "h and / or B" includes solution h, solution B, or a solution where both h and B are satisfied simultaneously.

[0023] Please see Figures 1 to 9 This invention relates to a method for fabricating a chip resistor. This method, through a combination of processes including pre-preparation of a metallization layer, solid-state diffusion lamination of thin electrode units, plastic encapsulation positioning, and selective electroplating for thickening, solves the problem of residual interface stress caused by differences in thermal expansion coefficients in traditional thick copper direct lamination processes. Simultaneously, it achieves high power handling capacity within a small package size. The technical solution of this invention will be described in detail below with reference to the accompanying drawings. However, those skilled in the art should understand that the specific embodiments described herein are only for explaining the invention and are not intended to limit the scope of protection of this invention.

[0024] like Figure 8 and Figure 9 As shown, the chip resistor 100 manufactured using the method of the present invention includes a resistive element unit 10, two electrode units 20, a molding compound 30, and a thickened copper layer 40. The resistive element unit 10 has two outer end faces 11 arranged opposite each other in a first direction (i.e., the length direction of the product). The two electrode units 20 are correspondingly disposed on the outer sides of the two outer end faces 11. The molding compound 30 covers the resistive element unit 10, and exposes the outer end face 21 of each electrode unit 20 away from the resistive element unit 10 on both sides of the molding compound 30 in the first direction. The thickened copper layer 40 is formed on each outer end face 21. Figures 2 to 9 A schematic diagram of the intermediate products involved in each step of the method of the present invention is shown.

[0025] like Figure 1 As shown, one embodiment of the method for fabricating a chip resistor provided by the present invention includes the following steps.

[0026] Step S1: Provide a resistor element 10, the resistor element 10 having two outer end faces 11 arranged opposite each other in a first direction.

[0027] In this step, the resistive element 10 refers to the component that constitutes the core of the resistive function. Its material is typically a precision alloy, such as manganese-copper alloy, nickel-chromium alloy, constantan, or other alloy materials with a low temperature coefficient of resistance. The resistive element 10 is generally block-shaped or sheet-shaped, and its two outer end faces 11 are the locations where it will subsequently connect to the electrode unit 20. Those skilled in the art can determine the thickness H and length D of the resistive element 10 based on the target resistance value and package dimensions. In actual production, the resistive element 10 can be provided in various forms; for example, it can be made from a roll or sheet of alloy strip as the processing base material, such as... Figure 2 As shown, using a strip material facilitates continuous mass production, improves processing efficiency, and reduces the cost per unit. In another embodiment, the resistive element 10 can also be a pre-cut discrete block (not shown in the figure). This form is suitable for flexible production of small batches and multiple varieties, eliminating the need for subsequent strip slitting. Regardless of the form used, the resistive element 10 must have two opposing and flat outer end faces 11 to facilitate subsequent metallization layer preparation and lamination. This step is fundamental to the entire fabrication method, providing the processing object for subsequent steps.

[0028] Step S2: Prepare a metallization layer on the two outer end faces 11, wherein the metallization layer is capable of solid-state diffusion bonding with copper.

[0029] In this step, the metallization layer refers to one or more thin metal films formed on the outer end face 11 of the resistive element 10, which serves as a transition interface between the resistive element 10 and the electrode element 20. Since a dense oxide film typically exists on the surface of precision alloys, it is difficult to achieve a reliable metallurgical bond if the electrode element 20 and the resistive element 10 are directly pressed together, even using a solid-state diffusion process. Therefore, a metallization layer needs to be prepared beforehand to provide a clean and active bonding surface. "Capable of solid-state diffusion bonding with copper" means that the surface material of the metallization layer is copper or a metal capable of interatomic diffusion with copper, thereby forming a diffusion connection of the same or compatible metals with the copper material of the electrode element 20 during the subsequent pressing process.

[0030] In a preferred embodiment, the metallization layer adopts a two-layer structure of "nickel layer + copper layer", and the specific preparation process includes: A nickel layer is first deposited on the two outer end faces 11 using magnetron sputtering or vacuum evaporation. The thickness of this nickel layer is typically controlled to be within [specific thickness range]. to The nickel layer serves as both a barrier and a bonding layer. On one hand, it prevents the copper in the subsequent electrode unit 20 from undergoing unfavorable interdiffusion with alloying elements (such as manganese, chromium, and nickel) in the resistor unit 10, thus preventing the formation of brittle intermetallic compounds. On the other hand, nickel exhibits excellent adhesion to the precision alloy substrate, allowing it to firmly attach to the outer end face 11. A copper layer is then plated onto the nickel layer, the thickness of which is typically controlled within a certain range. to The copper layer serves as a diffusion medium, creating conditions for subsequent copper-copper homometallic diffusion with electrode unit 20. Due to the good diffusion compatibility between homometals, high-quality metallurgical bonding can be achieved. In other optional embodiments, the metallization layer can also be a single copper layer or a nickel-copper-nickel multilayer structure; however, considering cost and process simplification, a nickel-copper bilayer structure is the preferred option. This step plays a role in interface activation and bridging in the overall technical solution, laying the foundation for subsequent high-reliability solid-state diffusion bonding.

[0031] Step S3: The two electrode units 20 are attached one-to-one to the outside of the metallization layer of the two outer end faces 11, and solid diffusion pressing is performed so that the two electrode units 20 and the resistive unit 10 form an interatomic metallurgical bond through the metallization layer to obtain the composite 200.

[0032] This step is the core process for achieving a highly reliable connection between the resistive element 10 and the electrode element 20. The electrode element 20 refers to the conductive component that forms the electrodes at both ends of the resistor product. Its material is preferably copper, because copper has excellent electrical and thermal conductivity, and it is the same metal as the copper layer in the metallization layer, which is beneficial for diffusion bonding. In this embodiment, the electrode element 20 uses a thinner material; that is, the thickness h of the electrode element 20 is significantly smaller than the thickness of the thick copper plate used for lamination in traditional processes.

[0033] In practice, the bonded components are placed in a vacuum diffusion bonding machine or a hot press, and subjected to high temperature and high pressure for a certain period of time under vacuum or inert gas protection. This pressure causes microscopic plastic deformation at the bonding interface, and the high temperature activates atomic diffusion, allowing atoms on both sides of the interface to migrate and form a metallurgical bond across the interface. In a preferred embodiment, the solid-state diffusion pressing process is controlled between 450°C and 200°C, the pressure between 20 MPa and 50 MPa, and the holding time between 10 and 30 minutes. Within these parameter ranges, the copper atoms on the metallization layer surface and the copper atoms in the electrode unit 20 gain sufficient energy to diffuse into each other, forming a strong interatomic bond at the interface, thus obtaining an integrated composite 200.

[0034] It should be noted that, since the electrode unit 20 in this embodiment is thin and has low rigidity, the shrinkage stress generated at the interface due to the difference in thermal expansion coefficients between the resistive body unit 10 and the electrode unit 20 during the cooling process after high-temperature pressing can be effectively released. It is not easy for residual stress to be concentrated and locked at the interface, thereby avoiding the microcracks and resistance drift problems mentioned in the background art.

[0035] In one specific embodiment, the ratio of the thickness h of the electrode unit 20 to the thickness H of the resistive element unit 10 is controlled between 1 and 3. This ratio range is an effective range that has been experimentally verified to balance stress relief and subsequent processing requirements.

[0036] Through solid-state diffusion pressing, such as Figure 3 and Figure 5 As shown, the resistive element 10 and the two electrode units 20 are metallurgically combined to form an integral component. The composite 200 can be in the form of a single discrete component or a continuous strip, depending on the form in which the resistive element 10 is provided in step S1.

[0037] Step S4: The composite 200 is encapsulated to form an encapsulated body 30 covering the resistive element 10, and the outer ends 21 of each electrode unit 20 away from the resistive element 10 are exposed on both sides of the encapsulated body 30 in the first direction.

[0038] In this step, molding refers to encapsulating the resistor element 10 with an insulating encapsulation material to provide mechanical protection, environmental protection, and electrical insulation. The encapsulation body 30 refers to the coating layer formed after the encapsulation material has cured. Its material is usually epoxy molding compound, especially high thermal conductivity epoxy molding compound, to facilitate heat dissipation.

[0039] Before encapsulation, the composite 200 needs to be processed according to its shape: if alloy strip is used in step S1, the composite 200 obtained in step S3 will be a continuous strip structure, such as... Figure 4 As shown, slitting is required before step S4 to obtain multiple individual preforms 300. The slitting step specifically includes: first, using a passivated cutting edge, scribe guide lines on the surface of the copper electrode strip of the composite 200. The thickness of the copper electrode strip is denoted as h, and the cutting depth of the guide lines is controlled between 0.5h and 0.7h. This semi-cutting process releases some stress and forms a precise fracture guidance path. Then, a final cut is performed along the guide lines to obtain the separated individual preforms 300. Each individual preform 300 includes a resistor unit 10 located in the middle and electrode units 20 located at both ends of the resistor unit 10 in the first direction. If step S1 uses a discrete block, the composite 200 itself is a single unit and can directly enter the molding process.

[0040] Optionally, the encapsulation process involves placing a single preform 300 into a precision encapsulation mold. The mold design requires that the outer end 21 of the electrode unit 20, which is away from the resistor unit 10, corresponds to the mold's mating surface or a specific protruding structure, so that these areas remain exposed after the encapsulating material is injected. Using transfer molding or injection molding processes, preheated molten high thermal conductivity epoxy molding compound is injected into the mold cavity and held under high temperature and pressure for a certain time to allow the encapsulating material to fill the cavity and solidify, forming the encapsulated body 30 covering the resistor unit 10. After solidification, demolding yields the desired product. Figure 6 and Figure 7 As shown, the intermediate product is a molded body 30 that encapsulates the resistor unit 10 and the outer end 21 of the electrode unit 20 is precisely exposed on both sides of the molded body 30.

[0041] The exposed dimension d of the outer end 21 is greater than or equal to 0.2 mm and less than or equal to 0.45 mm. This exposed dimension ensures sufficient area for subsequent electroplating thickening without affecting the miniaturization and mechanical strength of the package due to excessive exposure. This step plays a dual role in the overall technical solution: positioning and protection, and delineating the electroplating area. On the one hand, it provides permanent protection for the resistive element 10 through the molding compound 30; on the other hand, it provides a natural mask for subsequent selective electroplating, ensuring that the electroplating reaction only occurs on the exposed metal end face.

[0042] Step S5: Electroplat copper on the two exposed outer ends 21 to form a thickened copper layer 40 on each of the outer ends 21.

[0043] This step is crucial for achieving high power performance in a small package. The molding compound 30 formed in step S4 covers most of the resistive element 10 and the electrode element 20, with only the end face of the outer end 21 exposed. Therefore, when the molded product is immersed in the electroplating solution and a current is applied, the current only conducts at the exposed metal end faces, and copper ions are reduced and deposited on these end faces, thereby achieving selective electroplating.

[0044] The specific process for copper electroplating can employ a conventional acidic copper plating system, with the plating time adjusted according to the desired thickness of the copper layer 40. The preferred thickness of the copper layer 40 is... to This thickness range was determined after comprehensively considering improvements in conductivity, heat dissipation, electroplating efficiency, and cost. It should be noted that although the thickened copper layer 40 is only added to the outer end 21 of the electrode unit 20, due to copper's excellent electrical and thermal conductivity, this thickened copper layer 40 effectively increases the conductive cross-sectional area and heat capacity of the electrode end, significantly reducing the overall electrode's on-resistance and thermal resistance. This allows the product to meet the application requirements of high current and high power while maintaining a small package size. This step plays a role in performance compensation and improvement in the overall technical solution, making up for the potential deficiency in conductive cross-sectional area caused by using thin electrode units.

[0045] In a preferred embodiment, after step S5, the method further includes: Step S6: Electroplating a nickel layer and a tin layer on the thickened copper layer 40.

[0046] This is used to further form a functional plating layer on the outer surface of the thickened copper layer 40 to improve the solderability and long-term reliability of the product. The specific operation includes: firstly, electroplating a nickel layer onto the thickened copper layer 40. The nickel layer acts as a barrier layer to prevent the subsequent tin layer from diffusing with copper to form brittle intermetallic compounds. The thickness of the nickel layer is preferably controlled within a certain range. to Between. Then, a tin layer is electroplated on the nickel layer. The tin layer, as a solderable layer, ensures good solderability during surface mounting. The thickness of the tin layer is preferably controlled within. to Between. Electroplating can be done using a barrel plating method, where multiple individual products that have completed step S5 are placed in a barrel and rotated and tumbled in the electroplating solution to achieve batch electroplating.

[0047] The working principle of this invention can be summarized as the synergistic effect of "thin-layer connection and local thickening". First, a metallization layer is prepared on the outer end face 11 of the resistive element 10. This metallization layer solves the material science problem that it is difficult for precision alloy surfaces to form a reliable metallurgical bond with copper directly, providing an active interface for subsequent connection. Second, a thinner electrode unit 20 is used to perform solid-state diffusion pressing with the resistive element 10. Due to the lower rigidity of the electrode unit 20, the shrinkage stress generated by the difference in thermal expansion coefficients between the resistive element 10 and the electrode unit 20 during the cooling process after high-temperature pressing can be effectively released at the interface, unlike traditional thick copper pressing which locks in the interface and forms huge residual stress. This avoids the generation of microcracks and long-term resistance drift, significantly improving the reliability and service life of the product. Third, the resistive element 10 is encapsulated by the molding compound 30, exposing the outer end 21 of the electrode unit 20. This provides permanent protection for the resistive element 10 and defines a precise area for subsequent selective electroplating. Finally, copper is electroplated onto the exposed outer end 21 to form a thickened copper layer 40. Although this thickened copper layer 40 is only added locally at the electrode end, due to copper's excellent electrical and thermal conductivity, it effectively increases the conductive cross-sectional area and heat capacity at the electrode end, significantly reducing on-resistance and thermal resistance. This allows the product to achieve high power handling capacity while maintaining a small package size. Subsequent nickel and tin layers further ensure the product's solderability and long-term reliability.

[0048] Compared with existing technologies, the present invention has the following beneficial effects: First, by using a thinner electrode unit 20 for solid-state diffusion bonding, this embodiment avoids the residual stress lock-up problem caused by excessive thermal expansion coefficient differences due to excessive electrode material thickness, eliminates the generation of interface microcracks, suppresses long-term resistance drift, and significantly improves the reliability and service life of the device under harsh conditions such as temperature cycling. Second, by adopting a "molding first, electroplating later" process path, the present invention avoids thermal stress problems by using thin electrodes, and selectively electroplating a thickened copper layer 40 on the exposed outer end 21, achieving high power carrying capacity without increasing the overall package size, effectively reducing on-resistance and thermal resistance, and meeting the requirements of high-power applications. Third, by introducing a metallization layer, the present invention ensures that a reliable solid-state diffusion bond can still be formed between the thin electrode unit 20 and the resistive element unit 10, resulting in extremely low interface contact resistance, which is beneficial for achieving... The high-precision control of low-resistance products meets the stringent requirements of high-frequency and high-current applications. Fourth, the method of this invention is based on strips or blocks, and can obtain single blanks of different sizes through slitting, which can flexibly adapt to various small package sizes such as 0603 and 0402, and has good industrial applicability.

[0049] The above description is merely a preferred embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structural transformations made using the contents of the present invention's specification and drawings under the inventive concept of the present invention, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present invention.

[0050] The above description is merely a preferred embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structural transformations made using the contents of the present invention's specification and drawings under the inventive concept of the present invention, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present invention.

Claims

1. A method for fabricating a chip resistor, characterized in that, Includes the following steps: A resistive element unit is provided, the resistive element unit having two outer end faces disposed opposite to each other in a first direction; Metallization layers are prepared on the two outer end faces, and the metallization layers are capable of solid-state diffusion bonding with copper; Two electrode units are attached one-to-one to the outer side of the metallization layer on the two outer end faces, and solid-state diffusion bonding is performed to form an interatomic metallurgical bond between the two electrode units and the resistive unit through the metallization layer, resulting in a composite. The composite is then encapsulated to form a plastic encapsulation body covering the resistive unit, with the outer ends of each electrode unit away from the resistive unit exposed on both sides of the plastic encapsulation body in a first direction. Copper is electroplated onto the two exposed outer ends to form a thickened copper layer at each outer end.

2. The method for preparing a chip resistor as described in claim 1, characterized in that, The thickness of the thickened copper layer is greater than or equal to and less than or equal to .

3. The method for preparing a chip resistor as described in claim 1, characterized in that, In the step of attaching two electrode units one-to-one to the outer side of the metallization layer on the two outer end faces and performing solid-state diffusion bonding treatment, so that the two electrode units and the resistive element unit form an interatomic metallurgical bond through the metallization layer to obtain a composite, the ratio of the maximum thickness h of each electrode unit to the thickness H of the resistive element unit is greater than or equal to 1 and less than or equal to 3; and / or, In the step of encapsulating the composite to form an encapsulated body covering the resistive element unit, and exposing the outer ends of each electrode unit away from the resistive element unit on both sides of the encapsulated body in a first direction, the dimension d of each outer end in the first direction is greater than or equal to 0.2 mm and less than or equal to 0.45 mm.

4. The method for preparing a surface-mount resistor as described in any one of claims 1 to 3, characterized in that, The step of providing a resistive element unit, the resistive element unit having two outer end faces arranged opposite each other in a first direction, the resistive element unit being an alloy strip, and each of the electrode units being a copper electrode strip; after the step of attaching the two electrode units one-to-one to the outside of the metallization layer of the two outer end faces and performing solid-state diffusion pressing treatment, so that the two electrode units and the resistive element unit form an interatomic metallurgical bond through the metallization layer to obtain a composite, and before the step of encapsulating the composite to form a plastic encapsulation body covering the resistive element unit, and exposing the outer ends of each electrode unit away from the resistive element unit on both sides of the plastic encapsulation body in the first direction, the step further includes: The composite is slit to obtain multiple individual preforms, each preform including a resistor unit located in the middle and electrode units located at both ends of the resistor in a first direction.

5. The method for preparing a chip resistor as described in claim 4, characterized in that, The step of slicing the composite to obtain multiple individual preforms, each individual preform including a resistor unit located in the middle and electrode units located at both ends of the resistor in a first direction, includes: Step: Use a passivated cutting edge to scribing dividing guide lines on the surface of the copper electrode strip of the composite. The thickness of the copper electrode strip is h, and the depth of the dividing guide lines is controlled between 0.5h and 0.7h. Step: Perform a final cut along the dividing guide line to obtain the separated individual embryos.

6. The method for preparing a surface-mount resistor according to any one of claims 1 to 3, characterized in that, The step of preparing a metallization layer on the two outer end faces, wherein the metallization layer is capable of solid-state diffusion bonding with copper, includes: The metallization layer is formed by first depositing a nickel layer on the two outer end faces by magnetron sputtering or vacuum evaporation, and then depositing a copper layer on the nickel layer.

7. The method for preparing a chip resistor as described in claim 6, characterized in that, In the step of forming the metallization layer by first depositing a nickel layer on the two outer end faces using magnetron sputtering or vacuum evaporation, and then depositing a copper layer on the nickel layer, the nickel layer is deposited to a thickness greater than or equal to... and less than or equal to The thickness of the copper plating layer is greater than or equal to and less than or equal to .

8. The method for preparing a surface-mount resistor as described in any one of claims 1 to 3, characterized in that, In the step of attaching two electrode units one-to-one to the outside of the metallization layer on the two outer end faces and performing solid-state diffusion bonding treatment, so that the two electrode units and the resistive element unit form an interatomic metallurgical bond through the metallization layer to obtain the composite: The solid diffusion pressing process is carried out at a temperature of 300°C to 450°C and a pressure of 20 MPa to 50 MPa, with a holding time of 10 to 30 minutes.

9. The method for preparing a chip resistor according to any one of claims 1 to 3, characterized in that, After the step of electroplating copper on the two exposed outer ends to form a thickened copper layer at each of the outer ends, the method further includes: A nickel layer and a tin layer are electroplated on the thickened copper layer.

10. The method for preparing a chip resistor as described in claim 9, characterized in that, In the step of electroplating a nickel layer and a tin layer on the thickened copper layer, the thickness of the nickel layer is greater than or equal to and less than or equal to The thickness of the tin layer is greater than or equal to and less than or equal to .

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